Re: [PATCH 1/2] drm/mediatek: set panel orientation before drm_dev_register().
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年4月20日 週二 下午5:05寫道：
>
> On Fri, Apr 9, 2021 at 12:53 PM Hsin-Yi Wang wrote:
> >
> > drm_dev_register() sets connector->registration_state to
> > DRM_CONNECTOR_REGISTERED and dev->registered to true. If
> > drm_connector_set_panel_orientation() is first called after
> > drm_dev_register(), it will fail several checks and results in following
> > warning. So set panel orientation in dsi before drm_dev_register() is
> > called.
All connector would have this problem, so I would like to fix this in
common code.
In drm_connector_init(), you could add "panel orientation" property
with value DRM_MODE_PANEL_ORIENTATION_UNKNOWN, so it would not add new
object when get modes.
Regards,
Chun-Kuang.
> >
> > [4.480976] [ cut here ]
> > [4.485603] WARNING: CPU: 5 PID: 369 at
> > drivers/gpu/drm/drm_mode_object.c:45 __drm_mode_object_add+0xb4/0xbc
> >
> > [4.609772] Call trace:
> > [4.612208] __drm_mode_object_add+0xb4/0xbc
> > [4.616466] drm_mode_object_add+0x20/0x2c
> > [4.620552] drm_property_create+0xdc/0x174
> > [4.624723] drm_property_create_enum+0x34/0x98
> > [4.629241] drm_connector_set_panel_orientation+0x64/0xa0
> > [4.634716] boe_panel_get_modes+0x88/0xd8
> > [4.638802] drm_panel_get_modes+0x2c/0x48
> > [4.642887] panel_bridge_get_modes+0x1c/0x28
> > [4.647233] drm_bridge_connector_get_modes+0xa0/0xd4
> > [4.652273] drm_helper_probe_single_connector_modes+0x218/0x700
> > [4.658266] drm_mode_getconnector+0x1b4/0x45c
> > [4.662699] drm_ioctl_kernel+0xac/0x128
> > [4.11] drm_ioctl+0x268/0x410
> > [4.670002] drm_compat_ioctl+0xdc/0xf0
> > [4.673829] __arm64_compat_sys_ioctl+0xc8/0x100
> > [4.678436] el0_svc_common+0xf4/0x1c0
> > [4.682174] do_el0_svc_compat+0x28/0x3c
> > [4.686088] el0_svc_compat+0x10/0x1c
> > [4.689738] el0_sync_compat_handler+0xa8/0xcc
> > [4.694171] el0_sync_compat+0x178/0x180
> > [4.698082] ---[ end trace b4f2db9d9c88610b ]---
> > [4.702721] [ cut here ]
> > [4.707329] WARNING: CPU: 5 PID: 369 at
> > drivers/gpu/drm/drm_mode_object.c:243 drm_object_attach_property+0x48/0xb8
> >
> > [4.833830] Call trace:
> > [4.836266] drm_object_attach_property+0x48/0xb8
> > [4.840958] drm_connector_set_panel_orientation+0x84/0xa0
> > [4.846432] boe_panel_get_modes+0x88/0xd8
> > [4.850516] drm_panel_get_modes+0x2c/0x48
> > [4.854600] panel_bridge_get_modes+0x1c/0x28
> > [4.858946] drm_bridge_connector_get_modes+0xa0/0xd4
> > [4.863984] drm_helper_probe_single_connector_modes+0x218/0x700
> > [4.869978] drm_mode_getconnector+0x1b4/0x45c
> > [4.874410] drm_ioctl_kernel+0xac/0x128
> > [4.878320] drm_ioctl+0x268/0x410
> > [4.881711] drm_compat_ioctl+0xdc/0xf0
> > [4.885536] __arm64_compat_sys_ioctl+0xc8/0x100
> > [4.890142] el0_svc_common+0xf4/0x1c0
> > [4.893879] do_el0_svc_compat+0x28/0x3c
> > [4.897791] el0_svc_compat+0x10/0x1c
> > [4.901441] el0_sync_compat_handler+0xa8/0xcc
> > [4.905873] el0_sync_compat+0x178/0x180
> > [4.909783] ---[ end trace b4f2db9d9c88610c ]---
> >
> > Signed-off-by: Hsin-Yi Wang
>
> ping on the thread, thanks.
>
> > ---
> > drivers/gpu/drm/mediatek/mtk_dsi.c | 9 +
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > index ae403c67cbd9..45a702ee09f3 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > @@ -205,6 +205,7 @@ struct mtk_dsi {
> > u32 irq_data;
> > wait_queue_head_t irq_wait_queue;
> > const struct mtk_dsi_driver_data *driver_data;
> > + enum drm_panel_orientation orientation;
> > };
> >
> > static inline struct mtk_dsi *bridge_to_dsi(struct drm_bridge *b)
> > @@ -966,6 +967,8 @@ static int mtk_dsi_encoder_init(struct drm_device *drm,
> > struct mtk_dsi *dsi)
> > }
> > drm_connector_attach_encoder(dsi->connector, >encoder);
> >
> > + drm_connector_set_panel_orientation(dsi->connector,
> > dsi->orientation);
> > +
> > return 0;
> >
> > err_cleanup_encoder:
> > @@ -1029,6 +1032,12 @@ static int mtk_dsi_probe(struct platform_device
> > *pdev)
> > ret = PTR_ERR(dsi->next_bridge);
> > goto err_unregister_host;
> > }
> > +
> > + ret = of_drm_get_panel_orientation(panel->dev->of_node,
> > >orientation);
> > + if (ret) {
> > + dev_err(dev, "failed to get panel orientation
> > %d\n", ret);
> > + return ret;
> > + }
> > }
> >
> > dsi->driver_data = of_device_get_match_data(dev);
> > --
> > 2.31.1.295.g9ea45b61b8-goog
> >
Re: [PATCH v2, 3/5] Revert "dt-bindings: mailbox: mtk-gce: fix incorrect mbox-cells value"
Hi, Yongqiang: Yongqiang Niu 於 2021年4月12日 週一 下午7:19寫道： > > This reverts commit f83b03fc727ab56a77e68713d6e40299698f3c9f. > > Signed-off-by: Yongqiang Niu > --- > Documentation/devicetree/bindings/mailbox/mtk-gce.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > index 7771eca..cf48cd8 100644 > --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > @@ -47,7 +47,7 @@ Example: > interrupts = ; > clocks = < CLK_INFRA_GCE>; > clock-names = "gce"; > - #mbox-cells = <2>; > + #mbox-cells = <3>; I think we should not change the binding just to fix software bug. I think there are many temporary solution to fix drm bug. If drm bug is caused by cursor plane, you could temporarily let drm not support cursor plane to fix it (in [1], do not return DRM_PLANE_TYPE_CURSOR). But I would like you to find out the correct solution rather than a temporary solution because this bug is not so urgent. (For me, bug of build fail, boot fail, black screen is urgent). [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/mediatek/mtk_drm_crtc.c?h=v5.12-rc7#n699 Regards, Chun-Kuang. > }; > > Example for a client device: > -- > 1.8.1.1.dirty >
Re: [PATCH -next] drm/mediatek: Fix PM reference leak in mtk_crtc_ddp_hw_init()
Hi, Wang:
Wang Li 於 2021年4月10日 週六 上午11:31寫道：
>
> pm_runtime_get_sync will increment pm usage counter even it failed.
> Forgetting to putting operation will result in reference leak here.
> Fix it by replacing it with pm_runtime_resume_and_get to keep usage
> counter balanced.
Reviewed-by: Chun-Kuang Hu
>
> Reported-by: Hulk Robot
> Signed-off-by: Wang Li
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 54ab3a324752..f1954242d8f6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -259,7 +259,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc
> *mtk_crtc)
> drm_connector_list_iter_end(_iter);
> }
>
> - ret = pm_runtime_get_sync(crtc->dev->dev);
> + ret = pm_runtime_resume_and_get(crtc->dev->dev);
> if (ret < 0) {
> DRM_ERROR("Failed to enable power domain: %d\n", ret);
> return ret;
> --
> 2.17.1
>
Re: [PATCH] gpu/drm: mediatek: hdmi: check for valid modes on MT8167
Hi, Neil:
Neil Armstrong 於 2021年4月9日 週五 下午4:43寫道：
>
> On MT8167, only CEA modes and anything using a clock below 148500 is
> supported for HDMI. This change adds some checks to make sure the
> video format is OK for MT8167.
I think this patch should be separated to 3 patches. check CEA mode,
check clock, add mt8167 hdmi support.
>
> Signed-off-by: Fabien Parent
> Signed-off-by: Neil Armstrong
> ---
> drivers/gpu/drm/mediatek/mtk_hdmi.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> index 8ee55f9e2954..991e2e935b93 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> @@ -148,6 +148,8 @@ struct hdmi_audio_param {
>
> struct mtk_hdmi_conf {
> bool tz_disabled;
> + unsigned long max_mode_clock;
> + bool cea_modes_only;
> };
>
> struct mtk_hdmi {
> @@ -1259,6 +1261,13 @@ static int mtk_hdmi_conn_mode_valid(struct
> drm_connector *conn,
> return MODE_BAD;
> }
>
> + if (hdmi->conf->cea_modes_only && !drm_match_cea_mode(mode))
> + return MODE_BAD;
> +
> + if (hdmi->conf->max_mode_clock &&
> + mode->clock > hdmi->conf->max_mode_clock)
> + return MODE_CLOCK_HIGH;
> +
> if (mode->clock < 27000)
> return MODE_CLOCK_LOW;
> if (mode->clock > 297000)
> @@ -1810,10 +1819,18 @@ static const struct mtk_hdmi_conf
> mtk_hdmi_conf_mt2701 = {
> .tz_disabled = true,
> };
>
> +static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8167 = {
> + .max_mode_clock = 148500,
> + .cea_modes_only = true,
> +};
> +
> static const struct of_device_id mtk_drm_hdmi_of_ids[] = {
> { .compatible = "mediatek,mt2701-hdmi",
> .data = _hdmi_conf_mt2701,
> },
> + { .compatible = "mediatek,mt8167-hdmi",
"mediatek,mt8167-hdmi" does not exist in binding document, so add this
to binding document first.
In addition, could you also transfer mediatek,hdmi.txt to yaml format?
Regards,
Chun-Kuang.
> + .data = _hdmi_conf_mt8167,
> + },
> { .compatible = "mediatek,mt8173-hdmi",
> },
> {}
> --
> 2.25.1
>
Re: [PATCH] drm/mediatek: force hsa hsa hfp packets multiple of line num to avoid screen shift
Hi, Jitao:
Jitao Shi 於 2021年4月7日 週三 下午10:37寫道：
>
> The bridge chip ANX7625 require the line packets ending at the sametime
> or ANX7625 will shift the screen.
>
> Change-Id: Ia324ad28fbff54140feedb9a1d6bfb2b246d0447
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index a1ff152ef468..e825a80862de 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -194,6 +194,8 @@ struct mtk_dsi {
> struct clk *hs_clk;
>
> u32 data_rate;
> + /* force dsi line end without dsi_null data */
> + bool force_dsi_end_without_null;
>
> unsigned long mode_flags;
> enum mipi_dsi_pixel_format format;
> @@ -495,6 +497,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi
> *dsi)
> DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");
> }
>
> + if (dsi->force_dsi_end_without_null) {
> + horizontal_sync_active_byte =
> roundup(horizontal_sync_active_byte, dsi->lanes) - 2;
> + horizontal_frontporch_byte =
> roundup(horizontal_frontporch_byte, dsi->lanes) - 2;
> + horizontal_backporch_byte =
> roundup(horizontal_backporch_byte, dsi->lanes) - 2;
> + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp +
> 2) % dsi->lanes;
> + }
> +
> writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
> writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
> writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
> @@ -1091,6 +1100,9 @@ static int mtk_dsi_probe(struct platform_device *pdev)
> dsi->bridge.of_node = dev->of_node;
> dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
>
> + dsi->force_dsi_end_without_null = of_property_read_bool(dev->of_node,
> +
> "force_dsi_end_without_null");
If force_dsi_end_without_null is caused by ANX7625, I think we should
get this information from ANX7625.
Regards,
Chun-Kuang.
> +
> drm_bridge_add(>bridge);
>
> ret = component_add(>dev, _dsi_component_ops);
> --
> 2.25.1
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC net-next 1/4] net: phy: add MediaTek PHY driver
Andrew Lunn 於 2021年4月7日 週三 上午12:02寫道： > > On Tue, Apr 06, 2021 at 11:47:08PM +0800, Chun-Kuang Hu wrote: > > Hi, Qingfang: > > > > DENG Qingfang 於 2021年4月6日 週二 下午10:19寫道： > > > > > > Add support for MediaTek PHYs found in MT7530 and MT7531 switches. > > > The initialization procedure is from the vendor driver, but due to lack > > > of documentation, the function of some register values remains unknown. > > > > > > Signed-off-by: DENG Qingfang > > > --- > > > drivers/net/phy/Kconfig| 5 ++ > > > drivers/net/phy/Makefile | 1 + > > > drivers/net/phy/mediatek.c | 109 + > > > 3 files changed, 115 insertions(+) > > > create mode 100644 drivers/net/phy/mediatek.c > > > > > > diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig > > > index a615b3660b05..edd858cec9ec 100644 > > > --- a/drivers/net/phy/Kconfig > > > +++ b/drivers/net/phy/Kconfig > > > @@ -207,6 +207,11 @@ config MARVELL_88X_PHY > > > Support for the Marvell 88X Dual-port Multi-speed Ethernet > > > Transceiver. > > > > > > +config MEDIATEK_PHY > > > > There are many Mediatek phy drivers in [1], so use a specific name. > > Those are generic PHY drivers, where as this patch is add a PHY > driver. The naming used in this patch is consistent with other PHY > drivers. So i'm happy with this patch in this respect. > > PHY drivers have been around a lot longer than generic PHY drivers. So > i would actually say the generic PHY driver naming should make it > clear they are generic PHYs, not PHYs. > OK, so just ignore my comment. > But lets not bike shed about this too much. > > Andrew
Re: [RFC net-next 1/4] net: phy: add MediaTek PHY driver
DENG Qingfang 於 2021年4月6日 週二 下午11:57寫道： > > On Tue, Apr 6, 2021 at 11:47 PM Chun-Kuang Hu wrote: > > > > Hi, Qingfang: > > > > DENG Qingfang 於 2021年4月6日 週二 下午10:19寫道： > > > --- a/drivers/net/phy/Kconfig > > > +++ b/drivers/net/phy/Kconfig > > > @@ -207,6 +207,11 @@ config MARVELL_88X_PHY > > > Support for the Marvell 88X Dual-port Multi-speed Ethernet > > > Transceiver. > > > > > > +config MEDIATEK_PHY > > > > There are many Mediatek phy drivers in [1], so use a specific name. > > So "MEDIATEK_MT7530_PHY" should be okay? This is ok, but this name looks only for one SoC. MEDIATEK_ETHERNET_PHY could support more SoC, how do you think? Regards, Chun-Kuang. > > > > > [1] > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/phy/mediatek?h=v5.12-rc6 > > > > Regards, > > Chun-Kuang.
Re: [RFC net-next 1/4] net: phy: add MediaTek PHY driver
Hi, Qingfang: DENG Qingfang 於 2021年4月6日 週二 下午10:19寫道： > > Add support for MediaTek PHYs found in MT7530 and MT7531 switches. > The initialization procedure is from the vendor driver, but due to lack > of documentation, the function of some register values remains unknown. > > Signed-off-by: DENG Qingfang > --- > drivers/net/phy/Kconfig| 5 ++ > drivers/net/phy/Makefile | 1 + > drivers/net/phy/mediatek.c | 109 + > 3 files changed, 115 insertions(+) > create mode 100644 drivers/net/phy/mediatek.c > > diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig > index a615b3660b05..edd858cec9ec 100644 > --- a/drivers/net/phy/Kconfig > +++ b/drivers/net/phy/Kconfig > @@ -207,6 +207,11 @@ config MARVELL_88X_PHY > Support for the Marvell 88X Dual-port Multi-speed Ethernet > Transceiver. > > +config MEDIATEK_PHY There are many Mediatek phy drivers in [1], so use a specific name. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/phy/mediatek?h=v5.12-rc6 Regards, Chun-Kuang. > + tristate "MediaTek PHYs" > + help > + Supports the MediaTek switch integrated PHYs. > + > config MICREL_PHY > tristate "Micrel PHYs" > help
Re: [PATCH 0/3] Refine mtk-cmdq-mailbox callback mechanism
Hi, Jassi: Chun-Kuang Hu 於 2021年3月15日 週一 上午7:33寫道： > > mtk-cmdq-mailbox use proprietary callback mechanism and proprietary > error number, but these could be replaced by standard callback > mechanism and standard error number. In addition, use cmdq_pkt as > callback data to prevent redundnat assignment. > > Because client driver still use proprietary mechanism, so keep > proprietary mechanism until client driver use the standard one. How do you think about this series? Regards, Chun-Kuang. > > Chun-Kuang Hu (3): > mailbox: mtk-cmdq: Remove cmdq_cb_status > mailbox: mtk-cmdq: Use mailbox rx_callback > mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data > > drivers/mailbox/mtk-cmdq-mailbox.c | 24 +++- > include/linux/mailbox/mtk-cmdq-mailbox.h | 8 ++-- > 2 files changed, 17 insertions(+), 15 deletions(-) > > -- > 2.17.1 >
Re: [PATCH v3 0/2] drm/mediatek: Don't support hdmi connector creation
Hi, Dafna:
Dafna Hirschfeld 於 2021年3月30日 週二 下午7:09寫道：
>
> commit f01195148967 ("drm/mediatek: mtk_dpi: Create connector for bridges")
> broke the display support for elm device since mtk_dpi calls
> drm_bridge_attach with the flag DRM_BRIDGE_ATTACH_NO_CONNECTOR
> while mtk_hdmi does not yet support this flag.
For this series, applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> These three patches fix that by adding support for
> DRM_BRIDGE_ATTACH_NO_CONNECTOR
> in mtk_hdmi bridge attachment.
>
> changes since v2:
> 1. squash patch 3 with patch 2 to not break bisection
> 2. remove the funtion mtk_hdmi_get_edid and inline its code in
> mtk_hdmi_bridge_get_edid
> 3. small aligment
>
> changes since v1:
> 1. split the first patch - now the first patch only moves the bridge ops to
> the atomic API
> while the replacement of the field 'conn' with the field '*curr_conn' is done
> in a new third patch.
> 2. in the function 'get_eld' use the current conn only if 'enabled = true'.
>
> Dafna Hirschfeld (2):
> drm/mediatek: Switch the hdmi bridge ops to the atomic versions
> drm/mediatek: Don't support hdmi connector creation
>
> drivers/gpu/drm/mediatek/mtk_hdmi.c | 174
> 1 file changed, 71 insertions(+), 103 deletions(-)
>
> --
> 2.17.1
>
Re: [PATCH] drm/mediatek: Add missing MODULE_DEVICE_TABLE()
Hi, Enric:
Enric Balletbo i Serra 於 2021年3月30日 週二 下午5:43寫道：
>
> Hi,
>
> On 3/2/21 12:07, Enric Balletbo i Serra wrote:
> > From: Boris Brezillon
> >
> > This patch adds the missing MODULE_DEVICE_TABLE definitions on different
> > Mediatek drivers which generates correct modalias for automatic loading
> > when these drivers are compiled as an external module.
> >
> > Signed-off-by: Boris Brezillon
> > Signed-off-by: Enric Balletbo i Serra
>
> A gentle ping for someone to review this patchset :-)
>
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
> Thanks,
> Enric
>
> > ---
> >
> > drivers/gpu/drm/mediatek/mtk_cec.c | 2 ++
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_hdmi.c | 1 +
> > drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c | 1 +
> > 6 files changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c
> > b/drivers/gpu/drm/mediatek/mtk_cec.c
> > index cb29b649fcdb..3b86e626e459 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_cec.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_cec.c
> > @@ -7,6 +7,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -247,6 +248,7 @@ static const struct of_device_id mtk_cec_of_ids[] = {
> > { .compatible = "mediatek,mt8173-cec", },
> > {}
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_cec_of_ids);
> >
> > struct platform_driver mtk_cec_driver = {
> > .probe = mtk_cec_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 52f11a63a330..2680370652fd 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -822,6 +822,7 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
> > },
> > { },
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);
> >
> > struct platform_driver mtk_dpi_driver = {
> > .probe = mtk_dpi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > index 5f49a809689b..e4645c8ae1c0 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > @@ -470,6 +470,7 @@ static const struct of_device_id mtk_drm_of_ids[] = {
> > .data = _mmsys_driver_data},
> > { }
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
> >
> > static int mtk_drm_probe(struct platform_device *pdev)
> > {
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > index 0527480c07be..c71ce62d1bec 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > @@ -1193,6 +1193,7 @@ static const struct of_device_id mtk_dsi_of_match[] =
> > {
> > .data = _dsi_driver_data },
> > { },
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
> >
> > struct platform_driver mtk_dsi_driver = {
> > .probe = mtk_dsi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > index 8ee55f9e2954..b4696a9d73f7 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
> > @@ -1818,6 +1818,7 @@ static const struct of_device_id
> > mtk_drm_hdmi_of_ids[] = {
> > },
> > {}
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_drm_hdmi_of_ids);
> >
> > static struct platform_driver mtk_hdmi_driver = {
> > .probe = mtk_drm_hdmi_probe,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > index 62dbad5675bb..6207eac88550 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
> > @@ -335,6 +335,7 @@ static const struct of_device_id mtk_hdmi_ddc_match[] =
> > {
> > { .compatible = "mediatek,mt8173-hdmi-ddc", },
> > {},
> > };
> > +MODULE_DEVICE_TABLE(of, mtk_hdmi_ddc_match);
> >
> > struct platform_driver mtk_hdmi_ddc_driver = {
> > .probe = mtk_hdmi_ddc_probe,
> >
Re: [PATCH] drm/mediatek: crtc: Make config-updating atomic
Applied to mediatek-drm-next [1].
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
Chun-Kuang Hu 於 2021年3月13日 週六 下午5:43寫道：
>
> While updating config, the irq would occur and get the partial
> config, so use variable config_updating to make updating atomic.
>
> Signed-off-by: Chun-Kuang Hu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 ---
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 8b0de90156c6..870f66210848 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -61,6 +61,7 @@ struct mtk_drm_crtc {
>
> /* lock for display hardware access */
> struct mutexhw_lock;
> + boolconfig_updating;
> };
>
> struct mtk_crtc_state {
> @@ -97,7 +98,7 @@ static void mtk_drm_crtc_finish_page_flip(struct
> mtk_drm_crtc *mtk_crtc)
> static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
> {
> drm_crtc_handle_vblank(_crtc->base);
> - if (mtk_crtc->pending_needs_vblank) {
> + if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {
> mtk_drm_crtc_finish_page_flip(mtk_crtc);
> mtk_crtc->pending_needs_vblank = false;
> }
> @@ -425,7 +426,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,
> }
> }
>
> -static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
> +static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,
> + bool needs_vblank)
> {
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> struct cmdq_pkt *cmdq_handle;
> @@ -436,6 +438,10 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
> *mtk_crtc)
> int i;
>
> mutex_lock(_crtc->hw_lock);
> + mtk_crtc->config_updating = true;
> + if (needs_vblank)
> + mtk_crtc->pending_needs_vblank = true;
> +
> for (i = 0; i < mtk_crtc->layer_nr; i++) {
> struct drm_plane *plane = _crtc->planes[i];
> struct mtk_plane_state *plane_state;
> @@ -472,6 +478,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
> *mtk_crtc)
> cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
> }
> #endif
> + mtk_crtc->config_updating = false;
> mutex_unlock(_crtc->hw_lock);
> }
>
> @@ -532,7 +539,7 @@ void mtk_drm_crtc_async_update(struct drm_crtc *crtc,
> struct drm_plane *plane,
> return;
>
> plane_helper_funcs->atomic_update(plane, new_state);
> - mtk_drm_crtc_hw_config(mtk_crtc);
> + mtk_drm_crtc_update_config(mtk_crtc, false);
> }
>
> static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
> @@ -582,7 +589,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc
> *crtc,
> }
> mtk_crtc->pending_planes = true;
>
> - mtk_drm_crtc_hw_config(mtk_crtc);
> + mtk_drm_crtc_update_config(mtk_crtc, false);
> /* Wait for planes to be disabled */
> drm_crtc_wait_one_vblank(crtc);
>
> @@ -618,14 +625,12 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc
> *crtc,
> struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> int i;
>
> - if (mtk_crtc->event)
> - mtk_crtc->pending_needs_vblank = true;
> if (crtc->state->color_mgmt_changed)
> for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
> mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
> mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);
> }
> - mtk_drm_crtc_hw_config(mtk_crtc);
> + mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);
> }
>
> static const struct drm_crtc_funcs mtk_crtc_funcs = {
> --
> 2.17.1
>
Re: [PATCH 1/2] dt-bindings: devapc: Update bindings
Hi, Nina:
Nina Wu 於 2021年3月26日 週五 下午3:34寫道：
>
> From: Nina Wu
>
> To support newer hardware architecture of devapc,
> update device tree bindings.
>
> Signed-off-by: Nina Wu
> ---
> .../devicetree/bindings/soc/mediatek/devapc.yaml | 41
> ++
> 1 file changed, 41 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> b/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> index 31e4d3c..489f6a9 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> +++ b/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> @@ -20,9 +20,27 @@ properties:
>compatible:
> enum:
>- mediatek,mt6779-devapc
> + - mediatek,mt8192-devapc
> +
> + version:
> +description: The version of the hardware architecture
> +$ref: /schemas/types.yaml#/definitions/uint32
> +enum: [1, 2]
> +maxItems: 1
> +
> + slave_type_num:
> +description: The number of the devapc set
> +$ref: /schemas/types.yaml#/definitions/uint32
> +enum: [1, 4]
> +maxItems: 1
>
>reg:
> description: The base address of devapc register bank
> +maxItems: 4
> +
> + vio_idx_num:
> +description: The number of the devices controlled by devapc
> +$ref: /schemas/types.yaml#/definitions/uint32-array
> maxItems: 1
>
>interrupts:
> @@ -39,7 +57,10 @@ properties:
>
> required:
>- compatible
> + - version
> + - slave_type_num
>- reg
> + - vio_idx_num
>- interrupts
>- clocks
>- clock-names
> @@ -53,8 +74,28 @@ examples:
>
> devapc: devapc@10207000 {
>compatible = "mediatek,mt6779-devapc";
> + version = <1>;
I think version is redundant. For example, if mt0001-devapc is
identical to mt6779-devapc, its compatible should be
compatible = "mediatek,mt0001-devapc", "mediatek,mt6779-devapc";
In driver, only keep compatible for mt6779 and no mt0001 because
mt0001 is identical to mt6779.
In probe sequence, try first compatible string
"mediatek,mt0001-devapc", but it does not exist in driver, so try next
compatible string "mediatek,mt6779-devapc" and match.
So mt0001-devapc would work as mt6779-devapc.
> + slave_type_num = <1>;
>reg = <0x10207000 0x1000>;
> + vio_idx_num = <511>;
>interrupts = ;
>clocks = <_ao CLK_INFRA_DEVICE_APC>;
>clock-names = "devapc-infra-clock";
> };
> + - |
> +#include
> +#include
> +
> +devapc: devapc@10207000 {
> +compatible = "mediatek,mt8192-devapc";
> +version = <2>;
> +slave_type_num = <4>;
> +reg = <0 0x10207000 0 0x1000>,
> +<0 0x10274000 0 0x1000>,
> +<0 0x10275000 0 0x1000>,
> +<0 0x1102 0 0x1000>;
> +vio_idx_num = <367 292 242 58>;
> +interrupts = ;
> +clocks = <_ao CLK_INFRA_DEVICE_APC>;
> +clock-names = "devapc-infra-clock";
> +};
It looks like that there are 4 devapc device in mt8192.
These 4 device work independently, so I would like to decouple them
rather than couple them.
devapc0: devapc@10207000 {
compatible = "mediatek,mt8192-devapc";
reg = <0 0x10207000 0 0x1000>;
vio_idx_num = <367>;
...
};
devapc1: devapc@10274000 {
compatible = "mediatek,mt8192-devapc";
reg = <0 0x10274000 0 0x1000>;
vio_idx_num = <292>;
...
};
devapc2: devapc@10275000 {
compatible = "mediatek,mt8192-devapc";
reg = <0 0x10275000 0 0x1000>;
vio_idx_num = <242>;
...
};
devapc3: devapc@1102 {
compatible = "mediatek,mt8192-devapc";
reg = <0 0x1102 0 0x1000>;
vio_idx_num = <58>;
...
};
Regards,
Chun-Kuang.
> --
> 2.6.4
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] MAINTAINERS: Add linux-mediatek ML for drm Mediatek drivers
Hi, Dafna: Dafna Hirschfeld 於 2021年3月25日 週四 下午9:07寫道： > > Add the linux-mediatek mailing list to drm Mediatek drivers > Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > Signed-off-by: Dafna Hirschfeld > --- > MAINTAINERS | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 9e876927c60d..8260bc5afe66 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -5963,6 +5963,7 @@ DRM DRIVERS FOR MEDIATEK > M: Chun-Kuang Hu > M: Philipp Zabel > L: dri-de...@lists.freedesktop.org > +L: linux-media...@lists.infradead.org (moderated for non-subscribers) > S: Supported > F: Documentation/devicetree/bindings/display/mediatek/ > F: drivers/gpu/drm/mediatek/ > -- > 2.17.1 >
Re: [PATCH v4, 08/10] soc: mediatek: mmsys: add component RDMA4
Hi, Matthias:
Yongqiang Niu 於 2021年1月5日 週二 上午11:07寫道：
>
> This patch add component RDMA4
>
> Signed-off-by: Yongqiang Niu
> Reviewed-by: Chun-Kuang Hu
How do you think about this patch? One drm patch [1] depends on this patch.
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/20210202081237.774442-4-hsi...@chromium.org/
Regards,
Chun-Kuang.
> ---
> include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> b/include/linux/soc/mediatek/mtk-mmsys.h
> index 13546e9..2c11617 100644
> --- a/include/linux/soc/mediatek/mtk-mmsys.h
> +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> @@ -38,6 +38,7 @@ enum mtk_ddp_comp_id {
> DDP_COMPONENT_RDMA0,
> DDP_COMPONENT_RDMA1,
> DDP_COMPONENT_RDMA2,
> + DDP_COMPONENT_RDMA4,
> DDP_COMPONENT_UFOE,
> DDP_COMPONENT_WDMA0,
> DDP_COMPONENT_WDMA1,
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 4/8] soc: mediatek: mmsys: add component OVL_2L2
Hi, Matthias:
Chun-Kuang Hu 於 2020年12月29日 週二 下午11:23寫道：
>
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月28日 週一 下午4:37寫道：
> >
> > This patch add component OVL_2L2
>
> Reviewed-by: Chun-Kuang Hu
How do you think about this patch? One drm patch [1] depends on this patch.
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/20210202081237.774442-2-hsi...@chromium.org/
Regards,
Chun-Kuang.
>
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> > b/include/linux/soc/mediatek/mtk-mmsys.h
> > index 4b6c514..42476c2 100644
> > --- a/include/linux/soc/mediatek/mtk-mmsys.h
> > +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> > @@ -29,6 +29,7 @@ enum mtk_ddp_comp_id {
> > DDP_COMPONENT_OVL0,
> > DDP_COMPONENT_OVL_2L0,
> > DDP_COMPONENT_OVL_2L1,
> > + DDP_COMPONENT_OVL_2L2,
> > DDP_COMPONENT_OVL1,
> > DDP_COMPONENT_PWM0,
> > DDP_COMPONENT_PWM1,
> > --
> > 1.8.1.1.dirty
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [v5, 1/2] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Hi, Enric:
Enric Balletbo Serra 於 2021年3月18日 週四 下午10:25寫道：
>
> Hi Rex-BC Chen,
>
> Thank you for your patch.
>
> Missatge de Rex-BC Chen del dia dj., 18 de
> març 2021 a les 6:42:
> >
> > Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
> >
> > Signed-off-by: Pi-Hsun Shih
> > Signed-off-by: Rex-BC Chen
> > Signed-off-by: Jitao Shi
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 18 ++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index b05f900d9322..0b427ad0cd9b 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
> > struct mtk_dpi_conf {
> > unsigned int (*cal_factor)(int clock);
> > u32 reg_h_fre_con;
> > + u32 max_clock_khz;
> > bool edge_sel_en;
> > };
> >
> > @@ -557,9 +558,23 @@ static void mtk_dpi_bridge_enable(struct drm_bridge
> > *bridge)
> > mtk_dpi_set_display_mode(dpi, >mode);
> > }
> >
> > +static enum drm_mode_status
> > +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> > + const struct drm_display_info *info,
> > + const struct drm_display_mode *mode)
> > +{
> > + struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> > +
> > + if (dpi->conf->max_clock_khz && mode->clock >
> > dpi->conf->max_clock_khz)
>
> Maybe I read this patch too fast, but why the &&? Shouldn't be more
> simple and readable
>
> if (mode->clock > max_clock)
>
Agree. So I modify in mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
> Thanks,
> Enric
>
>
> > + return MODE_CLOCK_HIGH;
> > +
> > + return MODE_OK;
> > +}
> > +
> > static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> > .attach = mtk_dpi_bridge_attach,
> > .mode_set = mtk_dpi_bridge_mode_set,
> > + .mode_valid = mtk_dpi_bridge_mode_valid,
> > .disable = mtk_dpi_bridge_disable,
> > .enable = mtk_dpi_bridge_enable,
> > };
> > @@ -668,17 +683,20 @@ static unsigned int mt8183_calculate_factor(int clock)
> > static const struct mtk_dpi_conf mt8173_conf = {
> > .cal_factor = mt8173_calculate_factor,
> > .reg_h_fre_con = 0xe0,
> > + .max_clock_khz = 30,
> > };
> >
> > static const struct mtk_dpi_conf mt2701_conf = {
> > .cal_factor = mt2701_calculate_factor,
> > .reg_h_fre_con = 0xb0,
> > .edge_sel_en = true,
> > + .max_clock_khz = 15,
> > };
> >
> > static const struct mtk_dpi_conf mt8183_conf = {
> > .cal_factor = mt8183_calculate_factor,
> > .reg_h_fre_con = 0xe0,
> > + .max_clock_khz = 10,
> > };
> >
> > static int mtk_dpi_probe(struct platform_device *pdev)
> > --
> > 2.18.0
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [v5,0/2] Add check for max clock rate in mode_valid
Hi, Rex: For this series, applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. Rex-BC Chen 於 2021年3月18日 週四 下午1:41寫道： > > Changes in v5: > fix build error > > Changes in v4: > add Author and add patch description > > Rex-BC Chen (2): > drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid > drm/mediatek: mtk_dpi: Add dpi config for mt8192 > > drivers/gpu/drm/mediatek/mtk_dpi.c | 27 +++ > 1 file changed, 27 insertions(+) > > -- > 2.18.0 >
Re: [PATCH 1/2] dt-bindings: mediatek: mmsys: add mt1867 binding
Hi, Matthias: Ping again. Regards, Chun-Kuang. Fabien Parent 於 2021年2月24日 週三 上午6:21寫道： > > Hi Matthias, > > Pinging you in case you didn't see @Chun-Kuang Hu's question for you. > > Thanks, > Best regards, > Fabien > > On Sun, Jan 10, 2021 at 12:18 AM Chun-Kuang Hu > wrote: > > > > Hi, Matthias: > > > > Rob Herring 於 2020年10月31日 週六 上午3:17寫道： > > > > > > On Tue, 27 Oct 2020 17:06:29 +0100, Fabien Parent wrote: > > > > Add binding documentation for MT8167 SoC. > > > > Even though the title need to change to 'mt8167', this patch looks > > good to me. How do you think about this patch? One drm patch [1] > > depend on this patch, if you like this patch, could you applied this > > patch first? > > > > [1] > > https://patchwork.kernel.org/project/linux-mediatek/patch/20201023133130.194140-6-fpar...@baylibre.com/ > > > > Regards, > > Chun-Kuang. > > > > > > > > > > Signed-off-by: Fabien Parent > > > > --- > > > > .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > Acked-by: Rob Herring > > > > > > ___ > > > Linux-mediatek mailing list > > > linux-media...@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] drm/mediatek: fine tune the data lane trail by project dts
Hi, Jitao:
Jitao Shi 於 2021年2月1日 週一 上午11:48寫道：
>
> Some panels or bridges require customized hs_da_trail time.
> So add a property in devicetree for this panels and bridges.
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 8c70ec39bfe1..6e7092fa2fee 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -194,6 +194,7 @@ struct mtk_dsi {
> struct clk *hs_clk;
>
> u32 data_rate;
> + u32 da_trail_delta;
>
> unsigned long mode_flags;
> enum mipi_dsi_pixel_format format;
> @@ -234,7 +235,7 @@ static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)
> timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;
> timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -
> timing->da_hs_prepare;
> - timing->da_hs_trail = timing->da_hs_prepare + 1;
> + timing->da_hs_trail = timing->da_hs_prepare + 1 + dsi->da_trail_delta;
>
> timing->ta_go = 4 * timing->lpx - 2;
> timing->ta_sure = timing->lpx + 2;
> @@ -1094,6 +1095,13 @@ static int mtk_dsi_probe(struct platform_device *pdev)
> goto err_unregister_host;
> }
>
> + ret = of_property_read_u32_index(dev->of_node, "da_trail_delta", 0,
> +>da_trail_delta);
This value depends on panel, so I think we should get some value from
panel's device node to calculate this value.
Regards,
Chun-Kuang.
> + if (ret) {
> + dev_info(dev, "Can't get da_trail_delta, keep it as 0: %d\n",
> ret);
> + dsi->da_trail_delta = 0;
> + }
> +
> comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DSI);
> if (comp_id < 0) {
> dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
> --
> 2.12.5
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH -next] soc: mediatek: Make symbol 'mtk_mutex_driver' static
Hi, Yongjun:
Wei Yongjun 於 2021年2月10日 週三 下午3:49寫道：
>
> The sparse tool complains as follows:
>
> drivers/soc/mediatek/mtk-mutex.c:464:24: warning:
> symbol 'mtk_mutex_driver' was not declared. Should it be static?
>
> This symbol is not used outside of mtk-mutex.c, so this
> commit marks it static.
Reviewed-by: Chun-Kuang Hu
>
> Reported-by: Hulk Robot
> Signed-off-by: Wei Yongjun
> ---
> drivers/soc/mediatek/mtk-mutex.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c
> b/drivers/soc/mediatek/mtk-mutex.c
> index f531b119da7a..3a315a62e783 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -461,7 +461,7 @@ static const struct of_device_id mutex_driver_dt_match[]
> = {
> };
> MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
>
> -struct platform_driver mtk_mutex_driver = {
> +static struct platform_driver mtk_mutex_driver = {
> .probe = mtk_mutex_probe,
> .remove = mtk_mutex_remove,
> .driver = {
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [RESEND,v4,1/2] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Hi, Rex:
Rex-BC Chen 於 2021年3月16日 週二 上午11:26寫道：
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Reviewed-by: Chun-Kuang Hu
> Signed-off-by: Pi-Hsun Shih
> Signed-off-by: Rex-BC Chen
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index b05f900d9322..e1945d4bd7c4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> u32 reg_h_fre_con;
> + u32 max_clock_khz;
> bool edge_sel_en;
> };
>
> @@ -557,9 +558,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge
> *bridge)
> mtk_dpi_set_display_mode(dpi, >mode);
> }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode)
> +{
> + struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> + if (dpi->conf->max_clock_khz && mode->clock >
> dpi->conf->max_clock_khz)
> + return MODE_CLOCK_HIGH;
> +
> + return MODE_OK;
> +}
> +
> static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .attach = mtk_dpi_bridge_attach,
> .mode_set = mtk_dpi_bridge_mode_set,
> + .mode_valid = mtk_dpi_bridge_mode_valid,
Build error:
../drivers/gpu/drm/mediatek/mtk_dpi.c:576:16: error: initialization
from incompatible pointer type [-Werror=incompatible-pointer-types]
.mode_valid = mtk_dpi_bridge_mode_valid,
^
Please remove my 'Reviewed-by' tag.
Regards,
Chun-Kuang.
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
> };
> @@ -668,17 +682,20 @@ static unsigned int mt8183_calculate_factor(int clock)
> static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 30,
> };
>
> static const struct mtk_dpi_conf mt2701_conf = {
> .cal_factor = mt2701_calculate_factor,
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> + .max_clock_khz = 15,
> };
>
> static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 10,
> };
>
> static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.18.0
>
[PATCH 1/3] mailbox: mtk-cmdq: Remove cmdq_cb_status
cmdq_cb_status is an error status. Use the standard error number
instead of cmdq_cb_status to prevent status duplication.
Cc: Jassi Brar
Cc: Matthias Brugger
Cc: Houlong Wei
Cc: Bibby Hsieh
Cc: Dennis YC Hsieh
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Chun-Kuang Hu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 10 +-
include/linux/mailbox/mtk-cmdq-mailbox.h | 7 +--
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index 5665b6ea8119..3d37c1cd40f1 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -180,7 +180,7 @@ static bool cmdq_thread_is_in_wfe(struct cmdq_thread
*thread)
return readl(thread->base + CMDQ_THR_WAIT_TOKEN) & CMDQ_THR_IS_WAITING;
}
-static void cmdq_task_exec_done(struct cmdq_task *task, enum cmdq_cb_status
sta)
+static void cmdq_task_exec_done(struct cmdq_task *task, int sta)
{
struct cmdq_task_cb *cb = >pkt->async_cb;
struct cmdq_cb_data data;
@@ -244,10 +244,10 @@ static void cmdq_thread_irq_handler(struct cmdq *cmdq,
curr_task = task;
if (!curr_task || curr_pa == task_end_pa - CMDQ_INST_SIZE) {
- cmdq_task_exec_done(task, CMDQ_CB_NORMAL);
+ cmdq_task_exec_done(task, 0);
kfree(task);
} else if (err) {
- cmdq_task_exec_done(task, CMDQ_CB_ERROR);
+ cmdq_task_exec_done(task, -ENOEXEC);
cmdq_task_handle_error(curr_task);
kfree(task);
}
@@ -415,7 +415,7 @@ static void cmdq_mbox_shutdown(struct mbox_chan *chan)
list_for_each_entry_safe(task, tmp, >task_busy_list,
list_entry) {
- cmdq_task_exec_done(task, CMDQ_CB_ERROR);
+ cmdq_task_exec_done(task, -ECONNABORTED);
kfree(task);
}
@@ -453,7 +453,7 @@ static int cmdq_mbox_flush(struct mbox_chan *chan, unsigned
long timeout)
list_entry) {
cb = >pkt->async_cb;
if (cb->cb) {
- data.sta = CMDQ_CB_ERROR;
+ data.sta = -ECONNABORTED;
data.data = cb->data;
cb->cb(data);
}
diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h
b/include/linux/mailbox/mtk-cmdq-mailbox.h
index d5a983d65f05..2f7d9a37d611 100644
--- a/include/linux/mailbox/mtk-cmdq-mailbox.h
+++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
@@ -65,13 +65,8 @@ enum cmdq_code {
CMDQ_CODE_LOGIC = 0xa0,
};
-enum cmdq_cb_status {
- CMDQ_CB_NORMAL = 0,
- CMDQ_CB_ERROR
-};
-
struct cmdq_cb_data {
- enum cmdq_cb_status sta;
+ int sta;
void*data;
};
--
2.17.1
[PATCH 3/3] mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data
Current client use 'struct cmdq_pkt' as callback data, so
change 'void *data' to 'struct cmdq_pkt *pkt'. Keep data
until client use pkt instead of data.
Cc: Jassi Brar
Cc: Matthias Brugger
Cc: Houlong Wei
Cc: Bibby Hsieh
Cc: Dennis YC Hsieh
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Chun-Kuang Hu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 2 ++
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index ef59e2234f22..99a9e0787501 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -188,6 +188,7 @@ static void cmdq_task_exec_done(struct cmdq_task *task, int
sta)
WARN_ON(cb->cb == (cmdq_async_flush_cb)NULL);
data.sta = sta;
data.data = cb->data;
+ data.pkt = task->pkt;
if (cb->cb)
cb->cb(data);
@@ -456,6 +457,7 @@ static int cmdq_mbox_flush(struct mbox_chan *chan, unsigned
long timeout)
list_entry) {
data.sta = -ECONNABORTED;
data.data = cb->data;
+ data.pkt = task->pkt;
cb = >pkt->async_cb;
if (cb->cb)
cb->cb(data);
diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h
b/include/linux/mailbox/mtk-cmdq-mailbox.h
index 2f7d9a37d611..44365aab043c 100644
--- a/include/linux/mailbox/mtk-cmdq-mailbox.h
+++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
@@ -68,6 +68,7 @@ enum cmdq_code {
struct cmdq_cb_data {
int sta;
void*data;
+ struct cmdq_pkt *pkt;
};
typedef void (*cmdq_async_flush_cb)(struct cmdq_cb_data data);
--
2.17.1
[PATCH 2/3] mailbox: mtk-cmdq: Use mailbox rx_callback
rx_callback is a standard mailbox callback mechanism and could cover the
function of proprietary cmdq_task_cb, so use the standard one instead of
the proprietary one. But the client driver has already used cmdq_task_cb,
so keep cmdq_task_cb until all client driver use rx_callback instead of
cmdq_task_cb.
Cc: Jassi Brar
Cc: Matthias Brugger
Cc: Houlong Wei
Cc: Bibby Hsieh
Cc: Dennis YC Hsieh
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Chun-Kuang Hu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index 3d37c1cd40f1..ef59e2234f22 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -188,7 +188,10 @@ static void cmdq_task_exec_done(struct cmdq_task *task,
int sta)
WARN_ON(cb->cb == (cmdq_async_flush_cb)NULL);
data.sta = sta;
data.data = cb->data;
- cb->cb(data);
+ if (cb->cb)
+ cb->cb(data);
+
+ mbox_chan_received_data(task->thread->chan, );
list_del(>list_entry);
}
@@ -451,12 +454,13 @@ static int cmdq_mbox_flush(struct mbox_chan *chan,
unsigned long timeout)
list_for_each_entry_safe(task, tmp, >task_busy_list,
list_entry) {
+ data.sta = -ECONNABORTED;
+ data.data = cb->data;
cb = >pkt->async_cb;
- if (cb->cb) {
- data.sta = -ECONNABORTED;
- data.data = cb->data;
+ if (cb->cb)
cb->cb(data);
- }
+
+ mbox_chan_received_data(task->thread->chan, );
list_del(>list_entry);
kfree(task);
}
--
2.17.1
[PATCH 0/3] Refine mtk-cmdq-mailbox callback mechanism
mtk-cmdq-mailbox use proprietary callback mechanism and proprietary error number, but these could be replaced by standard callback mechanism and standard error number. In addition, use cmdq_pkt as callback data to prevent redundnat assignment. Because client driver still use proprietary mechanism, so keep proprietary mechanism until client driver use the standard one. Chun-Kuang Hu (3): mailbox: mtk-cmdq: Remove cmdq_cb_status mailbox: mtk-cmdq: Use mailbox rx_callback mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data drivers/mailbox/mtk-cmdq-mailbox.c | 24 +++- include/linux/mailbox/mtk-cmdq-mailbox.h | 8 ++-- 2 files changed, 17 insertions(+), 15 deletions(-) -- 2.17.1
Re: [PATCH] gpu: drm: mediatek: delete redundant printing of return value
Hi, Wang:
Wang Qing 於 2021年3月13日 週六 下午3:48寫道：
>
> platform_get_irq() has already checked and printed the return value,
> the printing here is nothing special, it is not necessary at all.
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Wang Qing
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index b05f900..0ac4962
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -751,10 +751,8 @@ static int mtk_dpi_probe(struct platform_device *pdev)
> }
>
> dpi->irq = platform_get_irq(pdev, 0);
> - if (dpi->irq <= 0) {
> - dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
> + if (dpi->irq <= 0)
> return -EINVAL;
> - }
>
> ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
> NULL, >next_bridge);
> --
> 2.7.4
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/mediatek: crtc: Make config-updating atomic
While updating config, the irq would occur and get the partial
config, so use variable config_updating to make updating atomic.
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index 8b0de90156c6..870f66210848 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -61,6 +61,7 @@ struct mtk_drm_crtc {
/* lock for display hardware access */
struct mutexhw_lock;
+ boolconfig_updating;
};
struct mtk_crtc_state {
@@ -97,7 +98,7 @@ static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc
*mtk_crtc)
static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
{
drm_crtc_handle_vblank(_crtc->base);
- if (mtk_crtc->pending_needs_vblank) {
+ if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {
mtk_drm_crtc_finish_page_flip(mtk_crtc);
mtk_crtc->pending_needs_vblank = false;
}
@@ -425,7 +426,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,
}
}
-static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
+static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,
+ bool needs_vblank)
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
struct cmdq_pkt *cmdq_handle;
@@ -436,6 +438,10 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
*mtk_crtc)
int i;
mutex_lock(_crtc->hw_lock);
+ mtk_crtc->config_updating = true;
+ if (needs_vblank)
+ mtk_crtc->pending_needs_vblank = true;
+
for (i = 0; i < mtk_crtc->layer_nr; i++) {
struct drm_plane *plane = _crtc->planes[i];
struct mtk_plane_state *plane_state;
@@ -472,6 +478,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
*mtk_crtc)
cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
}
#endif
+ mtk_crtc->config_updating = false;
mutex_unlock(_crtc->hw_lock);
}
@@ -532,7 +539,7 @@ void mtk_drm_crtc_async_update(struct drm_crtc *crtc,
struct drm_plane *plane,
return;
plane_helper_funcs->atomic_update(plane, new_state);
- mtk_drm_crtc_hw_config(mtk_crtc);
+ mtk_drm_crtc_update_config(mtk_crtc, false);
}
static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
@@ -582,7 +589,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc
*crtc,
}
mtk_crtc->pending_planes = true;
- mtk_drm_crtc_hw_config(mtk_crtc);
+ mtk_drm_crtc_update_config(mtk_crtc, false);
/* Wait for planes to be disabled */
drm_crtc_wait_one_vblank(crtc);
@@ -618,14 +625,12 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc
*crtc,
struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
int i;
- if (mtk_crtc->event)
- mtk_crtc->pending_needs_vblank = true;
if (crtc->state->color_mgmt_changed)
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);
}
- mtk_drm_crtc_hw_config(mtk_crtc);
+ mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);
}
static const struct drm_crtc_funcs mtk_crtc_funcs = {
--
2.17.1
Re: [RESEND PATCH v1 2/2] Revert "mailbox: mediatek: remove implementation related to atomic_exec"
Hi, Yongqiang:
Yongqiang Niu 於 2021年3月10日 週三 下午6:58寫道：
>
> This reverts commit c9ea564f3d9dd20d88bd34f40a6ff6d31a0d7e8c.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/mailbox/mtk-cmdq-mailbox.c | 80
> +-
> 1 file changed, 71 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
> b/drivers/mailbox/mtk-cmdq-mailbox.c
> index 5665b6e..e0d9a86 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -56,6 +56,7 @@ struct cmdq_thread {
> void __iomem*base;
> struct list_headtask_busy_list;
> u32 priority;
> + boolatomic_exec;
> };
>
> struct cmdq_task {
> @@ -168,18 +169,56 @@ static void cmdq_task_insert_into_thread(struct
> cmdq_task *task)
> dma_sync_single_for_cpu(dev, prev_task->pa_base,
> prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE);
> prev_task_base[CMDQ_NUM_CMD(prev_task->pkt) - 1] =
> - (u64)CMDQ_JUMP_BY_PA << 32 | task->pa_base;
> + (u64)CMDQ_JUMP_BY_PA << 32 |
> + (task->pa_base >> task->cmdq->shift_pa);
> dma_sync_single_for_device(dev, prev_task->pa_base,
>prev_task->pkt->cmd_buf_size,
> DMA_TO_DEVICE);
>
> cmdq_thread_invalidate_fetched_data(thread);
> }
>
> +static bool cmdq_command_is_wfe(u64 cmd)
> +{
> + u64 wfe_option = CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT |
> CMDQ_WFE_WAIT_VALUE;
> + u64 wfe_op = (u64)(CMDQ_CODE_WFE << CMDQ_OP_CODE_SHIFT) << 32;
> + u64 wfe_mask = (u64)CMDQ_OP_CODE_MASK << 32 | 0x;
> +
> + return ((cmd & wfe_mask) == (wfe_op | wfe_option));
> +}
> +
> +/* we assume tasks in the same display GCE thread are waiting the same
> event. */
> +static void cmdq_task_remove_wfe(struct cmdq_task *task)
> +{
> + struct device *dev = task->cmdq->mbox.dev;
> + u64 *base = task->pkt->va_base;
> + int i;
> +
> + dma_sync_single_for_cpu(dev, task->pa_base, task->pkt->cmd_buf_size,
> + DMA_TO_DEVICE);
> + for (i = 0; i < CMDQ_NUM_CMD(task->pkt); i++)
> + if (cmdq_command_is_wfe(base[i]))
> + base[i] = (u64)CMDQ_JUMP_BY_OFFSET << 32 |
> + (CMDQ_JUMP_PASS >> task->cmdq->shift_pa);
> + dma_sync_single_for_device(dev, task->pa_base,
> task->pkt->cmd_buf_size,
> + DMA_TO_DEVICE);
> +}
> +
> static bool cmdq_thread_is_in_wfe(struct cmdq_thread *thread)
> {
> return readl(thread->base + CMDQ_THR_WAIT_TOKEN) &
> CMDQ_THR_IS_WAITING;
> }
>
> +static void cmdq_thread_wait_end(struct cmdq_thread *thread,
> +unsigned long end_pa)
> +{
> + struct device *dev = thread->chan->mbox->dev;
> + unsigned long curr_pa;
> +
> + if (readl_poll_timeout_atomic(thread->base + CMDQ_THR_CURR_ADDR,
> + curr_pa, curr_pa == end_pa, 1, 20))
> + dev_err(dev, "GCE thread cannot run to end.\n");
> +}
> +
> static void cmdq_task_exec_done(struct cmdq_task *task, enum cmdq_cb_status
> sta)
> {
> struct cmdq_task_cb *cb = >pkt->async_cb;
> @@ -371,15 +410,37 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan,
> void *data)
> cmdq->shift_pa;
> end_pa = readl(thread->base + CMDQ_THR_END_ADDR) <<
> cmdq->shift_pa;
> - /* check boundary */
> - if (curr_pa == end_pa - CMDQ_INST_SIZE ||
> - curr_pa == end_pa) {
> - /* set to this task directly */
> - writel(task->pa_base >> cmdq->shift_pa,
> - thread->base + CMDQ_THR_CURR_ADDR);
> +
> + /*
> +* Atomic execution should remove the following wfe, i.e. only
> +* wait event at first task, and prevent to pause when
> running.
> +*/
> + if (thread->atomic_exec) {
> + /* GCE is executing if command is not WFE */
> + if (!cmdq_thread_is_in_wfe(thread)) {
> + cmdq_thread_resume(thread);
> + cmdq_thread_wait_end(thread,
> +end_pa >>
> cmdq->shift_pa);
> + WARN_ON(cmdq_thread_suspend(cmdq, thread) <
> 0);
> + /* set to this task directly */
> + writel(task->pa_base >> cmdq->shift_pa,
> + thread->base + CMDQ_THR_CURR_ADDR);
> + } else {
> + cmdq_task_insert_into_thread(task);
> + cmdq_task_remove_wfe(task);
> +
Re: [PATCH v8 3/4] arm64: dts: mediatek: add mt6765 support
Hi, Macpaul:
Macpaul Lin 於 2020年2月21日 週五 下午6:22寫道：
>
> From: Mars Cheng
>
> Add basic chip support for Mediatek 6765, include
> uart node with correct uart clocks, pwrap device
>
> Add clock controller nodes, include topckgen, infracfg,
> apmixedsys and subsystem.
>
> Signed-off-by: Mars Cheng
> Signed-off-by: Owen Chen
> Signed-off-by: Macpaul Lin
> Acked-by: Marc Zyngier
> ---
> arch/arm64/boot/dts/mediatek/Makefile |1 +
> arch/arm64/boot/dts/mediatek/mt6765-evb.dts | 33
> arch/arm64/boot/dts/mediatek/mt6765.dtsi| 253
> +++
> 3 files changed, 287 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6765.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> b/arch/arm64/boot/dts/mediatek/Makefile
> index 458bbc4..22bdf1a 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6765-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> new file mode 100644
> index 000..36dddff2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765-evb.dts
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng
> + */
> +
> +/dts-v1/;
> +#include "mt6765.dtsi"
> +
> +/ {
> + model = "MediaTek MT6765 EVB";
> + compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
> +
> + aliases {
> + serial0 =
> + };
> +
> + memory@4000 {
> + device_type = "memory";
> + reg = <0 0x4000 0 0x1e80>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> new file mode 100644
> index 000..2662470
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6765.dtsi
> @@ -0,0 +1,253 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Mediatek MT6765
> + *
> + * (C) Copyright 2018. Mediatek, Inc.
> + *
> + * Mars Cheng
> + */
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + compatible = "mediatek,mt6765";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
[snip]
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
> + gic: interrupt-controller@c00 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <>;
> + interrupt-controller;
> + reg = <0 0x0c00 0 0x4>, /* GICD */
> + <0 0x0c10 0 0x20>, /* GICR */
> + <0 0x0c40 0 0x2000>, /* GICC */
> + <0 0x0c41 0 0x2000>, /* GICH */
> + <0 0x0c42 0 0x2>; /* GICV */
> + interrupts = ;
> + };
> +
> + topckgen: syscon@1000 {
> + compatible = "mediatek,mt6765-topckgen", "syscon";
> + reg = <0 0x1000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + infracfg: syscon@10001000 {
> + compatible = "mediatek,mt6765-infracfg", "syscon";
> + reg = <0 0x10001000 0 0x1000>;
> + interrupts = ;
> + #clock-cells = <1>;
> + };
> +
> + pericfg: pericfg@10003000 {
> + compatible = "mediatek,mt6765-pericfg", "syscon";
> + reg = <0 0x10003000 0 0x1000>;
> + };
> +
> + scpsys: scpsys@10006000 {
> + compatible = "mediatek,mt6765-scpsys";
> + reg = <0 0x10006000 0 0x1000>; /* spm */
> + #power-domain-cells = <1>;
> + clocks = < CLK_TOP_MFG_SEL>,
> +< CLK_TOP_MM_SEL>,
> +<_config CLK_MM_SMI_COMMON>,
> +<_config CLK_MM_SMI_COMM0>,
> +
Re: [PATCH] arm64: dts: mt8173: fix property typo of 'phys' in dsi node
Hi, Chunfeng:
Chunfeng Yun 於 2021年3月8日 週一 下午3:05寫道：
>
> Use 'phys' instead of 'phy'.
Reviewed-by: Chun-Kuang Hu
>
> Fixes: 81ad4dbaf7af ("arm64: dts: mt8173: Add display subsystem related
> nodes")
> Cc: stable
> Signed-off-by: Chunfeng Yun
> ---
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 75040a820f0d..003a5653c505 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -1236,7 +1236,7 @@
> < CLK_MM_DSI1_DIGITAL>,
> <_tx1>;
> clock-names = "engine", "digital", "hs";
> - phy = <_tx1>;
> + phys = <_tx1>;
> phy-names = "dphy";
> status = "disabled";
> };
> --
> 2.18.0
>
Re: [PATCH v3 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi
Hi, Jitao: Rob Herring 於 2021年2月11日 週四 上午4:19寫道： > > On Mon, 08 Feb 2021 09:42:21 +0800, Jitao Shi wrote: > > Add compatible "mediatek,mt8192-dpi" for the mt8192 dpi. > > > > Signed-off-by: Jitao Shi > > --- > > .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > Acked-by: Rob Herring Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang.
Re: [PATCH v2 2/2] drm/mediatek: dsi: fine tune the line time cause by EOTp
Hi, Jitao: Jitao Shi 於 2021年2月1日 週一 上午11:36寫道： > > Enabling EoTp will make the line time larger, so the hfp and > hbp should be reduced to keep line time. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 2bc46f2350f1..8c70ec39bfe1 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -481,6 +481,7 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > timing->da_hs_zero + timing->da_hs_exit + 3; > > delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > + delta += dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET ? 2 : 0; > > horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > horizontal_front_back_byte = horizontal_frontporch_byte + > horizontal_backporch_byte; > -- > 2.12.5 > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 1/2] drm/mediatek: dsi: Fix EoTp flag
Hi, Jitao: Jitao Shi 於 2021年2月1日 週一 上午11:36寫道： > > SoC will transmit the EoTp (End of Transmission packet) when > MIPI_DSI_MODE_EOT_PACKET flag is set. I've modified the title and message as: drm/mediatek: dsi: Use symbolized register definition For HSTX_CKLP_EN and DIS_EOT, use symbolized register definition instead of magic number. And applied to mediatek-drm-next [1], thanks. https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 65fd99c528af..2bc46f2350f1 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -401,8 +401,11 @@ static void mtk_dsi_rxtx_control(struct mtk_dsi *dsi) > break; > } > > - tmp_reg |= (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) << 6; > - tmp_reg |= (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET) >> 3; > + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) > + tmp_reg |= HSTX_CKLP_EN; > + > + if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) > + tmp_reg |= DIS_EOT; > > writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL); > } > -- > 2.12.5 > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] dt-bindings: display: mediatek,dpi: Convert to use graph schema
Hi, Rob: Rob Herring 於 2021年2月24日 週三 上午5:51寫道： > > Update the mediatek,dpi binding to use the graph schema. Missed > this one from the mass conversion since it's not part of drm-misc. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Cc: Matthias Brugger > Cc: CK Hu > Cc: Jitao shi > Cc: dri-de...@lists.freedesktop.org > Cc: linux-media...@lists.infradead.org > Signed-off-by: Rob Herring > --- > .../bindings/display/mediatek/mediatek,dpi.yaml | 11 +++ > 1 file changed, 3 insertions(+), 8 deletions(-) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > index 6cdb734c91a9..eb84b53cabb1 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > @@ -50,15 +50,10 @@ properties: >- const: sleep > >port: > -type: object > +$ref: /schemas/graph.yaml#/properties/port > description: > - Output port node with endpoint definitions as described in > - Documentation/devicetree/bindings/graph.txt. This port should be > connected > - to the input port of an attached HDMI or LVDS encoder chip. > - > -properties: > - endpoint: > -type: object > + Output port node. This port should be connected to the input port of an > + attached HDMI or LVDS encoder chip. > > required: >- compatible > -- > 2.27.0 >
Re: [PATCH v1] drm/mediatek: move page flip handle into cmdq cb
Hi, Yongqiang:
Yongqiang Niu 於 2021年2月19日 週五 下午5:54寫道：
>
> move page flip handle into cmdq cb
> irq callback will before cmdq flush ddp register
> into hardware, that will cause the display frame page
> flip event before it realy display out time
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 33
> +
> 1 file changed, 29 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index bdd37ea..bece327 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -72,6 +72,13 @@ struct mtk_crtc_state {
> unsigned intpending_vrefresh;
> };
>
> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> +struct mtk_cmdq_cb_data {
> + struct cmdq_pkt *cmdq_handle;
> + struct mtk_drm_crtc *mtk_crtc;
> +};
> +#endif
> +
> static inline struct mtk_drm_crtc *to_mtk_crtc(struct drm_crtc *c)
> {
> return container_of(c, struct mtk_drm_crtc, base);
> @@ -96,7 +103,6 @@ static void mtk_drm_crtc_finish_page_flip(struct
> mtk_drm_crtc *mtk_crtc)
>
> static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
> {
> - drm_crtc_handle_vblank(_crtc->base);
> if (mtk_crtc->pending_needs_vblank) {
> mtk_drm_crtc_finish_page_flip(mtk_crtc);
> mtk_crtc->pending_needs_vblank = false;
> @@ -241,7 +247,19 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct
> drm_crtc *crtc,
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> static void ddp_cmdq_cb(struct cmdq_cb_data data)
> {
> - cmdq_pkt_destroy(data.data);
> + struct mtk_cmdq_cb_data *cb_data = data.data;
> +
> + if (cb_data) {
> + struct mtk_drm_crtc *mtk_crtc = cb_data->mtk_crtc;
> +
> + if (mtk_crtc)
> + mtk_drm_finish_page_flip(mtk_crtc);
> +
> + if (cb_data->cmdq_handle)
> + cmdq_pkt_destroy(cb_data->cmdq_handle);
> +
> + kfree(cb_data);
> + }
> }
> #endif
>
> @@ -481,13 +499,20 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
> *mtk_crtc)
> }
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> if (mtk_crtc->cmdq_client) {
> + struct mtk_cmdq_cb_data *cb_data;
> +
> mbox_flush(mtk_crtc->cmdq_client->chan, 2000);
> cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client,
> PAGE_SIZE);
> cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);
> cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);
> mtk_crtc_ddp_config(crtc, cmdq_handle);
> cmdq_pkt_finalize(cmdq_handle);
> - cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
> +
> + cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
> + cb_data->cmdq_handle = cmdq_handle;
> + cb_data->mtk_crtc = mtk_crtc;
> +
> + cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cb_data);
> }
> #endif
> mutex_unlock(_crtc->hw_lock);
> @@ -674,7 +699,7 @@ void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct
> mtk_ddp_comp *comp)
> #endif
> mtk_crtc_ddp_config(crtc, NULL);
>
> - mtk_drm_finish_page_flip(mtk_crtc);
> + drm_crtc_handle_vblank(_crtc->base);
For CPU and shadow register case, where to handle page flip?
The correct sequence should be:
1. set pending_needs_vblank to true
2. mtk_drm_crtc_hw_config
3. irq comes, handle page flip, and set pending_needs_vblank to false
But now irq comes before 2, so this patch want to fix this bug.
I think shadow register also have this problem. The control flow of
shadow register is similar to cmdq, so I would like to fix both
problem in the same way.
Regards,
Chun-Kuang.
> }
>
> static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,
> --
> 1.8.1.1.dirty
>
Re: [PATCH -next] soc / drm: mediatek: Mark mtk_mutex_driver with static keyword
Hi, Zou:
Zou Wei 於 2021年2月18日 週四 下午3:12寫道：
>
> Fix the following sparse warning:
>
> drivers/soc/mediatek/mtk-mutex.c:464:24: warning: symbol 'mtk_mutex_driver'
> was not declared. Should it be static?
>
Reviewed-by: Chun-Kuang Hu
> Signed-off-by: Zou Wei
> ---
> drivers/soc/mediatek/mtk-mutex.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c
> b/drivers/soc/mediatek/mtk-mutex.c
> index f531b11..3a315a6 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -461,7 +461,7 @@ static const struct of_device_id mutex_driver_dt_match[]
> = {
> };
> MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
>
> -struct platform_driver mtk_mutex_driver = {
> +static struct platform_driver mtk_mutex_driver = {
> .probe = mtk_mutex_probe,
> .remove = mtk_mutex_remove,
> .driver = {
> --
> 2.6.2
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] drm/dsi: Add _NO_ to MIPI_DSI_* flags disabling features
Hi, Nicolas:
Nicolas Boichat 於 2021年2月11日 週四 上午11:34寫道：
>
> Many of the DSI flags have names opposite to their actual effects,
> e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
> be disabled. Fix this by including _NO_ in the flag names, e.g.
> MIPI_DSI_MODE_NO_EOT_PACKET.
For Mediatek part,
Acked-by: Chun-Kuang Hu
>
> Signed-off-by: Nicolas Boichat
> ---
> I considered adding _DISABLE_ instead, but that'd make the
> flag names a big too long.
>
> Generated with:
> flag=MIPI_DSI_MODE_VIDEO_HFP; git grep $flag | cut -f1 -d':' | \
> xargs -I{} sed -i -e "s/$flag/MIPI_DSI_MODE_VIDEO_NO_HFP/" {}
> flag=MIPI_DSI_MODE_VIDEO_HBP; git grep $flag | cut -f1 -d':' | \
> xargs -I{} sed -i -e "s/$flag/MIPI_DSI_MODE_VIDEO_NO_HBP/" {}
> flag=MIPI_DSI_MODE_VIDEO_HSA; git grep $flag | cut -f1 -d':' | \
> xargs -I{} sed -i -e "s/$flag/MIPI_DSI_MODE_VIDEO_NO_HSA/" {}
> flag=MIPI_DSI_MODE_EOT_PACKET; git grep $flag | cut -f1 -d':' | \
> xargs -I{} sed -i -e "s/$flag/MIPI_DSI_MODE_NO_EOT_PACKET/" {}
> (then minor format changes)
>
> drivers/gpu/drm/bridge/adv7511/adv7533.c | 2 +-
> drivers/gpu/drm/bridge/analogix/anx7625.c| 2 +-
> drivers/gpu/drm/bridge/cdns-dsi.c| 4 ++--
> drivers/gpu/drm/bridge/tc358768.c| 2 +-
> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8
> drivers/gpu/drm/mcde/mcde_dsi.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_dsi.c | 2 +-
> drivers/gpu/drm/msm/dsi/dsi_host.c | 8
> drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c | 2 +-
> drivers/gpu/drm/panel/panel-dsi-cm.c | 2 +-
> drivers/gpu/drm/panel/panel-elida-kd35t133.c | 2 +-
> drivers/gpu/drm/panel/panel-khadas-ts050.c | 2 +-
> drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c | 2 +-
> drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c | 2 +-
> drivers/gpu/drm/panel/panel-novatek-nt35510.c| 2 +-
> drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c | 2 +-
> drivers/gpu/drm/panel/panel-samsung-s6d16d0.c| 2 +-
> drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c | 2 +-
> drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c| 2 +-
> drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c| 4 ++--
> drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 2 +-
> drivers/gpu/drm/panel/panel-simple.c | 2 +-
> drivers/gpu/drm/panel/panel-sony-acx424akp.c | 2 +-
> drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c | 2 +-
> include/drm/drm_mipi_dsi.h | 8
> 25 files changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c
> b/drivers/gpu/drm/bridge/adv7511/adv7533.c
> index aa19d5a40e31..59d718bde8c4 100644
> --- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
> +++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
> @@ -165,7 +165,7 @@ int adv7533_attach_dsi(struct adv7511 *adv)
> dsi->lanes = adv->num_dsi_lanes;
> dsi->format = MIPI_DSI_FMT_RGB888;
> dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
> MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
> + MIPI_DSI_MODE_NO_EOT_PACKET |
> MIPI_DSI_MODE_VIDEO_HSE;
>
> ret = mipi_dsi_attach(dsi);
> if (ret < 0) {
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 65cc05982f82..beecfe6bf359 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -1334,7 +1334,7 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx)
> dsi->format = MIPI_DSI_FMT_RGB888;
> dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
> MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> - MIPI_DSI_MODE_EOT_PACKET|
> + MIPI_DSI_MODE_NO_EOT_PACKET |
> MIPI_DSI_MODE_VIDEO_HSE;
>
> if (mipi_dsi_attach(dsi) < 0) {
> diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c
> b/drivers/gpu/drm/bridge/cdns-dsi.c
> index 76373e31df92..34aa24269a57 100644
> --- a/drivers/gpu/drm/bridge/cdns-dsi.c
> +++ b/drivers/gpu/drm/bridge/cdns-dsi.c
> @@ -829,7 +829,7 @@ static void cdns_dsi_bridge_enable(struct drm_bridge
> *bridge)
> tmp = DIV_ROUND_UP(dsi_cfg.htotal, nlanes) -
> DIV_ROUND_UP(dsi_cfg.hsa, nlanes);
>
> - if (!(output->dev->mode_flags & MIPI_DSI_MODE_EOT_PACKET))
> + if (!(output->dev->mode_flags & MIPI_DSI_MODE_NO_
Re: [PATCH next v3 04/16] dt-bindings: phy: mediatek: hdmi-phy: modify compatible items
Hi, Chunfeng: Chunfeng Yun 於 2021年2月1日 週一 下午3:00寫道： > > mt7623-hdmi-tx is compatible to mt2701-hdmi-tx, and the compatible > "mediatek,mt7623-hdmi-tx" is not supported in driver, in fact uses > "mediatek,mt2701-hdmi-tx" instead on MT7623, so changes the > compatible items to make dependence clear. Acked-by: Chun-Kuang Hu > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > v3: modify commit message > v2: no changes > --- > .../devicetree/bindings/phy/mediatek,hdmi-phy.yaml| 11 +++ > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > index 4752517a1446..0d94950b84ca 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > @@ -21,10 +21,13 @@ properties: > pattern: "^hdmi-phy@[0-9a-f]+$" > >compatible: > -enum: > - - mediatek,mt2701-hdmi-phy > - - mediatek,mt7623-hdmi-phy > - - mediatek,mt8173-hdmi-phy > +oneOf: > + - items: > + - enum: > + - mediatek,mt7623-hdmi-phy > + - const: mediatek,mt2701-hdmi-phy > + - const: mediatek,mt2701-hdmi-phy > + - const: mediatek,mt8173-hdmi-phy > >reg: > maxItems: 1 > -- > 2.18.0
Re: [PATCH next v3 03/16] dt-bindings: phy: mediatek: dsi-phy: modify compatible dependence
Hi, Chunfeng: Chunfeng Yun 於 2021年2月1日 週一 下午3:00寫道： > > mt7623-mipi-tx is compatible to mt2701-mipi-tx, and use > "mediatek,mt2701-mipi-tx" instead on MT7623, so modify > the compatible items to make dependence clear. Acked-by: Chun-Kuang Hu > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > v3: modify commit message suggested by CK > v2: separate two patches suggested by CK > --- > .../devicetree/bindings/phy/mediatek,dsi-phy.yaml | 13 - > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > index 71d4acea1f66..6e4d795f9b02 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > @@ -19,11 +19,14 @@ properties: > pattern: "^dsi-phy@[0-9a-f]+$" > >compatible: > -enum: > - - mediatek,mt2701-mipi-tx > - - mediatek,mt7623-mipi-tx > - - mediatek,mt8173-mipi-tx > - - mediatek,mt8183-mipi-tx > +oneOf: > + - items: > + - enum: > + - mediatek,mt7623-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt8173-mipi-tx > + - const: mediatek,mt8183-mipi-tx > >reg: > maxItems: 1 > -- > 2.18.0
Re: [PATCH v3 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192
Hi, Jitao:
Jitao Shi 於 2021年2月8日 週一 上午9:42寫道：
Where is the description? Say something here.
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index ffa4a0f1989f..f6f71eb67ff1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -703,6 +703,12 @@ static const struct mtk_dpi_conf mt8183_conf = {
> .max_clock_khz = 10,
> };
>
> +static const struct mtk_dpi_conf mt8192_conf = {
> + .cal_factor = mt8183_calculate_factor,
> + .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 15,
> +};
> +
> static int mtk_dpi_probe(struct platform_device *pdev)
> {
> struct device *dev = >dev;
> @@ -837,6 +843,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
> { .compatible = "mediatek,mt8183-dpi",
> .data = _conf,
> },
> + { .compatible = "mediatek,mt8192-dpi",
> + .data = _conf,
> + },
> { },
> };
>
> --
> 2.25.1
Re: [PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
Hi, Jitao:
Jitao Shi 於 2021年2月8日 週一 上午9:42寫道：
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 52f11a63a330..ffa4a0f1989f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> u32 reg_h_fre_con;
> + u32 max_clock_khz;
> bool edge_sel_en;
> };
>
> @@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge
> *bridge)
> mtk_dpi_set_display_mode(dpi, >mode);
> }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode)
> +{
> + struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> + if (dpi->conf->max_clock_khz && mode->clock >
> dpi->conf->max_clock_khz)
> + return MODE_CLOCK_HIGH;
> +
> + return MODE_OK;
> +}
> +
> static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .attach = mtk_dpi_bridge_attach,
> .mode_set = mtk_dpi_bridge_mode_set,
> + .mode_valid = mtk_dpi_bridge_mode_valid,
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
> };
> @@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
> static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 30,
> };
>
> static const struct mtk_dpi_conf mt2701_conf = {
> .cal_factor = mt2701_calculate_factor,
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> + .max_clock_khz = 15,
> };
>
> static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 10,
> };
>
> static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.25.1
Re: [PATCH v3 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi
Hi, Jitao: Jitao Shi 於 2021年2月8日 週一 上午9:42寫道： > > Add compatible "mediatek,mt8192-dpi" for the mt8192 dpi. > Reviewed-by: Chun-Kuang Hu > Signed-off-by: Jitao Shi > --- > .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > index 6cdb734c91a9..2f566f19e6e0 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > @@ -22,6 +22,7 @@ properties: >- mediatek,mt7623-dpi >- mediatek,mt8173-dpi >- mediatek,mt8183-dpi > + - mediatek,mt8192-dpi > >reg: > maxItems: 1 > -- > 2.25.1
Re: [PATCH v3 1/3] dt-binding: gce: add gce header file for mt8192
Hi, Hsin-Yi: Hsin-Yi Wang 於 2021年2月5日 週五 下午3:19寫道： > > From: Yongqiang Niu > > Add documentation for the mt8192 gce. > > Add gce header file defined the gce hardware event, > subsys number and constant for mt8192. > > Signed-off-by: Yongqiang Niu > Reviewed-by: Rob Herring > Signed-off-by: Hsin-Yi Wang > --- > .../devicetree/bindings/mailbox/mtk-gce.txt | 7 +- > include/dt-bindings/gce/mt8192-gce.h | 419 ++ > 2 files changed, 423 insertions(+), 3 deletions(-) > create mode 100644 include/dt-bindings/gce/mt8192-gce.h > > diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > index 7771ecaac5868..ac4245050d17d 100644 > --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt > @@ -9,8 +9,8 @@ CMDQ driver uses mailbox framework for communication. Please > refer to > mailbox.txt for generic information about mailbox device-tree bindings. > > Required properties: > -- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce" or > - "mediatek,mt6779-gce". > +- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", > + "mediatek,mt8192-gce" or "mediatek,mt6779-gce". > - reg: Address range of the GCE unit > - interrupts: The interrupt signal from the GCE block > - clock: Clocks according to the common clock binding > @@ -36,7 +36,8 @@ Optional properties for a client device: >size: the total size of register address that GCE can access. > > Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', > -'dt-binding/gce/mt8183-gce.h' or 'dt-bindings/gce/mt6779-gce.h'. Such as > +'dt-binding/gce/mt8183-gce.h', 'dt-binding/gce/mt8192-gce.h' or > +'dt-bindings/gce/mt6779-gce.h'. Such as > sub-system ids, thread priority, event ids. > > Example: > diff --git a/include/dt-bindings/gce/mt8192-gce.h > b/include/dt-bindings/gce/mt8192-gce.h > new file mode 100644 > index 0..062754416bfda > --- /dev/null > +++ b/include/dt-bindings/gce/mt8192-gce.h > @@ -0,0 +1,419 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2020 MediaTek Inc. > + * Author: Yongqiang Niu > + */ > + > +#ifndef _DT_BINDINGS_GCE_MT8192_H > +#define _DT_BINDINGS_GCE_MT8192_H > + > +/* assign timeout 0 also means default */ > +#define CMDQ_NO_TIMEOUT0x > +#define CMDQ_TIMEOUT_DEFAULT 1000 > + > +/* GCE thread priority */ > +#define CMDQ_THR_PRIO_LOWEST 0 > +#define CMDQ_THR_PRIO_11 > +#define CMDQ_THR_PRIO_22 > +#define CMDQ_THR_PRIO_33 > +#define CMDQ_THR_PRIO_44 > +#define CMDQ_THR_PRIO_55 > +#define CMDQ_THR_PRIO_66 > +#define CMDQ_THR_PRIO_HIGHEST 7 > + > +/* CPR count in 32bit register */ > +#define GCE_CPR_COUNT 1312 > + > +/* GCE subsys table */ > +#define SUBSYS_13000 > +#define SUBSYS_14001 > +#define SUBSYS_14012 > +#define SUBSYS_14023 > +#define SUBSYS_15024 > +#define SUBSYS_18805 > +#define SUBSYS_18816 > +#define SUBSYS_18827 > +#define SUBSYS_18838 > +#define SUBSYS_18849 > +#define SUBSYS_100010 > +#define SUBSYS_100111 > +#define SUBSYS_100212 > +#define SUBSYS_100313 > +#define SUBSYS_100414 > +#define SUBSYS_100515 > +#define SUBSYS_102016 > +#define SUBSYS_102817 > +#define SUBSYS_170018 > +#define SUBSYS_170119 > +#define SUBSYS_170220 > +#define SUBSYS_170321 > +#define SUBSYS_180022 > +#define SUBSYS_180123 > +#define SUBSYS_180224 > +#define SUBSYS_180425 > +#define SUBSYS_180526 > +#define SUBSYS_180827 > +#define SUBSYS_180a28 > +#define SUBSYS_180b29 > +#define SUBSYS_NO_SUPPORT 99 Why define no support? > + > +/* GCE General Purpose Register (GPR) support > + * Leave note for scenario usage here > + */ > +/* GCE: write mask */ > +#define GCE_GPR_R000x00 > +#define GCE_GPR_R010x01 > +/* MDP: P1: JPEG dest */ > +#define GCE_GPR_R020x02 > +#define GCE_GPR_R030x03 > +/* MDP: PQ color */ > +#define GCE_GPR_R040x04 > +/* MDP: 2D sharpness */ > +#define GCE_GPR_R050x05 > +/* DISP: poll esd */ > +#define GCE_GPR_R060x06 > +#define GCE_GPR_R070x07 > +/* MDP: P4: 2D sharpness dst */ > +#define GCE_GPR_R080x08 > +#define GCE_GPR_R090x09 > +/*
Re: [PATCH v6 5/8] drm/mediatek: Fix ccorr size config
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年2月2日 週二 下午4:13寫道：
>
> From: Yongqiang Niu
>
> Fix setting to follow hardware datasheet. The original error setting
> affects mt8192 display.
>
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> index 6ee2431e6b843..6c86673a835c3 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -65,7 +65,7 @@ void mtk_ccorr_config(struct device *dev, unsigned int w,
> {
> struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
>
> - mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, ccorr->regs,
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, >cmdq_reg, ccorr->regs,
> DISP_CCORR_SIZE);
> mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, >cmdq_reg,
> ccorr->regs,
> DISP_CCORR_CFG);
> --
> 2.30.0.365.g02bc693789-goog
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v6 4/8] drm/mediatek: separate ccorr module
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年2月2日 週二 下午4:13寫道：
>
> From: Yongqiang Niu
>
> ccorr ctm matrix bits will be different in mt8192
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/Makefile | 3 +-
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 216
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 9 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 95 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 6 files changed, 236 insertions(+), 96 deletions(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index b64674b944860..dc54a7a690054 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> -mediatek-drm-y := mtk_disp_color.o \
> +mediatek-drm-y := mtk_disp_ccorr.o \
> + mtk_disp_color.o \
> mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> mtk_disp_rdma.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> new file mode 100644
> index 0..6ee2431e6b843
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -0,0 +1,216 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "mtk_disp_drv.h"
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_CCORR_EN 0x
> +#define CCORR_EN BIT(0)
> +#define DISP_CCORR_CFG 0x0020
> +#define CCORR_RELAY_MODE BIT(0)
> +#define CCORR_ENGINE_ENBIT(1)
> +#define CCORR_GAMMA_OFFBIT(2)
> +#define CCORR_WGAMUT_SRC_CLIP BIT(3)
> +#define DISP_CCORR_SIZE0x0030
> +#define DISP_CCORR_COEF_0 0x0080
> +#define DISP_CCORR_COEF_1 0x0084
> +#define DISP_CCORR_COEF_2 0x0088
> +#define DISP_CCORR_COEF_3 0x008C
> +#define DISP_CCORR_COEF_4 0x0090
> +
> +struct mtk_disp_ccorr_data {
> + u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_ccorr - DISP_CCORR driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_ccorr {
> + struct clk *clk;
> + void __iomem *regs;
> + struct cmdq_client_reg cmdq_reg;
> + const struct mtk_disp_ccorr_data*data;
> +};
> +
> +int mtk_ccorr_clk_enable(struct device *dev)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + return clk_prepare_enable(ccorr->clk);
> +}
> +
> +void mtk_ccorr_clk_disable(struct device *dev)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + clk_disable_unprepare(ccorr->clk);
> +}
> +
> +void mtk_ccorr_config(struct device *dev, unsigned int w,
> +unsigned int h, unsigned int vrefresh,
> +unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, ccorr->regs,
> + DISP_CCORR_SIZE);
> + mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, >cmdq_reg,
> ccorr->regs,
> + DISP_CCORR_CFG);
> +}
> +
> +void mtk_ccorr_start(struct device *dev)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + writel(CCORR_EN, ccorr->regs + DISP_CCORR_EN);
> +}
> +
> +void mtk_ccorr_stop(struct device *dev)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
> +}
> +
> +/* Converts a DRM S31.32 value to the HW S1.10 format. */
> +static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
> +{
> + u16 r;
> +
> + /* Sign bit. */
> + r = in & BIT_ULL(63) ? BIT(11) : 0;
> +
> + if ((in & GENMASK_ULL(62, 33)) > 0) {
> + /* identity value 0x1 -> 0x400, */
> + /* if bigger this, set it to max 0x7ff. */
> + r |= GENMASK(10, 0);
> + } else {
> + /* take the 11 most important bits. */
> + r |= (in >> 22) & GENMASK(10, 0);
> + }
> +
> +
Re: [PATCH v6 6/8] drm/mediatek: add matrix_bits private data for ccorr
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年2月2日 週二 下午4:14寫道：
>
> From: Yongqiang Niu
>
> Add matrix_bits and coeffs_precision to ccorr private data:
> - matrix bits of mt8183 is 10
> - matrix bits of mt8192 is 11
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 27 ++-
> 1 file changed, 17 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> index 6c86673a835c3..141cb36b9c07b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -30,7 +30,7 @@
> #define DISP_CCORR_COEF_4 0x0090
>
> struct mtk_disp_ccorr_data {
> - u32 reserved;
> + u32 matrix_bits;
> };
>
> /**
> @@ -85,21 +85,22 @@ void mtk_ccorr_stop(struct device *dev)
> writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
> }
>
> -/* Converts a DRM S31.32 value to the HW S1.10 format. */
> -static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
> +/* Converts a DRM S31.32 value to the HW S1.n format. */
> +static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
> {
> u16 r;
>
> /* Sign bit. */
> - r = in & BIT_ULL(63) ? BIT(11) : 0;
> + r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
>
> if ((in & GENMASK_ULL(62, 33)) > 0) {
> - /* identity value 0x1 -> 0x400, */
> + /* identity value 0x1 -> 0x400(mt8183), */
> + /* identity value 0x1 -> 0x800(mt8192), */
> /* if bigger this, set it to max 0x7ff. */
> - r |= GENMASK(10, 0);
> + r |= GENMASK(n, 0);
> } else {
> - /* take the 11 most important bits. */
> - r |= (in >> 22) & GENMASK(10, 0);
> + /* take the n+1 most important bits. */
> + r |= (in >> (32 - n)) & GENMASK(n, 0);
> }
>
> return r;
> @@ -114,6 +115,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct
> drm_crtc_state *state)
> uint16_t coeffs[9] = { 0 };
> int i;
> struct cmdq_pkt *cmdq_pkt = NULL;
> + u32 matrix_bits = ccorr->data->matrix_bits;
>
> if (!blob)
> return;
> @@ -122,7 +124,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct
> drm_crtc_state *state)
> input = ctm->matrix;
>
> for (i = 0; i < ARRAY_SIZE(coeffs); i++)
> - coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
> + coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
>
> mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
> >cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
> @@ -199,8 +201,13 @@ static int mtk_disp_ccorr_remove(struct platform_device
> *pdev)
> return 0;
> }
>
> +static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
> + .matrix_bits = 10,
> +};
> +
> static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
> - { .compatible = "mediatek,mt8183-disp-ccorr"},
> + { .compatible = "mediatek,mt8183-disp-ccorr",
> + .data = _ccorr_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
> --
> 2.30.0.365.g02bc693789-goog
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] drm/mediatek: enable dither function
Hi, Hsin-Yi:
Chun-Kuang Hu 於 2021年2月1日 週一 上午12:20寫道：
>
> Hi, Hsin-Yi:
>
> Hsin-Yi Wang 於 2021年1月31日 週日 下午1:11寫道：
> >
> > From: Yongqiang Niu
> >
> > Enable dither function to improve the display quality.
>
> Reviewed-by: Chun-Kuang Hu
>
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
> >
> > Signed-off-by: Yongqiang Niu
> > Signed-off-by: Hsin-Yi Wang
> > ---
> > Previous version:
> > https://patchwork.kernel.org/project/linux-mediatek/patch/20210129092209.2584718-7-hsi...@chromium.org/
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 9 +++--
> > 1 file changed, 7 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > index c730029ac8fc7..0444b429daf00 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > @@ -53,6 +53,7 @@
> > #define DITHER_EN BIT(0)
> > #define DISP_DITHER_CFG0x0020
> > #define DITHER_RELAY_MODE BIT(0)
> > +#define DITHER_ENGINE_EN BIT(1)
> > #define DISP_DITHER_SIZE 0x0030
> >
> > #define LUT_10BIT_MASK 0x03ff
> > @@ -315,8 +316,12 @@ static void mtk_dither_config(struct device *dev,
> > unsigned int w,
> > {
> > struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> >
> > - mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, priv->regs,
> > DISP_DITHER_SIZE);
> > - mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, >cmdq_reg,
> > priv->regs, DISP_DITHER_CFG);
> > + mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, priv->regs,
> > + DISP_DITHER_SIZE);
> > + mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, >cmdq_reg,
> > priv->regs,
> > + DISP_DITHER_CFG);
> > + mtk_dither_set_common(priv->regs, >cmdq_reg, bpc,
> > DISP_DITHER_CFG,
> > + DITHER_ENGINE_EN, cmdq_pkt);
> > }
> >
> > static void mtk_dither_start(struct device *dev)
> > --
> > 2.30.0.365.g02bc693789-goog
> >
> >
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v4 5/8] drm/mediatek: separate ccorr module
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午3:35寫道：
>
> From: Yongqiang Niu
>
> ccorr ctm matrix bits will be different in mt8192
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/mediatek/Makefile | 3 +-
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 222
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 9 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 95 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 6 files changed, 242 insertions(+), 96 deletions(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
>
[snip]
> +
> +void mtk_ccorr_config(struct device *dev, unsigned int w,
> +unsigned int h, unsigned int vrefresh,
> +unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
> +
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, >cmdq_reg, ccorr->regs,
> + DISP_CCORR_SIZE);
You change w, h position here. Separate this modification to another patch.
> + mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, >cmdq_reg,
> ccorr->regs,
> + DISP_CCORR_CFG);
> +}
> +
[snip]
> -static void mtk_ccorr_config(struct device *dev, unsigned int w,
> -unsigned int h, unsigned int vrefresh,
> -unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> -{
> - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> -
> - mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, priv->regs,
> DISP_CCORR_SIZE);
> - mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, >cmdq_reg, priv->regs,
> DISP_CCORR_CFG);
> -}
> -
Re: [PATCH v4 4/8] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Hi, Hsin-Yi:
CK Hu 於 2021年1月29日 週五 下午4:21寫道：
>
> Hi, Hsin-Yi:
>
> On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > From: Yongqiang Niu
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase, without this patch,
> > ovl will hang up when more than 1 layer enabled.
>
> Reviewed-by: CK Hu
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> >
> > Signed-off-by: Yongqiang Niu
> > Signed-off-by: Hsin-Yi Wang
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 17 +
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index da7e38a28759b..961f87f8d4d15 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -24,6 +24,7 @@
> > #define DISP_REG_OVL_RST 0x0014
> > #define DISP_REG_OVL_ROI_SIZE0x0020
> > #define DISP_REG_OVL_DATAPATH_CON0x0024
> > +#define OVL_LAYER_SMI_ID_EN BIT(0)
> > #define OVL_BGCLR_SEL_IN BIT(2)
> > #define DISP_REG_OVL_ROI_BGCLR 0x0028
> > #define DISP_REG_OVL_SRC_CON 0x002c
> > @@ -62,6 +63,7 @@ struct mtk_disp_ovl_data {
> > unsigned int gmc_bits;
> > unsigned int layer_nr;
> > bool fmt_rgb565_is_0;
> > + bool smi_id_en;
> > };
> >
> > /**
> > @@ -134,6 +136,13 @@ void mtk_ovl_start(struct device *dev)
> > {
> > struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> >
> > + if (ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg | OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> > + }
> > writel_relaxed(0x1, ovl->regs + DISP_REG_OVL_EN);
> > }
> >
> > @@ -142,6 +151,14 @@ void mtk_ovl_stop(struct device *dev)
> > struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> >
> > writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_EN);
> > + if (ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg & ~OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> > + }
> > +
> > }
> >
> > void mtk_ovl_config(struct device *dev, unsigned int w,
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v13 6/8] drm/mediatek: enable dither function
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> From: Yongqiang Niu
>
> Enable dither function to improve the display quality for dither
> supported bpc 4, 6, 8. For not supported bpc, use relay mode.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 15 ---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index ac2cb25620357..5761dd15eedf2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -53,6 +53,7 @@
> #define DITHER_EN BIT(0)
> #define DISP_DITHER_CFG0x0020
> #define DITHER_RELAY_MODE BIT(0)
> +#define DITHER_ENGINE_EN BIT(1)
> #define DISP_DITHER_SIZE 0x0030
>
> #define LUT_10BIT_MASK 0x03ff
> @@ -314,9 +315,17 @@ static void mtk_dither_config(struct device *dev,
> unsigned int w,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> {
> struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> -
> - mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, priv->regs,
> DISP_DITHER_SIZE);
> - mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, >cmdq_reg,
> priv->regs, DISP_DITHER_CFG);
> + bool valid_bpc = (bpc == 4 || bpc == 6 || bpc == 8);
> +
> + mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, priv->regs,
> + DISP_DITHER_SIZE);
> + if (valid_bpc)
> + mtk_dither_set_common(priv->regs, >cmdq_reg, bpc,
> + DISP_DITHER_CFG, DITHER_ENGINE_EN,
> + cmdq_pkt);
> + else
> + mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, >cmdq_reg,
> + priv->regs, DISP_DITHER_CFG);
od has relay mode,
static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_OD_SIZE);
mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, comp, DISP_OD_CFG);
mtk_dither_set(comp, bpc, DISP_OD_CFG, cmdq_pkt);
}
and it does not check valid bpc (I think drm core already set bpc to
4, 6, 8 or 0), so align implementation of mtk_dither_config() with
mtk_od_config().
gamma also has relay mode (refer to [1] page 689), but we need to
enable gamma's gamma function, so we do not set gamma to relay mode.
So I think maybe we could implement mtk_dither_config() as:
mtk_dither_config()
{
mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg,
priv->regs, DISP_DITHER_SIZE);
mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, >cmdq_reg,
priv->regs, DISP_DITHER_CFG);
mtk_dither_set_common(priv->regs, >cmdq_reg, bpc,
DISP_DITHER_CFG, DITHER_ENGINE_EN, cmdq_pkt);
}
[1]
https://www.96boards.org/documentation/consumer/mediatekx20/additional-docs/docs/MT6797_Register_Table_Part_2.pdf
Regards,
Chun-Kuang.
> }
>
> static void mtk_dither_start(struct device *dev)
> --
> 2.30.0.365.g02bc693789-goog
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v13 8/8] drm/mediatek: add support for mediatek SOC MT8183
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> From: Yongqiang Niu
>
> 1. add ovl private data
> 2. add rdma private data
> 3. add gamma privte data
> 4. add main and external path module for crtc create
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++
> drivers/gpu/drm/mediatek/mtk_drm_drv.c| 45 +++
> 4 files changed, 70 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index 5092a27ccc28b..7121d75a06bdc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -182,6 +182,7 @@ static const struct mtk_disp_gamma_data
> mt8173_gamma_driver_data = {
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
> { .compatible = "mediatek,mt8173-disp-gamma",
> .data = _gamma_driver_data},
> + { .compatible = "mediatek,mt8183-disp-gamma"},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 1c295c58a5e82..da7e38a28759b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data
> mt8173_ovl_driver_data = {
> .fmt_rgb565_is_0 = true,
> };
>
> +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> + .addr = DISP_REG_OVL_ADDR_MT8173,
> + .gmc_bits = 10,
> + .layer_nr = 4,
> + .fmt_rgb565_is_0 = true,
> +};
> +
> +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> + .addr = DISP_REG_OVL_ADDR_MT8173,
> + .gmc_bits = 10,
> + .layer_nr = 2,
> + .fmt_rgb565_is_0 = true,
> +};
> +
> static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
> { .compatible = "mediatek,mt2701-disp-ovl",
> .data = _ovl_driver_data},
> { .compatible = "mediatek,mt8173-disp-ovl",
> .data = _ovl_driver_data},
> + { .compatible = "mediatek,mt8183-disp-ovl",
> + .data = _ovl_driver_data},
> + { .compatible = "mediatek,mt8183-disp-ovl-2l",
> + .data = _ovl_2l_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index b84004394970f..728aaadfea8cf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -351,11 +351,17 @@ static const struct mtk_disp_rdma_data
> mt8173_rdma_driver_data = {
> .fifo_size = SZ_8K,
> };
>
> +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {
> + .fifo_size = 5 * SZ_1K,
> +};
> +
> static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
> { .compatible = "mediatek,mt2701-disp-rdma",
> .data = _rdma_driver_data},
> { .compatible = "mediatek,mt8173-disp-rdma",
> .data = _rdma_driver_data},
> + { .compatible = "mediatek,mt8183-disp-rdma",
> + .data = _rdma_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 279d3e6f11563..486e73e675ad5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] =
> {
> DDP_COMPONENT_DPI0,
> };
>
> +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
> + DDP_COMPONENT_OVL0,
> + DDP_COMPONENT_OVL_2L0,
> + DDP_COMPONENT_RDMA0,
> + DDP_COMPONENT_COLOR0,
> + DDP_COMPONENT_CCORR,
> + DDP_COMPONENT_AAL0,
> + DDP_COMPONENT_GAMMA,
> + DDP_COMPONENT_DITHER,
> + DDP_COMPONENT_DSI0,
> +};
> +
> +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
> + DDP_COMPONENT_OVL_2L1,
> + DDP_COMPONENT_RDMA1,
> + DDP_COMPONENT_DPI0,
> +};
> +
> static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
> .main_path = mt2701_mtk_ddp_main,
> .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
> @@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data
> mt8173_mmsys_driver_data = {
> .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
> };
>
> +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
> + .main_path = mt8183_mtk_ddp_main,
> + .main_len
Re: [PATCH v13 5/8] drm/mediatek: add has_dither private data for gamma
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> From: Yongqiang Niu
>
> Not all SoC has dither function in gamma module.
> Add private data to control this function setting.
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 14 ++
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index 6b520807921e3..5092a27ccc28b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -27,7 +27,7 @@
> #define LUT_10BIT_MASK 0x03ff
>
> struct mtk_disp_gamma_data {
> - u32 reserved;
> + bool has_dither;
> };
>
> /**
> @@ -93,8 +93,9 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
>
> mtk_ddp_write(cmdq_pkt, h << 16 | w, >cmdq_reg, gamma->regs,
> DISP_GAMMA_SIZE);
> - mtk_dither_set_common(gamma->regs, >cmdq_reg, bpc,
> DISP_GAMMA_CFG,
> - GAMMA_DITHERING, cmdq_pkt);
> + if (gamma->data && gamma->data->has_dither)
> + mtk_dither_set_common(gamma->regs, >cmdq_reg, bpc,
> + DISP_GAMMA_CFG, GAMMA_DITHERING,
> cmdq_pkt);
> }
>
> void mtk_gamma_start(struct device *dev)
> @@ -174,8 +175,13 @@ static int mtk_disp_gamma_remove(struct platform_device
> *pdev)
> return 0;
> }
>
> +static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
> + .has_dither = true,
> +};
> +
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
> - { .compatible = "mediatek,mt8173-disp-gamma"},
> + { .compatible = "mediatek,mt8173-disp-gamma",
> + .data = _gamma_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
> --
> 2.30.0.365.g02bc693789-goog
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v13 4/8] drm/mediatek: separate gamma module
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> From: Yongqiang Niu
>
> mt8183 gamma module will different with mt8173
> separate gamma for add private data
After I clean up all checkpatch error, applied to mediatek-drm-next
[1]. Remember to clean up all checkpatch error before send out
patches.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/Makefile | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 10 +
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 191
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 71 ++--
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 6 files changed, 217 insertions(+), 61 deletions(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_gamma.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index 01d06332f7679..b64674b944860 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> mediatek-drm-y := mtk_disp_color.o \
> + mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> mtk_disp_rdma.o \
> mtk_drm_crtc.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 9e5537f76b22a..02191010699f8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -27,6 +27,16 @@ void mtk_dpi_stop(struct device *dev);
> void mtk_dsi_ddp_start(struct device *dev);
> void mtk_dsi_ddp_stop(struct device *dev);
>
> +int mtk_gamma_clk_enable(struct device *dev);
> +void mtk_gamma_clk_disable(struct device *dev);
> +void mtk_gamma_config(struct device *dev, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
> +void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state);
> +void mtk_gamma_start(struct device *dev);
> +void mtk_gamma_stop(struct device *dev);
> +
> void mtk_ovl_bgclr_in_on(struct device *dev);
> void mtk_ovl_bgclr_in_off(struct device *dev);
> void mtk_ovl_bypass_shadow(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> new file mode 100644
> index 0..6b520807921e3
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -0,0 +1,191 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "mtk_disp_drv.h"
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_GAMMA_EN 0x
> +#define GAMMA_EN BIT(0)
> +#define DISP_GAMMA_CFG 0x0020
> +#define GAMMA_LUT_EN BIT(1)
> +#define GAMMA_DITHERINGBIT(2)
> +#define DISP_GAMMA_SIZE0x0030
> +#define DISP_GAMMA_LUT 0x0700
> +
> +#define LUT_10BIT_MASK 0x03ff
> +
> +struct mtk_disp_gamma_data {
> + u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_gamma - DISP_GAMMA driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_gamma {
> + struct clk *clk;
> + void __iomem *regs;
> + struct cmdq_client_reg cmdq_reg;
> + const struct mtk_disp_gamma_data *data;
> +};
> +
> +int mtk_gamma_clk_enable(struct device *dev)
> +{
> + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> +
> + return clk_prepare_enable(gamma->clk);
> +}
> +
> +void mtk_gamma_clk_disable(struct device *dev)
> +{
> + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> +
> + clk_disable_unprepare(gamma->clk);
> +}
> +
> +void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
> +{
> + unsigned int i, reg;
> + struct drm_color_lut *lut;
> + void __iomem *lut_base;
> + u32 word;
> +
> + if (state->gamma_lut) {
> + reg = readl(regs + DISP_GAMMA_CFG);
> + reg = reg | GAMMA_LUT_EN;
> + writel(reg, regs + DISP_GAMMA_CFG);
> + lut_base = regs + DISP_GAMMA_LUT;
> + lut = (struct drm_color_lut *)state->gamma_lut->data;
> + for (i = 0; i < MTK_LUT_SIZE; i++) {
> +
Re: [PATCH v13 3/8] drm/mediatek: add mtk_dither_set_common() function
Hi, Hsin-Yi:
Hsin-Yi Wang 於 2021年1月29日 週五 下午5:23寫道：
>
> Current implementation of mtk_dither_set() cast dev data to
> struct mtk_ddp_comp_dev. But other devices with different dev data
> would also call this function.
>
> Separate necessary parameters out so other device components (dither,
> gamma) can call this function.
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Hsin-Yi Wang
> Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 4 +++
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 27 ++---
> 2 files changed, 22 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 46d199b7b4a29..9e5537f76b22a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -17,6 +17,10 @@ void mtk_color_config(struct device *dev, unsigned int w,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> void mtk_color_start(struct device *dev);
>
> +void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg
> *cmdq_reg,
> + unsigned int bpc, unsigned int cfg,
> + unsigned int dither_en, struct cmdq_pkt *cmdq_pkt);
> +
> void mtk_dpi_start(struct device *dev);
> void mtk_dpi_stop(struct device *dev);
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 7b5293429426d..07804ab16f44d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -151,33 +151,42 @@ static void mtk_ddp_clk_disable(struct device *dev)
> clk_disable_unprepare(priv->clk);
> }
>
> -static void mtk_dither_set(struct device *dev, unsigned int bpc,
> - unsigned int CFG, struct cmdq_pkt *cmdq_pkt)
> -{
> - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
>
> +void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg
> *cmdq_reg,
> + unsigned int bpc, unsigned int cfg,
> + unsigned int dither_en, struct cmdq_pkt *cmdq_pkt)
> +{
> /* If bpc equal to 0, the dithering function didn't be enabled */
> if (bpc == 0)
> return;
>
> if (bpc >= MTK_MIN_BPC) {
> - mtk_ddp_write(cmdq_pkt, 0, >cmdq_reg, priv->regs,
> DISP_DITHER_5);
> - mtk_ddp_write(cmdq_pkt, 0, >cmdq_reg, priv->regs,
> DISP_DITHER_7);
> + mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
> + mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
> mtk_ddp_write(cmdq_pkt,
> DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
> DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) |
> DITHER_NEW_BIT_MODE,
> - >cmdq_reg, priv->regs, DISP_DITHER_15);
> + cmdq_reg, regs, DISP_DITHER_15);
> mtk_ddp_write(cmdq_pkt,
> DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) |
> DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) |
> DITHER_LSB_ERR_SHIFT_G(MTK_MAX_BPC - bpc) |
> DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc),
> - >cmdq_reg, priv->regs, DISP_DITHER_16);
> - mtk_ddp_write(cmdq_pkt, DISP_DITHERING, >cmdq_reg,
> priv->regs, CFG);
> + cmdq_reg, regs, DISP_DITHER_16);
> + mtk_ddp_write(cmdq_pkt, dither_en, cmdq_reg, regs, cfg);
> }
> }
>
> +static void mtk_dither_set(struct device *dev, unsigned int bpc,
> + unsigned int cfg, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> + mtk_dither_set_common(priv->regs, >cmdq_reg, bpc, cfg,
> + DISP_DITHERING, cmdq_pkt);
> +}
> +
> static void mtk_od_config(struct device *dev, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> --
> 2.30.0.365.g02bc693789-goog
>
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] soc: mediatek: cmdq: Remove cmdq_pkt_flush()
Hi, Matthias:
Chun-Kuang Hu 於 2021年1月10日 週日 上午6:59寫道：
>
> Hi, Matthias:
>
> Chun-Kuang Hu 於 2020年12月3日 週四 上午7:59寫道：
> >
> > rx_callback is a standard mailbox callback mechanism and could
> > cover the function of proprietary cmdq_task_cb, so it is better
> > to use the standard one instead of the proprietary one. But
> > register rx_callback should before mbox_request_channel(),
> > so remove cmdq_pkt_flush() and let client driver implement
> > its own synchronous flush.
>
> How do you think about this patch? This patch is derived from [1]
> according to Jassi's suggestion [2].
>
> [1]
> https://patchwork.kernel.org/project/linux-mediatek/patch/20200927230422.11610-3-chunkuang...@kernel.org/
> [2]
> https://patchwork.kernel.org/project/linux-mediatek/cover/20200927230422.11610-1-chunkuang...@kernel.org/
Just a ping.
Regards,
Chun-Kuang.
>
> Regards,
> Chun-Kuang.
>
> >
> > Signed-off-by: Chun-Kuang Hu
> > ---
> > drivers/soc/mediatek/mtk-cmdq-helper.c | 32 --
> > include/linux/soc/mediatek/mtk-cmdq.h | 12 --
> > 2 files changed, 44 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > index 505651b0d715..fd3bc39538a1 100644
> > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > @@ -502,36 +502,4 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt,
> > cmdq_async_flush_cb cb,
> > }
> > EXPORT_SYMBOL(cmdq_pkt_flush_async);
> >
> > -struct cmdq_flush_completion {
> > - struct completion cmplt;
> > - bool err;
> > -};
> > -
> > -static void cmdq_pkt_flush_cb(struct cmdq_cb_data data)
> > -{
> > - struct cmdq_flush_completion *cmplt;
> > -
> > - cmplt = (struct cmdq_flush_completion *)data.data;
> > - if (data.sta != CMDQ_CB_NORMAL)
> > - cmplt->err = true;
> > - else
> > - cmplt->err = false;
> > - complete(>cmplt);
> > -}
> > -
> > -int cmdq_pkt_flush(struct cmdq_pkt *pkt)
> > -{
> > - struct cmdq_flush_completion cmplt;
> > - int err;
> > -
> > - init_completion();
> > - err = cmdq_pkt_flush_async(pkt, cmdq_pkt_flush_cb, );
> > - if (err < 0)
> > - return err;
> > - wait_for_completion();
> > -
> > - return cmplt.err ? -EFAULT : 0;
> > -}
> > -EXPORT_SYMBOL(cmdq_pkt_flush);
> > -
> > MODULE_LICENSE("GPL v2");
> > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h
> > b/include/linux/soc/mediatek/mtk-cmdq.h
> > index 960704d75994..2c6aa84c0e80 100644
> > --- a/include/linux/soc/mediatek/mtk-cmdq.h
> > +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> > @@ -288,16 +288,4 @@ int cmdq_pkt_finalize(struct cmdq_pkt *pkt);
> > int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
> > void *data);
> >
> > -/**
> > - * cmdq_pkt_flush() - trigger CMDQ to execute the CMDQ packet
> > - * @pkt: the CMDQ packet
> > - *
> > - * Return: 0 for success; else the error code is returned
> > - *
> > - * Trigger CMDQ to execute the CMDQ packet. Note that this is a
> > - * synchronous flush function. When the function returned, the recorded
> > - * commands have been done.
> > - */
> > -int cmdq_pkt_flush(struct cmdq_pkt *pkt);
> > -
> > #endif /* __MTK_CMDQ_H__ */
> > --
> > 2.17.1
> >
Re: [PATCH next v2 03/17] dt-bindings: phy: mediatek: dsi-phy: modify compatible dependence
Hi, Chunfeng: Chun-Kuang Hu 於 2021年1月24日 週日 下午12:47寫道： > > Hi, Chunfeng: > > Chunfeng Yun 於 2021年1月22日 週五 下午8:04寫道： > > > > The compatilbe "mediatek,mt7623-mipi-tx" is not supported in driver, > > and in fact uses "mediatek,mt2701-mipi-tx" instead on MT7623, so changes > > the compatible items to make dependence clear. > > Reviewed-by: Chun-Kuang Hu Sorry, please remove my reviewed-by tag. We should not define the binding document according to the implementation of driver. We define the binding document according to the hardware. So the description should be like "mt7623-mipi-tx is compatible to mt2701-mipi-tx". Regards, Chun-Kuang. > > > > > Cc: Chun-Kuang Hu > > Cc: Philipp Zabel > > Signed-off-by: Chunfeng Yun > > --- > > v2: separate two patches suggested by CK > > --- > > .../devicetree/bindings/phy/mediatek,dsi-phy.yaml | 13 - > > 1 file changed, 8 insertions(+), 5 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > > b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > > index 71d4acea1f66..6e4d795f9b02 100644 > > --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > > @@ -19,11 +19,14 @@ properties: > > pattern: "^dsi-phy@[0-9a-f]+$" > > > >compatible: > > -enum: > > - - mediatek,mt2701-mipi-tx > > - - mediatek,mt7623-mipi-tx > > - - mediatek,mt8173-mipi-tx > > - - mediatek,mt8183-mipi-tx > > +oneOf: > > + - items: > > + - enum: > > + - mediatek,mt7623-mipi-tx > > + - const: mediatek,mt2701-mipi-tx > > + - const: mediatek,mt2701-mipi-tx > > + - const: mediatek,mt8173-mipi-tx > > + - const: mediatek,mt8183-mipi-tx > > > >reg: > > maxItems: 1 > > -- > > 2.18.0
Re: [PATCH next v2 03/17] dt-bindings: phy: mediatek: dsi-phy: modify compatible dependence
Hi, Chunfeng: Chunfeng Yun 於 2021年1月22日 週五 下午8:04寫道： > > The compatilbe "mediatek,mt7623-mipi-tx" is not supported in driver, > and in fact uses "mediatek,mt2701-mipi-tx" instead on MT7623, so changes > the compatible items to make dependence clear. Reviewed-by: Chun-Kuang Hu > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > v2: separate two patches suggested by CK > --- > .../devicetree/bindings/phy/mediatek,dsi-phy.yaml | 13 - > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > index 71d4acea1f66..6e4d795f9b02 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > @@ -19,11 +19,14 @@ properties: > pattern: "^dsi-phy@[0-9a-f]+$" > >compatible: > -enum: > - - mediatek,mt2701-mipi-tx > - - mediatek,mt7623-mipi-tx > - - mediatek,mt8173-mipi-tx > - - mediatek,mt8183-mipi-tx > +oneOf: > + - items: > + - enum: > + - mediatek,mt7623-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt8173-mipi-tx > + - const: mediatek,mt8183-mipi-tx > >reg: > maxItems: 1 > -- > 2.18.0
Re: [PATCH next v2 04/17] dt-bindings: phy: mediatek: dsi-phy: add optional clock-names
Hi, Chunfeng: Chunfeng Yun 於 2021年1月22日 週五 下午8:04寫道： > > Add an optional "clock-names" property, it's not used to get the clock, > but some DTS files (e.g. mt8183) provide it. I think the logic is that we define property in binding document first, and then write it in device tree. If a property does not exist in binding document, we should not write it in device tree. So let's drop this patch and remove clock-names in mt8183.dtsi. Regards, Chun-Kuang. > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > v2: new patch separated from [3/15] suggested by CK > --- > Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml | 4 > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > index 6e4d795f9b02..af6e554c5b69 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > @@ -35,6 +35,10 @@ properties: > items: >- description: PLL reference clock > > + clock-names: > +items: > + - const: ref > + >clock-output-names: > maxItems: 1 > > -- > 2.18.0 > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v2 3/5] drm/mediatek: Change disp/ddp term to mutex in mtk mutex driver
Matthias Brugger 於 2021年1月21日 週四 下午4:19寫道：
>
> On Thu, Jan 21, 2021 at 07:46:44AM +0800, Chun-Kuang Hu wrote:
> > Hi, Matthias:
> >
> > Matthias Brugger 於 2021年1月21日 週四 上午2:27寫道：
> > >
> > > On Thu, Jan 07, 2021 at 07:17:27AM +0800, Chun-Kuang Hu wrote:
> > > > From: CK Hu
> > > >
> > > > mtk mutex is used by both drm and mdp driver, so change disp/ddp term to
> > > > mutex to show that it's a common driver for drm and mdp.
> > > >
> > > > Signed-off-by: CK Hu
> > > > Signed-off-by: Chun-Kuang Hu
> > > > ---
> > > > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 30 +--
> > > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
> > > > drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
> > > > drivers/gpu/drm/mediatek/mtk_mutex.c| 305
> > > > drivers/gpu/drm/mediatek/mtk_mutex.h| 26 +-
> > > > 5 files changed, 182 insertions(+), 183 deletions(-)
> > > >
> > > [...]
> > > > diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > > > b/drivers/gpu/drm/mediatek/mtk_mutex.c
> > > > index 1c8a253f4788..98a060bf225d 100644
> > > > --- a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > > > +++ b/drivers/gpu/drm/mediatek/mtk_mutex.c
> > > [...]
> > > >
> > > > -static const struct of_device_id ddp_driver_dt_match[] = {
> > > > +static const struct of_device_id mutex_driver_dt_match[] = {
> > > > { .compatible = "mediatek,mt2701-disp-mutex",
> > > > - .data = _ddp_driver_data},
> > > > + .data = _mutex_driver_data},
> > > > { .compatible = "mediatek,mt2712-disp-mutex",
> > > > - .data = _ddp_driver_data},
> > > > + .data = _mutex_driver_data},
> > > > { .compatible = "mediatek,mt8167-disp-mutex",
> > > > - .data = _ddp_driver_data},
> > > > + .data = _mutex_driver_data},
> > > > { .compatible = "mediatek,mt8173-disp-mutex",
> > > > - .data = _ddp_driver_data},
> > > > + .data = _mutex_driver_data},
> > > > {},
> > > > };
> > > > -MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
> > > > +MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
> > >
> > > I think it would make sense in a follow-up patch to update the binding
> > > to use "mediatek,mt2701-mutex" to reflect that mutex is used for drm and
> > > mdp driver. Make sense?
> >
> > Yes, it make sense. I would try to update the binding, but I wonder
> > device tree should be backward compatible? Let's discuss in that
> > follow-up patches.
> >
>
> From my understanding, we will need to keep the of_device_id entries for
> the old binding in the driver (so that old DTs still work) while we
> should enforce the new binding. I'm not sure if the yaml has a option
> for out-of-date compatibles.
OK, I would do it so and remove out-f-date compatibles in yaml at
first to see any feedback.
Regards,
Chun-Kuang.
>
> Regards,
> Matthias
Re: [PATCH v2 5/5] soc / drm: mediatek: Move mtk mutex driver to soc folder
Hi, Matthias:
Matthias Brugger 於 2021年1月21日 週四 上午2:33寫道：
>
> On Thu, Jan 07, 2021 at 07:17:29AM +0800, Chun-Kuang Hu wrote:
> > From: CK Hu
> >
> > mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
> > so move it to soc folder.
> >
> > Signed-off-by: CK Hu
> > Signed-off-by: Chun-Kuang Hu
>
> Acked-by: Matthias Brugger
>
> Please take the patch through your tree. Thanks!
Applied, thanks.
Regards,
Chun-Kuang.
>
> > ---
> > drivers/gpu/drm/mediatek/Makefile | 3 +--
> > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c| 1 -
> > drivers/gpu/drm/mediatek/mtk_drm_drv.h| 1 -
> > drivers/soc/mediatek/Makefile | 1 +
> > .../mtk_mutex.c => soc/mediatek/mtk-mutex.c} | 15 +--
> > .../linux/soc/mediatek/mtk-mutex.h| 0
> > 7 files changed, 16 insertions(+), 7 deletions(-)
> > rename drivers/{gpu/drm/mediatek/mtk_mutex.c => soc/mediatek/mtk-mutex.c}
> > (96%)
> > rename drivers/gpu/drm/mediatek/mtk_mutex.h =>
> > include/linux/soc/mediatek/mtk-mutex.h (100%)
> >
> > diff --git a/drivers/gpu/drm/mediatek/Makefile
> > b/drivers/gpu/drm/mediatek/Makefile
> > index 09979c4c340a..01d06332f767 100644
> > --- a/drivers/gpu/drm/mediatek/Makefile
> > +++ b/drivers/gpu/drm/mediatek/Makefile
> > @@ -9,8 +9,7 @@ mediatek-drm-y := mtk_disp_color.o \
> > mtk_drm_gem.o \
> > mtk_drm_plane.o \
> > mtk_dsi.o \
> > - mtk_dpi.o \
> > - mtk_mutex.o
> > + mtk_dpi.o
> >
> > obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > index 1e3a9450680b..e9b6788d52cd 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > @@ -7,6 +7,7 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > #include
> > #include
> > @@ -22,7 +23,6 @@
> > #include "mtk_drm_ddp_comp.h"
> > #include "mtk_drm_gem.h"
> > #include "mtk_drm_plane.h"
> > -#include "mtk_mutex.h"
> >
> > /*
> > * struct mtk_drm_crtc - MediaTek specific crtc structure.
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > index b99a06e6834e..5d39dd54255d 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > @@ -588,7 +588,6 @@ static struct platform_driver mtk_drm_platform_driver =
> > {
> > };
> >
> > static struct platform_driver * const mtk_drm_drivers[] = {
> > - _mutex_driver,
> > _disp_color_driver,
> > _disp_ovl_driver,
> > _disp_rdma_driver,
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> > b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> > index ae366868d01a..e8238fa4aa2a 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> > @@ -46,7 +46,6 @@ struct mtk_drm_private {
> > struct drm_atomic_state *suspend_state;
> > };
> >
> > -extern struct platform_driver mtk_mutex_driver;
> > extern struct platform_driver mtk_disp_color_driver;
> > extern struct platform_driver mtk_disp_ovl_driver;
> > extern struct platform_driver mtk_disp_rdma_driver;
> > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
> > index b6908db534c2..90270f8114ed 100644
> > --- a/drivers/soc/mediatek/Makefile
> > +++ b/drivers/soc/mediatek/Makefile
> > @@ -6,3 +6,4 @@ obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
> > obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
> > obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) += mtk-pm-domains.o
> > obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> > +obj-$(CONFIG_MTK_MMSYS) += mtk-mutex.o
> > diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > b/drivers/soc/mediatek/mtk-mutex.c
> > similarity index 96%
> > rename from drivers/gpu/drm/mediatek/mtk_mutex.c
> > rename to drivers/soc/mediatek/mtk-mutex.c
> > index 66344759e622..f531b119da7a 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > +++ b/drivers/soc/mediatek/mtk-mutex.c
> > @@ -10,8 +10,7 @@
> > #include
> > #include
> > #include
> > -
> > -#include &qu
Re: [PATCH v2 3/5] drm/mediatek: Change disp/ddp term to mutex in mtk mutex driver
Hi, Matthias:
Matthias Brugger 於 2021年1月21日 週四 上午2:27寫道：
>
> On Thu, Jan 07, 2021 at 07:17:27AM +0800, Chun-Kuang Hu wrote:
> > From: CK Hu
> >
> > mtk mutex is used by both drm and mdp driver, so change disp/ddp term to
> > mutex to show that it's a common driver for drm and mdp.
> >
> > Signed-off-by: CK Hu
> > Signed-off-by: Chun-Kuang Hu
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 30 +--
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
> > drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
> > drivers/gpu/drm/mediatek/mtk_mutex.c| 305
> > drivers/gpu/drm/mediatek/mtk_mutex.h| 26 +-
> > 5 files changed, 182 insertions(+), 183 deletions(-)
> >
> [...]
> > diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > b/drivers/gpu/drm/mediatek/mtk_mutex.c
> > index 1c8a253f4788..98a060bf225d 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_mutex.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_mutex.c
> [...]
> >
> > -static const struct of_device_id ddp_driver_dt_match[] = {
> > +static const struct of_device_id mutex_driver_dt_match[] = {
> > { .compatible = "mediatek,mt2701-disp-mutex",
> > - .data = _ddp_driver_data},
> > + .data = _mutex_driver_data},
> > { .compatible = "mediatek,mt2712-disp-mutex",
> > - .data = _ddp_driver_data},
> > + .data = _mutex_driver_data},
> > { .compatible = "mediatek,mt8167-disp-mutex",
> > - .data = _ddp_driver_data},
> > + .data = _mutex_driver_data},
> > { .compatible = "mediatek,mt8173-disp-mutex",
> > - .data = _ddp_driver_data},
> > + .data = _mutex_driver_data},
> > {},
> > };
> > -MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
> > +MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
>
> I think it would make sense in a follow-up patch to update the binding
> to use "mediatek,mt2701-mutex" to reflect that mutex is used for drm and
> mdp driver. Make sense?
Yes, it make sense. I would try to update the binding, but I wonder
device tree should be backward compatible? Let's discuss in that
follow-up patches.
Regards,
Chun-Kuang.
>
> Regards,
> Matthias
Re: [PATCH v2 0/5] Share mtk mutex driver for both DRM and MDP
Chun-Kuang Hu 於 2021年1月7日 週四 上午7:17寫道：
>
> mtk mutex is a driver used by DRM and MDP [1], so this series move
> mtk mutex driver from DRM folder to soc folder, so it could be used
> by DRM and MDP.
Applied [1/5] ~ [4/5] to mediatek-drm-next [1].
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Changes in v2:
> 1. Rebase onto mediatek-drm-next [2].
> 2. Export symbol for mtk-mutex API.
>
> [1] https://patchwork.kernel.org/patch/11140751/
> [2]
> https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
>
> CK Hu (5):
> drm/mediatek: Remove redundant file including
> drm/mediatek: Rename file mtk_drm_ddp to mtk_mutex
> drm/mediatek: Change disp/ddp term to mutex in mtk mutex driver
> drm/mediatek: Automatically search unclaimed mtk mutex in
> mtk_mutex_get()
> soc / drm: mediatek: Move mtk mutex driver to soc folder
>
> drivers/gpu/drm/mediatek/Makefile | 1 -
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 32 +-
> drivers/gpu/drm/mediatek/mtk_drm_ddp.h| 28 --
> drivers/gpu/drm/mediatek/mtk_drm_drv.c| 3 -
> drivers/gpu/drm/mediatek/mtk_drm_drv.h| 1 -
> drivers/soc/mediatek/Makefile | 1 +
> .../mediatek/mtk-mutex.c} | 328 +-
> include/linux/soc/mediatek/mtk-mutex.h| 26 ++
> 8 files changed, 212 insertions(+), 208 deletions(-)
> delete mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h
> rename drivers/{gpu/drm/mediatek/mtk_drm_ddp.c => soc/mediatek/mtk-mutex.c}
> (53%)
> create mode 100644 include/linux/soc/mediatek/mtk-mutex.h
>
> --
> 2.17.1
>
Re: [PATCH next 04/15] dt-bindings: phy: mediatek: hdmi-phy: modify compatible items
Hi, Chunfeng: Chunfeng Yun 於 2021年1月16日 週六 下午5:07寫道： > > The compatilbe "mediatek,mt7623-hdmi-tx" is not supported in driver, > and in fact uses "mediatek,mt2701-hdmi-tx" instead on MT7623, so changes > the compatible items to make dependence clear. > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings/phy/mediatek,hdmi-phy.yaml| 11 +++ > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > index 4752517a1446..0d94950b84ca 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml > @@ -21,10 +21,13 @@ properties: > pattern: "^hdmi-phy@[0-9a-f]+$" > >compatible: > -enum: > - - mediatek,mt2701-hdmi-phy > - - mediatek,mt7623-hdmi-phy > - - mediatek,mt8173-hdmi-phy > +oneOf: > + - items: > + - enum: > + - mediatek,mt7623-hdmi-phy > + - const: mediatek,mt2701-hdmi-phy > + - const: mediatek,mt2701-hdmi-phy > + - const: mediatek,mt8173-hdmi-phy > I like move 'items' to the bottom. - const: mediatek,mt2701-hdmi-phy - const: mediatek,mt8173-hdmi-phy - items: - enum: - mediatek,mt7623-hdmi-phy - const: mediatek,mt2701-hdmi-phy Regards, Chun-Kuang. >reg: > maxItems: 1 > -- > 2.18.0
Re: [PATCH next 03/15] dt-bindings: phy: mediatek: dsi-phy: modify compatible dependence
Hi, Chunfeng: Chunfeng Yun 於 2021年1月16日 週六 下午5:07寫道： > > The compatilbe "mediatek,mt7623-mipi-tx" is not supported in driver, > and in fact uses "mediatek,mt2701-mipi-tx" instead on MT7623, so changes > the compatible items to make dependence clear. > > And add an optional "clock-names" property, it's not used to get the clock, > but some DTS files provide it. Separate the clock part to another patch. Regards, Chun-Kuang. > > Cc: Chun-Kuang Hu > Cc: Philipp Zabel > Signed-off-by: Chunfeng Yun > --- > .../bindings/phy/mediatek,dsi-phy.yaml | 17 - > 1 file changed, 12 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > index 71d4acea1f66..af6e554c5b69 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml > @@ -19,11 +19,14 @@ properties: > pattern: "^dsi-phy@[0-9a-f]+$" > >compatible: > -enum: > - - mediatek,mt2701-mipi-tx > - - mediatek,mt7623-mipi-tx > - - mediatek,mt8173-mipi-tx > - - mediatek,mt8183-mipi-tx > +oneOf: > + - items: > + - enum: > + - mediatek,mt7623-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt2701-mipi-tx > + - const: mediatek,mt8173-mipi-tx > + - const: mediatek,mt8183-mipi-tx > >reg: > maxItems: 1 > @@ -32,6 +35,10 @@ properties: > items: >- description: PLL reference clock > > + clock-names: > +items: > + - const: ref > + >clock-output-names: > maxItems: 1 > > -- > 2.18.0
Re: [PATCH v9, 05/11] drm/mediatek: add fifo_size into rdma private data
Hi, Yongqiang:
Chun-Kuang Hu 於 2021年1月7日 週四 下午6:05寫道：
>
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道：
> >
> > Get the fifo size from device tree
> > because each rdma in the same SoC may have different fifo size
>
> Reviewed-by: Chun-Kuang Hu
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++-
> > 1 file changed, 18 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > index d46b8ae..8c64d5c 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > @@ -64,6 +64,7 @@ struct mtk_disp_rdma {
> > struct mtk_ddp_comp ddp_comp;
> > struct drm_crtc *crtc;
> > const struct mtk_disp_rdma_data *data;
> > + u32 fifo_size;
> > };
> >
> > static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)
> > @@ -132,12 +133,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp
> > *comp, unsigned int width,
> > unsigned int threshold;
> > unsigned int reg;
> > struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> > + u32 rdma_fifo_size;
> >
> > mtk_ddp_write_mask(cmdq_pkt, width, comp,
> >DISP_REG_RDMA_SIZE_CON_0, 0xfff);
> > mtk_ddp_write_mask(cmdq_pkt, height, comp,
> >DISP_REG_RDMA_SIZE_CON_1, 0xf);
> >
> > + if (rdma->fifo_size)
> > + rdma_fifo_size = rdma->fifo_size;
> > + else
> > + rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
> > +
> > /*
> > * Enable FIFO underflow since DSI and DPI can't be blocked.
> > * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> > @@ -146,7 +153,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp,
> > unsigned int width,
> > */
> > threshold = width * height * vrefresh * 4 * 7 / 100;
> > reg = RDMA_FIFO_UNDERFLOW_EN |
> > - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
> > + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> > mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON);
> > }
> > @@ -292,6 +299,16 @@ static int mtk_disp_rdma_probe(struct platform_device
> > *pdev)
> > return comp_id;
> > }
> >
> > + if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size",
> > )) {
> > + ret = of_property_read_u32(dev->of_node,
> > + "mediatek,rdma-fifo-size",
> > + >fifo_size);
> > + if (ret) {
> > + dev_err(dev, "Failed to get rdma fifo size\n");
> > + return ret;
> > + }
> > + }
> > +
> > ret = mtk_ddp_comp_init(dev, dev->of_node, >ddp_comp, comp_id,
> > _disp_rdma_funcs);
> > if (ret) {
> > --
> > 1.8.1.1.dirty
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 11/15] drm/mediatek: fix aal size config
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:48寫道：
>
> the orginal setting is not correct, fix it follow hardware data sheet.
> if keep this error setting, mt8173/mt8183 display ok
> but mt8192 display abnormal.
>
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
> Fixes: 0664d1392c26 (drm/mediatek: Add AAL engine basic function)
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index fc01fea..6081800 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -174,7 +174,7 @@ static void mtk_aal_config(struct mtk_ddp_comp *comp,
> unsigned int w,
>unsigned int h, unsigned int vrefresh,
>unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> {
> - mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_AAL_SIZE);
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_AAL_SIZE);
> }
>
> static void mtk_aal_start(struct mtk_ddp_comp *comp)
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 01/15] dt-bindings: mediatek: add description for postmask
Rob Herring 於 2021年1月15日 週五 上午3:11寫道： > > On Mon, 11 Jan 2021 15:43:37 +0800, Yongqiang Niu wrote: > > add description for postmask > > postmask is used control round corner for display frame > > > > Signed-off-by: Yongqiang Niu > > --- > > Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > Acked-by: Rob Herring Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/mediatek: mtk_dpi: Create connector for bridges
Hi, Hsin-Yi:
Chun-Kuang Hu 於 2020年12月11日 週五 下午10:04寫道：
>
> Hi, Hsin-Yi:
>
> Hsin-Yi Wang 於 2020年12月3日 週四 下午4:24寫道：
> >
> > Similar to a9d9fea74be2 ("drm/mediatek: mtk_dsi: Create connector for
> > bridges"):
> >
> > Use the drm_bridge_connector helper to create a connector for pipelines
> > that use drm_bridge. This allows splitting connector operations across
> > multiple bridges when necessary, instead of having the last bridge in
> > the chain creating the connector and handling all connector operations
> > internally.
>
> Reviewed-by: Chun-Kuang Hu
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> >
> > Signed-off-by: Hsin-Yi Wang
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 13 -
> > 1 file changed, 12 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 52f11a63a330..189377e342fa 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -20,6 +20,7 @@
> >
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -66,6 +67,7 @@ struct mtk_dpi {
> > struct drm_encoder encoder;
> > struct drm_bridge bridge;
> > struct drm_bridge *next_bridge;
> > + struct drm_connector *connector;
> > void __iomem *regs;
> > struct device *dev;
> > struct clk *engine_clk;
> > @@ -603,12 +605,21 @@ static int mtk_dpi_bind(struct device *dev, struct
> > device *master, void *data)
> >
> > dpi->encoder.possible_crtcs =
> > mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
> >
> > - ret = drm_bridge_attach(>encoder, >bridge, NULL, 0);
> > + ret = drm_bridge_attach(>encoder, >bridge, NULL,
> > + DRM_BRIDGE_ATTACH_NO_CONNECTOR);
> > if (ret) {
> > dev_err(dev, "Failed to attach bridge: %d\n", ret);
> > goto err_cleanup;
> > }
> >
> > + dpi->connector = drm_bridge_connector_init(drm_dev, >encoder);
> > + if (IS_ERR(dpi->connector)) {
> > + dev_err(dev, "Unable to create bridge connector\n");
> > + ret = PTR_ERR(dpi->connector);
> > + goto err_cleanup;
> > + }
> > + drm_connector_attach_encoder(dpi->connector, >encoder);
> > +
> > dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
> > dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
> > dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
> > --
> > 2.29.2.576.ga3fc446d84-goog
> >
Re: [PATCH v9, 01/11] dt-bindings: mediatek: add rdma-fifo-size description for mt8183 display
Rob Herring 於 2021年1月12日 週二 下午10:49寫道： > > On Thu, 07 Jan 2021 11:11:11 +0800, Yongqiang Niu wrote: > > rdma fifo size may be different even in same SOC, add this > > property to the corresponding rdma Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > > > Signed-off-by: Yongqiang Niu > > --- > > .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 9 > > + > > 1 file changed, 9 insertions(+) > > > > Reviewed-by: Rob Herring > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3, 12/15] drm/mediatek: separate ccorr module
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:54寫道：
>
> ccorr ctm matrix bits will be different in mt8192
This patch has conflicts with the series "Decouple Mediatek DRM sub
driver" [1] which has been applied to mediatek-drm-next, so please
rebase this patch onto mediatek-drm-next.
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=399915
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/Makefile | 3 +-
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 222
>
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 92 +---
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 5 files changed, 231 insertions(+), 95 deletions(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index ce5ad59..a02f534 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> -mediatek-drm-y := mtk_disp_color.o \
> +mediatek-drm-y := mtk_disp_ccorr.o \
> + mtk_disp_color.o \
> mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> mtk_disp_postmask.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> new file mode 100644
> index 000..63b3ef6
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -0,0 +1,222 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_CCORR_EN 0x
> +#define CCORR_EN BIT(0)
> +#define DISP_CCORR_CFG 0x0020
> +#define CCORR_RELAY_MODE BIT(0)
> +#define CCORR_ENGINE_ENBIT(1)
> +#define CCORR_GAMMA_OFFBIT(2)
> +#define CCORR_WGAMUT_SRC_CLIP BIT(3)
> +#define DISP_CCORR_SIZE0x0030
> +#define DISP_CCORR_COEF_0 0x0080
> +#define DISP_CCORR_COEF_1 0x0084
> +#define DISP_CCORR_COEF_2 0x0088
> +#define DISP_CCORR_COEF_3 0x008C
> +#define DISP_CCORR_COEF_4 0x0090
> +
> +struct mtk_disp_ccorr_data {
> + u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_ccorr - DISP_CCORR driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_ccorr {
> + struct mtk_ddp_comp ddp_comp;
> + const struct mtk_disp_ccorr_data*data;
> +};
> +
> +static inline struct mtk_disp_ccorr *comp_to_ccorr(struct mtk_ddp_comp *comp)
> +{
> + return container_of(comp, struct mtk_disp_ccorr, ddp_comp);
> +}
> +
> +static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,
> +unsigned int h, unsigned int vrefresh,
> +unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_CCORR_SIZE);
> + mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, comp, DISP_CCORR_CFG);
> +}
> +
> +static void mtk_ccorr_start(struct mtk_ddp_comp *comp)
> +{
> + writel(CCORR_EN, comp->regs + DISP_CCORR_EN);
> +}
> +
> +static void mtk_ccorr_stop(struct mtk_ddp_comp *comp)
> +{
> + writel_relaxed(0x0, comp->regs + DISP_CCORR_EN);
> +}
> +
> +/* Converts a DRM S31.32 value to the HW S1.10 format. */
> +static u16 mtk_ctm_s31_32_to_s1_10(u64 in)
> +{
> + u16 r;
> +
> + /* Sign bit. */
> + r = in & BIT_ULL(63) ? BIT(11) : 0;
> +
> + if ((in & GENMASK_ULL(62, 33)) > 0) {
> + /* identity value 0x1 -> 0x400, */
> + /* if bigger this, set it to max 0x7ff. */
> + r |= GENMASK(10, 0);
> + } else {
> + /* take the 11 most important bits. */
> + r |= (in >> 22) & GENMASK(10, 0);
> + }
> +
> + return r;
> +}
> +
> +static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp,
> + struct drm_crtc_state *state)
> +{
> + struct drm_property_blob *blob = state->ctm;
> + struct drm_color_ctm *ctm;
> + const u64 *input;
> + uint16_t coeffs[9] = { 0 };
> + int i;
> + struct cmdq_pkt *cmdq_pkt = NULL;
> +
> + if (!blob)
> + return;
> +
> + ctm = (struct drm_color_ctm *)blob->data;
> + input = ctm->matrix;
> +
> + for (i
Re: [PATCH v3, 09/15] drm/mediatek: Add pm runtime support for gamma
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:48寫道：
>
> gamma power domain need controled in the device.
In this series, why only gamma and color add pm runtime support? I
think all ddp component need pm runtime support. And pm runtime
support is not related to mt8192, so move these patches out of this
series.
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Yidi Lin
> ---
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index 3c1ea07..da93079 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -10,6 +10,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #include "mtk_drm_crtc.h"
> @@ -156,6 +157,8 @@ static int mtk_disp_gamma_probe(struct platform_device
> *pdev)
>
> platform_set_drvdata(pdev, priv);
>
> + pm_runtime_enable(dev);
> +
> ret = component_add(dev, _disp_gamma_component_ops);
> if (ret)
> dev_err(dev, "Failed to add component: %d\n", ret);
> @@ -165,6 +168,8 @@ static int mtk_disp_gamma_probe(struct platform_device
> *pdev)
>
> static int mtk_disp_gamma_remove(struct platform_device *pdev)
> {
> + pm_runtime_disable(>dev);
> +
> component_del(>dev, _disp_gamma_component_ops);
>
> return 0;
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 01/15] dt-bindings: mediatek: add description for postmask
Yongqiang Niu 於 2021年1月11日 週一 下午3:44寫道： > > add description for postmask > postmask is used control round corner for display frame After changing to 'used to control', Reviewed-by: Chun-Kuang Hu > > Signed-off-by: Yongqiang Niu > --- > Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index c562cda..9d9ab65 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -37,6 +37,7 @@ Required properties (all function blocks): > "mediatek,-disp-aal" - adaptive ambient light > controller > "mediatek,-disp-gamma"- gamma correction > "mediatek,-disp-merge"- merge streams from two RDMA > sources > + "mediatek,-disp-postmask" - control round corner for > display frame > "mediatek,-disp-split"- split stream to two encoders > "mediatek,-disp-ufoe" - data compression engine > "mediatek,-dsi" - DSI controller, see > mediatek,dsi.txt > -- > 1.8.1.1.dirty > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 02/15] dt-bindings: mediatek: add description for mt8192 display
Hi, Yongqiang: Yongqiang Niu 於 2021年1月11日 週一 下午3:48寫道： > > add description for mt8192 display Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Signed-off-by: Yongqiang Niu > Reviewed-by: Chun-Kuang Hu > Acked-by: Rob Herring > --- > Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index 9d9ab65..b47e1a0 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -44,7 +44,7 @@ Required properties (all function blocks): > "mediatek,-dpi" - DPI controller, see > mediatek,dpi.txt > "mediatek,-disp-mutex"- display mutex > "mediatek,-disp-od" - overdrive > - the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173 and mt8183. > + the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183 and > mt8192. > - reg: Physical base address and length of the function block register space > - interrupts: The interrupt signal from the function block (required, except > for >merge and split function blocks). > -- > 1.8.1.1.dirty > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 03/15] arm64: dts: mt8192: add display node
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:48寫道：
>
> add display node
>
> Signed-off-by: Yongqiang Niu
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 134
> +++
> 1 file changed, 134 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index e12e024..dcf9fdf 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -15,6 +15,11 @@
> #address-cells = <2>;
> #size-cells = <2>;
>
> + aliases {
> + ovl2-2l2 = _2l2;
> + rdma4 =
> + };
> +
> clk26m: oscillator0 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> @@ -508,5 +513,134 @@
> #size-cells = <0>;
> status = "disabled";
> };
> +
> + mmsys: syscon@1400 {
> + compatible = "mediatek,mt8192-mmsys", "syscon";
> + reg = <0 0x1400 0 0x1000>;
> + //mboxes = < 0 CMDQ_THR_PRIO_HIGHEST 1>,
> + // < 1 CMDQ_THR_PRIO_HIGHEST 1>;
> + //mediatek,gce-client-reg = < SUBSYS_1400 0
> 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> +mutex: mutex@14001000 {
> + compatible = "mediatek,mt8192-disp-mutex";
> + reg = <0 0x14001000 0 0x1000>;
> + interrupts = ;
> + //clocks = < CLK_MM_DISP_MUTEX0>;
> + //mediatek,gce-events =
> ,
> + //
> ;
> + };
> +
> + ovl0: ovl@14005000 {
> + compatible = "mediatek,mt8192-disp-ovl";
> + reg = <0 0x14005000 0 0x1000>;
> + interrupts = ;
> + //clocks = < CLK_MM_DISP_OVL0>;
> + //iommus = < M4U_PORT_L0_OVL_RDMA0>;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
I think you should not mark these property.
Regards,
Chun-Kuang.
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0x5000 0x1000>;
> + };
> +
> + ovl_2l0: ovl@14006000 {
> + compatible = "mediatek,mt8192-disp-ovl-2l";
> + reg = <0 0x14006000 0 0x1000>;
> + interrupts = ;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
> + //clocks = < CLK_MM_DISP_OVL0_2L>;
> + //iommus = < M4U_PORT_L1_OVL_2L_RDMA0>;
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0x6000 0x1000>;
> + };
> +
> + rdma0: rdma@14007000 {
> + compatible = "mediatek,mt8192-disp-rdma";
> + reg = <0 0x14007000 0 0x1000>;
> + interrupts = ;
> + //clocks = < CLK_MM_DISP_RDMA0>;
> + //iommus = < M4U_PORT_L0_DISP_RDMA0>;
> + //mediatek,larb = <>;
> + //mediatek,rdma-fifo-size = <5120>;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0x7000 0x1000>;
> + };
> +
> + color0: color@14009000 {
> + compatible = "mediatek,mt8192-disp-color",
> +"mediatek,mt8173-disp-color";
> + reg = <0 0x14009000 0 0x1000>;
> + interrupts = ;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
> + //clocks = < CLK_MM_DISP_COLOR0>;
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0x9000 0x1000>;
> + };
> +
> + ccorr0: ccorr@1400a000 {
> + compatible = "mediatek,mt8192-disp-ccorr";
> + reg = <0 0x1400a000 0 0x1000>;
> + interrupts = ;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
> + //clocks = < CLK_MM_DISP_CCORR0>;
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0xa000 0x1000>;
> + };
> +
> + aal0: aal@1400b000 {
> + compatible = "mediatek,mt8192-disp-aal";
> + reg = <0 0x1400b000 0 0x1000>;
> + interrupts = ;
> + //power-domains = < MT8192_POWER_DOMAIN_DISP>;
> + //clocks = < CLK_MM_DISP_AAL0>;
> + //mediatek,gce-client-reg = < SUBSYS_1400
> 0xb000 0x1000>;
> + };
> +
> + gamma0: gamma@1400c000 {
Re: [PATCH v3, 04/15] drm/mediatek: add component OVL_2L2
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:44寫道：
>
> This patch add component OVL_2L2
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 81ed076..a715127 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -383,6 +383,7 @@ struct mtk_ddp_comp_match {
> [DDP_COMPONENT_OVL1]= { MTK_DISP_OVL, 1, NULL },
> [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L,0, NULL },
> [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L,1, NULL },
> + [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L,2, NULL },
> [DDP_COMPONENT_PWM0]= { MTK_DISP_PWM, 0, NULL },
> [DDP_COMPONENT_PWM1]= { MTK_DISP_PWM, 1, NULL },
> [DDP_COMPONENT_PWM2]= { MTK_DISP_PWM, 2, NULL },
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 05/15] drm/mediatek: add component POSTMASK
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:44寫道：
>
> This patch add component POSTMASK,
This patch has conflicts with the series "Decouple Mediatek DRM sub
driver" [1] which has been applied to mediatek-drm-next, so please
rebase this patch onto mediatek-drm-next.
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=399915
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/Makefile| 1 +
> drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160
> +++
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 6 files changed, 168 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index 17a08e2..ce5ad59 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -3,6 +3,7 @@
> mediatek-drm-y := mtk_disp_color.o \
> mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> + mtk_disp_postmask.o \
> mtk_disp_rdma.o \
> mtk_drm_crtc.o \
> mtk_drm_ddp.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> new file mode 100644
> index 000..736224c
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> @@ -0,0 +1,160 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_POSTMASK_EN 0x
> +#define POSTMASK_ENBIT(0)
> +#define DISP_POSTMASK_CFG 0x0020
> +#define POSTMASK_RELAY_MODEBIT(0)
> +#define DISP_POSTMASK_SIZE 0x0030
> +
> +struct mtk_disp_postmask_data {
> + u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_postmask - DISP_postmask driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_postmask {
> + struct mtk_ddp_comp ddp_comp;
> + const struct mtk_disp_postmask_data *data;
> +};
> +
> +static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp
> *comp)
> +{
> + return container_of(comp, struct mtk_disp_postmask, ddp_comp);
> +}
> +
> +static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
> + mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
> +}
> +
> +static void mtk_postmask_start(struct mtk_ddp_comp *comp)
> +{
> + writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
> +{
> + writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {
> + .config = mtk_postmask_config,
> + .start = mtk_postmask_start,
> + .stop = mtk_postmask_stop,
> +};
> +
> +static int mtk_disp_postmask_bind(struct device *dev, struct device *master,
> void *data)
> +{
> + struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> + struct drm_device *drm_dev = data;
> + int ret;
> +
> + ret = mtk_ddp_comp_register(drm_dev, >ddp_comp);
> + if (ret < 0) {
> + dev_err(dev, "Failed to register component %pOF: %d\n",
> + dev->of_node, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void mtk_disp_postmask_unbind(struct device *dev, struct device
> *master,
> + void *data)
> +{
> + struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> + struct drm_device *drm_dev = data;
> +
> + mtk_ddp_comp_unregister(drm_dev, >ddp_comp);
> +}
> +
> +static const struct component_ops mtk_disp_postmask_component_ops = {
> + .bind = mtk_disp_postmask_bind,
> + .unbind = mtk_disp_postmask_unbind,
> +};
> +
> +static int mtk_disp_postmask_probe(struct platform_device *pdev)
> +{
> + struct device *dev = >dev;
> + struct mtk_disp_postmask *priv;
> + int comp_id;
> + int ret;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return
Re: [PATCH v3, 06/15] drm/mediatek: add component RDMA4
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:44寫道：
>
> This patch add component RDMA4
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index bc6b10a..fc01fea 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -392,6 +392,7 @@ struct mtk_ddp_comp_match {
> [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, NULL },
> [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, NULL },
> [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, NULL },
> + [DDP_COMPONENT_RDMA4] = { MTK_DISP_RDMA, 4, NULL },
> [DDP_COMPONENT_UFOE]= { MTK_DISP_UFOE, 0, _ufoe },
> [DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL },
> [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:44寫道：
>
> enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Could you describe more information? Without this patch, what would happen?
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index b47c238..4934bee 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -23,6 +23,7 @@
> #define DISP_REG_OVL_RST 0x0014
> #define DISP_REG_OVL_ROI_SIZE 0x0020
> #define DISP_REG_OVL_DATAPATH_CON 0x0024
> +#define OVL_LAYER_SMI_ID_ENBIT(0)
> #define OVL_BGCLR_SEL_IN BIT(2)
> #define DISP_REG_OVL_ROI_BGCLR 0x0028
> #define DISP_REG_OVL_SRC_CON 0x002c
> @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data {
> unsigned int gmc_bits;
> unsigned int layer_nr;
> bool fmt_rgb565_is_0;
> + bool smi_id_en;
> };
>
> /**
> @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp
> *comp)
>
> static void mtk_ovl_start(struct mtk_ddp_comp *comp)
> {
> + struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
> +
> writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> +
> + if(ovl->data->smi_id_en) {
> + unsigned int reg;
> +
> + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> + reg = reg | OVL_LAYER_SMI_ID_EN;
> + writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
I think this setting should before write 1 to DISP_REG_OVL_EN.
> + }
> }
>
> static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
Should clear DISP_REG_OVL_DATAPATH_CON when stop?
Regards,
Chun-Kuang.
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 08/15] drm/mediatek: check if fb is null
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月11日 週一 下午3:48寫道：
>
> It's possible that state->base.fb is null. Add a check before access its
> format.
Applied to mediatek-drm-next [1], thanks.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Fixes: b6b1bb980ec4 ( drm/mediatek: Turn off Alpha bit when plane format has
> no alpha)
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 4934bee..8e7f494 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -279,7 +279,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp
> *comp, unsigned int idx,
> }
>
> con = ovl_fmt_convert(ovl, fmt);
> - if (state->base.fb->format->has_alpha)
> + if (state->base.fb && state->base.fb->format->has_alpha)
> con |= OVL_CON_AEN | OVL_CON_ALPHA;
>
> if (pending->rotation & DRM_MODE_REFLECT_Y) {
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH 1/2] dt-bindings: mediatek: mmsys: add mt1867 binding
Hi, Matthias: Rob Herring 於 2020年10月31日 週六 上午3:17寫道： > > On Tue, 27 Oct 2020 17:06:29 +0100, Fabien Parent wrote: > > Add binding documentation for MT8167 SoC. Even though the title need to change to 'mt8167', this patch looks good to me. How do you think about this patch? One drm patch [1] depend on this patch, if you like this patch, could you applied this patch first? [1] https://patchwork.kernel.org/project/linux-mediatek/patch/20201023133130.194140-6-fpar...@baylibre.com/ Regards, Chun-Kuang. > > > > Signed-off-by: Fabien Parent > > --- > > .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > Acked-by: Rob Herring > > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH] soc: mediatek: cmdq: Remove cmdq_pkt_flush()
Hi, Matthias:
Chun-Kuang Hu 於 2020年12月3日 週四 上午7:59寫道：
>
> rx_callback is a standard mailbox callback mechanism and could
> cover the function of proprietary cmdq_task_cb, so it is better
> to use the standard one instead of the proprietary one. But
> register rx_callback should before mbox_request_channel(),
> so remove cmdq_pkt_flush() and let client driver implement
> its own synchronous flush.
How do you think about this patch? This patch is derived from [1]
according to Jassi's suggestion [2].
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/20200927230422.11610-3-chunkuang...@kernel.org/
[2]
https://patchwork.kernel.org/project/linux-mediatek/cover/20200927230422.11610-1-chunkuang...@kernel.org/
Regards,
Chun-Kuang.
>
> Signed-off-by: Chun-Kuang Hu
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 32 --
> include/linux/soc/mediatek/mtk-cmdq.h | 12 --
> 2 files changed, 44 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
> b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 505651b0d715..fd3bc39538a1 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -502,36 +502,4 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt,
> cmdq_async_flush_cb cb,
> }
> EXPORT_SYMBOL(cmdq_pkt_flush_async);
>
> -struct cmdq_flush_completion {
> - struct completion cmplt;
> - bool err;
> -};
> -
> -static void cmdq_pkt_flush_cb(struct cmdq_cb_data data)
> -{
> - struct cmdq_flush_completion *cmplt;
> -
> - cmplt = (struct cmdq_flush_completion *)data.data;
> - if (data.sta != CMDQ_CB_NORMAL)
> - cmplt->err = true;
> - else
> - cmplt->err = false;
> - complete(>cmplt);
> -}
> -
> -int cmdq_pkt_flush(struct cmdq_pkt *pkt)
> -{
> - struct cmdq_flush_completion cmplt;
> - int err;
> -
> - init_completion();
> - err = cmdq_pkt_flush_async(pkt, cmdq_pkt_flush_cb, );
> - if (err < 0)
> - return err;
> - wait_for_completion();
> -
> - return cmplt.err ? -EFAULT : 0;
> -}
> -EXPORT_SYMBOL(cmdq_pkt_flush);
> -
> MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h
> b/include/linux/soc/mediatek/mtk-cmdq.h
> index 960704d75994..2c6aa84c0e80 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -288,16 +288,4 @@ int cmdq_pkt_finalize(struct cmdq_pkt *pkt);
> int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
> void *data);
>
> -/**
> - * cmdq_pkt_flush() - trigger CMDQ to execute the CMDQ packet
> - * @pkt: the CMDQ packet
> - *
> - * Return: 0 for success; else the error code is returned
> - *
> - * Trigger CMDQ to execute the CMDQ packet. Note that this is a
> - * synchronous flush function. When the function returned, the recorded
> - * commands have been done.
> - */
> -int cmdq_pkt_flush(struct cmdq_pkt *pkt);
> -
> #endif /* __MTK_CMDQ_H__ */
> --
> 2.17.1
>
Re: [PATCH] drm/mediatek: dsi: Fix EoTp flag
Hi, Jitao: Jitao Shi 於 2021年1月7日 週四 下午10:34寫道： > > SoC will transmit the EoTp (End of Transmission packet) when > MIPI_DSI_MODE_EOT_PACKET flag is set. > > Enabling EoTp will make the line time larger, so the hfp and > hbp should be reduced to keep line time. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 65fd99c528af..8c70ec39bfe1 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -401,8 +401,11 @@ static void mtk_dsi_rxtx_control(struct mtk_dsi *dsi) > break; > } > > - tmp_reg |= (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) << 6; > - tmp_reg |= (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET) >> 3; > + if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) > + tmp_reg |= HSTX_CKLP_EN; > + > + if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) > + tmp_reg |= DIS_EOT; This part is not related to line time, so separate this part to another patch. Regards, Chun-Kuang. > > writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL); > } > @@ -478,6 +481,7 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > timing->da_hs_zero + timing->da_hs_exit + 3; > > delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; > + delta += dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET ? 2 : 0; > > horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; > horizontal_front_back_byte = horizontal_frontporch_byte + > horizontal_backporch_byte; > -- > 2.25.1 > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v9, 10/11] drm/mediatek: add DDP support for MT8183
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道：
>
> Add DDP support for MT8167 SoC.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 48
> ++
> 1 file changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 1f99db6..1308046 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -15,6 +15,8 @@
>
> #define MT2701_DISP_MUTEX0_MOD00x2c
> #define MT2701_DISP_MUTEX0_SOF00x30
> +#define MT8183_DISP_MUTEX0_MOD00x30
> +#define MT8183_DISP_MUTEX0_SOF00x2c
>
> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> @@ -38,6 +40,18 @@
> #define MT8167_MUTEX_MOD_DISP_DITHER 15
> #define MT8167_MUTEX_MOD_DISP_UFOE 16
>
> +#define MT8183_MUTEX_MOD_DISP_RDMA00
> +#define MT8183_MUTEX_MOD_DISP_RDMA11
> +#define MT8183_MUTEX_MOD_DISP_OVL0 9
> +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10
> +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11
> +#define MT8183_MUTEX_MOD_DISP_WDMA012
> +#define MT8183_MUTEX_MOD_DISP_COLOR0 13
> +#define MT8183_MUTEX_MOD_DISP_CCORR0 14
> +#define MT8183_MUTEX_MOD_DISP_AAL0 15
> +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16
> +#define MT8183_MUTEX_MOD_DISP_DITHER0 17
> +
> #define MT8173_MUTEX_MOD_DISP_OVL0 11
> #define MT8173_MUTEX_MOD_DISP_OVL1 12
> #define MT8173_MUTEX_MOD_DISP_RDMA013
> @@ -89,6 +103,10 @@
> #define MT8167_MUTEX_SOF_DPI0 2
> #define MT8167_MUTEX_SOF_DPI1 3
>
> +#define MT8183_MUTEX_SOF_DPI0 2
> +#define MT8183_MUTEX_EOF_DSI0 (MUTEX_SOF_DSI0 << 6)
> +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6)
> +
>
> struct mtk_disp_mutex {
> int id;
> @@ -183,6 +201,20 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
> + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
> + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
> + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
> + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
> + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
> + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
> + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L,
> + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0,
> + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1,
> + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> +};
> +
> static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> @@ -200,6 +232,12 @@ struct mtk_ddp {
> [DDP_MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1,
> };
>
> +static const unsigned int mt8183_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0,
> + [DDP_MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0,
According to discussion in [1], add comment for the odd EOF setting.
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/1595469798-3824-8-git-send-email-yongqiang@mediatek.com/
Regards,
Chun-Kuang.
> +};
> +
> static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> .mutex_sof = mt2712_mutex_sof,
> @@ -229,6 +267,14 @@ struct mtk_ddp {
> .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> +static const struct mtk_ddp_data mt8183_ddp_driver_data = {
> + .mutex_mod = mt8183_mutex_mod,
> + .mutex_sof = mt8183_mutex_sof,
> + .mutex_mod_reg = MT8183_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT8183_DISP_MUTEX0_SOF0,
> + .no_clk = true,
> +};
> +
> struct mtk_disp_mutex *mtk_disp_mutex_get(struct device *dev, unsigned int
> id)
> {
> struct mtk_ddp *ddp = dev_get_drvdata(dev);
> @@ -449,6 +495,8 @@ static int mtk_ddp_remove(struct platform_device *pdev)
> .data = _ddp_driver_data},
> { .compatible = "mediatek,mt8173-disp-mutex",
> .data = _ddp_driver_data},
> + { .compatible = "mediatek,mt8183-disp-mutex",
> + .data = _ddp_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
>
Re: [PATCH v9, 08/11] drm/mediatek: add has_dither private data for gamma
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道：
>
> not all SoC has dither function in gamma module
> dd private data to control this function setting
'add' ?
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index 8501821..4eab82a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -24,7 +24,7 @@
> #define LUT_10BIT_MASK 0x03ff
>
> struct mtk_disp_gamma_data {
> - u32 reserved;
> + bool has_dither;
> };
>
> /**
> @@ -72,7 +72,8 @@ static void mtk_gamma_config(struct mtk_ddp_comp *comp,
> unsigned int w,
>
> mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_GAMMA_SIZE);
>
> - mtk_dither_set(comp, bpc, DISP_GAMMA_CFG, cmdq_pkt);
> + if (gamma->data && gamma->data->has_dither)
> + mtk_dither_set(comp, bpc, DISP_GAMMA_CFG, cmdq_pkt);
> }
>
> static void mtk_gamma_start(struct mtk_ddp_comp *comp)
> @@ -168,8 +169,13 @@ static int mtk_disp_gamma_remove(struct platform_device
> *pdev)
> return 0;
> }
>
> +static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
> + .has_dither = true,
> +};
> +
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
> - { .compatible = "mediatek,mt8173-disp-gamma"},
> + { .compatible = "mediatek,mt8173-disp-gamma",
> + .data = _gamma_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v9, 07/11] drm/mediatek: separate gamma module
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道：
>
> mt8183 gamma module will different with mt8173
> separate gamma for add private data
I've applied series "Decouple Mediatek DRM sub driver" [1] into
mediatek-drm-next [2] and this patch would conflict with
mediatek-drm-next, so please rebase this series onto
mediatek-drm-next.
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=399915
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
Regards,
Chun-Kuang.
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/Makefile | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 185
>
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 58 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
> 6 files changed, 192 insertions(+), 58 deletions(-)
> create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_gamma.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index a892ede..17a08e2 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> mediatek-drm-y := mtk_disp_color.o \
> + mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> mtk_disp_rdma.o \
> mtk_drm_crtc.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> new file mode 100644
> index 000..8501821
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -0,0 +1,185 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_GAMMA_EN 0x
> +#define GAMMA_EN BIT(0)
> +#define DISP_GAMMA_CFG 0x0020
> +#define GAMMA_LUT_EN BIT(1)
> +#define DISP_GAMMA_SIZE0x0030
> +#define DISP_GAMMA_LUT 0x0700
> +
> +#define LUT_10BIT_MASK 0x03ff
> +
> +struct mtk_disp_gamma_data {
> + u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_gamma - DISP_GAMMA driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_gamma {
> + struct mtk_ddp_comp ddp_comp;
> + const struct mtk_disp_gamma_data*data;
> +};
> +
> +static inline struct mtk_disp_gamma *comp_to_gamma(struct mtk_ddp_comp *comp)
> +{
> + return container_of(comp, struct mtk_disp_gamma, ddp_comp);
> +}
> +
> +void mtk_gamma_set(struct mtk_ddp_comp *comp, struct drm_crtc_state *state)
> +{
> + unsigned int i, reg;
> + struct drm_color_lut *lut;
> + void __iomem *lut_base;
> + u32 word;
> +
> + if (state->gamma_lut) {
> + reg = readl(comp->regs + DISP_GAMMA_CFG);
> + reg = reg | GAMMA_LUT_EN;
> + writel(reg, comp->regs + DISP_GAMMA_CFG);
> + lut_base = comp->regs + DISP_GAMMA_LUT;
> + lut = (struct drm_color_lut *)state->gamma_lut->data;
> + for (i = 0; i < MTK_LUT_SIZE; i++) {
> + word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
> + (((lut[i].green >> 6) & LUT_10BIT_MASK) <<
> 10) +
> + ((lut[i].blue >> 6) & LUT_10BIT_MASK);
> + writel(word, (lut_base + i * 4));
> + }
> + }
> +}
> +
> +static void mtk_gamma_config(struct mtk_ddp_comp *comp, unsigned int w,
> +unsigned int h, unsigned int vrefresh,
> +unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_disp_gamma *gamma = comp_to_gamma(comp);
> +
> + mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_GAMMA_SIZE);
> +
> + mtk_dither_set(comp, bpc, DISP_GAMMA_CFG, cmdq_pkt);
> +}
> +
> +static void mtk_gamma_start(struct mtk_ddp_comp *comp)
> +{
> + writel(GAMMA_EN, comp->regs + DISP_GAMMA_EN);
> +}
> +
> +static void mtk_gamma_stop(struct mtk_ddp_comp *comp)
> +{
> + writel_relaxed(0x0, comp->regs + DISP_GAMMA_EN);
> +}
> +
> +static const struct mtk_ddp_comp_funcs mtk_disp_gamma_funcs = {
> + .gamma_set = mtk_gamma_set,
> + .config = mtk_gamma_config,
> + .start = mtk_gamma_start,
> + .stop = mtk_gamma_stop,
> +};
> +
> +static int mtk_disp_gamma_bind(struct device *dev, struct device *master,
> + void *data)
> +{
Re: [PATCH v9, 02/11] dt-bindings: mediatek: add description for mt8183 display
Hi, Yongqiang: Yongqiang Niu 於 2021年1月7日 週四 上午11:11寫道： > > add description for mt8183 display Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Signed-off-by: Yongqiang Niu > Reviewed-by: Chun-Kuang Hu > Acked-by: Rob Herring > --- > Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index b07881e..c562cda 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -43,7 +43,7 @@ Required properties (all function blocks): > "mediatek,-dpi" - DPI controller, see > mediatek,dpi.txt > "mediatek,-disp-mutex"- display mutex > "mediatek,-disp-od" - overdrive > - the supported chips are mt2701, mt7623, mt2712, mt8167 and mt8173. > + the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173 and mt8183. > - reg: Physical base address and length of the function block register space > - interrupts: The interrupt signal from the function block (required, except > for >merge and split function blocks). > -- > 1.8.1.1.dirty > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v9, 05/11] drm/mediatek: add fifo_size into rdma private data
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道：
>
> Get the fifo size from device tree
> because each rdma in the same SoC may have different fifo size
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index d46b8ae..8c64d5c 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -64,6 +64,7 @@ struct mtk_disp_rdma {
> struct mtk_ddp_comp ddp_comp;
> struct drm_crtc *crtc;
> const struct mtk_disp_rdma_data *data;
> + u32 fifo_size;
> };
>
> static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)
> @@ -132,12 +133,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp,
> unsigned int width,
> unsigned int threshold;
> unsigned int reg;
> struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> + u32 rdma_fifo_size;
>
> mtk_ddp_write_mask(cmdq_pkt, width, comp,
>DISP_REG_RDMA_SIZE_CON_0, 0xfff);
> mtk_ddp_write_mask(cmdq_pkt, height, comp,
>DISP_REG_RDMA_SIZE_CON_1, 0xf);
>
> + if (rdma->fifo_size)
> + rdma_fifo_size = rdma->fifo_size;
> + else
> + rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
> +
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> @@ -146,7 +153,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp,
> unsigned int width,
> */
> threshold = width * height * vrefresh * 4 * 7 / 100;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
> + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON);
> }
> @@ -292,6 +299,16 @@ static int mtk_disp_rdma_probe(struct platform_device
> *pdev)
> return comp_id;
> }
>
> + if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size", )) {
> + ret = of_property_read_u32(dev->of_node,
> + "mediatek,rdma-fifo-size",
> + >fifo_size);
> + if (ret) {
> + dev_err(dev, "Failed to get rdma fifo size\n");
> + return ret;
> + }
> + }
> +
> ret = mtk_ddp_comp_init(dev, dev->of_node, >ddp_comp, comp_id,
> _disp_rdma_funcs);
> if (ret) {
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v9, 03/11] arm64: dts: mt8183: rename rdma fifo size
Hi, Yongqiang: Yongqiang Niu 於 2021年1月7日 週四 上午11:12寫道： > > property name must include only lowercase and '-' Reviewed-by: Chun-Kuang Hu > > Signed-off-by: Yongqiang Niu > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 5b782a4..6c84ccb7 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -1011,7 +1011,7 @@ > clocks = < CLK_MM_DISP_RDMA0>; > iommus = < M4U_PORT_DISP_RDMA0>; > mediatek,larb = <>; > - mediatek,rdma_fifo_size = <5120>; > + mediatek,rdma-fifo-size = <5120>; > mediatek,gce-client-reg = < SUBSYS_1400 > 0xb000 0x1000>; > }; > > @@ -1023,7 +1023,7 @@ > clocks = < CLK_MM_DISP_RDMA1>; > iommus = < M4U_PORT_DISP_RDMA1>; > mediatek,larb = <>; > - mediatek,rdma_fifo_size = <2048>; > + mediatek,rdma-fifo-size = <2048>; > mediatek,gce-client-reg = < SUBSYS_1400 > 0xc000 0x1000>; > }; > > -- > 1.8.1.1.dirty > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v9, 01/11] dt-bindings: mediatek: add rdma-fifo-size description for mt8183 display
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月7日 週四 上午11:11寫道：
>
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 9
> +
> 1 file changed, 9 insertions(+)
>
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index 33977e1..b07881e 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -66,6 +66,14 @@ Required properties (DMA function blocks):
>argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
>for details.
>
> +Optional properties (RDMA function blocks):
> +- mediatek,rdma-fifo-size: rdma fifo size may be different even in same SOC,
> add this
> + property to the corresponding rdma
> + the value is the Max value which defined in hardware data sheet.
> + mediatek,rdma-fifo-size of mt8173-rdma0 is 8K
> + mediatek,rdma-fifo-size of mt8183-rdma0 is 5K
> + mediatek,rdma-fifo-size of mt8183-rdma1 is 2K
> +
> Examples:
>
> mmsys: clock-controller@1400 {
> @@ -103,6 +111,7 @@ rdma0: rdma@1400e000 {
> clocks = < CLK_MM_DISP_RDMA0>;
> iommus = < M4U_PORT_DISP_RDMA0>;
> mediatek,larb = <>;
> + mediatek,rdma-fifosize = <8192>;
> };
>
> rdma1: rdma@1400f000 {
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
[PATCH v2 5/5] soc / drm: mediatek: Move mtk mutex driver to soc folder
From: CK Hu
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 3 +--
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c| 1 -
drivers/gpu/drm/mediatek/mtk_drm_drv.h| 1 -
drivers/soc/mediatek/Makefile | 1 +
.../mtk_mutex.c => soc/mediatek/mtk-mutex.c} | 15 +--
.../linux/soc/mediatek/mtk-mutex.h| 0
7 files changed, 16 insertions(+), 7 deletions(-)
rename drivers/{gpu/drm/mediatek/mtk_mutex.c => soc/mediatek/mtk-mutex.c} (96%)
rename drivers/gpu/drm/mediatek/mtk_mutex.h =>
include/linux/soc/mediatek/mtk-mutex.h (100%)
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index 09979c4c340a..01d06332f767 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -9,8 +9,7 @@ mediatek-drm-y := mtk_disp_color.o \
mtk_drm_gem.o \
mtk_drm_plane.o \
mtk_dsi.o \
- mtk_dpi.o \
- mtk_mutex.o
+ mtk_dpi.o
obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index 1e3a9450680b..e9b6788d52cd 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#include
@@ -22,7 +23,6 @@
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_gem.h"
#include "mtk_drm_plane.h"
-#include "mtk_mutex.h"
/*
* struct mtk_drm_crtc - MediaTek specific crtc structure.
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index b99a06e6834e..5d39dd54255d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -588,7 +588,6 @@ static struct platform_driver mtk_drm_platform_driver = {
};
static struct platform_driver * const mtk_drm_drivers[] = {
- _mutex_driver,
_disp_color_driver,
_disp_ovl_driver,
_disp_rdma_driver,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index ae366868d01a..e8238fa4aa2a 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -46,7 +46,6 @@ struct mtk_drm_private {
struct drm_atomic_state *suspend_state;
};
-extern struct platform_driver mtk_mutex_driver;
extern struct platform_driver mtk_disp_color_driver;
extern struct platform_driver mtk_disp_ovl_driver;
extern struct platform_driver mtk_disp_rdma_driver;
diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
index b6908db534c2..90270f8114ed 100644
--- a/drivers/soc/mediatek/Makefile
+++ b/drivers/soc/mediatek/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) += mtk-pm-domains.o
obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
+obj-$(CONFIG_MTK_MMSYS) += mtk-mutex.o
diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.c
b/drivers/soc/mediatek/mtk-mutex.c
similarity index 96%
rename from drivers/gpu/drm/mediatek/mtk_mutex.c
rename to drivers/soc/mediatek/mtk-mutex.c
index 66344759e622..f531b119da7a 100644
--- a/drivers/gpu/drm/mediatek/mtk_mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -10,8 +10,7 @@
#include
#include
#include
-
-#include "mtk_mutex.h"
+#include
#define MT2701_MUTEX0_MOD0 0x2c
#define MT2701_MUTEX0_SOF0 0x30
@@ -241,6 +240,7 @@ struct mtk_mutex *mtk_mutex_get(struct device *dev)
return ERR_PTR(-EBUSY);
}
+EXPORT_SYMBOL_GPL(mtk_mutex_get);
void mtk_mutex_put(struct mtk_mutex *mutex)
{
@@ -251,6 +251,7 @@ void mtk_mutex_put(struct mtk_mutex *mutex)
mutex->claimed = false;
}
+EXPORT_SYMBOL_GPL(mtk_mutex_put);
int mtk_mutex_prepare(struct mtk_mutex *mutex)
{
@@ -258,6 +259,7 @@ int mtk_mutex_prepare(struct mtk_mutex *mutex)
mutex[mutex->id]);
return clk_prepare_enable(mtx->clk);
}
+EXPORT_SYMBOL_GPL(mtk_mutex_prepare);
void mtk_mutex_unprepare(struct mtk_mutex *mutex)
{
@@ -265,6 +267,7 @@ void mtk_mutex_unprepare(struct mtk_mutex *mutex)
mutex[mutex->id]);
clk_disable_unprepare(mtx->clk);
}
+EXPORT_SYMBOL_GPL(mtk_mutex_unprepare);
void mtk_mutex_add_comp(struct mtk_mutex *mutex,
enum mtk_ddp_comp_id id)
@@ -316,6 +319,7 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex,
mtx->regs +
DISP_REG_MUTEX_SOF(mtx->data
[PATCH v2 4/5] drm/mediatek: Automatically search unclaimed mtk mutex in mtk_mutex_get()
From: CK Hu
Moving mutex resource management from client driver to mutex driver
could prevent client drivers negotiating for resource management.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/gpu/drm/mediatek/mtk_mutex.c| 16
drivers/gpu/drm/mediatek/mtk_mutex.h| 2 +-
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index bba87a036fa8..1e3a9450680b 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -773,7 +773,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
if (!mtk_crtc->ddp_comp)
return -ENOMEM;
- mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev, pipe);
+ mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);
if (IS_ERR(mtk_crtc->mutex)) {
ret = PTR_ERR(mtk_crtc->mutex);
dev_err(dev, "Failed to get mutex: %d\n", ret);
diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.c
b/drivers/gpu/drm/mediatek/mtk_mutex.c
index 98a060bf225d..66344759e622 100644
--- a/drivers/gpu/drm/mediatek/mtk_mutex.c
+++ b/drivers/gpu/drm/mediatek/mtk_mutex.c
@@ -228,18 +228,18 @@ static const struct mtk_mutex_data
mt8173_mutex_driver_data = {
.mutex_sof_reg = MT2701_MUTEX0_SOF0,
};
-struct mtk_mutex *mtk_mutex_get(struct device *dev, unsigned int id)
+struct mtk_mutex *mtk_mutex_get(struct device *dev)
{
struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
+ int i;
- if (id >= 10)
- return ERR_PTR(-EINVAL);
- if (mtx->mutex[id].claimed)
- return ERR_PTR(-EBUSY);
-
- mtx->mutex[id].claimed = true;
+ for (i = 0; i < 10; i++)
+ if (!mtx->mutex[i].claimed) {
+ mtx->mutex[i].claimed = true;
+ return >mutex[i];
+ }
- return >mutex[id];
+ return ERR_PTR(-EBUSY);
}
void mtk_mutex_put(struct mtk_mutex *mutex)
diff --git a/drivers/gpu/drm/mediatek/mtk_mutex.h
b/drivers/gpu/drm/mediatek/mtk_mutex.h
index b678e0988a37..6fe4ffbde290 100644
--- a/drivers/gpu/drm/mediatek/mtk_mutex.h
+++ b/drivers/gpu/drm/mediatek/mtk_mutex.h
@@ -10,7 +10,7 @@ struct regmap;
struct device;
struct mtk_mutex;
-struct mtk_mutex *mtk_mutex_get(struct device *dev, unsigned int id);
+struct mtk_mutex *mtk_mutex_get(struct device *dev);
int mtk_mutex_prepare(struct mtk_mutex *mutex);
void mtk_mutex_add_comp(struct mtk_mutex *mutex,
enum mtk_ddp_comp_id id);
--
2.17.1
[PATCH v2 2/5] drm/mediatek: Rename file mtk_drm_ddp to mtk_mutex
From: CK Hu
After mmsys routing function is moved out of mtk_drm_ddp.c, mtk_drm_ddp.c
has only mtk mutex function, so rename it to match the function in it.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 4 ++--
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/gpu/drm/mediatek/{mtk_drm_ddp.c => mtk_mutex.c} | 2 +-
drivers/gpu/drm/mediatek/{mtk_drm_ddp.h => mtk_mutex.h} | 6 +++---
4 files changed, 7 insertions(+), 7 deletions(-)
rename drivers/gpu/drm/mediatek/{mtk_drm_ddp.c => mtk_mutex.c} (99%)
rename drivers/gpu/drm/mediatek/{mtk_drm_ddp.h => mtk_mutex.h} (92%)
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index a892edec5563..09979c4c340a 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -4,13 +4,13 @@ mediatek-drm-y := mtk_disp_color.o \
mtk_disp_ovl.o \
mtk_disp_rdma.o \
mtk_drm_crtc.o \
- mtk_drm_ddp.o \
mtk_drm_ddp_comp.o \
mtk_drm_drv.o \
mtk_drm_gem.o \
mtk_drm_plane.o \
mtk_dsi.o \
- mtk_dpi.o
+ mtk_dpi.o \
+ mtk_mutex.o
obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index bf44a14ea0b6..fd97b7d195e3 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -19,10 +19,10 @@
#include "mtk_drm_drv.h"
#include "mtk_drm_crtc.h"
-#include "mtk_drm_ddp.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_gem.h"
#include "mtk_drm_plane.h"
+#include "mtk_mutex.h"
/*
* struct mtk_drm_crtc - MediaTek specific crtc structure.
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_mutex.c
similarity index 99%
rename from drivers/gpu/drm/mediatek/mtk_drm_ddp.c
rename to drivers/gpu/drm/mediatek/mtk_mutex.c
index 1f99db6b1a42..1c8a253f4788 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_mutex.c
@@ -10,8 +10,8 @@
#include
#include
-#include "mtk_drm_ddp.h"
#include "mtk_drm_ddp_comp.h"
+#include "mtk_mutex.h"
#define MT2701_DISP_MUTEX0_MOD00x2c
#define MT2701_DISP_MUTEX0_SOF00x30
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h
b/drivers/gpu/drm/mediatek/mtk_mutex.h
similarity index 92%
rename from drivers/gpu/drm/mediatek/mtk_drm_ddp.h
rename to drivers/gpu/drm/mediatek/mtk_mutex.h
index a1ee21d15334..3abcc20e88fb 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h
+++ b/drivers/gpu/drm/mediatek/mtk_mutex.h
@@ -3,8 +3,8 @@
* Copyright (c) 2015 MediaTek Inc.
*/
-#ifndef MTK_DRM_DDP_H
-#define MTK_DRM_DDP_H
+#ifndef MTK_MUTEX_H
+#define MTK_MUTEX_H
struct regmap;
struct device;
@@ -23,4 +23,4 @@ void mtk_disp_mutex_put(struct mtk_disp_mutex *mutex);
void mtk_disp_mutex_acquire(struct mtk_disp_mutex *mutex);
void mtk_disp_mutex_release(struct mtk_disp_mutex *mutex);
-#endif /* MTK_DRM_DDP_H */
+#endif /* MTK_MUTEX_H */
--
2.17.1
[PATCH v2 3/5] drm/mediatek: Change disp/ddp term to mutex in mtk mutex driver
From: CK Hu
mtk mutex is used by both drm and mdp driver, so change disp/ddp term to
mutex to show that it's a common driver for drm and mdp.
Signed-off-by: CK Hu
Signed-off-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 30 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_mutex.c| 305
drivers/gpu/drm/mediatek/mtk_mutex.h| 26 +-
5 files changed, 182 insertions(+), 183 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index fd97b7d195e3..bba87a036fa8 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -55,7 +55,7 @@ struct mtk_drm_crtc {
#endif
struct device *mmsys_dev;
- struct mtk_disp_mutex *mutex;
+ struct mtk_mutex*mutex;
unsigned intddp_comp_nr;
struct mtk_ddp_comp **ddp_comp;
@@ -107,7 +107,7 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)
{
struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
- mtk_disp_mutex_put(mtk_crtc->mutex);
+ mtk_mutex_put(mtk_crtc->mutex);
drm_crtc_cleanup(crtc);
}
@@ -265,7 +265,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc
*mtk_crtc)
return ret;
}
- ret = mtk_disp_mutex_prepare(mtk_crtc->mutex);
+ ret = mtk_mutex_prepare(mtk_crtc->mutex);
if (ret < 0) {
DRM_ERROR("Failed to enable mutex clock: %d\n", ret);
goto err_pm_runtime_put;
@@ -281,11 +281,11 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc
*mtk_crtc)
mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,
mtk_crtc->ddp_comp[i]->id,
mtk_crtc->ddp_comp[i + 1]->id);
- mtk_disp_mutex_add_comp(mtk_crtc->mutex,
+ mtk_mutex_add_comp(mtk_crtc->mutex,
mtk_crtc->ddp_comp[i]->id);
}
- mtk_disp_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
- mtk_disp_mutex_enable(mtk_crtc->mutex);
+ mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
+ mtk_mutex_enable(mtk_crtc->mutex);
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];
@@ -314,7 +314,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc
*mtk_crtc)
return 0;
err_mutex_unprepare:
- mtk_disp_mutex_unprepare(mtk_crtc->mutex);
+ mtk_mutex_unprepare(mtk_crtc->mutex);
err_pm_runtime_put:
pm_runtime_put(crtc->dev->dev);
return ret;
@@ -333,19 +333,19 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc
*mtk_crtc)
}
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
- mtk_disp_mutex_remove_comp(mtk_crtc->mutex,
+ mtk_mutex_remove_comp(mtk_crtc->mutex,
mtk_crtc->ddp_comp[i]->id);
- mtk_disp_mutex_disable(mtk_crtc->mutex);
+ mtk_mutex_disable(mtk_crtc->mutex);
for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,
mtk_crtc->ddp_comp[i]->id,
mtk_crtc->ddp_comp[i + 1]->id);
- mtk_disp_mutex_remove_comp(mtk_crtc->mutex,
+ mtk_mutex_remove_comp(mtk_crtc->mutex,
mtk_crtc->ddp_comp[i]->id);
}
- mtk_disp_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
+ mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);
mtk_crtc_ddp_clk_disable(mtk_crtc);
- mtk_disp_mutex_unprepare(mtk_crtc->mutex);
+ mtk_mutex_unprepare(mtk_crtc->mutex);
pm_runtime_put(drm->dev);
@@ -457,9 +457,9 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc
*mtk_crtc)
mtk_crtc->pending_async_planes = true;
if (priv->data->shadow_register) {
- mtk_disp_mutex_acquire(mtk_crtc->mutex);
+ mtk_mutex_acquire(mtk_crtc->mutex);
mtk_crtc_ddp_config(crtc, NULL);
- mtk_disp_mutex_release(mtk_crtc->mutex);
+ mtk_mutex_release(mtk_crtc->mutex);
}
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (mtk_crtc->cmdq_client) {
@@ -773,7 +773,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
if (!mtk_crtc->ddp_comp)
return -ENOMEM;
- mtk_crtc->mutex = mtk_disp_mutex_get(priv->mutex_dev, pipe)
[PATCH v2 1/5] drm/mediatek: Remove redundant file including
From: CK Hu Those file includings are useless, so remove them. Signed-off-by: CK Hu Signed-off-by: Chun-Kuang Hu --- drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 2 -- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h index 6b691a57be4a..a1ee21d15334 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h @@ -6,8 +6,6 @@ #ifndef MTK_DRM_DDP_H #define MTK_DRM_DDP_H -#include "mtk_drm_ddp_comp.h" - struct regmap; struct device; struct mtk_disp_mutex; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 8514d68bde32..25a24f69b986 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include @@ -26,7 +25,6 @@ #include #include "mtk_drm_crtc.h" -#include "mtk_drm_ddp.h" #include "mtk_drm_ddp_comp.h" #include "mtk_drm_drv.h" #include "mtk_drm_gem.h" -- 2.17.1
[PATCH v2 0/5] Share mtk mutex driver for both DRM and MDP
mtk mutex is a driver used by DRM and MDP [1], so this series move
mtk mutex driver from DRM folder to soc folder, so it could be used
by DRM and MDP.
Changes in v2:
1. Rebase onto mediatek-drm-next [2].
2. Export symbol for mtk-mutex API.
[1] https://patchwork.kernel.org/patch/11140751/
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next
CK Hu (5):
drm/mediatek: Remove redundant file including
drm/mediatek: Rename file mtk_drm_ddp to mtk_mutex
drm/mediatek: Change disp/ddp term to mutex in mtk mutex driver
drm/mediatek: Automatically search unclaimed mtk mutex in
mtk_mutex_get()
soc / drm: mediatek: Move mtk mutex driver to soc folder
drivers/gpu/drm/mediatek/Makefile | 1 -
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 32 +-
drivers/gpu/drm/mediatek/mtk_drm_ddp.h| 28 --
drivers/gpu/drm/mediatek/mtk_drm_drv.c| 3 -
drivers/gpu/drm/mediatek/mtk_drm_drv.h| 1 -
drivers/soc/mediatek/Makefile | 1 +
.../mediatek/mtk-mutex.c} | 328 +-
include/linux/soc/mediatek/mtk-mutex.h| 26 ++
8 files changed, 212 insertions(+), 208 deletions(-)
delete mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h
rename drivers/{gpu/drm/mediatek/mtk_drm_ddp.c => soc/mediatek/mtk-mutex.c}
(53%)
create mode 100644 include/linux/soc/mediatek/mtk-mutex.h
--
2.17.1
Re: [PATCH v4, 10/10] soc: mediatek: mmsys: add mt8192 mmsys support
Hi, Yongqiang:
Yongqiang Niu 於 2021年1月5日 週二 上午11:17寫道：
>
> add mt8192 mmsys support
>
> Signed-off-by: Yongqiang Niu
> ---
> drivers/soc/mediatek/mmsys/Makefile | 1 +
> drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 149
> ++
> drivers/soc/mediatek/mmsys/mtk-mmsys.c| 9 ++
> include/linux/soc/mediatek/mtk-mmsys.h| 1 +
> 4 files changed, 160 insertions(+)
> create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
>
> diff --git a/drivers/soc/mediatek/mmsys/Makefile
> b/drivers/soc/mediatek/mmsys/Makefile
> index 25eeb9e5..7508cd3 100644
> --- a/drivers/soc/mediatek/mmsys/Makefile
> +++ b/drivers/soc/mediatek/mmsys/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0-only
> obj-$(CONFIG_MTK_MMSYS) += mt2701-mmsys.o
> obj-$(CONFIG_MTK_MMSYS) += mt8183-mmsys.o
> +obj-$(CONFIG_MTK_MMSYS) += mt8192-mmsys.o
> obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> diff --git a/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> new file mode 100644
> index 000..2e350d1
> --- /dev/null
> +++ b/drivers/soc/mediatek/mmsys/mt8192-mmsys.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2020 MediaTek Inc.
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define MMSYS_OVL_MOUT_EN 0xf04
> +#define DISP_OVL0_GO_BLEND BIT(0)
> +#define DISP_OVL0_GO_BGBIT(1)
> +#define DISP_OVL0_2L_GO_BLEND BIT(2)
> +#define DISP_OVL0_2L_GO_BG BIT(3)
> +#define DISP_OVL1_2L_MOUT_EN 0xf08
> +#define OVL1_2L_MOUT_EN_RDMA1 BIT(4)
> +#define DISP_OVL0_2L_MOUT_EN 0xf18
> +#define DISP_OVL0_MOUT_EN 0xf1c
> +#define OVL0_MOUT_EN_DISP_RDMA0BIT(0)
> +#define OVL0_MOUT_EN_OVL0_2L BIT(4)
> +#define DISP_RDMA0_SEL_IN 0xf2c
> +#define RDMA0_SEL_IN_OVL0_2L 0x3
> +#define DISP_RDMA0_SOUT_SEL0xf30
> +#define RDMA0_SOUT_COLOR0 0x1
> +#define DISP_CCORR0_SOUT_SEL 0xf34
> +#define CCORR0_SOUT_AAL0 0x1
> +#define DISP_AAL0_SEL_IN 0xf38
> +#define AAL0_SEL_IN_CCORR0 0x1
> +#define DISP_DITHER0_MOUT_EN 0xf3c
> +#define DITHER0_MOUT_DSI0 BIT(0)
> +#define DISP_DSI0_SEL_IN 0xf40
> +#define DSI0_SEL_IN_DITHER00x1
> +#define DISP_OVL2_2L_MOUT_EN 0xf4c
> +#define OVL2_2L_MOUT_RDMA4 BIT(0)
> +
> +static void mtk_mmsys_ddp_mout_en(void __iomem *config_regs,
> + enum mtk_ddp_comp_id cur,
> + enum mtk_ddp_comp_id next,
> + bool enable)
> +{
> + unsigned int addr, value, reg;
> +
> + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> + addr = DISP_OVL0_2L_MOUT_EN;
> + value = OVL0_MOUT_EN_DISP_RDMA0;
> + } else if (cur == DDP_COMPONENT_OVL_2L2 && next ==
> DDP_COMPONENT_RDMA4) {
> + addr = DISP_OVL2_2L_MOUT_EN;
> + value = OVL2_2L_MOUT_RDMA4;
> + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0)
> {
> + addr = DISP_DITHER0_MOUT_EN;
> + value = DITHER0_MOUT_DSI0;
> + } else {
> + value = 0;
> + }
> +
> + if (value) {
> + reg = readl_relaxed(config_regs + addr);
> +
> + if (enable)
> + reg |= value;
> + else
> + reg &= ~value;
> +
> + writel_relaxed(reg, config_regs + addr);
> + }
> +}
> +
> +static void mtk_mmsys_ddp_sel_in(void __iomem *config_regs,
> +enum mtk_ddp_comp_id cur,
> +enum mtk_ddp_comp_id next,
> +bool enable)
> +{
> + unsigned int addr, value, reg;
> +
> + if (cur == DDP_COMPONENT_OVL_2L0 && next == DDP_COMPONENT_RDMA0) {
> + addr = DISP_RDMA0_SEL_IN;
> + value = RDMA0_SEL_IN_OVL0_2L;
> + } else if (cur == DDP_COMPONENT_CCORR && next == DDP_COMPONENT_AAL0) {
> + addr = DISP_AAL0_SEL_IN;
> + value = AAL0_SEL_IN_CCORR0;
> + } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0)
> {
> + addr = DISP_DSI0_SEL_IN;
> + value = DSI0_SEL_IN_DITHER0;
> + } else {
> + value = 0;
> + }
> +
> + if (value) {
> + reg = readl_relaxed(config_regs + addr);
> +
> + if (enable)
> + reg |= value;
> + else
> + reg &= ~value;
> +
> + writel_relaxed(reg, config_regs + addr);
> + }
>
Re: [PATCH v8, 5/6] drm/mediatek: add RDMA fifo size error handle
Hi, Yongqiang: Yongqiang Niu 於 2021年1月5日 週二 下午2:36寫道： > > On Mon, 2020-12-14 at 22:54 +0800, Chun-Kuang Hu wrote: > > Hi, Yongqiang: > > > > Yongqiang Niu 於 2020年12月11日 週五 上午8:45寫道： > > > > > > On Thu, 2020-12-10 at 23:50 +0800, Chun-Kuang Hu wrote: > > > > Hi, Yongqiang: > > > > > > > > Yongqiang Niu 於 2020年12月10日 週四 下午5:08寫道： > > > > > > > > > > This patch add RDMA fifo size error handle > > > > > rdma fifo size will not always bigger than the calculated threshold > > > > > if that case happened, we need set fifo size as the threshold > > > > > > > > > > Signed-off-by: Yongqiang Niu > > > > > --- > > > > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 > > > > > 1 file changed, 4 insertions(+) > > > > > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > > > > b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > > > > index 794acc5..0508392 100644 > > > > > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > > > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > > > > @@ -151,6 +151,10 @@ static void mtk_rdma_config(struct mtk_ddp_comp > > > > > *comp, unsigned int width, > > > > > * account for blanking, and with a pixel depth of 4 bytes: > > > > > */ > > > > > threshold = width * height * vrefresh * 4 * 7 / 100; > > > > > + > > > > > + if (threshold > rdma_fifo_size) > > > > > + threshold = rdma_fifo_size; > > > > > > > > If the formula is not correct, you should fix the formula not work > > > > around. > > > > > > > > Regards, > > > > Chun-Kuang. > > > > > > how about this: > > > threshold = max(width * height * vrefresh * 4 * 7 / 100, > > > rdma_fifo_size); > > > > When I use width = 1920, height = 1080, vrefresh = 60 to calculate, I > > get threshold = 2985. > > So I think set threshold to half of fifo size is OK for MAX_WIDTH, > > MAX_HEIGHT, MAX_VREFRESH (these three may be different in each SoC) > > > > threshold = RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) / 2; > > > > But I worry half fifo size is too big for small resolution and let > > small resolution too easy to trigger burst read DRAM. So let the > > formula to be this: > > > > threshold = RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) * width * height * > > vrefresh / 2 / MAX_WIDTH / MAX_HEIGHT / MAX_VREFRESH; > > > > How do you think about this? > > > > Regards, > > Chun-Kuang. > > how about remove this formula, and set threshold = rdma_fifo_size This means that RDMA would always trigger burst read. In normal case, I think no hardware would trigger burst read. Only the emergency occur, the hardware trigger burst read. RDMA always triggering burst read is good for RDMA, but it may hurt other hardware to read DRAM. So I think RDMA should trigger burst read only when fifo data is under a emergency threshold. Regards, Chun-Kuang. > > > > > > > > > > > + > > > > > reg = RDMA_FIFO_UNDERFLOW_EN | > > > > > RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > > > > > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); > > > > > -- > > > > > 1.8.1.1.dirty > > > > > ___ > > > > > Linux-mediatek mailing list > > > > > linux-media...@lists.infradead.org > > > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek > > > >
Re: [PATCH v3, 6/8] soc: mediatek: mmsys: add component RDMA4
Hi, Yongqiang:
Yongqiang Niu 於 2020年12月28日 週一 下午4:37寫道：
>
> This patch add component RDMA4
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> b/include/linux/soc/mediatek/mtk-mmsys.h
> index 09ee424..aa4f60e 100644
> --- a/include/linux/soc/mediatek/mtk-mmsys.h
> +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> @@ -38,6 +38,7 @@ enum mtk_ddp_comp_id {
> DDP_COMPONENT_RDMA0,
> DDP_COMPONENT_RDMA1,
> DDP_COMPONENT_RDMA2,
> + DDP_COMPONENT_RDMA4,
> DDP_COMPONENT_UFOE,
> DDP_COMPONENT_WDMA0,
> DDP_COMPONENT_WDMA1,
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3, 4/8] soc: mediatek: mmsys: add component OVL_2L2
Hi, Yongqiang:
Yongqiang Niu 於 2020年12月28日 週一 下午4:37寫道：
>
> This patch add component OVL_2L2
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
> b/include/linux/soc/mediatek/mtk-mmsys.h
> index 4b6c514..42476c2 100644
> --- a/include/linux/soc/mediatek/mtk-mmsys.h
> +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> @@ -29,6 +29,7 @@ enum mtk_ddp_comp_id {
> DDP_COMPONENT_OVL0,
> DDP_COMPONENT_OVL_2L0,
> DDP_COMPONENT_OVL_2L1,
> + DDP_COMPONENT_OVL_2L2,
> DDP_COMPONENT_OVL1,
> DDP_COMPONENT_PWM0,
> DDP_COMPONENT_PWM1,
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
