Re: [linux-sunxi] [PATCH] arm64: dts: allwinner: h6: orangepi-one-plus: Fix ethernet

[Code Kipper]

On Sun, 1 Nov 2020 at 08:20, Jernej Skrabec  wrote:
>
> RX/TX delay on OrangePi One Plus board is set on PHY. Reflect that in
> ethernet node.
>
> Fixes: 7ee32a17e0d6 ("arm64: dts: allwinner: h6: orangepi-one-plus: Enable 
> ethernet")
> Signed-off-by: Jernej Skrabec 
Hi Jernej,
Tested-by: Marcus Cooper 
BR,
CK
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts 
> b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
> index fceb298bfd53..29a081e72a9b 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
> @@ -27,7 +27,7 @@ reg_gmac_3v3: gmac-3v3 {
>   {
> pinctrl-names = "default";
> pinctrl-0 = <_rgmii_pins>;
> -   phy-mode = "rgmii";
> +   phy-mode = "rgmii-id";
> phy-handle = <_rgmii_phy>;
> phy-supply = <_gmac_3v3>;
> allwinner,rx-delay-ps = <200>;
> --
> 2.29.2
>
> --
> You received this message because you are subscribed to the Google Groups 
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> To unsubscribe from this group and stop receiving emails from it, send an 
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Re: [PATCH v6 1/7] ASoC: sun4i-i2s: Move channel select offset

[Code Kipper]

On Wed, 16 Oct 2019 at 10:04, Maxime Ripard  wrote:
>
> On Wed, Oct 16, 2019 at 09:07:34AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > On the newer SoCs the offset is used to set the mode of the
> > connection. As it is to be used elsewhere then it makes sense
> > to move it to the main structure.
>
> Elsewhere where, and to do what?
Thanks...How does this sound?

As it is to be used to set the same offset for each TX data channel in use
during multi-channel audio then let's move it to the main structure.

BR,
CK
>
> Maxime

Re: [PATCH v6 2/7] ASoC: sun4i-i2s: Add functions for RX and TX channel offsets

[Code Kipper]

On Wed, 16 Oct 2019 at 10:06, Maxime Ripard  wrote:
>
> Hi,
>
> On Wed, Oct 16, 2019 at 09:07:35AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > Newer SoCs like the H6 have the channel offset bits in a different
> > position to what is on the H3. As we will eventually add multi-
> > channel support then create function calls as opposed to regmap
> > fields to add support for different devices.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 31 +--
> >  1 file changed, 25 insertions(+), 6 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index f1a80973c450..875567881f30 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -157,6 +157,8 @@ struct sun4i_i2s_quirks {
> >   int (*set_chan_cfg)(const struct sun4i_i2s *,
> >   const struct snd_pcm_hw_params *);
> >   int (*set_fmt)(struct sun4i_i2s *, unsigned int);
> > + void(*set_txchanoffset)(const struct sun4i_i2s *, int);
> > + void(*set_rxchanoffset)(const struct sun4i_i2s *);
>
> The point of removing the regmap_field was that because having a
> one-size-fits-all function with regmap_field sort of making the
> abstraction was becoming more and more of a burden to maintain.
>
> Having functions for each and every register access is exactly the
> same as using regmap_field here, and the issue we adressed is not with
> regmap_fields in itself.
>
> If the H6 has a different register layout, then so be it, create a new
> set_chan_cfg or set_fmt function for the H6.
The H3 and the H6 have a similar register layout but the issue here is
that sooner
rather than later we would want to be supporting multi-channel audio
which requires the
offset to be applied to each TX channel channel select register(8chan
PCM for HDMI
requires 4 Tx channels). Currently we're only using one.
BR,
CK
>
> Maxime

Re: [PATCH] ASoC: sun4i-i2s: incorrect regmap for A83t

[Code Kipper]

On Fri, 30 Aug 2019 at 13:45, Mark Brown  wrote:
>
> On Wed, Aug 21, 2019 at 06:23:20PM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T")
> > Signed-off-by: Marcus Cooper 
> > ---
>
> This doesn't apply against current code, please check and resend.
This patch is no longer valid and the fix has been done through the reverts,
BR,
CK

Re: [PATCH v6 2/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On Tue, 27 Aug 2019 at 11:34, Maxime Ripard  wrote:
>
> On Mon, Aug 26, 2019 at 08:07:33PM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > On the newer SoCs such as the H3 and A64 this is set by default
> > to transfer a 0 after each sample in each slot. However the A10
> > and A20 SoCs that this driver was developed on had a default
> > setting where it padded the audio gain with zeros.
> >
> > This isn't a problem whilst we have only support for 16bit audio
> > but with larger sample resolution rates in the pipeline then SEXT
> > bits should be cleared so that they also pad at the LSB. Without
> > this the audio gets distorted.
> >
> > Signed-off-by: Marcus Cooper 
>
> If anything, I'd like to have less regmap_fields rather than more of
> them. This is pretty easy to add to one of the callbacks, especially
> since the field itself has been completely reworked from one
> generation to the other.
>
ACK
That's fineI've been doing that with the patches which follow this.
CK
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v6 3/3] ASoC: sun4i-i2s: Adjust LRCLK width

[Code Kipper]

On Tue, 27 Aug 2019 at 09:01, Maxime Ripard  wrote:
>
> On Mon, Aug 26, 2019 at 08:07:34PM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > Some codecs such as i2s based HDMI audio and the Pine64 DAC require
> > a different amount of bit clocks per frame than what is calculated
> > by the sample width. Use the values obtained by the tdm slot bindings
> > to adjust the LRCLK width accordingly.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 5 -
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 056a299c03fb..0965a97c96e5 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -455,7 +455,10 @@ static int sun8i_i2s_set_chan_cfg(const struct 
> > sun4i_i2s *i2s,
> >   break;
> >
> >   case SND_SOC_DAIFMT_I2S:
> > - lrck_period = params_physical_width(params);
> > + if (i2s->slot_width)
> > + lrck_period = i2s->slot_width;
> > + else
> > + lrck_period = params_physical_width(params);
> >   break;
>
> That would be the case with the DSP formats too, right?

Maybebut I need a TDM test volunteer!,
CK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [linux-sunxi] [PATCH v6 1/3] ASoC: sun4i-i2s: incorrect regmap for A83T

[Code Kipper]

On Tue, 27 Aug 2019 at 10:01, Chen-Yu Tsai  wrote:
>
> On Tue, Aug 27, 2019 at 1:55 PM Code Kipper  wrote:
> >
> > On Tue, 27 Aug 2019 at 06:13, Chen-Yu Tsai  wrote:
> > >
> > > On Tue, Aug 27, 2019 at 2:07 AM  wrote:
> > > >
> > > > From: Marcus Cooper 
> > > >
> > > > The regmap configuration is set up for the legacy block on the
> > > > A83T whereas it uses the new block with a larger register map.
> > >
> > > Looking at the code Allwinner previously released [1], that doesn't seem 
> > > to be
> > > the case. Keep in mind that the register map shown in the user manual is 
> > > for
> > > the TDM interface, which we don't actually support right now.
> >
> > Should it matter what we support right now?, the block according to the user
> > manual shows the bigger range. I don't have a A83T device and from what I
>
> There are a total of four I2S controllers on the A83T. Currently three of them
> are listed in the dtsi file, which are _not_ the one shown in the user manual.
> The one shown is the fourth one, which is the TDM controller.

The configuration for the A83T suggests that it's a mixture of old and
new which I don't
think is the case considering it was released around the same time as
the H3. There
is enough similarity between the blocks for it to still work. For
example on the H6
we referenced by mistake the H3 block and we still got audio (with
only slight distortion).
I would suggest to validate all of the i2s blocks we need to test
using the internal loopback
as that will also cover capture.

>
> It's not like we haven't seen this before. IIRC the A64 also had two variants
> of the I2S interface. The one coupled with the audio codec was different from
> the others.

Yes...but the i2s of the audio codec was documented in the audio codec
section. I've used
this device to ensure that I've not broken anything in the old block
with these new changes.

>
> > gather not many users do. But the compatible for the H3 has been removed
> > and replaced with the settings for the A83T which also has default settings 
> > in
> > registers further up than SUNXI_RXCHMAP.
>
> I'll sync up with Maxime on this.
>
> > >
> > > The file shows the base address as 0x01c22800, and the last defined 
> > > register
> > > is SUNXI_RXCHMAP at 0x3c.
> > >
> > > The I2S driver [2] also shows that it is the old register map size, but 
> > > with
> > > TX_FIFO and INT_STA swapped around. This might mean that it would need a
> > > separate regmap_config, as the read/write callbacks need to be changed to
> > > fit the swapped registers.
> > >
> > > Finally, the TDM driver [3], which matches the TDM section in the manual, 
> > > shows
> > > a larger register map.
> > >
> > > A83T is SUN8IW6, while SUN8IW7 refers to the H3.
> >
> > Since when have we trusted Allwinner code?, the TDM labelled block
> > clearly supports
>
> Since they haven't listed the I2S block in the user manual, so that is what we
> have to go by.
>
> The TDM section in the user manual only lists the block at 0x1c23000. The 
> memory
> map says DAUDIO-[012] for addresses 0x1c22000, 0x1c22400, 0x1c22800, and TDM 
> for
> address 0x1c23000. One would assume this meant these are somewhat different.
>
> > I2S. The biggest use case for this block is getting HDMI audio working
> > on the newer
>
> I understand that.
>
> > devices(LibreELEC nightlies has a user base of over 300) and I've tested 
> > this on
> > numerous set ups over the last couple of years.
>
> Tested on the H3, correct?

Yesbut only with the additional changes for multi-channel with my
LibreELEC build.
These changes I tested on my pine64 before pushing upstream.

>
> > Failing that reverting (3e9acd7ac693: "ASoC: sun4i-i2s: Remove
> > duplicated quirks structure")
> > would help.
>
> I'll take a look. IIRC it worked with the old layout, with the two registers
> swapped, playing standard 48 KHz / 16 bit audio when I added supported for
> the A83T. Then again maybe the stars were perfectly aligned. At the very least
> we could separate A83T and H3 as you suggested.

Thanks,
CK
>
> ChenYu
>
>
> > BR,
> > CK
> > >
> > > ChenYu
> > >
> > > [1] 
> > > https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/sound/soc/sunxi/hdmiaudio/sunxi-hdmipcm.h
> > > [2] 
> > > https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/sound/soc/sunxi/i2s0/sunxi-i2s0.h
> > > [3] 
> >

Re: [linux-sunxi] [PATCH v6 1/3] ASoC: sun4i-i2s: incorrect regmap for A83T

[Code Kipper]

On Tue, 27 Aug 2019 at 06:13, Chen-Yu Tsai  wrote:
>
> On Tue, Aug 27, 2019 at 2:07 AM  wrote:
> >
> > From: Marcus Cooper 
> >
> > The regmap configuration is set up for the legacy block on the
> > A83T whereas it uses the new block with a larger register map.
>
> Looking at the code Allwinner previously released [1], that doesn't seem to be
> the case. Keep in mind that the register map shown in the user manual is for
> the TDM interface, which we don't actually support right now.

Should it matter what we support right now?, the block according to the user
manual shows the bigger range. I don't have a A83T device and from what I
gather not many users do. But the compatible for the H3 has been removed
and replaced with the settings for the A83T which also has default settings in
registers further up than SUNXI_RXCHMAP.

>
> The file shows the base address as 0x01c22800, and the last defined register
> is SUNXI_RXCHMAP at 0x3c.
>
> The I2S driver [2] also shows that it is the old register map size, but with
> TX_FIFO and INT_STA swapped around. This might mean that it would need a
> separate regmap_config, as the read/write callbacks need to be changed to
> fit the swapped registers.
>
> Finally, the TDM driver [3], which matches the TDM section in the manual, 
> shows
> a larger register map.
>
> A83T is SUN8IW6, while SUN8IW7 refers to the H3.

Since when have we trusted Allwinner code?, the TDM labelled block
clearly supports
I2S. The biggest use case for this block is getting HDMI audio working
on the newer
devices(LibreELEC nightlies has a user base of over 300) and I've tested this on
numerous set ups over the last couple of years.

Failing that reverting (3e9acd7ac693: "ASoC: sun4i-i2s: Remove
duplicated quirks structure")
would help.

BR,
CK
>
> ChenYu
>
> [1] 
> https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/sound/soc/sunxi/hdmiaudio/sunxi-hdmipcm.h
> [2] 
> https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/sound/soc/sunxi/i2s0/sunxi-i2s0.h
> [3] 
> https://github.com/allwinner-zh/linux-3.4-sunxi/blob/master/sound/soc/sunxi/daudio0/sunxi-daudio0.h
>
> > Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T")
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 57bf2a33753e..34575a8aa9f6 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -1100,7 +1100,7 @@ static const struct sun4i_i2s_quirks 
> > sun6i_a31_i2s_quirks = {
> >  static const struct sun4i_i2s_quirks sun8i_a83t_i2s_quirks = {
> > .has_reset  = true,
> > .reg_offset_txdata  = SUN8I_I2S_FIFO_TX_REG,
> > -   .sun4i_i2s_regmap   = _i2s_regmap_config,
> > +   .sun4i_i2s_regmap   = _i2s_regmap_config,
> > .field_clkdiv_mclk_en   = REG_FIELD(SUN4I_I2S_CLK_DIV_REG, 8, 8),
> > .field_fmt_wss  = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 2),
> > .field_fmt_sr   = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 6),
> > --
> > 2.23.0
> >
> > --
> > You received this message because you are subscribed to the Google Groups 
> > "linux-sunxi" group.
> > To unsubscribe from this group and stop receiving emails from it, send an 
> > email to linux-sunxi+unsubscr...@googlegroups.com.
> > To view this discussion on the web, visit 
> > https://groups.google.com/d/msgid/linux-sunxi/20190826180734.15801-2-codekipper%40gmail.com.

Re: [PATCH v5 09/15] clk: sunxi-ng: h6: Allow I2S to change parent rate

[Code Kipper]

On Wed, 14 Aug 2019 at 08:09,  wrote:
>
> From: Jernej Skrabec 
>
> I2S doesn't work if parent rate couldn't be change. Difference between
> wanted and actual rate is too big.
>
> Fix this by adding CLK_SET_RATE_PARENT flag to I2S clocks.
>
> Signed-off-by: Jernej Skrabec 

Signed-off-by: Marcus Cooper 

> ---
>  drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c 
> b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
> index aebef4af9861..d89353a3cdec 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
> @@ -505,7 +505,7 @@ static struct ccu_div i2s3_clk = {
> .hw.init= CLK_HW_INIT_PARENTS("i2s3",
>   audio_parents,
>   _div_ops,
> - 0),
> + CLK_SET_RATE_PARENT),
> },
>  };
>
> @@ -518,7 +518,7 @@ static struct ccu_div i2s0_clk = {
> .hw.init= CLK_HW_INIT_PARENTS("i2s0",
>   audio_parents,
>   _div_ops,
> - 0),
> + CLK_SET_RATE_PARENT),
> },
>  };
>
> @@ -531,7 +531,7 @@ static struct ccu_div i2s1_clk = {
> .hw.init= CLK_HW_INIT_PARENTS("i2s1",
>   audio_parents,
>   _div_ops,
> - 0),
> + CLK_SET_RATE_PARENT),
> },
>  };
>
> @@ -544,7 +544,7 @@ static struct ccu_div i2s2_clk = {
> .hw.init= CLK_HW_INIT_PARENTS("i2s2",
>   audio_parents,
>   _div_ops,
> - 0),
> + CLK_SET_RATE_PARENT),
> },
>  };
>
> --
> 2.22.0
>

Re: [linux-sunxi] [PATCH v5 09/15] clk: sunxi-ng: h6: Allow I2S to change parent rate

[Code Kipper]

ThanksI've added to my next patch series but if you could add it
when applying that would be great.
BR,
CK

On Wed, 21 Aug 2019 at 06:07, Chen-Yu Tsai  wrote:
>
> On Wed, Aug 14, 2019 at 2:09 PM  wrote:
> >
> > From: Jernej Skrabec 
> >
> > I2S doesn't work if parent rate couldn't be change. Difference between
> > wanted and actual rate is too big.
> >
> > Fix this by adding CLK_SET_RATE_PARENT flag to I2S clocks.
> >
> > Signed-off-by: Jernej Skrabec 
>
> This lacks your SoB. Please reply and I can add it when applying.
>
> ChenYu

Re: [PATCH v5 02/15] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On Wed, 14 Aug 2019 at 13:08, Maxime Ripard  wrote:
>
> Hi,
>
> On Wed, Aug 14, 2019 at 08:08:41AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > Codecs without a control connection such as i2s based HDMI audio and
> > the Pine64 DAC require a different amount of bit clocks per frame than
> > what is calculated by the sample width. Use the tdm slot bindings to
> > provide this mechanism.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 23 +--
> >  1 file changed, 21 insertions(+), 2 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 8201334a059b..7c37b6291df0 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -195,6 +195,9 @@ struct sun4i_i2s {
> >   struct regmap_field *field_rxchansel;
> >
> >   const struct sun4i_i2s_quirks   *variant;
> > +
> > + unsigned inttdm_slots;
> > + unsigned intslot_width;
> >  };
> >
> >  struct sun4i_i2s_clk_div {
> > @@ -346,7 +349,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
> > *dai,
> >   if (i2s->variant->has_fmt_set_lrck_period)
> >   regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
> >  SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
> > -SUN8I_I2S_FMT0_LRCK_PERIOD(32));
> > +SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
> >
> >
> >   /* Set sign extension to pad out LSB with 0 */
> >   regmap_field_write(i2s->field_fmt_sext, 0);
> > @@ -450,7 +453,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> > *substream,
> >   regmap_field_write(i2s->field_fmt_sr, sr);
> >
> >   return sun4i_i2s_set_clk_rate(dai, params_rate(params),
> > -   params_width(params));
> > +   i2s->tdm_slots ?
> > +   i2s->slot_width : params_width(params));
>
> This is slightly more complicated than that.

At this point we're only supporting 2 channels with fixed slot
settings. I've added a comment to state
that we're using the tdm_slot at the moment as an indicator to
override the slot width. Do you think
that is enough for now?.

Thanks,
CK
>
> On the H3 (and all related ones), the CHAN_CFG_TX_SLOT_NUM and
> _RX_SLOT_NUM fields in the CHAN_CFG register need to be set to the
> number of slots as well.
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v5 02/15] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On Wed, 14 Aug 2019 at 11:30, Mark Brown  wrote:
>
> On Wed, Aug 14, 2019 at 08:08:41AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > Codecs without a control connection such as i2s based HDMI audio and
> > the Pine64 DAC require a different amount of bit clocks per frame than
>
> This isn't a universal property of CODECs without a control, and it's
> something that CODECs with control can require too.

ACK
>
> >   return sun4i_i2s_set_clk_rate(dai, params_rate(params),
> > -   params_width(params));
> > +   i2s->tdm_slots ?
> > +   i2s->slot_width : params_width(params));
>
> Please write normal conditional statements unless there's a strong
> reason to do otherwise, it makes things more legible.
ACK
>
> > +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai,
> > +   unsigned int tx_mask,
> > +   unsigned int rx_mask,
> > +   int slots, int width)
> > +{
> > + struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> > +
> > + i2s->tdm_slots = slots;
> > +
> > + i2s->slot_width = width;
> > +
> > + return 0;
> > +}
>
> No validation of the parameters here?
ACK
Thanks,
CK

Re: [PATCH v5 01/15] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On Wed, 14 Aug 2019 at 13:08, Maxime Ripard  wrote:
>
> Hi,
>
> On Wed, Aug 14, 2019 at 08:08:40AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > On the newer SoCs such as the H3 and A64 this is set by default
> > to transfer a 0 after each sample in each slot. However the A10
> > and A20 SoCs that this driver was developed on had a default
> > setting where it padded the audio gain with zeros.
> >
> > This isn't a problem whilst we have only support for 16bit audio
> > but with larger sample resolution rates in the pipeline then SEXT
> > bits should be cleared so that they also pad at the LSB. Without
> > this the audio gets distorted.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 16 
> >  1 file changed, 16 insertions(+)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 793457394efe..8201334a059b 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -135,6 +135,7 @@ struct sun4i_i2s;
> >   * @field_fmt_bclk: regmap field to set clk polarity.
> >   * @field_fmt_lrclk: regmap field to set frame polarity.
> >   * @field_fmt_mode: regmap field to set the operational mode.
> > + * @field_fmt_sext: regmap field to set the sign extension.
> >   * @field_txchanmap: location of the tx channel mapping register.
> >   * @field_rxchanmap: location of the rx channel mapping register.
> >   * @field_txchansel: location of the tx channel select bit fields.
> > @@ -159,6 +160,7 @@ struct sun4i_i2s_quirks {
> >   struct reg_fieldfield_fmt_bclk;
> >   struct reg_fieldfield_fmt_lrclk;
> >   struct reg_fieldfield_fmt_mode;
> > + struct reg_fieldfield_fmt_sext;
> >   struct reg_fieldfield_txchanmap;
> >   struct reg_fieldfield_rxchanmap;
> >   struct reg_fieldfield_txchansel;
> > @@ -186,6 +188,7 @@ struct sun4i_i2s {
> >   struct regmap_field *field_fmt_bclk;
> >   struct regmap_field *field_fmt_lrclk;
> >   struct regmap_field *field_fmt_mode;
> > + struct regmap_field *field_fmt_sext;
> >   struct regmap_field *field_txchanmap;
> >   struct regmap_field *field_rxchanmap;
> >   struct regmap_field *field_txchansel;
> > @@ -345,6 +348,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
> > *dai,
> >  SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
> >  SUN8I_I2S_FMT0_LRCK_PERIOD(32));
> >
> > + /* Set sign extension to pad out LSB with 0 */
> > + regmap_field_write(i2s->field_fmt_sext, 0);
> > +
> >   return 0;
> >  }
> >
> > @@ -917,6 +923,7 @@ static const struct sun4i_i2s_quirks 
> > sun4i_a10_i2s_quirks = {
> >   .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> >   .has_slave_select_bit   = true,
> >   .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> >   .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> >   .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> >   .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> > @@ -936,6 +943,7 @@ static const struct sun4i_i2s_quirks 
> > sun6i_a31_i2s_quirks = {
> >   .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> >   .has_slave_select_bit   = true,
> >   .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> >   .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> >   .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> >   .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> > @@ -979,6 +987,7 @@ static const struct sun4i_i2s_quirks 
> > sun8i_h3_i2s_quirks = {
> >   .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> >   .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19),
> >   .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
> > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5),
> >   .field_txchanmap= REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31),
> >   .field_rxchanmap= REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31),
> >   .field_txchansel= REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2),
> > @@ -998,6 +1007,7 @@ static const struct sun4i_i2s_quirks 
> > sun50i_a64_codec_i2s_quirks = {
> >   .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
> >   .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> >   .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> >   .field_txchanmap= 

Re: [PATCH v5 04/15] ASoC: sun4i-i2s: Support more formats on newer SoCs

[Code Kipper]

On Wed, 14 Aug 2019 at 13:08, Maxime Ripard  wrote:
>
> On Wed, Aug 14, 2019 at 08:08:43AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > There is a need to support more formats on the newer SoCs(H3 and later).
> > Extend the formats supported to include DSP_A and DSP_B modes.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 87 +++--
> >  1 file changed, 63 insertions(+), 24 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 34f31439ae7b..3553c17318b0 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -27,6 +27,8 @@
> >  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
> >  #define SUN4I_I2S_CTRL_MODE_SLAVE(1 << 5)
> >  #define SUN4I_I2S_CTRL_MODE_MASTER   (0 << 5)
> > +#define SUN4I_I2S_CTRL_PCM   BIT(4)
> > +#define SUN4I_I2S_CTRL_LOOP  BIT(3)
> >  #define SUN4I_I2S_CTRL_TX_EN BIT(2)
> >  #define SUN4I_I2S_CTRL_RX_EN BIT(1)
> >  #define SUN4I_I2S_CTRL_GL_EN BIT(0)
> > @@ -91,6 +93,9 @@
> >  /* Defines required for sun8i-h3 support */
> >  #define SUN8I_I2S_CTRL_BCLK_OUT  BIT(18)
> >  #define SUN8I_I2S_CTRL_LRCK_OUT  BIT(17)
> > +#define SUN8I_I2S_CTRL_MODE_RIGHT_J  (2 << 0)
> > +#define SUN8I_I2S_CTRL_MODE_I2S_LEFT_J   (1 << 0)
> > +#define SUN8I_I2S_CTRL_MODE_PCM  (0 << 0)
> >
> >  #define SUN8I_I2S_FMT0_LRCK_PERIOD_MASK  GENMASK(17, 8)
> >  #define SUN8I_I2S_FMT0_LRCK_PERIOD(period)   ((period - 1) << 8)
> > @@ -164,6 +169,7 @@ struct sun4i_i2s_quirks {
> >
> >   s8  (*get_sr)(const struct sun4i_i2s *, int);
> >   s8  (*get_wss)(const struct sun4i_i2s *, int);
> > + int (*set_format)(struct sun4i_i2s *, unsigned int);
> >  };
> >
> >  struct sun4i_i2s {
> > @@ -194,6 +200,7 @@ struct sun4i_i2s {
> >
> >   unsigned inttdm_slots;
> >   unsigned intslot_width;
> > + unsigned intoffset;
> >  };
> >
> >  struct sun4i_i2s_clk_div {
> > @@ -484,19 +491,14 @@ static int sun4i_i2s_hw_params(struct 
> > snd_pcm_substream *substream,
> > i2s->slot_width : params_width(params));
> >  }
> >
> > -static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
> > +static int sun4i_i2s_set_format(struct sun4i_i2s *i2s, unsigned int fmt)
> >  {
> > - struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> >   u32 val;
> > - u32 offset = 0;
> > - u32 bclk_polarity = SUN4I_I2S_FMT0_POLARITY_NORMAL;
> > - u32 lrclk_polarity = SUN4I_I2S_FMT0_POLARITY_NORMAL;
> >
> >   /* DAI Mode */
> >   switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
> >   case SND_SOC_DAIFMT_I2S:
> >   val = SUN4I_I2S_FMT0_FMT_I2S;
> > - offset = 1;
> >   break;
> >   case SND_SOC_DAIFMT_LEFT_J:
> >   val = SUN4I_I2S_FMT0_FMT_LEFT_J;
> > @@ -505,32 +507,64 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, 
> > unsigned int fmt)
> >   val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
> >   break;
> >   default:
> > - dev_err(dai->dev, "Unsupported format: %d\n",
> > - fmt & SND_SOC_DAIFMT_FORMAT_MASK);
> >   return -EINVAL;
> >   }
> >
> > - if (i2s->variant->has_chsel_offset) {
> > - /*
> > -  * offset being set indicates that we're connected to an i2s
> > -  * device, however offset is only used on the sun8i block and
> > -  * i2s shares the same setting with the LJ format. Increment
> > -  * val so that the bit to value to write is correct.
> > -  */
> > - if (offset > 0)
> > - val++;
> > - /* blck offset determines whether i2s or LJ */
> > - regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG,
> > -SUN8I_I2S_TX_CHAN_OFFSET_MASK,
> > -SUN8I_I2S_TX_CHAN_OFFSET(offset));
> > + regmap_field_write(i2s->field_fmt_mode, val);
> > +
> > + return 0;
> > +}
> > +
> > +static int sun8i_i2s_set_format(struct sun4i_i2s *i2s, unsigned int fmt)
> > +{
> > + u32 val;
> >
> > - regmap_update_bits(i2s->regmap, SUN8I_I2S_RX_CHAN_SEL_REG,
> > -SUN8I_I2S_TX_CHAN_OFFSET_MASK,
> > -SUN8I_I2S_TX_CHAN_OFFSET(offset));
> > + /* DAI Mode */
> > + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
> > + case SND_SOC_DAIFMT_I2S:
> > + i2s->offset = 1;
> > + case SND_SOC_DAIFMT_LEFT_J:
> > + val = SUN8I_I2S_CTRL_MODE_I2S_LEFT_J;
> > + break;
> > + case SND_SOC_DAIFMT_RIGHT_J:
> > + val = 

Re: [PATCH v5 12/15] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On Wed, 14 Aug 2019 at 13:08, Maxime Ripard  wrote:
>
> On Wed, Aug 14, 2019 at 08:08:51AM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > The i2s block supports multi-lane i2s output however this functionality
> > is only possible in earlier SoCs where the pins are exposed and for
> > the i2s block used for HDMI audio on the later SoCs.
> >
> > To enable this functionality, an optional property has been added to
> > the bindings.
> >
> > Signed-off-by: Marcus Cooper 
>
> Wasn't the plan to support only stereo for now?
Stereo HDMI can be introduced on the H3 and later if we get the first
three patches
merged. Post those patches is the work to get multi-channel working.
>
> Either way, that property should be documented.
I can do this...but I'm thinking we should bang our heads together to
find a solution
that we all agree on...especially if we're considering multi-channel
tdm support.
Thanks,
CK
>
> Maxime
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v5 11/15] ASoC: sun4i-i2s: Add support for H6 I2S

[Code Kipper]

On Wed, 14 Aug 2019 at 09:57, Jernej Škrabec  wrote:
>
> Hi!
>
> Dne sreda, 14. avgust 2019 ob 08:08:50 CEST je codekip...@gmail.com
> napisal(a):
> > From: Jernej Skrabec 
> >
> > H6 I2S is very similar to that in H3, except it supports up to 16
> > channels.
> >
> > Signed-off-by: Jernej Skrabec 
>
> Your Signed-off-by is missing here and on all other patches made originally by
> me.
ACK
>
> Best regards,
> Jernej
>
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 148 
> >  1 file changed, 148 insertions(+)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index 6de3cb41aaf6..a8d98696fe7c 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -121,6 +121,21 @@
> >  #define SUN8I_I2S_RX_CHAN_SEL_REG0x54
> >  #define SUN8I_I2S_RX_CHAN_MAP_REG0x58
> >
> > +/* Defines required for sun50i-h6 support */
> > +#define SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASKGENMASK(21, 20)
> > +#define SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(offset) ((offset) << 20)
> > +#define SUN50I_H6_I2S_TX_CHAN_SEL_MASK   GENMASK(19, 16)
> > +#define SUN50I_H6_I2S_TX_CHAN_SEL(chan)  ((chan - 1) << 16)
> > +#define SUN50I_H6_I2S_TX_CHAN_EN_MASKGENMASK(15, 0)
> > +#define SUN50I_H6_I2S_TX_CHAN_EN(num_chan)   (((1 << num_chan) - 1))
> > +
> > +#define SUN50I_H6_I2S_TX_CHAN_MAP0_REG   0x44
> > +#define SUN50I_H6_I2S_TX_CHAN_MAP1_REG   0x48
> > +
> > +#define SUN50I_H6_I2S_RX_CHAN_SEL_REG0x64
> > +#define SUN50I_H6_I2S_RX_CHAN_MAP0_REG   0x68
> > +#define SUN50I_H6_I2S_RX_CHAN_MAP1_REG   0x6C
> > +
> >  struct sun4i_i2s;
> >
> >  /**
> > @@ -440,6 +455,25 @@ static void sun8i_i2s_set_rxchanoffset(const struct
> > sun4i_i2s *i2s) SUN8I_I2S_TX_CHAN_OFFSET(i2s->offset));
> >  }
> >
> > +static void sun50i_h6_i2s_set_txchanoffset(const struct sun4i_i2s *i2s, int
> > output) +{
> > + if (output >= 0 && output < 4) {
> > + regmap_update_bits(i2s->regmap,
> > +SUN8I_I2S_TX_CHAN_SEL_REG +
> (output * 4),
> > +
> SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASK,
> > +
> SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(i2s->offset));
> > + }
> > +
> > +}
> > +
> > +static void sun50i_h6_i2s_set_rxchanoffset(const struct sun4i_i2s *i2s)
> > +{
> > + regmap_update_bits(i2s->regmap,
> > +SUN50I_H6_I2S_RX_CHAN_SEL_REG,
> > +SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET_MASK,
> > +SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(i2s-
> >offset));
> > +}
> > +
> >  static void sun8i_i2s_set_txchanen(const struct sun4i_i2s *i2s, int output,
> > int channel)
> >  {
> > @@ -459,6 +493,26 @@ static void sun8i_i2s_set_rxchanen(const struct
> > sun4i_i2s *i2s, int channel) SUN8I_I2S_TX_CHAN_EN(channel));
> >  }
> >
> > +
> > +static void sun50i_h6_i2s_set_txchanen(const struct sun4i_i2s *i2s, int
> > output, +int channel)
> > +{
> > + if (output >= 0 && output < 4) {
> > + regmap_update_bits(i2s->regmap,
> > +SUN8I_I2S_TX_CHAN_SEL_REG +
> (output * 4),
> > +SUN50I_H6_I2S_TX_CHAN_EN_MASK,
> > +
> SUN50I_H6_I2S_TX_CHAN_EN(channel));
> > + }
> > +}
> > +
> > +static void sun50i_h6_i2s_set_rxchanen(const struct sun4i_i2s *i2s, int
> > channel) +{
> > + regmap_update_bits(i2s->regmap,
> > +SUN50I_H6_I2S_RX_CHAN_SEL_REG,
> > +SUN50I_H6_I2S_TX_CHAN_EN_MASK,
> > +SUN50I_H6_I2S_TX_CHAN_EN(channel));
> > +}
> > +
> >  static void sun4i_i2s_set_txchansel(const struct sun4i_i2s *i2s, int
> > output, int channel)
> >  {
> > @@ -495,6 +549,25 @@ static void sun8i_i2s_set_rxchansel(const struct
> > sun4i_i2s *i2s, int channel) SUN8I_I2S_TX_CHAN_SEL(channel));
> >  }
> >
> > +static void sun50i_h6_i2s_set_txchansel(const struct sun4i_i2s *i2s, int
> > output, +int channel)
> > +{
> > + if (output >= 0 && output < 4) {
> > + regmap_update_bits(i2s->regmap,
> > +SUN8I_I2S_TX_CHAN_SEL_REG +
> (output * 4),
> > +SUN50I_H6_I2S_TX_CHAN_SEL_MASK,
> > +
> SUN50I_H6_I2S_TX_CHAN_SEL(channel));
> > + }
> > +}
> > +
> > +static void sun50i_h6_i2s_set_rxchansel(const struct sun4i_i2s *i2s, int
> > channel) +{
> > + regmap_update_bits(i2s->regmap,
> > +SUN50I_H6_I2S_RX_CHAN_SEL_REG,
> > +SUN50I_H6_I2S_TX_CHAN_SEL_MASK,
> > +SUN50I_H6_I2S_TX_CHAN_SEL(channel));
> > +}
> > +
> >  static void sun4i_i2s_set_txchanmap(const struct sun4i_i2s *i2s, int
> > output, int channel)
> >  {
> > @@ -520,6 +593,20 @@ static void sun8i_i2s_set_rxchanmap(const struct
> > sun4i_i2s *i2s, int channel) regmap_write(i2s->regmap,
> > SUN8I_I2S_RX_CHAN_MAP_REG, channel);
> >  }
> >
> > +static 

Re: [linux-sunxi] [PATCH v5 14/15] ASoc: sun4i-i2s: Add 20, 24 and 32 bit support

[Code Kipper]

On Wed, 14 Aug 2019 at 10:28, Jernej Škrabec  wrote:
>
> Hi!
>
> Dne sreda, 14. avgust 2019 ob 08:08:53 CEST je codekip...@gmail.com
> napisal(a):
> > From: Marcus Cooper 
> >
> > Extend the functionality of the driver to include support of 20 and
> > 24 bits per sample for the earlier SoCs.
> >
> > Newer SoCs can also handle 32bit samples.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 21 +++--
> >  1 file changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index a71969167053..d3c8789f70bb 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -690,6 +690,11 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream
> > *substream, case 16:
> >   width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> >   break;
> > + case 20:
> > + case 24:
> > + case 32:
>
> params_physical_width() returns 32 also for 20 and 24-bit formats, so drop 20
> and 24.
ACK
>
> Best regards,
> Jernej
>
> > + width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> > + break;
> >   default:
> >   dev_err(dai->dev, "Unsupported physical sample width:
> %d\n",
> >   params_physical_width(params));
> > @@ -1015,6 +1020,13 @@ static int sun4i_i2s_dai_probe(struct snd_soc_dai
> > *dai) return 0;
> >  }
> >
> > +#define SUN4I_FORMATS(SNDRV_PCM_FMTBIT_S16_LE | \
> > +  SNDRV_PCM_FMTBIT_S20_LE | \
> > +  SNDRV_PCM_FMTBIT_S24_LE)
> > +
> > +#define SUN8I_FORMATS(SUN4I_FORMATS | \
> > +  SNDRV_PCM_FMTBIT_S32_LE)
> > +
> >  static struct snd_soc_dai_driver sun4i_i2s_dai = {
> >   .probe = sun4i_i2s_dai_probe,
> >   .capture = {
> > @@ -1022,14 +1034,14 @@ static struct snd_soc_dai_driver sun4i_i2s_dai = {
> >   .channels_min = 2,
> >   .channels_max = 2,
> >   .rates = SNDRV_PCM_RATE_8000_192000,
> > - .formats = SNDRV_PCM_FMTBIT_S16_LE,
> > + .formats = SUN4I_FORMATS,
> >   },
> >   .playback = {
> >   .stream_name = "Playback",
> >   .channels_min = 2,
> >   .channels_max = 2,
> >   .rates = SNDRV_PCM_RATE_8000_192000,
> > - .formats = SNDRV_PCM_FMTBIT_S16_LE,
> > + .formats = SUN4I_FORMATS,
> >   },
> >   .ops = _i2s_dai_ops,
> >   .symmetric_rates = 1,
> > @@ -1505,6 +1517,11 @@ static int sun4i_i2s_probe(struct platform_device
> > *pdev) goto err_pm_disable;
> >   }
> >
> > + if (i2s->variant->has_fmt_set_lrck_period) {
> > + soc_dai->playback.formats = SUN8I_FORMATS;
> > + soc_dai->capture.formats = SUN8I_FORMATS;
> > + }
> > +
> >   if (!of_property_read_u32(pdev->dev.of_node,
> > "allwinner,playback-channels",
> )) {
> >   if (val >= 2 && val <= 8)
>
>
>
>

Re: [linux-sunxi] [PATCH v5 15/15] ASoC: sun4i-i2s: Adjust regmap settings

[Code Kipper]

On Wed, 14 Aug 2019 at 10:38, Jernej Škrabec  wrote:
>
> Hi!
>
> Dne sreda, 14. avgust 2019 ob 08:08:54 CEST je codekip...@gmail.com
> napisal(a):
> > From: Marcus Cooper 
> >
> > Bypass the regmap cache when flushing the i2s FIFOs and modify the tables
> > to reflect this.
> >
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 31 ++-
> >  1 file changed, 10 insertions(+), 21 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index d3c8789f70bb..ecfc1ed79379 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -876,9 +876,11 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai,
> > unsigned int fmt) static void sun4i_i2s_start_capture(struct sun4i_i2s
> > *i2s)
> >  {
> >   /* Flush RX FIFO */
> > + regcache_cache_bypass(i2s->regmap, true);
> >   regmap_update_bits(i2s->regmap, SUN4I_I2S_FIFO_CTRL_REG,
> >  SUN4I_I2S_FIFO_CTRL_FLUSH_RX,
> >  SUN4I_I2S_FIFO_CTRL_FLUSH_RX);
> > + regcache_cache_bypass(i2s->regmap, false);
>
> Did you try with regmap_write_bits() instead? This function will
> unconditionally write bits so it's nicer solution, because you don't have to
> use regcache_cache_bypass().

I didn'twith all the rework I've avoided messing with this change.
Now that the dust
has settled, I can go back to look at this.
Thanks,
CK
>
> >
> >   /* Clear RX counter */
> >   regmap_write(i2s->regmap, SUN4I_I2S_RX_CNT_REG, 0);
> > @@ -897,9 +899,11 @@ static void sun4i_i2s_start_capture(struct sun4i_i2s
> > *i2s) static void sun4i_i2s_start_playback(struct sun4i_i2s *i2s)
> >  {
> >   /* Flush TX FIFO */
> > + regcache_cache_bypass(i2s->regmap, true);
> >   regmap_update_bits(i2s->regmap, SUN4I_I2S_FIFO_CTRL_REG,
> >  SUN4I_I2S_FIFO_CTRL_FLUSH_TX,
> >  SUN4I_I2S_FIFO_CTRL_FLUSH_TX);
> > + regcache_cache_bypass(i2s->regmap, false);
>
> Ditto.
>
> >
> >   /* Clear TX counter */
> >   regmap_write(i2s->regmap, SUN4I_I2S_TX_CNT_REG, 0);
> > @@ -1053,13 +1057,7 @@ static const struct snd_soc_component_driver
> > sun4i_i2s_component = {
> >
> >  static bool sun4i_i2s_rd_reg(struct device *dev, unsigned int reg)
> >  {
> > - switch (reg) {
> > - case SUN4I_I2S_FIFO_TX_REG:
> > - return false;
> > -
> > - default:
> > - return true;
> > - }
> > + return true;
>
> Why did you change this? Manual mentions that SUN4I_I2S_FIFO_TX_REG is write-
> only register. Even if it can be read, then it's better to remove whole
> function, which will automatically mean that all registers can be read.
>
>
> >  }
> >
> >  static bool sun4i_i2s_wr_reg(struct device *dev, unsigned int reg)
> > @@ -1078,6 +1076,8 @@ static bool sun4i_i2s_volatile_reg(struct device *dev,
> > unsigned int reg) {
> >   switch (reg) {
> >   case SUN4I_I2S_FIFO_RX_REG:
> > + case SUN4I_I2S_FIFO_TX_REG:
> > + case SUN4I_I2S_FIFO_STA_REG:
> >   case SUN4I_I2S_INT_STA_REG:
> >   case SUN4I_I2S_RX_CNT_REG:
> >   case SUN4I_I2S_TX_CNT_REG:
>
> SUN4I_I2S_FIFO_CTRL_REG should be put here, because it has two bits which
> returns to 0 immediately after they are set to 1.
>
> Best regards,
> Jernej
>
> > @@ -1088,23 +1088,12 @@ static bool sun4i_i2s_volatile_reg(struct device
> > *dev, unsigned int reg) }
> >  }
> >
> > -static bool sun8i_i2s_rd_reg(struct device *dev, unsigned int reg)
> > -{
> > - switch (reg) {
> > - case SUN8I_I2S_FIFO_TX_REG:
> > - return false;
> > -
> > - default:
> > - return true;
> > - }
> > -}
> > -
> >  static bool sun8i_i2s_volatile_reg(struct device *dev, unsigned int reg)
> >  {
> >   if (reg == SUN8I_I2S_INT_STA_REG)
> >   return true;
> >   if (reg == SUN8I_I2S_FIFO_TX_REG)
> > - return false;
> > + return true;
> >
> >   return sun4i_i2s_volatile_reg(dev, reg);
> >  }
> > @@ -1175,7 +1164,7 @@ static const struct regmap_config
> > sun8i_i2s_regmap_config = { .reg_defaults = sun8i_i2s_reg_defaults,
> >   .num_reg_defaults   = ARRAY_SIZE(sun8i_i2s_reg_defaults),
> >   .writeable_reg  = sun4i_i2s_wr_reg,
> > - .readable_reg   = sun8i_i2s_rd_reg,
> > + .readable_reg   = sun4i_i2s_rd_reg,
> >   .volatile_reg   = sun8i_i2s_volatile_reg,
> >  };
> >
> > @@ -1188,7 +1177,7 @@ static const struct regmap_config
> > sun50i_i2s_regmap_config = { .reg_defaults= sun50i_i2s_reg_defaults,
> >   .num_reg_defaults   = ARRAY_SIZE(sun50i_i2s_reg_defaults),
> >   .writeable_reg  = sun4i_i2s_wr_reg,
> > - .readable_reg   = sun8i_i2s_rd_reg,
> > + .readable_reg   = sun4i_i2s_rd_reg,
> >   .volatile_reg   = sun8i_i2s_volatile_reg,
> >  };
>
>
>
>

Re: [linux-sunxi] [PATCH v4 3/9] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On Tue, 4 Jun 2019 at 09:53, Chen-Yu Tsai  wrote:
>
> On Tue, Jun 4, 2019 at 1:47 AM  wrote:
> >
> > From: Marcus Cooper 
> >
> > On the newer SoCs this is set by default to transfer a 0 after
> > each sample in each slot. However the platform that this driver
> > was developed on had the default setting where it padded the
> > audio gain with zeros. This isn't a problem whilst we have only
> > support for 16bit audio but with larger sample resolution rates
> > in the pipeline then it should be fixed to also pad. Without this
> > the audio gets distorted.
>
> Curious, both the A10 and A20 manuals say the default value for this
> field is 0, which means 0 padding.
>
> sun4i_i2s_reg_defaults[] also has that field set to 0.
>
> You're saying you are seeing the field set to 1?

On the newer SoCs (H3 onwards) this setting defaults to 3 which is
"Transfer 0 after each sample in each slot" which resulted in distortion.
Setting SEXT to 0 "Zeros or audio gain padding at LSB" alligns the
setup with that of the earlier block and fixed the issue we were hearing.
It's really noticeable with HDMI audio.
BR,
CK
>
> ChenYu
>
> > Signed-off-by: Marcus Cooper 
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 15 +++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index fd7c37596f21..e2961d8f6e8c 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -134,6 +134,7 @@
> >   * @field_fmt_bclk: regmap field to set clk polarity.
> >   * @field_fmt_lrclk: regmap field to set frame polarity.
> >   * @field_fmt_mode: regmap field to set the operational mode.
> > + * @field_fmt_sext: regmap field to set the sign extension.
> >   * @field_txchanmap: location of the tx channel mapping register.
> >   * @field_rxchanmap: location of the rx channel mapping register.
> >   * @field_txchansel: location of the tx channel select bit fields.
> > @@ -159,6 +160,7 @@ struct sun4i_i2s_quirks {
> > struct reg_fieldfield_fmt_bclk;
> > struct reg_fieldfield_fmt_lrclk;
> > struct reg_fieldfield_fmt_mode;
> > +   struct reg_fieldfield_fmt_sext;
> > struct reg_fieldfield_txchanmap;
> > struct reg_fieldfield_rxchanmap;
> > struct reg_fieldfield_txchansel;
> > @@ -183,6 +185,7 @@ struct sun4i_i2s {
> > struct regmap_field *field_fmt_bclk;
> > struct regmap_field *field_fmt_lrclk;
> > struct regmap_field *field_fmt_mode;
> > +   struct regmap_field *field_fmt_sext;
> > struct regmap_field *field_txchanmap;
> > struct regmap_field *field_rxchanmap;
> > struct regmap_field *field_txchansel;
> > @@ -342,6 +345,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
> > *dai,
> >SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
> >SUN8I_I2S_FMT0_LRCK_PERIOD(32));
> >
> > +   /* Set sign extension to pad out LSB with 0 */
> > +   regmap_field_write(i2s->field_fmt_sext, 0);
> > +
> > return 0;
> >  }
> >
> > @@ -887,6 +893,7 @@ static const struct sun4i_i2s_quirks 
> > sun4i_a10_i2s_quirks = {
> > .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> > .has_slave_select_bit   = true,
> > .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> > +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> > .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 
> > 31),
> > .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 
> > 31),
> > .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 
> > 2),
> > @@ -904,6 +911,7 @@ static const struct sun4i_i2s_quirks 
> > sun6i_a31_i2s_quirks = {
> > .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> > .has_slave_select_bit   = true,
> > .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> > +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> > .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 
> > 31),
> > .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 
> > 31),
> > .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 
> > 2),
> > @@ -944,6 +952,7 @@ static const struct sun4i_i2s_quirks 
> > sun8i_h3_i2s_quirks = {
> > .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> > .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19),
> > .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
> > +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5),
> > .field_txchanmap= REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 
> > 31),
> > .field_rxchanmap= 

Re: [linux-sunxi] Re: [PATCH v4 6/9] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On Tue, 4 Jun 2019 at 11:02, Christopher Obbard  wrote:
>
> On Tue, 4 Jun 2019 at 09:43, Code Kipper  wrote:
> >
> > On Tue, 4 Jun 2019 at 09:58, Maxime Ripard  
> > wrote:
> > >
> > > On Mon, Jun 03, 2019 at 07:47:32PM +0200, codekip...@gmail.com wrote:
> > > > From: Marcus Cooper 
> > > >
> > > > The i2s block supports multi-lane i2s output however this functionality
> > > > is only possible in earlier SoCs where the pins are exposed and for
> > > > the i2s block used for HDMI audio on the later SoCs.
> > > >
> > > > To enable this functionality, an optional property has been added to
> > > > the bindings.
> > > >
> > > > Signed-off-by: Marcus Cooper 
> > >
> > > I'd like to have Mark's input on this, but I'm really worried about
> > > the interaction with the proper TDM support.
> > >
> > > Our fundamental issue is that the controller can have up to 8
> > > channels, but either on 4 lines (instead of 1), or 8 channels on 1
> > > (like proper TDM) (or any combination between the two, but that should
> > > be pretty rare).
> >
> > I understand...maybe the TDM needs to be extended to support this to 
> > consider
> > channel mapping and multiple transfer lines. I was thinking about the later 
> > when
> > someone was requesting support on IIRC a while ago, I thought masking might
> > of been a solution. These can wait as the only consumer at the moment is
> > LibreELEC and we can patch it there.
>
> Hi Marcus,
>
> FWIW, the TI McASP driver has support for TDM & (i think?) multiple
> transfer lines which are called serializers.
> Maybe this can help with inspiration?
> see 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/sound/soc/ti/davinci-mcasp.c
> sample DTS:
>
>  {
> #sound-dai-cells = <0>;
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
>
> op-mode = <0>;
> tdm-slots = <8>;
> serial-dir = <
> 2 0 1 0
> 0 0 0 0
> 0 0 0 0
> 0 0 0 0
> >;
> tx-num-evt = <1>;
> rx-num-evt = <1>;
> };
>
>
> Cheers!

Thanks, this looks good.
CK
>
> > Do you have any ideas Master?
> > CK
> > >
> > > You're trying to do the first one, and I'm trying to do the second one.
> > >
> > > There's a number of assumptions later on that will break the TDM case,
> > > see below for examples
> > >
> > > > ---
> > > >  sound/soc/sunxi/sun4i-i2s.c | 44 -
> > > >  1 file changed, 39 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > > > index bca73b3c0d74..75217fb52bfa 100644
> > > > --- a/sound/soc/sunxi/sun4i-i2s.c
> > > > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > > > @@ -23,7 +23,7 @@
> > > >
> > > >  #define SUN4I_I2S_CTRL_REG   0x00
> > > >  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
> > > > -#define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
> > > > +#define SUN4I_I2S_CTRL_SDO_EN(lines) (((1 << lines) - 1) << 8)
> > > >  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
> > > >  #define SUN4I_I2S_CTRL_MODE_SLAVE(1 << 5)
> > > >  #define SUN4I_I2S_CTRL_MODE_MASTER   (0 << 5)
> > > > @@ -355,14 +355,23 @@ static int sun4i_i2s_hw_params(struct 
> > > > snd_pcm_substream *substream,
> > > >   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> > > >   int sr, wss, channels;
> > > >   u32 width;
> > > > + int lines;
> > > >
> > > >   channels = params_channels(params);
> > > > - if (channels != 2) {
> > > > + if ((channels > dai->driver->playback.channels_max) ||
> > > > + (channels < dai->driver->playback.channels_min)) {
> > > >   dev_err(dai->dev, "Unsupported number of channels: %d\n",
> > > >   channels);
> > > >   return -EINVAL;
> > > >   }
> > > >
> > > > + lines = (channels + 1) / 2;
> > > > +
> > > > + /* Enable the required output line

Re: [PATCH v4 4/9] ASoC: sun4i-i2s: Reduce quirks for sun8i-h3

[Code Kipper]

On Tue, 4 Jun 2019 at 09:46, Maxime Ripard  wrote:
>
> On Mon, Jun 03, 2019 at 07:47:30PM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > We have a number of flags used to identify the functionality
> > of the IP block found on the sun8i-h3 and later devices. As it
> > is only neccessary to identify this new block then replace
> > these flags with just one.
> >
> > Signed-off-by: Marcus Cooper 
>
> This carries exactly the same meaning than the compatible, so this is
> entirely redundant.
>
> The more I think of it, the more I fell like we should have function
> pointers instead, and have hooks to deal with these kind of things.
>
> I've been working a lot on that driver recently, and there's some many
> parameters and regmap_fields that it becomes pretty hard to work on.
Hi Maxime,
let's sync with what you're doing as you're more lightly to see it
through to delivery!
I was trying to clean up the driver as some of this seemed a bit unnecessary,
hooks sounds like the way forward,
CK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v4 6/9] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On Tue, 4 Jun 2019 at 09:58, Maxime Ripard  wrote:
>
> On Mon, Jun 03, 2019 at 07:47:32PM +0200, codekip...@gmail.com wrote:
> > From: Marcus Cooper 
> >
> > The i2s block supports multi-lane i2s output however this functionality
> > is only possible in earlier SoCs where the pins are exposed and for
> > the i2s block used for HDMI audio on the later SoCs.
> >
> > To enable this functionality, an optional property has been added to
> > the bindings.
> >
> > Signed-off-by: Marcus Cooper 
>
> I'd like to have Mark's input on this, but I'm really worried about
> the interaction with the proper TDM support.
>
> Our fundamental issue is that the controller can have up to 8
> channels, but either on 4 lines (instead of 1), or 8 channels on 1
> (like proper TDM) (or any combination between the two, but that should
> be pretty rare).

I understand...maybe the TDM needs to be extended to support this to consider
channel mapping and multiple transfer lines. I was thinking about the later when
someone was requesting support on IIRC a while ago, I thought masking might
of been a solution. These can wait as the only consumer at the moment is
LibreELEC and we can patch it there.
Do you have any ideas Master?
CK
>
> You're trying to do the first one, and I'm trying to do the second one.
>
> There's a number of assumptions later on that will break the TDM case,
> see below for examples
>
> > ---
> >  sound/soc/sunxi/sun4i-i2s.c | 44 -
> >  1 file changed, 39 insertions(+), 5 deletions(-)
> >
> > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> > index bca73b3c0d74..75217fb52bfa 100644
> > --- a/sound/soc/sunxi/sun4i-i2s.c
> > +++ b/sound/soc/sunxi/sun4i-i2s.c
> > @@ -23,7 +23,7 @@
> >
> >  #define SUN4I_I2S_CTRL_REG   0x00
> >  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
> > -#define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
> > +#define SUN4I_I2S_CTRL_SDO_EN(lines) (((1 << lines) - 1) << 8)
> >  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
> >  #define SUN4I_I2S_CTRL_MODE_SLAVE(1 << 5)
> >  #define SUN4I_I2S_CTRL_MODE_MASTER   (0 << 5)
> > @@ -355,14 +355,23 @@ static int sun4i_i2s_hw_params(struct 
> > snd_pcm_substream *substream,
> >   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> >   int sr, wss, channels;
> >   u32 width;
> > + int lines;
> >
> >   channels = params_channels(params);
> > - if (channels != 2) {
> > + if ((channels > dai->driver->playback.channels_max) ||
> > + (channels < dai->driver->playback.channels_min)) {
> >   dev_err(dai->dev, "Unsupported number of channels: %d\n",
> >   channels);
> >   return -EINVAL;
> >   }
> >
> > + lines = (channels + 1) / 2;
> > +
> > + /* Enable the required output lines */
> > + regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
> > +SUN4I_I2S_CTRL_SDO_EN_MASK,
> > +SUN4I_I2S_CTRL_SDO_EN(lines));
> > +
>
> This has the assumption that each line will have 2 channels, which is wrong.
>
> >   if (i2s->variant->is_h3_i2s_based) {
> >   regmap_update_bits(i2s->regmap, SUN8I_I2S_CHAN_CFG_REG,
> >  SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK,
> > @@ -373,8 +382,19 @@ static int sun4i_i2s_hw_params(struct 
> > snd_pcm_substream *substream,
> >   }
> >
> >   /* Map the channels for playback and capture */
> > - regmap_field_write(i2s->field_txchanmap, 0x76543210);
> >   regmap_field_write(i2s->field_rxchanmap, 0x3210);
> > + regmap_field_write(i2s->field_txchanmap, 0x10);
> > + if (i2s->variant->is_h3_i2s_based) {
> > + if (channels > 2)
> > + regmap_write(i2s->regmap,
> > +  SUN8I_I2S_TX_CHAN_MAP_REG+4, 0x32);
> > + if (channels > 4)
> > + regmap_write(i2s->regmap,
> > +  SUN8I_I2S_TX_CHAN_MAP_REG+8, 0x54);
> > + if (channels > 6)
> > + regmap_write(i2s->regmap,
> > +  SUN8I_I2S_TX_CHAN_MAP_REG+12, 0x76);
> > + }
>
> And this creates a mapping matching that.
>
> >   /* Configure the channels */
> >   regmap_field_write(i2s->field_txchansel,
> > @@ -1057,9 +1077,10 @@ static int sun4i_i2s_init_regmap_fields(struct 
> > device *dev,
> >  static int sun4i_i2s_probe(struct platform_device *pdev)
> >  {
> >   struct sun4i_i2s *i2s;
> > + struct snd_soc_dai_driver *soc_dai;
> >   struct resource *res;
> >   void __iomem *regs;
> > - int irq, ret;
> > + int irq, ret, val;
> >
> >   i2s = devm_kzalloc(>dev, sizeof(*i2s), GFP_KERNEL);
> >   if (!i2s)
> > @@ -1126,6 +1147,19 @@ static int sun4i_i2s_probe(struct platform_device 
> > *pdev)
> >   i2s->capture_dma_data.addr = 

Re: [linux-sunxi] Re: [PATCH v4 1/9] ASoC: sun4i-i2s: Fix sun8i tx channel offset mask

[Code Kipper]

On Tue, 4 Jun 2019 at 09:39, Chen-Yu Tsai  wrote:
>
> On Tue, Jun 4, 2019 at 3:34 PM Maxime Ripard  
> wrote:
> >
> > On Mon, Jun 03, 2019 at 07:47:27PM +0200, codekip...@gmail.com wrote:
> > > From: Marcus Cooper 
> > >
> > > Although not causing any noticeable issues, the mask for the
> > > channel offset is covering too many bits.
> > >
> > > Signed-off-by: Marcus Cooper 
> >
> > Acked-by: Maxime Ripard 
>
> Would be nice to have
>
> Fixes: 7d2993811a1e ("ASoC: sun4i-i2s: Add support for H3")
ThanksI'll keep this in mind for future reference as jernej also
mention this to me.
BR,
CK
>
> But otherwise,
>
> Acked-by: Chen-Yu Tsai 

Re: [PATCH v2 4/6] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On 13 March 2018 at 09:23, Maxime Ripard <maxime.rip...@bootlin.com> wrote:
> On Tue, Mar 13, 2018 at 09:15:49AM +0100, Code Kipper wrote:
>> On 13 March 2018 at 09:00, Maxime Ripard <maxime.rip...@bootlin.com> wrote:
>> > On Mon, Mar 12, 2018 at 04:57:51PM +0100, codekip...@gmail.com wrote:
>> >> From: Marcus Cooper <codekip...@gmail.com>
>> >>
>> >> The i2s block supports multi-lane i2s output however this functionality
>> >> is only possible in earlier SoCs where the pins are exposed and for
>> >> the i2s block used for HDMI audio on the later SoCs.
>> >>
>> >> To enable this functionality, an optional property has been added to
>> >> the bindings.
>> >>
>> >> Signed-off-by: Marcus Cooper <codekip...@gmail.com>
>> >> ---
>> >>  .../devicetree/bindings/sound/sun4i-i2s.txt|  3 ++
>> >>  sound/soc/sunxi/sun4i-i2s.c| 48 
>> >> +-
>> >>  2 files changed, 41 insertions(+), 10 deletions(-)
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> >> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> index 48addef65b8f..3f966ac61b9e 100644
>> >> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> @@ -33,6 +33,9 @@ Optional properties:
>> >>   configured to extend the slot width to the
>> >>   value specified. Min 8, Max 32.
>> >>
>> >> +- allwinner,playback-channels:  if this property is present then the 
>> >> number
>> >> + of available channels is extended and the
>> >> + outputs enabled.
>> >
>> > Isn't it something that is fixed for each generation of SoCs? Can't we
>> > attach it to the compatible?
>>
>> I'm not sure as the documentation is pretty poor. It looks like it is
>> supported by all of the variations that we've seen but only exposed as
>> pins on A10 and A20. I'm also not sure who would ever use it with
>> external devices.
>
> Well, you were saying that it was the case on the older SoCs in your
> commit log, so this needs to be figured out.
>
>> The reason why I've added it is that it is required by HDMI for
>> supporting surround sound on the newer SoCs.
>
> Why isn't that mentionned in your commit log?
>
> Can you post the whole set of changes needed for HDMI audio? this
> would make things much easier to see where you're going.

Maybe we should drop this change for now as basic HDMI audio for two
channels doesn't require it. I've also not tested multi-channel audio
yet.

To get HDMI audio working the following patches are required for the dts
https://github.com/codekipper/linux-sunxi/commit/997c622ae10ef136bae0a35a0e9bf9c6dd27910a
and
https://github.com/codekipper/linux-sunxi/commit/4a81676d30a0262c57ffc0827e46c7934fb3b358

they don't need this patch but do need the slot-width-override patch.

CK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v2 4/6] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On 13 March 2018 at 09:23, Maxime Ripard  wrote:
> On Tue, Mar 13, 2018 at 09:15:49AM +0100, Code Kipper wrote:
>> On 13 March 2018 at 09:00, Maxime Ripard  wrote:
>> > On Mon, Mar 12, 2018 at 04:57:51PM +0100, codekip...@gmail.com wrote:
>> >> From: Marcus Cooper 
>> >>
>> >> The i2s block supports multi-lane i2s output however this functionality
>> >> is only possible in earlier SoCs where the pins are exposed and for
>> >> the i2s block used for HDMI audio on the later SoCs.
>> >>
>> >> To enable this functionality, an optional property has been added to
>> >> the bindings.
>> >>
>> >> Signed-off-by: Marcus Cooper 
>> >> ---
>> >>  .../devicetree/bindings/sound/sun4i-i2s.txt|  3 ++
>> >>  sound/soc/sunxi/sun4i-i2s.c| 48 
>> >> +-
>> >>  2 files changed, 41 insertions(+), 10 deletions(-)
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> >> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> index 48addef65b8f..3f966ac61b9e 100644
>> >> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> >> @@ -33,6 +33,9 @@ Optional properties:
>> >>   configured to extend the slot width to the
>> >>   value specified. Min 8, Max 32.
>> >>
>> >> +- allwinner,playback-channels:  if this property is present then the 
>> >> number
>> >> + of available channels is extended and the
>> >> + outputs enabled.
>> >
>> > Isn't it something that is fixed for each generation of SoCs? Can't we
>> > attach it to the compatible?
>>
>> I'm not sure as the documentation is pretty poor. It looks like it is
>> supported by all of the variations that we've seen but only exposed as
>> pins on A10 and A20. I'm also not sure who would ever use it with
>> external devices.
>
> Well, you were saying that it was the case on the older SoCs in your
> commit log, so this needs to be figured out.
>
>> The reason why I've added it is that it is required by HDMI for
>> supporting surround sound on the newer SoCs.
>
> Why isn't that mentionned in your commit log?
>
> Can you post the whole set of changes needed for HDMI audio? this
> would make things much easier to see where you're going.

Maybe we should drop this change for now as basic HDMI audio for two
channels doesn't require it. I've also not tested multi-channel audio
yet.

To get HDMI audio working the following patches are required for the dts
https://github.com/codekipper/linux-sunxi/commit/997c622ae10ef136bae0a35a0e9bf9c6dd27910a
and
https://github.com/codekipper/linux-sunxi/commit/4a81676d30a0262c57ffc0827e46c7934fb3b358

they don't need this patch but do need the slot-width-override patch.

CK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v2 4/6] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On 13 March 2018 at 09:00, Maxime Ripard  wrote:
> On Mon, Mar 12, 2018 at 04:57:51PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The i2s block supports multi-lane i2s output however this functionality
>> is only possible in earlier SoCs where the pins are exposed and for
>> the i2s block used for HDMI audio on the later SoCs.
>>
>> To enable this functionality, an optional property has been added to
>> the bindings.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|  3 ++
>>  sound/soc/sunxi/sun4i-i2s.c| 48 
>> +-
>>  2 files changed, 41 insertions(+), 10 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index 48addef65b8f..3f966ac61b9e 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -33,6 +33,9 @@ Optional properties:
>>   configured to extend the slot width to the
>>   value specified. Min 8, Max 32.
>>
>> +- allwinner,playback-channels:  if this property is present then the number
>> + of available channels is extended and the
>> + outputs enabled.
>
> Isn't it something that is fixed for each generation of SoCs? Can't we
> attach it to the compatible?

I'm not sure as the documentation is pretty poor. It looks like it is
supported by all of the variations that we've seen but only exposed as
pins on A10 and A20. I'm also not sure who would ever use it with
external devices.
The reason why I've added it is that it is required by HDMI for
supporting surround sound on the newer SoCs.
CK

>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [PATCH v2 4/6] ASoC: sun4i-i2s: Add multi-lane functionality

[Code Kipper]

On 13 March 2018 at 09:00, Maxime Ripard  wrote:
> On Mon, Mar 12, 2018 at 04:57:51PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The i2s block supports multi-lane i2s output however this functionality
>> is only possible in earlier SoCs where the pins are exposed and for
>> the i2s block used for HDMI audio on the later SoCs.
>>
>> To enable this functionality, an optional property has been added to
>> the bindings.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|  3 ++
>>  sound/soc/sunxi/sun4i-i2s.c| 48 
>> +-
>>  2 files changed, 41 insertions(+), 10 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index 48addef65b8f..3f966ac61b9e 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -33,6 +33,9 @@ Optional properties:
>>   configured to extend the slot width to the
>>   value specified. Min 8, Max 32.
>>
>> +- allwinner,playback-channels:  if this property is present then the number
>> + of available channels is extended and the
>> + outputs enabled.
>
> Isn't it something that is fixed for each generation of SoCs? Can't we
> attach it to the compatible?

I'm not sure as the documentation is pretty poor. It looks like it is
supported by all of the variations that we've seen but only exposed as
pins on A10 and A20. I'm also not sure who would ever use it with
external devices.
The reason why I've added it is that it is required by HDMI for
supporting surround sound on the newer SoCs.
CK

>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 12:32, Mark Brown <broo...@kernel.org> wrote:
> On Mon, Jan 29, 2018 at 08:34:00AM +0100, Code Kipper wrote:
>
>> I'm not sure..I was looking for a clean example of being able to
>> override the number of bclks in the lrclk width and some other
>> devices(Rpi) were doing it this way.  I open to suggestions,
>
> You're looking for set_bclk_ratio() I think.
Hi Mark,
I'm looking for a mechanism to be able to override the bclk width
(usually it's based on param_width) from the device tree. The tdm slot
functionality looked just what I needed.
BR,
CK

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 12:32, Mark Brown  wrote:
> On Mon, Jan 29, 2018 at 08:34:00AM +0100, Code Kipper wrote:
>
>> I'm not sure..I was looking for a clean example of being able to
>> override the number of bclks in the lrclk width and some other
>> devices(Rpi) were doing it this way.  I open to suggestions,
>
> You're looking for set_bclk_ratio() I think.
Hi Mark,
I'm looking for a mechanism to be able to override the bclk width
(usually it's based on param_width) from the device tree. The tdm slot
functionality looked just what I needed.
BR,
CK

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 08:38, Chen-Yu Tsai <w...@csie.org> wrote:
> On Mon, Jan 29, 2018 at 3:34 PM, Code Kipper <codekip...@gmail.com> wrote:
>> On 29 January 2018 at 02:50, Chen-Yu Tsai <w...@csie.org> wrote:
>>> On Wed, Jan 24, 2018 at 10:10 PM,  <codekip...@gmail.com> wrote:
>>>> From: Marcus Cooper <codekip...@gmail.com>
>>>>
>>>> Some codecs require a different amount of a bit clocks per frame than
>>>> what is calculated by the sample width. Use the tdm slot bindings to
>>>> provide this mechanism.
>>>>
>>>> Signed-off-by: Marcus Cooper <codekip...@gmail.com>
>>>> ---
>>>>  sound/soc/sunxi/sun4i-i2s.c | 23 +--
>>>>  1 file changed, 21 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>>>> index dca1143c1150..d7a9141514cf 100644
>>>> --- a/sound/soc/sunxi/sun4i-i2s.c
>>>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>>>> @@ -96,6 +96,7 @@
>>>>  #define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>>>>  #define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>>>>
>>>> +#define SUN8I_I2S_FMT0_LRCK_MAX_PERIOD (GENMASK(17, 8) >> 8)
>>>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>>>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
>>>>
>>>> @@ -193,6 +194,9 @@ struct sun4i_i2s {
>>>> struct regmap_field *field_rxchansel;
>>>>
>>>> const struct sun4i_i2s_quirks   *variant;
>>>> +
>>>> +   unsigned inttdm_slots;
>>>> +   unsigned intslot_width;
>>>>  };
>>>>
>>>>  struct sun4i_i2s_clk_div {
>>>> @@ -344,7 +348,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>>>> *dai,
>>>> if (i2s->variant->has_fmt_set_lrck_period)
>>>> regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
>>>>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>>>> -  SUN8I_I2S_FMT0_LRCK_PERIOD(32));
>>>> +  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>>>
>>>> return 0;
>>>>  }
>>>> @@ -418,7 +422,8 @@ static int sun4i_i2s_hw_params(struct 
>>>> snd_pcm_substream *substream,
>>>>sr + i2s->variant->fmt_offset);
>>>>
>>>> return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>>>> - params_width(params));
>>>> + i2s->tdm_slots ?
>>>> + i2s->slot_width : 
>>>> params_width(params));
>>>>  }
>>>>
>>>>  static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>>>> @@ -691,6 +696,19 @@ static int sun4i_i2s_set_sysclk(struct snd_soc_dai 
>>>> *dai, int clk_id,
>>>> return 0;
>>>>  }
>>>>
>>>> +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai,
>>>> +   unsigned int tx_mask, unsigned int rx_mask,
>>>> +   int slots, int width)
>>>> +{
>>>> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>>>> +
>>>> +   i2s->tdm_slots = slots;
>>>> +
>>>> +   i2s->slot_width = width;
>>>> +
>>>> +   return 0;
>>>> +}
>>>> +
>>>
>>> IIRC some of the DAI controllers actually support TDM. Would this
>>> change conflict with that in the future?
>>
>> Hi Wens,
>> I'm not sure..I was looking for a clean example of being able to
>> override the number of bclks in the lrclk width and some other
>> devices(Rpi) were doing it this way.  I open to suggestions,
>
> I'm not familiar with the issue either. If Mark doesn't have any
> objections, we could merge it for now, and fix it later if there
> are any complications.
>
> BTW, you didn't provide a device tree example (if any) for how
> to use this.

Hi Wens,

here is an example that I use for the Pine64 audio hat.
https://github.com/codekipper/linux-sunxi/commit/faa9dfba955bf71ca23b089b1cb678a14443216f#diff-1473a38b339685d191c5a87aab9c0fdfR80

I've done the same on the A64 for HDMI and analog audio which both use
the i2s and seem to require 32bit LRCK width.

BR,
CK

>
> ChenYu
>
>> BR,
>> CK
>>>
>>> Thanks
>>> ChenYu
>>>
>>>>  static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>>>> .hw_params  = sun4i_i2s_hw_params,
>>>> .set_fmt= sun4i_i2s_set_fmt,
>>>> @@ -698,6 +716,7 @@ static const struct snd_soc_dai_ops sun4i_i2s_dai_ops 
>>>> = {
>>>> .shutdown   = sun4i_i2s_shutdown,
>>>> .startup= sun4i_i2s_startup,
>>>> .trigger= sun4i_i2s_trigger,
>>>> +   .set_tdm_slot   = sun4i_i2s_set_dai_tdm_slot,
>>>>  };
>>>>
>>>>  static int sun4i_i2s_dai_probe(struct snd_soc_dai *dai)
>>>> --
>>>> 2.16.0
>>>>
>>>> --
>>>> You received this message because you are subscribed to the Google Groups 
>>>> "linux-sunxi" group.
>>>> To unsubscribe from this group and stop receiving emails from it, send an 
>>>> email to linux-sunxi+unsubscr...@googlegroups.com.
>>>> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 08:38, Chen-Yu Tsai  wrote:
> On Mon, Jan 29, 2018 at 3:34 PM, Code Kipper  wrote:
>> On 29 January 2018 at 02:50, Chen-Yu Tsai  wrote:
>>> On Wed, Jan 24, 2018 at 10:10 PM,   wrote:
>>>> From: Marcus Cooper 
>>>>
>>>> Some codecs require a different amount of a bit clocks per frame than
>>>> what is calculated by the sample width. Use the tdm slot bindings to
>>>> provide this mechanism.
>>>>
>>>> Signed-off-by: Marcus Cooper 
>>>> ---
>>>>  sound/soc/sunxi/sun4i-i2s.c | 23 +--
>>>>  1 file changed, 21 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>>>> index dca1143c1150..d7a9141514cf 100644
>>>> --- a/sound/soc/sunxi/sun4i-i2s.c
>>>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>>>> @@ -96,6 +96,7 @@
>>>>  #define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>>>>  #define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>>>>
>>>> +#define SUN8I_I2S_FMT0_LRCK_MAX_PERIOD (GENMASK(17, 8) >> 8)
>>>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>>>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
>>>>
>>>> @@ -193,6 +194,9 @@ struct sun4i_i2s {
>>>> struct regmap_field *field_rxchansel;
>>>>
>>>> const struct sun4i_i2s_quirks   *variant;
>>>> +
>>>> +   unsigned inttdm_slots;
>>>> +   unsigned intslot_width;
>>>>  };
>>>>
>>>>  struct sun4i_i2s_clk_div {
>>>> @@ -344,7 +348,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>>>> *dai,
>>>> if (i2s->variant->has_fmt_set_lrck_period)
>>>> regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
>>>>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>>>> -  SUN8I_I2S_FMT0_LRCK_PERIOD(32));
>>>> +  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>>>
>>>> return 0;
>>>>  }
>>>> @@ -418,7 +422,8 @@ static int sun4i_i2s_hw_params(struct 
>>>> snd_pcm_substream *substream,
>>>>sr + i2s->variant->fmt_offset);
>>>>
>>>> return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>>>> - params_width(params));
>>>> + i2s->tdm_slots ?
>>>> + i2s->slot_width : 
>>>> params_width(params));
>>>>  }
>>>>
>>>>  static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>>>> @@ -691,6 +696,19 @@ static int sun4i_i2s_set_sysclk(struct snd_soc_dai 
>>>> *dai, int clk_id,
>>>> return 0;
>>>>  }
>>>>
>>>> +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai,
>>>> +   unsigned int tx_mask, unsigned int rx_mask,
>>>> +   int slots, int width)
>>>> +{
>>>> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>>>> +
>>>> +   i2s->tdm_slots = slots;
>>>> +
>>>> +   i2s->slot_width = width;
>>>> +
>>>> +   return 0;
>>>> +}
>>>> +
>>>
>>> IIRC some of the DAI controllers actually support TDM. Would this
>>> change conflict with that in the future?
>>
>> Hi Wens,
>> I'm not sure..I was looking for a clean example of being able to
>> override the number of bclks in the lrclk width and some other
>> devices(Rpi) were doing it this way.  I open to suggestions,
>
> I'm not familiar with the issue either. If Mark doesn't have any
> objections, we could merge it for now, and fix it later if there
> are any complications.
>
> BTW, you didn't provide a device tree example (if any) for how
> to use this.

Hi Wens,

here is an example that I use for the Pine64 audio hat.
https://github.com/codekipper/linux-sunxi/commit/faa9dfba955bf71ca23b089b1cb678a14443216f#diff-1473a38b339685d191c5a87aab9c0fdfR80

I've done the same on the A64 for HDMI and analog audio which both use
the i2s and seem to require 32bit LRCK width.

BR,
CK

>
> ChenYu
>
>> BR,
>> CK
>>>
>>> Thanks
>>> ChenYu
>>>
>>>>  static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>>>> .hw_params  = sun4i_i2s_hw_params,
>>>> .set_fmt= sun4i_i2s_set_fmt,
>>>> @@ -698,6 +716,7 @@ static const struct snd_soc_dai_ops sun4i_i2s_dai_ops 
>>>> = {
>>>> .shutdown   = sun4i_i2s_shutdown,
>>>> .startup= sun4i_i2s_startup,
>>>> .trigger= sun4i_i2s_trigger,
>>>> +   .set_tdm_slot   = sun4i_i2s_set_dai_tdm_slot,
>>>>  };
>>>>
>>>>  static int sun4i_i2s_dai_probe(struct snd_soc_dai *dai)
>>>> --
>>>> 2.16.0
>>>>
>>>> --
>>>> You received this message because you are subscribed to the Google Groups 
>>>> "linux-sunxi" group.
>>>> To unsubscribe from this group and stop receiving emails from it, send an 
>>>> email to linux-sunxi+unsubscr...@googlegroups.com.
>>>> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 02:50, Chen-Yu Tsai  wrote:
> On Wed, Jan 24, 2018 at 10:10 PM,   wrote:
>> From: Marcus Cooper 
>>
>> Some codecs require a different amount of a bit clocks per frame than
>> what is calculated by the sample width. Use the tdm slot bindings to
>> provide this mechanism.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 23 +--
>>  1 file changed, 21 insertions(+), 2 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index dca1143c1150..d7a9141514cf 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -96,6 +96,7 @@
>>  #define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>>  #define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>>
>> +#define SUN8I_I2S_FMT0_LRCK_MAX_PERIOD (GENMASK(17, 8) >> 8)
>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
>>
>> @@ -193,6 +194,9 @@ struct sun4i_i2s {
>> struct regmap_field *field_rxchansel;
>>
>> const struct sun4i_i2s_quirks   *variant;
>> +
>> +   unsigned inttdm_slots;
>> +   unsigned intslot_width;
>>  };
>>
>>  struct sun4i_i2s_clk_div {
>> @@ -344,7 +348,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>> *dai,
>> if (i2s->variant->has_fmt_set_lrck_period)
>> regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
>>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>> -  SUN8I_I2S_FMT0_LRCK_PERIOD(32));
>> +  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>
>> return 0;
>>  }
>> @@ -418,7 +422,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
>> *substream,
>>sr + i2s->variant->fmt_offset);
>>
>> return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>> - params_width(params));
>> + i2s->tdm_slots ?
>> + i2s->slot_width : 
>> params_width(params));
>>  }
>>
>>  static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>> @@ -691,6 +696,19 @@ static int sun4i_i2s_set_sysclk(struct snd_soc_dai 
>> *dai, int clk_id,
>> return 0;
>>  }
>>
>> +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai,
>> +   unsigned int tx_mask, unsigned int rx_mask,
>> +   int slots, int width)
>> +{
>> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>> +
>> +   i2s->tdm_slots = slots;
>> +
>> +   i2s->slot_width = width;
>> +
>> +   return 0;
>> +}
>> +
>
> IIRC some of the DAI controllers actually support TDM. Would this
> change conflict with that in the future?

Hi Wens,
I'm not sure..I was looking for a clean example of being able to
override the number of bclks in the lrclk width and some other
devices(Rpi) were doing it this way.  I open to suggestions,
BR,
CK
>
> Thanks
> ChenYu
>
>>  static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>> .hw_params  = sun4i_i2s_hw_params,
>> .set_fmt= sun4i_i2s_set_fmt,
>> @@ -698,6 +716,7 @@ static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>> .shutdown   = sun4i_i2s_shutdown,
>> .startup= sun4i_i2s_startup,
>> .trigger= sun4i_i2s_trigger,
>> +   .set_tdm_slot   = sun4i_i2s_set_dai_tdm_slot,
>>  };
>>
>>  static int sun4i_i2s_dai_probe(struct snd_soc_dai *dai)
>> --
>> 2.16.0
>>
>> --
>> You received this message because you are subscribed to the Google Groups 
>> "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an 
>> email to linux-sunxi+unsubscr...@googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH 1/3] ASoC: sun4i-i2s: Add set_tdm_slot functionality

[Code Kipper]

On 29 January 2018 at 02:50, Chen-Yu Tsai  wrote:
> On Wed, Jan 24, 2018 at 10:10 PM,   wrote:
>> From: Marcus Cooper 
>>
>> Some codecs require a different amount of a bit clocks per frame than
>> what is calculated by the sample width. Use the tdm slot bindings to
>> provide this mechanism.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 23 +--
>>  1 file changed, 21 insertions(+), 2 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index dca1143c1150..d7a9141514cf 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -96,6 +96,7 @@
>>  #define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>>  #define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>>
>> +#define SUN8I_I2S_FMT0_LRCK_MAX_PERIOD (GENMASK(17, 8) >> 8)
>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>>  #define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period - 1) << 8)
>>
>> @@ -193,6 +194,9 @@ struct sun4i_i2s {
>> struct regmap_field *field_rxchansel;
>>
>> const struct sun4i_i2s_quirks   *variant;
>> +
>> +   unsigned inttdm_slots;
>> +   unsigned intslot_width;
>>  };
>>
>>  struct sun4i_i2s_clk_div {
>> @@ -344,7 +348,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>> *dai,
>> if (i2s->variant->has_fmt_set_lrck_period)
>> regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
>>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>> -  SUN8I_I2S_FMT0_LRCK_PERIOD(32));
>> +  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>
>> return 0;
>>  }
>> @@ -418,7 +422,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
>> *substream,
>>sr + i2s->variant->fmt_offset);
>>
>> return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>> - params_width(params));
>> + i2s->tdm_slots ?
>> + i2s->slot_width : 
>> params_width(params));
>>  }
>>
>>  static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>> @@ -691,6 +696,19 @@ static int sun4i_i2s_set_sysclk(struct snd_soc_dai 
>> *dai, int clk_id,
>> return 0;
>>  }
>>
>> +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai,
>> +   unsigned int tx_mask, unsigned int rx_mask,
>> +   int slots, int width)
>> +{
>> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>> +
>> +   i2s->tdm_slots = slots;
>> +
>> +   i2s->slot_width = width;
>> +
>> +   return 0;
>> +}
>> +
>
> IIRC some of the DAI controllers actually support TDM. Would this
> change conflict with that in the future?

Hi Wens,
I'm not sure..I was looking for a clean example of being able to
override the number of bclks in the lrclk width and some other
devices(Rpi) were doing it this way.  I open to suggestions,
BR,
CK
>
> Thanks
> ChenYu
>
>>  static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>> .hw_params  = sun4i_i2s_hw_params,
>> .set_fmt= sun4i_i2s_set_fmt,
>> @@ -698,6 +716,7 @@ static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
>> .shutdown   = sun4i_i2s_shutdown,
>> .startup= sun4i_i2s_startup,
>> .trigger= sun4i_i2s_trigger,
>> +   .set_tdm_slot   = sun4i_i2s_set_dai_tdm_slot,
>>  };
>>
>>  static int sun4i_i2s_dai_probe(struct snd_soc_dai *dai)
>> --
>> 2.16.0
>>
>> --
>> You received this message because you are subscribed to the Google Groups 
>> "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an 
>> email to linux-sunxi+unsubscr...@googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On 25 January 2018 at 09:41, Maxime Ripard
 wrote:
> Hi,
>
> On Wed, Jan 24, 2018 at 03:11:01PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> On the newer SoCs this is set by default to transfer a 0 after
>> each sample in each slot. Add the regmap field to configure this
>> and set it so that it pads the sample with 0s.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 15 +++
>>  1 file changed, 15 insertions(+)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 626679057d0f..9fda1240b717 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -139,6 +139,7 @@
>>   * @field_fmt_bclk: regmap field to set clk polarity.
>>   * @field_fmt_lrclk: regmap field to set frame polarity.
>>   * @field_fmt_mode: regmap field to set the operational mode.
>> + * @field_fmt_sext: regmap field to set the sign extension.
>>   * @field_txchanmap: location of the tx channel mapping register.
>>   * @field_rxchanmap: location of the rx channel mapping register.
>>   * @field_txchansel: location of the tx channel select bit fields.
>> @@ -164,6 +165,7 @@ struct sun4i_i2s_quirks {
>>   struct reg_fieldfield_fmt_bclk;
>>   struct reg_fieldfield_fmt_lrclk;
>>   struct reg_fieldfield_fmt_mode;
>> + struct reg_fieldfield_fmt_sext;
>>   struct reg_fieldfield_txchanmap;
>>   struct reg_fieldfield_rxchanmap;
>>   struct reg_fieldfield_txchansel;
>> @@ -188,6 +190,7 @@ struct sun4i_i2s {
>>   struct regmap_field *field_fmt_bclk;
>>   struct regmap_field *field_fmt_lrclk;
>>   struct regmap_field *field_fmt_mode;
>> + struct regmap_field *field_fmt_sext;
>>   struct regmap_field *field_txchanmap;
>>   struct regmap_field *field_rxchanmap;
>>   struct regmap_field *field_txchansel;
>> @@ -358,6 +361,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>> *dai,
>>  SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>>  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>
>> + /* Set sign extension to pad out LSB with 0 */
>> + regmap_field_write(i2s->field_fmt_sext, 0);
>> +
>
> Your commit log seems to suggest that it's only relevant for the newer
> SoCs (which ones?), yet you enable it for all the supported
> ones. Either the code or the commit log should be adjusted to be
> consistent with the other.
ACK
Thanks,
CK
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On 25 January 2018 at 09:41, Maxime Ripard
 wrote:
> Hi,
>
> On Wed, Jan 24, 2018 at 03:11:01PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> On the newer SoCs this is set by default to transfer a 0 after
>> each sample in each slot. Add the regmap field to configure this
>> and set it so that it pads the sample with 0s.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 15 +++
>>  1 file changed, 15 insertions(+)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 626679057d0f..9fda1240b717 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -139,6 +139,7 @@
>>   * @field_fmt_bclk: regmap field to set clk polarity.
>>   * @field_fmt_lrclk: regmap field to set frame polarity.
>>   * @field_fmt_mode: regmap field to set the operational mode.
>> + * @field_fmt_sext: regmap field to set the sign extension.
>>   * @field_txchanmap: location of the tx channel mapping register.
>>   * @field_rxchanmap: location of the rx channel mapping register.
>>   * @field_txchansel: location of the tx channel select bit fields.
>> @@ -164,6 +165,7 @@ struct sun4i_i2s_quirks {
>>   struct reg_fieldfield_fmt_bclk;
>>   struct reg_fieldfield_fmt_lrclk;
>>   struct reg_fieldfield_fmt_mode;
>> + struct reg_fieldfield_fmt_sext;
>>   struct reg_fieldfield_txchanmap;
>>   struct reg_fieldfield_rxchanmap;
>>   struct reg_fieldfield_txchansel;
>> @@ -188,6 +190,7 @@ struct sun4i_i2s {
>>   struct regmap_field *field_fmt_bclk;
>>   struct regmap_field *field_fmt_lrclk;
>>   struct regmap_field *field_fmt_mode;
>> + struct regmap_field *field_fmt_sext;
>>   struct regmap_field *field_txchanmap;
>>   struct regmap_field *field_rxchanmap;
>>   struct regmap_field *field_txchansel;
>> @@ -358,6 +361,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai 
>> *dai,
>>  SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>>  SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>>
>> + /* Set sign extension to pad out LSB with 0 */
>> + regmap_field_write(i2s->field_fmt_sext, 0);
>> +
>
> Your commit log seems to suggest that it's only relevant for the newer
> SoCs (which ones?), yet you enable it for all the supported
> ones. Either the code or the commit log should be adjusted to be
> consistent with the other.
ACK
Thanks,
CK
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On 24 January 2018 at 15:11,   wrote:
> From: Marcus Cooper 
>
> On the newer SoCs this is set by default to transfer a 0 after
> each sample in each slot. Add the regmap field to configure this
> and set it so that it pads the sample with 0s.
>
> Signed-off-by: Marcus Cooper 
NACK missing regmap field from A83t.
CK
> ---
>  sound/soc/sunxi/sun4i-i2s.c | 15 +++
>  1 file changed, 15 insertions(+)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 626679057d0f..9fda1240b717 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -139,6 +139,7 @@
>   * @field_fmt_bclk: regmap field to set clk polarity.
>   * @field_fmt_lrclk: regmap field to set frame polarity.
>   * @field_fmt_mode: regmap field to set the operational mode.
> + * @field_fmt_sext: regmap field to set the sign extension.
>   * @field_txchanmap: location of the tx channel mapping register.
>   * @field_rxchanmap: location of the rx channel mapping register.
>   * @field_txchansel: location of the tx channel select bit fields.
> @@ -164,6 +165,7 @@ struct sun4i_i2s_quirks {
> struct reg_fieldfield_fmt_bclk;
> struct reg_fieldfield_fmt_lrclk;
> struct reg_fieldfield_fmt_mode;
> +   struct reg_fieldfield_fmt_sext;
> struct reg_fieldfield_txchanmap;
> struct reg_fieldfield_rxchanmap;
> struct reg_fieldfield_txchansel;
> @@ -188,6 +190,7 @@ struct sun4i_i2s {
> struct regmap_field *field_fmt_bclk;
> struct regmap_field *field_fmt_lrclk;
> struct regmap_field *field_fmt_mode;
> +   struct regmap_field *field_fmt_sext;
> struct regmap_field *field_txchanmap;
> struct regmap_field *field_rxchanmap;
> struct regmap_field *field_txchansel;
> @@ -358,6 +361,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>
> +   /* Set sign extension to pad out LSB with 0 */
> +   regmap_field_write(i2s->field_fmt_sext, 0);
> +
> return 0;
>  }
>
> @@ -929,6 +935,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks 
> = {
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit   = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -946,6 +953,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks 
> = {
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit   = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -986,6 +994,7 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks 
> = {
> .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19),
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5),
> .field_txchanmap= REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -1031,6 +1040,12 @@ static int sun4i_i2s_init_regmap_fields(struct device 
> *dev,
> if (IS_ERR(i2s->field_fmt_mode))
> return PTR_ERR(i2s->field_fmt_mode);
>
> +   i2s->field_fmt_sext =
> +   devm_regmap_field_alloc(dev, i2s->regmap,
> +   i2s->variant->field_fmt_sext);
> +   if (IS_ERR(i2s->field_fmt_sext))
> +   return PTR_ERR(i2s->field_fmt_sext);
> +
> i2s->field_txchanmap =
> devm_regmap_field_alloc(dev, i2s->regmap,
> 
> i2s->variant->field_txchanmap);
> --
> 2.16.0
>

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample

[Code Kipper]

On 24 January 2018 at 15:11,   wrote:
> From: Marcus Cooper 
>
> On the newer SoCs this is set by default to transfer a 0 after
> each sample in each slot. Add the regmap field to configure this
> and set it so that it pads the sample with 0s.
>
> Signed-off-by: Marcus Cooper 
NACK missing regmap field from A83t.
CK
> ---
>  sound/soc/sunxi/sun4i-i2s.c | 15 +++
>  1 file changed, 15 insertions(+)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 626679057d0f..9fda1240b717 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -139,6 +139,7 @@
>   * @field_fmt_bclk: regmap field to set clk polarity.
>   * @field_fmt_lrclk: regmap field to set frame polarity.
>   * @field_fmt_mode: regmap field to set the operational mode.
> + * @field_fmt_sext: regmap field to set the sign extension.
>   * @field_txchanmap: location of the tx channel mapping register.
>   * @field_rxchanmap: location of the rx channel mapping register.
>   * @field_txchansel: location of the tx channel select bit fields.
> @@ -164,6 +165,7 @@ struct sun4i_i2s_quirks {
> struct reg_fieldfield_fmt_bclk;
> struct reg_fieldfield_fmt_lrclk;
> struct reg_fieldfield_fmt_mode;
> +   struct reg_fieldfield_fmt_sext;
> struct reg_fieldfield_txchanmap;
> struct reg_fieldfield_rxchanmap;
> struct reg_fieldfield_txchansel;
> @@ -188,6 +190,7 @@ struct sun4i_i2s {
> struct regmap_field *field_fmt_bclk;
> struct regmap_field *field_fmt_lrclk;
> struct regmap_field *field_fmt_mode;
> +   struct regmap_field *field_fmt_sext;
> struct regmap_field *field_txchanmap;
> struct regmap_field *field_rxchanmap;
> struct regmap_field *field_txchansel;
> @@ -358,6 +361,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
>SUN8I_I2S_FMT0_LRCK_PERIOD_MASK,
>SUN8I_I2S_FMT0_LRCK_PERIOD(word_size));
>
> +   /* Set sign extension to pad out LSB with 0 */
> +   regmap_field_write(i2s->field_fmt_sext, 0);
> +
> return 0;
>  }
>
> @@ -929,6 +935,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks 
> = {
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit   = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -946,6 +953,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks 
> = {
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .has_slave_select_bit   = true,
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8),
> .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -986,6 +994,7 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks 
> = {
> .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
> .field_fmt_lrclk= REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19),
> .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5),
> +   .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5),
> .field_txchanmap= REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31),
> .field_rxchanmap= REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31),
> .field_txchansel= REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2),
> @@ -1031,6 +1040,12 @@ static int sun4i_i2s_init_regmap_fields(struct device 
> *dev,
> if (IS_ERR(i2s->field_fmt_mode))
> return PTR_ERR(i2s->field_fmt_mode);
>
> +   i2s->field_fmt_sext =
> +   devm_regmap_field_alloc(dev, i2s->regmap,
> +   i2s->variant->field_fmt_sext);
> +   if (IS_ERR(i2s->field_fmt_sext))
> +   return PTR_ERR(i2s->field_fmt_sext);
> +
> i2s->field_txchanmap =
> devm_regmap_field_alloc(dev, i2s->regmap,
> 
> i2s->variant->field_txchanmap);
> --
> 2.16.0
>

Re: [PATCH] ASoC: sun4i-i2s: Show detailed error when DAI configuration callbacks fail

[Code Kipper]

On 14 December 2017 at 08:29, Chen-Yu Tsai  wrote:
> When any of the DAI hardware configuration callbacks (.hw_param,
> .set_fmt, .set_sysclk) fails, there is no explanation about why it
> failed. This is particularly confusing for .hw_param, which covers
> many parameters of the DAI. Telling the users what parameter isn't
> supported, and what the requested value was goes a long way for
> developers trying to combine sun4i-i2s with external codecs.
>
> This patch adds dev_err calls explaining what isn't supported or
> failed, and what the value was. sun4i_i2s_set_clk_rate()'s first
> parameter was changed to a struct snd_soc_dai *dai, so we can
> get the underlying device.
>
> Signed-off-by: Chen-Yu Tsai 

Acked-by: Marcus Cooper 

Thanks...I can get rid of shit loads of my debugging now.

> ---
>  sound/soc/sunxi/sun4i-i2s.c | 36 ++--
>  1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 13d7ecabe1b6..dca1143c1150 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -269,10 +269,11 @@ static bool sun4i_i2s_oversample_is_valid(unsigned int 
> oversample)
> return false;
>  }
>
> -static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> +static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
>   unsigned int rate,
>   unsigned int word_size)
>  {
> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> unsigned int oversample_rate, clk_rate;
> int bclk_div, mclk_div;
> int ret;
> @@ -300,6 +301,7 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> break;
>
> default:
> +   dev_err(dai->dev, "Unsupported sample rate: %u\n", rate);
> return -EINVAL;
> }
>
> @@ -308,18 +310,25 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> return ret;
>
> oversample_rate = i2s->mclk_freq / rate;
> -   if (!sun4i_i2s_oversample_is_valid(oversample_rate))
> +   if (!sun4i_i2s_oversample_is_valid(oversample_rate)) {
> +   dev_err(dai->dev, "Unsupported oversample rate: %d\n",
> +   oversample_rate);
> return -EINVAL;
> +   }
>
> bclk_div = sun4i_i2s_get_bclk_div(i2s, oversample_rate,
>   word_size);
> -   if (bclk_div < 0)
> +   if (bclk_div < 0) {
> +   dev_err(dai->dev, "Unsupported BCLK divider: %d\n", bclk_div);
> return -EINVAL;
> +   }
>
> mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate,
>   clk_rate, rate);
> -   if (mclk_div < 0)
> +   if (mclk_div < 0) {
> +   dev_err(dai->dev, "Unsupported MCLK divider: %d\n", mclk_div);
> return -EINVAL;
> +   }
>
> /* Adjust the clock division values if needed */
> bclk_div += i2s->variant->bclk_offset;
> @@ -349,8 +358,11 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> u32 width;
>
> channels = params_channels(params);
> -   if (channels != 2)
> +   if (channels != 2) {
> +   dev_err(dai->dev, "Unsupported number of channels: %d\n",
> +   channels);
> return -EINVAL;
> +   }
>
> if (i2s->variant->has_chcfg) {
> regmap_update_bits(i2s->regmap, SUN8I_I2S_CHAN_CFG_REG,
> @@ -382,6 +394,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> break;
> default:
> +   dev_err(dai->dev, "Unsupported physical sample width: %d\n",
> +   params_physical_width(params));
> return -EINVAL;
> }
> i2s->playback_dma_data.addr_width = width;
> @@ -393,6 +407,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> break;
>
> default:
> +   dev_err(dai->dev, "Unsupported sample width: %d\n",
> +   params_width(params));
> return -EINVAL;
> }
>
> @@ -401,7 +417,7 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> regmap_field_write(i2s->field_fmt_sr,
>sr + i2s->variant->fmt_offset);
>
> -   return sun4i_i2s_set_clk_rate(i2s, params_rate(params),
> +   return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>   params_width(params));
>  }
>
> @@ -426,6 +442,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, 
> unsigned int fmt)
> val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
> break;
> default:
> +   

Re: [PATCH] ASoC: sun4i-i2s: Show detailed error when DAI configuration callbacks fail

[Code Kipper]

On 14 December 2017 at 08:29, Chen-Yu Tsai  wrote:
> When any of the DAI hardware configuration callbacks (.hw_param,
> .set_fmt, .set_sysclk) fails, there is no explanation about why it
> failed. This is particularly confusing for .hw_param, which covers
> many parameters of the DAI. Telling the users what parameter isn't
> supported, and what the requested value was goes a long way for
> developers trying to combine sun4i-i2s with external codecs.
>
> This patch adds dev_err calls explaining what isn't supported or
> failed, and what the value was. sun4i_i2s_set_clk_rate()'s first
> parameter was changed to a struct snd_soc_dai *dai, so we can
> get the underlying device.
>
> Signed-off-by: Chen-Yu Tsai 

Acked-by: Marcus Cooper 

Thanks...I can get rid of shit loads of my debugging now.

> ---
>  sound/soc/sunxi/sun4i-i2s.c | 36 ++--
>  1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 13d7ecabe1b6..dca1143c1150 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -269,10 +269,11 @@ static bool sun4i_i2s_oversample_is_valid(unsigned int 
> oversample)
> return false;
>  }
>
> -static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> +static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
>   unsigned int rate,
>   unsigned int word_size)
>  {
> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> unsigned int oversample_rate, clk_rate;
> int bclk_div, mclk_div;
> int ret;
> @@ -300,6 +301,7 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> break;
>
> default:
> +   dev_err(dai->dev, "Unsupported sample rate: %u\n", rate);
> return -EINVAL;
> }
>
> @@ -308,18 +310,25 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
> return ret;
>
> oversample_rate = i2s->mclk_freq / rate;
> -   if (!sun4i_i2s_oversample_is_valid(oversample_rate))
> +   if (!sun4i_i2s_oversample_is_valid(oversample_rate)) {
> +   dev_err(dai->dev, "Unsupported oversample rate: %d\n",
> +   oversample_rate);
> return -EINVAL;
> +   }
>
> bclk_div = sun4i_i2s_get_bclk_div(i2s, oversample_rate,
>   word_size);
> -   if (bclk_div < 0)
> +   if (bclk_div < 0) {
> +   dev_err(dai->dev, "Unsupported BCLK divider: %d\n", bclk_div);
> return -EINVAL;
> +   }
>
> mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate,
>   clk_rate, rate);
> -   if (mclk_div < 0)
> +   if (mclk_div < 0) {
> +   dev_err(dai->dev, "Unsupported MCLK divider: %d\n", mclk_div);
> return -EINVAL;
> +   }
>
> /* Adjust the clock division values if needed */
> bclk_div += i2s->variant->bclk_offset;
> @@ -349,8 +358,11 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> u32 width;
>
> channels = params_channels(params);
> -   if (channels != 2)
> +   if (channels != 2) {
> +   dev_err(dai->dev, "Unsupported number of channels: %d\n",
> +   channels);
> return -EINVAL;
> +   }
>
> if (i2s->variant->has_chcfg) {
> regmap_update_bits(i2s->regmap, SUN8I_I2S_CHAN_CFG_REG,
> @@ -382,6 +394,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> break;
> default:
> +   dev_err(dai->dev, "Unsupported physical sample width: %d\n",
> +   params_physical_width(params));
> return -EINVAL;
> }
> i2s->playback_dma_data.addr_width = width;
> @@ -393,6 +407,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> break;
>
> default:
> +   dev_err(dai->dev, "Unsupported sample width: %d\n",
> +   params_width(params));
> return -EINVAL;
> }
>
> @@ -401,7 +417,7 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
> *substream,
> regmap_field_write(i2s->field_fmt_sr,
>sr + i2s->variant->fmt_offset);
>
> -   return sun4i_i2s_set_clk_rate(i2s, params_rate(params),
> +   return sun4i_i2s_set_clk_rate(dai, params_rate(params),
>   params_width(params));
>  }
>
> @@ -426,6 +442,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, 
> unsigned int fmt)
> val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
> break;
> default:
> +   dev_err(dai->dev, "Unsupported format: %d\n",
> +

Re: [linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

[Code Kipper]

On 31 August 2017 at 16:52, Maxime Ripard
 wrote:
> On Thu, Aug 31, 2017 at 01:36:09AM +0200, Stefan Brüns wrote:
>> The A64 SoC has the same dma engine as the H3 (sun8i), with a
>> reduced amount of physical channels. Add the proper config data
>> and compatible string to support it.
>>
>> Signed-off-by: Stefan Brüns 
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 
>>  drivers/dma/sun6i-dma.c   | 7 +++
>>  2 files changed, 11 insertions(+)
>
> With what device did you test this? As far as I know, the SPI driver
> doesn't use DMA at all.
>
Hi Maxime,
I've tested this on spdif and i2s on the Pine64.
BR,
CK
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

[Code Kipper]

On 31 August 2017 at 16:52, Maxime Ripard
 wrote:
> On Thu, Aug 31, 2017 at 01:36:09AM +0200, Stefan Brüns wrote:
>> The A64 SoC has the same dma engine as the H3 (sun8i), with a
>> reduced amount of physical channels. Add the proper config data
>> and compatible string to support it.
>>
>> Signed-off-by: Stefan Brüns 
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 
>>  drivers/dma/sun6i-dma.c   | 7 +++
>>  2 files changed, 11 insertions(+)
>
> With what device did you test this? As far as I know, the SPI driver
> doesn't use DMA at all.
>
Hi Maxime,
I've tested this on spdif and i2s on the Pine64.
BR,
CK
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH v5 0/8] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

On 31 August 2017 at 13:50, Code Kipper <codekip...@gmail.com> wrote:
> Hi Mark,
>
> Wens has given this patch series his blessing so it's good to go.
>
> Let us know if you need me to resubmit,
I take that back as I can see that's all been submitted.
Thanks,
CK

>
> BR,
> CK
> On 19 August 2017 at 14:48,  <codekip...@gmail.com> wrote:
>> From: Marcus Cooper <codekip...@gmail.com>
>>
>> Hi All,
>> please find attached a series of patches to bring i2s support to the
>> Allwinner H3 SoC. This has been tested with the following setups:
>>
>> A20 Olimex EVB connected to a pcm5102
>> Orange Pi 2 connected to a uda1380
>> Orange Pi 2 hdmi audio playback
>> Pine 64 connected to the audio DAC board
>>
>> To get i2s working some additional patches are required which will be
>> delivered later. For now they have been pushed here
>>
>> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>>
>> I don't own a A33 device which uses the i2s block for the audio codec
>> so if someone could test against that it would be much appreciated.
>>
>> I'm also wondering if there is a preferred way of setting the lrclk
>> size in the dts?..currently it is set to the sample width but for example
>> the pcm5102a wants it to be 32 bits whatever the sample rate.
>>
>> Thanks in advance,
>> CK
>>
>> ---
>>
>> v5 changes compared to v4 are:
>> - fixed bad logic in fmt0 set LRCK period define.
>> - fixed PTR_ERR checks in init of regmap fields
>> - added reviewed-by to commit messages
>> - removed delivered patches
>>
>> v4 changes compared to v3 are:
>> - moved clkdiv variant adjustment out of function
>> - used PTR_ERR_OR_ZERO for checks
>> - tidy up of extra lines and lines over 80 chars.
>> - reduced names of polarity, wss and sr reg fields.
>> - added reviewed-by to commit messages
>> - added comments for functionality that hasn't been implemented yet.
>> - removed delivered patches
>>
>> v3 changes compared to v2 are:
>> - initial changes to prepare driver for newer SoCs has been broken down
>>   into smaller patches
>> - reduce use of regmap fields to where just needed.
>> - clkdiv expansion will be delivered later.
>> - defines for H3 variant segregated.
>> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>>
>> v2 changes compared to v1 are:
>>  - massive refactoring to remove duplicate code making use of regmap_fields.
>>  - extending the clock divisors.
>>  - removed code that should be delivered when we support 20/24bits
>>
>> ---
>>
>> Marcus Cooper (8):
>>   ASoC: sun4i-i2s: Add regmap fields for channels
>>   ASoC: sun4i-i2s: Add regfields for word size select and sample
>> resolution
>>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>>   ASoC: sun4i-i2s: Add mclk enable regmap field
>>   ASoC: sun4i-i2s: Add regmap field to set DAI format
>>   ASoC: sun4i-i2s: Check for slave select bit
>>   ASoC: sun4i-i2s: Update global enable with bitmask
>>   ASoC: sun4i-i2s: Add support for H3
>>
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 406 
>> ++---
>>  2 files changed, 357 insertions(+), 51 deletions(-)
>>
>> --
>> 2.14.1
>>

Re: [PATCH v5 0/8] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

On 31 August 2017 at 13:50, Code Kipper  wrote:
> Hi Mark,
>
> Wens has given this patch series his blessing so it's good to go.
>
> Let us know if you need me to resubmit,
I take that back as I can see that's all been submitted.
Thanks,
CK

>
> BR,
> CK
> On 19 August 2017 at 14:48,   wrote:
>> From: Marcus Cooper 
>>
>> Hi All,
>> please find attached a series of patches to bring i2s support to the
>> Allwinner H3 SoC. This has been tested with the following setups:
>>
>> A20 Olimex EVB connected to a pcm5102
>> Orange Pi 2 connected to a uda1380
>> Orange Pi 2 hdmi audio playback
>> Pine 64 connected to the audio DAC board
>>
>> To get i2s working some additional patches are required which will be
>> delivered later. For now they have been pushed here
>>
>> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>>
>> I don't own a A33 device which uses the i2s block for the audio codec
>> so if someone could test against that it would be much appreciated.
>>
>> I'm also wondering if there is a preferred way of setting the lrclk
>> size in the dts?..currently it is set to the sample width but for example
>> the pcm5102a wants it to be 32 bits whatever the sample rate.
>>
>> Thanks in advance,
>> CK
>>
>> ---
>>
>> v5 changes compared to v4 are:
>> - fixed bad logic in fmt0 set LRCK period define.
>> - fixed PTR_ERR checks in init of regmap fields
>> - added reviewed-by to commit messages
>> - removed delivered patches
>>
>> v4 changes compared to v3 are:
>> - moved clkdiv variant adjustment out of function
>> - used PTR_ERR_OR_ZERO for checks
>> - tidy up of extra lines and lines over 80 chars.
>> - reduced names of polarity, wss and sr reg fields.
>> - added reviewed-by to commit messages
>> - added comments for functionality that hasn't been implemented yet.
>> - removed delivered patches
>>
>> v3 changes compared to v2 are:
>> - initial changes to prepare driver for newer SoCs has been broken down
>>   into smaller patches
>> - reduce use of regmap fields to where just needed.
>> - clkdiv expansion will be delivered later.
>> - defines for H3 variant segregated.
>> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>>
>> v2 changes compared to v1 are:
>>  - massive refactoring to remove duplicate code making use of regmap_fields.
>>  - extending the clock divisors.
>>  - removed code that should be delivered when we support 20/24bits
>>
>> ---
>>
>> Marcus Cooper (8):
>>   ASoC: sun4i-i2s: Add regmap fields for channels
>>   ASoC: sun4i-i2s: Add regfields for word size select and sample
>> resolution
>>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>>   ASoC: sun4i-i2s: Add mclk enable regmap field
>>   ASoC: sun4i-i2s: Add regmap field to set DAI format
>>   ASoC: sun4i-i2s: Check for slave select bit
>>   ASoC: sun4i-i2s: Update global enable with bitmask
>>   ASoC: sun4i-i2s: Add support for H3
>>
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 406 
>> ++---
>>  2 files changed, 357 insertions(+), 51 deletions(-)
>>
>> --
>> 2.14.1
>>

Re: [PATCH v5 0/8] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

Hi Mark,

Wens has given this patch series his blessing so it's good to go.

Let us know if you need me to resubmit,

BR,
CK
On 19 August 2017 at 14:48,   wrote:
> From: Marcus Cooper 
>
> Hi All,
> please find attached a series of patches to bring i2s support to the
> Allwinner H3 SoC. This has been tested with the following setups:
>
> A20 Olimex EVB connected to a pcm5102
> Orange Pi 2 connected to a uda1380
> Orange Pi 2 hdmi audio playback
> Pine 64 connected to the audio DAC board
>
> To get i2s working some additional patches are required which will be
> delivered later. For now they have been pushed here
>
> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>
> I don't own a A33 device which uses the i2s block for the audio codec
> so if someone could test against that it would be much appreciated.
>
> I'm also wondering if there is a preferred way of setting the lrclk
> size in the dts?..currently it is set to the sample width but for example
> the pcm5102a wants it to be 32 bits whatever the sample rate.
>
> Thanks in advance,
> CK
>
> ---
>
> v5 changes compared to v4 are:
> - fixed bad logic in fmt0 set LRCK period define.
> - fixed PTR_ERR checks in init of regmap fields
> - added reviewed-by to commit messages
> - removed delivered patches
>
> v4 changes compared to v3 are:
> - moved clkdiv variant adjustment out of function
> - used PTR_ERR_OR_ZERO for checks
> - tidy up of extra lines and lines over 80 chars.
> - reduced names of polarity, wss and sr reg fields.
> - added reviewed-by to commit messages
> - added comments for functionality that hasn't been implemented yet.
> - removed delivered patches
>
> v3 changes compared to v2 are:
> - initial changes to prepare driver for newer SoCs has been broken down
>   into smaller patches
> - reduce use of regmap fields to where just needed.
> - clkdiv expansion will be delivered later.
> - defines for H3 variant segregated.
> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>
> v2 changes compared to v1 are:
>  - massive refactoring to remove duplicate code making use of regmap_fields.
>  - extending the clock divisors.
>  - removed code that should be delivered when we support 20/24bits
>
> ---
>
> Marcus Cooper (8):
>   ASoC: sun4i-i2s: Add regmap fields for channels
>   ASoC: sun4i-i2s: Add regfields for word size select and sample
> resolution
>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>   ASoC: sun4i-i2s: Add mclk enable regmap field
>   ASoC: sun4i-i2s: Add regmap field to set DAI format
>   ASoC: sun4i-i2s: Check for slave select bit
>   ASoC: sun4i-i2s: Update global enable with bitmask
>   ASoC: sun4i-i2s: Add support for H3
>
>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>  sound/soc/sunxi/sun4i-i2s.c| 406 
> ++---
>  2 files changed, 357 insertions(+), 51 deletions(-)
>
> --
> 2.14.1
>

Re: [PATCH v5 0/8] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

Hi Mark,

Wens has given this patch series his blessing so it's good to go.

Let us know if you need me to resubmit,

BR,
CK
On 19 August 2017 at 14:48,   wrote:
> From: Marcus Cooper 
>
> Hi All,
> please find attached a series of patches to bring i2s support to the
> Allwinner H3 SoC. This has been tested with the following setups:
>
> A20 Olimex EVB connected to a pcm5102
> Orange Pi 2 connected to a uda1380
> Orange Pi 2 hdmi audio playback
> Pine 64 connected to the audio DAC board
>
> To get i2s working some additional patches are required which will be
> delivered later. For now they have been pushed here
>
> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>
> I don't own a A33 device which uses the i2s block for the audio codec
> so if someone could test against that it would be much appreciated.
>
> I'm also wondering if there is a preferred way of setting the lrclk
> size in the dts?..currently it is set to the sample width but for example
> the pcm5102a wants it to be 32 bits whatever the sample rate.
>
> Thanks in advance,
> CK
>
> ---
>
> v5 changes compared to v4 are:
> - fixed bad logic in fmt0 set LRCK period define.
> - fixed PTR_ERR checks in init of regmap fields
> - added reviewed-by to commit messages
> - removed delivered patches
>
> v4 changes compared to v3 are:
> - moved clkdiv variant adjustment out of function
> - used PTR_ERR_OR_ZERO for checks
> - tidy up of extra lines and lines over 80 chars.
> - reduced names of polarity, wss and sr reg fields.
> - added reviewed-by to commit messages
> - added comments for functionality that hasn't been implemented yet.
> - removed delivered patches
>
> v3 changes compared to v2 are:
> - initial changes to prepare driver for newer SoCs has been broken down
>   into smaller patches
> - reduce use of regmap fields to where just needed.
> - clkdiv expansion will be delivered later.
> - defines for H3 variant segregated.
> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>
> v2 changes compared to v1 are:
>  - massive refactoring to remove duplicate code making use of regmap_fields.
>  - extending the clock divisors.
>  - removed code that should be delivered when we support 20/24bits
>
> ---
>
> Marcus Cooper (8):
>   ASoC: sun4i-i2s: Add regmap fields for channels
>   ASoC: sun4i-i2s: Add regfields for word size select and sample
> resolution
>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>   ASoC: sun4i-i2s: Add mclk enable regmap field
>   ASoC: sun4i-i2s: Add regmap field to set DAI format
>   ASoC: sun4i-i2s: Check for slave select bit
>   ASoC: sun4i-i2s: Update global enable with bitmask
>   ASoC: sun4i-i2s: Add support for H3
>
>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>  sound/soc/sunxi/sun4i-i2s.c| 406 
> ++---
>  2 files changed, 357 insertions(+), 51 deletions(-)
>
> --
> 2.14.1
>

Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

[Code Kipper]

On 31 August 2017 at 01:36, Stefan Brüns  wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. Add the proper config data
> and compatible string to support it.
>
> Signed-off-by: Stefan Brüns 
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 
>  drivers/dma/sun6i-dma.c   | 7 +++
>  2 files changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index f96287d3043a..b86019238b77 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -494,6 +494,8 @@
> interrupts = ;
> clocks = < CLK_BUS_SPI0>, < CLK_SPI0>;
> clock-names = "ahb", "mod";
> +   dmas = < 23>, < 23>;
> +   dma-names = "rx", "tx";
Hi Stefan,
the dtsi parts should be in a separate patch

> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> resets = < RST_BUS_SPI0>;
> @@ -509,6 +511,8 @@
> interrupts = ;
> clocks = < CLK_BUS_SPI1>, < CLK_SPI1>;
> clock-names = "ahb", "mod";
> +   dmas = < 24>, < 24>;
> +   dma-names = "rx", "tx";
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> resets = < RST_BUS_SPI1>;
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index 5f4eee4513e5..6a17c5d63582 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
> .nr_max_vchans   = 34,
> .dmac_variant= DMAC_VARIANT_H3,
>  };
> +
> +static struct sun6i_dma_config sun50i_a64_dma_cfg = {
> +   .nr_max_channels = 8,
> +   .nr_max_requests = 27,
> +   .nr_max_vchans   = 38,
> +   .dmac_variant= DMAC_VARIANT_H3,
>  };
>
>  static const struct of_device_id sun6i_dma_match[] = {
> @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = {
> { .compatible = "allwinner,sun8i-a23-dma", .data = _a23_dma_cfg 
> },
> { .compatible = "allwinner,sun8i-a83t-dma", .data = 
> _a83t_dma_cfg },
> { .compatible = "allwinner,sun8i-h3-dma", .data = _h3_dma_cfg },
> +   { .compatible = "allwinner,sun50i-a64-dma", .data = 
> _a64_dma_cfg },
This all looks fine...it's similar to my patch here
https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80
which I've been too lazy to post. I think the binding documentation
should go with this patch and this should also be the 1st patch in the
series, followed by the dtsi changes.
BR,
CK
> { /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> --
> 2.14.1
>

Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64

[Code Kipper]

On 31 August 2017 at 01:36, Stefan Brüns  wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. Add the proper config data
> and compatible string to support it.
>
> Signed-off-by: Stefan Brüns 
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 
>  drivers/dma/sun6i-dma.c   | 7 +++
>  2 files changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index f96287d3043a..b86019238b77 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -494,6 +494,8 @@
> interrupts = ;
> clocks = < CLK_BUS_SPI0>, < CLK_SPI0>;
> clock-names = "ahb", "mod";
> +   dmas = < 23>, < 23>;
> +   dma-names = "rx", "tx";
Hi Stefan,
the dtsi parts should be in a separate patch

> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> resets = < RST_BUS_SPI0>;
> @@ -509,6 +511,8 @@
> interrupts = ;
> clocks = < CLK_BUS_SPI1>, < CLK_SPI1>;
> clock-names = "ahb", "mod";
> +   dmas = < 24>, < 24>;
> +   dma-names = "rx", "tx";
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> resets = < RST_BUS_SPI1>;
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index 5f4eee4513e5..6a17c5d63582 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
> .nr_max_vchans   = 34,
> .dmac_variant= DMAC_VARIANT_H3,
>  };
> +
> +static struct sun6i_dma_config sun50i_a64_dma_cfg = {
> +   .nr_max_channels = 8,
> +   .nr_max_requests = 27,
> +   .nr_max_vchans   = 38,
> +   .dmac_variant= DMAC_VARIANT_H3,
>  };
>
>  static const struct of_device_id sun6i_dma_match[] = {
> @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = {
> { .compatible = "allwinner,sun8i-a23-dma", .data = _a23_dma_cfg 
> },
> { .compatible = "allwinner,sun8i-a83t-dma", .data = 
> _a83t_dma_cfg },
> { .compatible = "allwinner,sun8i-h3-dma", .data = _h3_dma_cfg },
> +   { .compatible = "allwinner,sun50i-a64-dma", .data = 
> _a64_dma_cfg },
This all looks fine...it's similar to my patch here
https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80
which I've been too lazy to post. I think the binding documentation
should go with this patch and this should also be the 1st patch in the
series, followed by the dtsi changes.
BR,
CK
> { /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> --
> 2.14.1
>

Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2

[Code Kipper]

On 25 August 2017 at 12:32, Antony Antony  wrote:
> Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
>
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
>
> Signed-off-by: Antony Antony 
> ---
>  arch/arm64/boot/dts/allwinner/Makefile |   1 +
>  .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts   | 341 
> +
>  2 files changed, 342 insertions(+)
>  create mode 100644 
> arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile 
> b/arch/arm64/boot/dts/allwinner/Makefile
> index 108f12c..e6810c8 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
>
>  always := $(dtb-y)
>  subdir-y   := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts 
> b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 000..d279ad8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,341 @@
> +/*
> + * Copyright (C) 2017 Antony Antony 
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun50i-h5.dtsi"
> +
> +#include 
> +#include 
> +#include 
> +
> +/ {
> +   model = "FriendlyARM NanoPi NEO Plus2";
> +   compatible = "friendlyarm,nanopi-neo-pus2", "allwinner,sun50i-h5";
Hi,
s/pus/plus
> +
> +   reg_vcc3v3: vcc3v3 {
> +   compatible = "regulator-fixed";
> +   regulator-name = "vcc3v3";
> +   regulator-min-microvolt = <330>;
> +   regulator-max-microvolt = <330>;
> +   };
> +
> +   aliases {
> +   ethernet0 = 
> +   serial0 = 
> +   };
> +
> +   chosen {
> +   stdout-path = "serial0:115200n8";
> +   };
> +
> +   leds {
> +   compatible = "gpio-leds";
> +
> +   pwr {
> +   label = "orangepi:green:pwr";
> +   gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>;
> +

Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2

[Code Kipper]

On 25 August 2017 at 12:32, Antony Antony  wrote:
> Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
>
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
>
> Signed-off-by: Antony Antony 
> ---
>  arch/arm64/boot/dts/allwinner/Makefile |   1 +
>  .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts   | 341 
> +
>  2 files changed, 342 insertions(+)
>  create mode 100644 
> arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile 
> b/arch/arm64/boot/dts/allwinner/Makefile
> index 108f12c..e6810c8 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
>
>  always := $(dtb-y)
>  subdir-y   := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts 
> b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 000..d279ad8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,341 @@
> +/*
> + * Copyright (C) 2017 Antony Antony 
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun50i-h5.dtsi"
> +
> +#include 
> +#include 
> +#include 
> +
> +/ {
> +   model = "FriendlyARM NanoPi NEO Plus2";
> +   compatible = "friendlyarm,nanopi-neo-pus2", "allwinner,sun50i-h5";
Hi,
s/pus/plus
> +
> +   reg_vcc3v3: vcc3v3 {
> +   compatible = "regulator-fixed";
> +   regulator-name = "vcc3v3";
> +   regulator-min-microvolt = <330>;
> +   regulator-max-microvolt = <330>;
> +   };
> +
> +   aliases {
> +   ethernet0 = 
> +   serial0 = 
> +   };
> +
> +   chosen {
> +   stdout-path = "serial0:115200n8";
> +   };
> +
> +   leds {
> +   compatible = "gpio-leds";
> +
> +   pwr {
> +   label = "orangepi:green:pwr";
> +   gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>;
> +   default-state = "on";
> +   

Re: [linux-sunxi] [PATCH v3 11/11] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 12 August 2017 at 14:27, Chen-Yu Tsai  wrote:
> On Sat, Aug 12, 2017 at 7:00 PM,   wrote:
>> From: Marcus Cooper 
>>
>> The sun8i-h3 introduces a lot of changes to the i2s block such
>> as different register locations, extended clock division and
>> more operational modes. As we have to consider the earlier
>> implementation then these changes need to be isolated.
>>
>> None of the new functionality has been implemented yet, the
>> driver has just been expanded to allow it work on the H3 SoC.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 176 
>> -
>>  2 files changed, 176 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index a6b464c8cc6c..b6faa95d972a 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -92,11 +92,41 @@
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG  0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG  0x3c
>>
>> +/* Defines required for sun8i-h3 support */
>> +#define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>> +#define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>> +
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period << 8) - 1)
>
> I'm pretty sure this should be ((period - 1) << 8).
>
> Once fixed,
>
> Reviewed-by: Chen-Yu Tsai 
>
> P.S. the version tag for this series in the subject is wrong.

Hi Wens,
thanks for the reviews..I've ack'd them all and will push again once tested.
BR,
CK

Re: [linux-sunxi] [PATCH v3 11/11] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 12 August 2017 at 14:27, Chen-Yu Tsai  wrote:
> On Sat, Aug 12, 2017 at 7:00 PM,   wrote:
>> From: Marcus Cooper 
>>
>> The sun8i-h3 introduces a lot of changes to the i2s block such
>> as different register locations, extended clock division and
>> more operational modes. As we have to consider the earlier
>> implementation then these changes need to be isolated.
>>
>> None of the new functionality has been implemented yet, the
>> driver has just been expanded to allow it work on the H3 SoC.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 176 
>> -
>>  2 files changed, 176 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index a6b464c8cc6c..b6faa95d972a 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -92,11 +92,41 @@
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG  0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG  0x3c
>>
>> +/* Defines required for sun8i-h3 support */
>> +#define SUN8I_I2S_CTRL_BCLK_OUTBIT(18)
>> +#define SUN8I_I2S_CTRL_LRCK_OUTBIT(17)
>> +
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD_MASKGENMASK(17, 8)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD(period) ((period << 8) - 1)
>
> I'm pretty sure this should be ((period - 1) << 8).
>
> Once fixed,
>
> Reviewed-by: Chen-Yu Tsai 
>
> P.S. the version tag for this series in the subject is wrong.

Hi Wens,
thanks for the reviews..I've ack'd them all and will push again once tested.
BR,
CK

Re: [linux-sunxi] [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels

[Code Kipper]

On 1 August 2017 at 10:31, Chen-Yu Tsai  wrote:
> On Sat, Jul 29, 2017 at 10:17 PM,   wrote:
>> From: Marcus Cooper 
>>
>> On the original i2s block the channel mapping and selection were
>> configured for stereo audio by default: This is not the case with
>> the newer SoCs and they are also located at different offsets.
>>
>> To support the newer SoC then regmap fields have been added to the
>> quirks and these are initialised to their correct settings during
>> probing.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 80 
>> -
>>  1 file changed, 72 insertions(+), 8 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 2a25df22c2f8..120f797a38e8 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -82,7 +82,7 @@
>>  #define SUN4I_I2S_TX_CNT_REG   0x2c
>>
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG  0x30
>> -#define SUN4I_I2S_TX_CHAN_SEL(num_chan)(((num_chan) - 1) << 
>> 0)
>> +#define SUN4I_I2S_CHAN_SEL(num_chan)   (((num_chan) - 1) << 0)
>>
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG  0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)((sample) << (chan << 2))
>> @@ -98,6 +98,10 @@
>>   * @sun4i_i2s_regmap: regmap config to use.
>>   * @mclk_offset: Value by which mclkdiv needs to be adjusted.
>>   * @bclk_offset: Value by which bclkdiv needs to be adjusted.
>> + * @field_txchanmap: location of the tx channel mapping register.
>> + * @field_rxchanmap: location of the rx channel mapping register.
>> + * @field_txchansel: location of the tx channel select bit fields.
>> + * @field_rxchansel: location of the rx channel select bit fields.
>>   */
>>  struct sun4i_i2s_quirks {
>> boolhas_reset;
>> @@ -105,6 +109,12 @@ struct sun4i_i2s_quirks {
>> const struct regmap_config  *sun4i_i2s_regmap;
>> unsigned intmclk_offset;
>> unsigned intbclk_offset;
>> +
>> +   /* Register fields for i2s */
>> +   struct reg_fieldfield_txchanmap;
>> +   struct reg_fieldfield_rxchanmap;
>> +   struct reg_fieldfield_txchansel;
>> +   struct reg_fieldfield_rxchansel;
>>  };
>>
>>  struct sun4i_i2s {
>> @@ -118,6 +128,12 @@ struct sun4i_i2s {
>> struct snd_dmaengine_dai_dma_data   capture_dma_data;
>> struct snd_dmaengine_dai_dma_data   playback_dma_data;
>>
>> +   /* Register fields for i2s */
>> +   struct regmap_field *field_txchanmap;
>> +   struct regmap_field *field_rxchanmap;
>> +   struct regmap_field *field_txchansel;
>> +   struct regmap_field *field_rxchansel;
>> +
>> const struct sun4i_i2s_quirks   *variant;
>>  };
>>
>> @@ -264,6 +280,18 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
>> *substream,
>> if (params_channels(params) != 2)
>> return -EINVAL;
>>
>> +   /* Map the channels for playback and capture */
>> +   regmap_field_write(i2s->field_txchanmap, 0x76543210);
>> +   regmap_field_write(i2s->field_rxchanmap, 0x3210);
>> +
>> +   /* Configure the channels */
>> +   regmap_field_write(i2s->field_txchansel,
>> +  SUN4I_I2S_CHAN_SEL(params_channels(params)));
>> +
>> +   regmap_field_write(i2s->field_rxchansel,
>> +  SUN4I_I2S_CHAN_SEL(params_channels(params)));
>> +
>> +
>
> Checkpatch says don't use multiple blank lines.
>
>> switch (params_physical_width(params)) {
>> case 16:
>> width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> @@ -486,13 +514,6 @@ static int sun4i_i2s_startup(struct snd_pcm_substream 
>> *substream,
>>SUN4I_I2S_CTRL_SDO_EN_MASK,
>>SUN4I_I2S_CTRL_SDO_EN(0));
>>
>> -   /* Enable the first two channels */
>> -   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
>> -SUN4I_I2S_TX_CHAN_SEL(2));
>> -
>> -   /* Map them to the two first samples coming in */
>> -   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
>> -SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 
>> 1));
>>
>> return clk_prepare_enable(i2s->mod_clk);
>>  }
>> @@ -677,14 +698,51 @@ static const struct sun4i_i2s_quirks 
>> sun4i_a10_i2s_quirks = {
>> .has_reset  = false,
>> .reg_offset_txdata  = SUN4I_I2S_FIFO_TX_REG,
>> .sun4i_i2s_regmap   = _i2s_regmap_config,
>> +   .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 
>> 31),
>> +   .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 
>> 31),
>> +   .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
>> +  

Re: [linux-sunxi] [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels

[Code Kipper]

On 1 August 2017 at 10:31, Chen-Yu Tsai  wrote:
> On Sat, Jul 29, 2017 at 10:17 PM,   wrote:
>> From: Marcus Cooper 
>>
>> On the original i2s block the channel mapping and selection were
>> configured for stereo audio by default: This is not the case with
>> the newer SoCs and they are also located at different offsets.
>>
>> To support the newer SoC then regmap fields have been added to the
>> quirks and these are initialised to their correct settings during
>> probing.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 80 
>> -
>>  1 file changed, 72 insertions(+), 8 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 2a25df22c2f8..120f797a38e8 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -82,7 +82,7 @@
>>  #define SUN4I_I2S_TX_CNT_REG   0x2c
>>
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG  0x30
>> -#define SUN4I_I2S_TX_CHAN_SEL(num_chan)(((num_chan) - 1) << 
>> 0)
>> +#define SUN4I_I2S_CHAN_SEL(num_chan)   (((num_chan) - 1) << 0)
>>
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG  0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)((sample) << (chan << 2))
>> @@ -98,6 +98,10 @@
>>   * @sun4i_i2s_regmap: regmap config to use.
>>   * @mclk_offset: Value by which mclkdiv needs to be adjusted.
>>   * @bclk_offset: Value by which bclkdiv needs to be adjusted.
>> + * @field_txchanmap: location of the tx channel mapping register.
>> + * @field_rxchanmap: location of the rx channel mapping register.
>> + * @field_txchansel: location of the tx channel select bit fields.
>> + * @field_rxchansel: location of the rx channel select bit fields.
>>   */
>>  struct sun4i_i2s_quirks {
>> boolhas_reset;
>> @@ -105,6 +109,12 @@ struct sun4i_i2s_quirks {
>> const struct regmap_config  *sun4i_i2s_regmap;
>> unsigned intmclk_offset;
>> unsigned intbclk_offset;
>> +
>> +   /* Register fields for i2s */
>> +   struct reg_fieldfield_txchanmap;
>> +   struct reg_fieldfield_rxchanmap;
>> +   struct reg_fieldfield_txchansel;
>> +   struct reg_fieldfield_rxchansel;
>>  };
>>
>>  struct sun4i_i2s {
>> @@ -118,6 +128,12 @@ struct sun4i_i2s {
>> struct snd_dmaengine_dai_dma_data   capture_dma_data;
>> struct snd_dmaengine_dai_dma_data   playback_dma_data;
>>
>> +   /* Register fields for i2s */
>> +   struct regmap_field *field_txchanmap;
>> +   struct regmap_field *field_rxchanmap;
>> +   struct regmap_field *field_txchansel;
>> +   struct regmap_field *field_rxchansel;
>> +
>> const struct sun4i_i2s_quirks   *variant;
>>  };
>>
>> @@ -264,6 +280,18 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream 
>> *substream,
>> if (params_channels(params) != 2)
>> return -EINVAL;
>>
>> +   /* Map the channels for playback and capture */
>> +   regmap_field_write(i2s->field_txchanmap, 0x76543210);
>> +   regmap_field_write(i2s->field_rxchanmap, 0x3210);
>> +
>> +   /* Configure the channels */
>> +   regmap_field_write(i2s->field_txchansel,
>> +  SUN4I_I2S_CHAN_SEL(params_channels(params)));
>> +
>> +   regmap_field_write(i2s->field_rxchansel,
>> +  SUN4I_I2S_CHAN_SEL(params_channels(params)));
>> +
>> +
>
> Checkpatch says don't use multiple blank lines.
>
>> switch (params_physical_width(params)) {
>> case 16:
>> width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> @@ -486,13 +514,6 @@ static int sun4i_i2s_startup(struct snd_pcm_substream 
>> *substream,
>>SUN4I_I2S_CTRL_SDO_EN_MASK,
>>SUN4I_I2S_CTRL_SDO_EN(0));
>>
>> -   /* Enable the first two channels */
>> -   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
>> -SUN4I_I2S_TX_CHAN_SEL(2));
>> -
>> -   /* Map them to the two first samples coming in */
>> -   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
>> -SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 
>> 1));
>>
>> return clk_prepare_enable(i2s->mod_clk);
>>  }
>> @@ -677,14 +698,51 @@ static const struct sun4i_i2s_quirks 
>> sun4i_a10_i2s_quirks = {
>> .has_reset  = false,
>> .reg_offset_txdata  = SUN4I_I2S_FIFO_TX_REG,
>> .sun4i_i2s_regmap   = _i2s_regmap_config,
>> +   .field_txchanmap= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 
>> 31),
>> +   .field_rxchanmap= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 
>> 31),
>> +   .field_txchansel= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
>> +   .field_rxchansel= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
>>  

Re: [linux-sunxi] [PATCH v3 02/12] ASoC: sun4i-i2s: Add clkdiv offsets to quirks

[Code Kipper]

On 1 August 2017 at 04:55, Chen-Yu Tsai  wrote:
> On Sat, Jul 29, 2017 at 10:17 PM,   wrote:
>> From: Marcus Cooper 
>>
>> The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
>> Add the functionality to adjust the division values according to the
>> needs to the device being used.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 8 ++--
>>  1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index d7ee7a443e4e..1d538de4e4d0 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -94,9 +94,13 @@
>>   * struct sun4i_i2s_quirks - Differences between SoC variants.
>>   *
>>   * @has_reset: SoC needs reset deasserted.
>> + * @mclk_offset: Value by which mclkdiv needs to be adjusted.
>> + * @bclk_offset: Value by which bclkdiv needs to be adjusted.
>>   */
>>  struct sun4i_i2s_quirks {
>> boolhas_reset;
>> +   unsigned intmclk_offset;
>> +   unsigned intbclk_offset;
>>  };
>>
>>  struct sun4i_i2s {
>> @@ -149,7 +153,7 @@ static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s,
>> const struct sun4i_i2s_clk_div *bdiv = 
>> _i2s_bclk_div[i];
>>
>> if (bdiv->div == div)
>> -   return bdiv->val;
>> +   return bdiv->val + i2s->variant->bclk_offset;
>
> The offset should best be applied when the value is written to the register,
> in sun4i_i2s_set_clk_rate(). sun4i_i2s_get_*_div() should do what the name
> says, that is calculate a divider based on the parameters it is given.
>
ACK,
Thanks for the review,
CK
> Regards
> ChenYu
>
>> }
>>
>> return -EINVAL;
>> @@ -167,7 +171,7 @@ static int sun4i_i2s_get_mclk_div(struct sun4i_i2s *i2s,
>> const struct sun4i_i2s_clk_div *mdiv = 
>> _i2s_mclk_div[i];
>>
>> if (mdiv->div == div)
>> -   return mdiv->val;
>> +   return mdiv->val + i2s->variant->mclk_offset;
>> }
>>
>> return -EINVAL;
>> --
>> 2.13.3
>>
>> --
>> You received this message because you are subscribed to the Google Groups 
>> "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an 
>> email to linux-sunxi+unsubscr...@googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH v3 02/12] ASoC: sun4i-i2s: Add clkdiv offsets to quirks

[Code Kipper]

On 1 August 2017 at 04:55, Chen-Yu Tsai  wrote:
> On Sat, Jul 29, 2017 at 10:17 PM,   wrote:
>> From: Marcus Cooper 
>>
>> The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
>> Add the functionality to adjust the division values according to the
>> needs to the device being used.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 8 ++--
>>  1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index d7ee7a443e4e..1d538de4e4d0 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -94,9 +94,13 @@
>>   * struct sun4i_i2s_quirks - Differences between SoC variants.
>>   *
>>   * @has_reset: SoC needs reset deasserted.
>> + * @mclk_offset: Value by which mclkdiv needs to be adjusted.
>> + * @bclk_offset: Value by which bclkdiv needs to be adjusted.
>>   */
>>  struct sun4i_i2s_quirks {
>> boolhas_reset;
>> +   unsigned intmclk_offset;
>> +   unsigned intbclk_offset;
>>  };
>>
>>  struct sun4i_i2s {
>> @@ -149,7 +153,7 @@ static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s,
>> const struct sun4i_i2s_clk_div *bdiv = 
>> _i2s_bclk_div[i];
>>
>> if (bdiv->div == div)
>> -   return bdiv->val;
>> +   return bdiv->val + i2s->variant->bclk_offset;
>
> The offset should best be applied when the value is written to the register,
> in sun4i_i2s_set_clk_rate(). sun4i_i2s_get_*_div() should do what the name
> says, that is calculate a divider based on the parameters it is given.
>
ACK,
Thanks for the review,
CK
> Regards
> ChenYu
>
>> }
>>
>> return -EINVAL;
>> @@ -167,7 +171,7 @@ static int sun4i_i2s_get_mclk_div(struct sun4i_i2s *i2s,
>> const struct sun4i_i2s_clk_div *mdiv = 
>> _i2s_mclk_div[i];
>>
>> if (mdiv->div == div)
>> -   return mdiv->val;
>> +   return mdiv->val + i2s->variant->mclk_offset;
>> }
>>
>> return -EINVAL;
>> --
>> 2.13.3
>>
>> --
>> You received this message because you are subscribed to the Google Groups 
>> "linux-sunxi" group.
>> To unsubscribe from this group and stop receiving emails from it, send an 
>> email to linux-sunxi+unsubscr...@googlegroups.com.
>> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH v3 00/12] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

On 31 July 2017 at 09:05, Olliver Schinagl  wrote:
> Hey Marcus,
>
> On 29-07-17 16:17, codekip...@gmail.com wrote:
>>
>> From: Marcus Cooper 
>>
>> Hi All,
>> please find attached a series of patches to bring i2s support to the
>> Allwinner H3 SoC. This has been tested with the following setups:
>>
>> A20 Olimex EVB connected to a pcm5102
>
> But that's not an H3 is it? :)

Was it broken?.No...Have you fucked with it?YesIs it now
broken?...well better test!
>
>> Orange Pi 2 connected to a uda1380
>> Orange Pi 2 hdmi audio playback
>> Pine 64 connected to the audio DAC board
>>
>> To get i2s working some additional patches are required which will be
>> delivered later. For now they have been pushed here
>>
>> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>
>
> Since I want to use i2s on the A20, i'm trying out your patches. It would be
> helpfull if you could point out which patches are missing (and if the
> subject doesn't cover it why those are needed)
Mainline currently supports A20...just needs pins to be added to the
dtsi and codec specific added to the board dts. If you're having
problems check pin connections to your external board and make sure
the codec is being compiled.
Good luck,
CK
>
>
>>
>> I don't own a A33 device which uses the i2s block for the audio codec
>> so if someone could test against that it would be much appreciated.
>>
>> I'm also wondering if there is a preferred way of setting the lrclk
>> size in the dts?..currently it is set to the sample width but for example
>> the pcm5102a wants it to be 32 bits whatever the sample rate.
>>
>> Thanks in advance,
>> CK
>>
>> ---
>>
>> v3 changes compared to v2 are:
>> - initial changes to prepare driver for newer SoCs has been broken down
>>   into smaller patches
>> - reduce use of regmap fields to where just needed.
>> - clkdiv expansion will be delivered later.
>> - defines for H3 variant segregated.
>> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>>
>>
>> v2 changes compared to v1 are:
>>  - massive refactoring to remove duplicate code making use of
>> regmap_fields.
>>  - extending the clock divisors.
>>  - removed code that should be delivered when we support 20/24bits
>>
>> ---
>>
>> Marcus Cooper (12):
>>   ASoC: sun4i-i2s: Extend quirks scope
>>   ASoC: sun4i-i2s: Add clkdiv offsets to quirks
>>   ASoC: sun4i-i2s: Add regmap config to quirks
>>   ASoC: sun4i-i2s: Add TX FIFO offset to quirks
>>   ASoC: sun4i-i2s: Add regmap fields for channels
>>   ASoC: sun4i-i2s: Add changes for wss and sr
>>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>>   ASoC: sun4i-i2s: Add mclk enable regmap field
>>   ASoC: sun4i-i2s: Add regmap field to set format
>>   ASoC: sun4i-i2s: Check for slave select bit
>>   ASoC: sun4i-i2s: Update global enable with bitmask
>>   ASoC: sun4i-i2s: Add support for H3
>>
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 460
>> ++---
>>  2 files changed, 398 insertions(+), 64 deletions(-)
>>
>

Re: [linux-sunxi] [PATCH v3 00/12] ASoC: Add I2S support for Allwinner H3 SoCs

[Code Kipper]

On 31 July 2017 at 09:05, Olliver Schinagl  wrote:
> Hey Marcus,
>
> On 29-07-17 16:17, codekip...@gmail.com wrote:
>>
>> From: Marcus Cooper 
>>
>> Hi All,
>> please find attached a series of patches to bring i2s support to the
>> Allwinner H3 SoC. This has been tested with the following setups:
>>
>> A20 Olimex EVB connected to a pcm5102
>
> But that's not an H3 is it? :)

Was it broken?.No...Have you fucked with it?YesIs it now
broken?...well better test!
>
>> Orange Pi 2 connected to a uda1380
>> Orange Pi 2 hdmi audio playback
>> Pine 64 connected to the audio DAC board
>>
>> To get i2s working some additional patches are required which will be
>> delivered later. For now they have been pushed here
>>
>> https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
>
>
> Since I want to use i2s on the A20, i'm trying out your patches. It would be
> helpfull if you could point out which patches are missing (and if the
> subject doesn't cover it why those are needed)
Mainline currently supports A20...just needs pins to be added to the
dtsi and codec specific added to the board dts. If you're having
problems check pin connections to your external board and make sure
the codec is being compiled.
Good luck,
CK
>
>
>>
>> I don't own a A33 device which uses the i2s block for the audio codec
>> so if someone could test against that it would be much appreciated.
>>
>> I'm also wondering if there is a preferred way of setting the lrclk
>> size in the dts?..currently it is set to the sample width but for example
>> the pcm5102a wants it to be 32 bits whatever the sample rate.
>>
>> Thanks in advance,
>> CK
>>
>> ---
>>
>> v3 changes compared to v2 are:
>> - initial changes to prepare driver for newer SoCs has been broken down
>>   into smaller patches
>> - reduce use of regmap fields to where just needed.
>> - clkdiv expansion will be delivered later.
>> - defines for H3 variant segregated.
>> - fixed regmap config issue with SUN8I_I2S_FIFO_TX_REG.
>>
>>
>> v2 changes compared to v1 are:
>>  - massive refactoring to remove duplicate code making use of
>> regmap_fields.
>>  - extending the clock divisors.
>>  - removed code that should be delivered when we support 20/24bits
>>
>> ---
>>
>> Marcus Cooper (12):
>>   ASoC: sun4i-i2s: Extend quirks scope
>>   ASoC: sun4i-i2s: Add clkdiv offsets to quirks
>>   ASoC: sun4i-i2s: Add regmap config to quirks
>>   ASoC: sun4i-i2s: Add TX FIFO offset to quirks
>>   ASoC: sun4i-i2s: Add regmap fields for channels
>>   ASoC: sun4i-i2s: Add changes for wss and sr
>>   ASoC: sun4i-i2s: bclk and lrclk polarity tidyup
>>   ASoC: sun4i-i2s: Add mclk enable regmap field
>>   ASoC: sun4i-i2s: Add regmap field to set format
>>   ASoC: sun4i-i2s: Check for slave select bit
>>   ASoC: sun4i-i2s: Update global enable with bitmask
>>   ASoC: sun4i-i2s: Add support for H3
>>
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 460
>> ++---
>>  2 files changed, 398 insertions(+), 64 deletions(-)
>>
>

Re: [PATCH v2 2/2] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 25 July 2017 at 16:36, Maxime Ripard
 wrote:
> Hi,
>
> On Sat, Jul 22, 2017 at 08:53:52AM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The sun8i-h3 introduces a lot of changes to the i2s block such
>> as different register locations, extended clock division and
>> more operational modes. As we have to consider the earlier
>> implementation then these changes need to be isolated.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 202 
>> +
>>  2 files changed, 204 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>>   - "allwinner,sun6i-a31-i2s"
>> + - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 1854405cbcb1..2b3c2b28059c 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -26,6 +26,8 @@
>>  #include 
>>
>>  #define SUN4I_I2S_CTRL_REG   0x00
>> +#define SUN8I_I2S_CTRL_BCLK_OUT  BIT(18)
>> +#define SUN8I_I2S_CTRL_LRCK_OUT  BIT(17)
>>  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
>>  #define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
>>  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
>> @@ -55,6 +57,7 @@
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> +#define SUN8I_I2S_INT_STA_REG0x0c
>>  #define SUN4I_I2S_FIFO_RX_REG0x10
>>
>>  #define SUN4I_I2S_FIFO_CTRL_REG  0x14
>> @@ -72,8 +75,10 @@
>>  #define SUN4I_I2S_DMA_INT_CTRL_RX_DRQ_EN BIT(3)
>>
>>  #define SUN4I_I2S_INT_STA_REG0x20
>> +#define SUN8I_I2S_FIFO_TX_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> +#define SUN8I_I2S_CLK_DIV_MCLK_EN8
>>  #define SUN4I_I2S_CLK_DIV_MCLK_EN7
>>  #define SUN4I_I2S_CLK_DIV_BCLK_MASK  GENMASK(6, 4)
>>  #define SUN4I_I2S_CLK_DIV_BCLK(bclk) ((bclk) << 4)
>> @@ -86,16 +91,29 @@
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG0x30
>>  #define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0)
>>
>> +#define SUN8I_I2S_CHAN_CFG_REG   0x30
>> +
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)  ((sample) << (chan << 2))
>> +#define SUN8I_I2S_TX_CHAN_SEL_REG0x34
>> +#define SUN8I_I2S_TX_CHAN_OFFSET(offset) (offset << 12)
>>  #define SUN4I_I2S_TX_CHAN_EN(num_chan)   (((1 << num_chan) - 1))
>>
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG0x3c
>>
>> +#define SUN8I_I2S_TX_CHAN_MAP_REG0x44
>> +
>> +#define SUN8I_I2S_RX_CHAN_SEL_REG0x54
>> +#define SUN8I_I2S_RX_CHAN_MAP_REG0x58
>> +
>
> I would not interleave those defines. It's a bit hard to see which
> generation has which set of registers. I guess you could just move the
> new ones to the bottom of the defines.

Ok...you especially see it when looking at the patch. I'll add a
comment and move everything to the bottom.
>
>>  struct sun4i_i2s_quirks {
>>   boolhas_reset;
>>   boolhas_master_slave_sel;
>> + boolhas_fmt_set_lrck_period;
>> + boolhas_chcfg;
>> + boolhas_chsel_tx_chen;
>> + boolhas_chsel_offset;
>>   unsigned intreg_offset_txdata;  /* TX FIFO */
>>   unsigned intreg_offset_txchanmap;
>>   unsigned intreg_offset_rxchanmap;
>> @@ -113,6 +131,11 @@ struct sun4i_i2s_quirks {
>>   struct reg_fieldfield_fmt_set_mode;
>>   struct reg_fieldfield_txchansel;
>>   struct reg_fieldfield_rxchansel;
>> + struct reg_fieldfield_fmt_set_lrck_period;
>> + struct reg_fieldfield_chcfg_tx_slot_num;
>> + struct 

Re: [PATCH v2 2/2] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 25 July 2017 at 16:36, Maxime Ripard
 wrote:
> Hi,
>
> On Sat, Jul 22, 2017 at 08:53:52AM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The sun8i-h3 introduces a lot of changes to the i2s block such
>> as different register locations, extended clock division and
>> more operational modes. As we have to consider the earlier
>> implementation then these changes need to be isolated.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 202 
>> +
>>  2 files changed, 204 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>>   - "allwinner,sun6i-a31-i2s"
>> + - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 1854405cbcb1..2b3c2b28059c 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -26,6 +26,8 @@
>>  #include 
>>
>>  #define SUN4I_I2S_CTRL_REG   0x00
>> +#define SUN8I_I2S_CTRL_BCLK_OUT  BIT(18)
>> +#define SUN8I_I2S_CTRL_LRCK_OUT  BIT(17)
>>  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
>>  #define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
>>  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
>> @@ -55,6 +57,7 @@
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> +#define SUN8I_I2S_INT_STA_REG0x0c
>>  #define SUN4I_I2S_FIFO_RX_REG0x10
>>
>>  #define SUN4I_I2S_FIFO_CTRL_REG  0x14
>> @@ -72,8 +75,10 @@
>>  #define SUN4I_I2S_DMA_INT_CTRL_RX_DRQ_EN BIT(3)
>>
>>  #define SUN4I_I2S_INT_STA_REG0x20
>> +#define SUN8I_I2S_FIFO_TX_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> +#define SUN8I_I2S_CLK_DIV_MCLK_EN8
>>  #define SUN4I_I2S_CLK_DIV_MCLK_EN7
>>  #define SUN4I_I2S_CLK_DIV_BCLK_MASK  GENMASK(6, 4)
>>  #define SUN4I_I2S_CLK_DIV_BCLK(bclk) ((bclk) << 4)
>> @@ -86,16 +91,29 @@
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG0x30
>>  #define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0)
>>
>> +#define SUN8I_I2S_CHAN_CFG_REG   0x30
>> +
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)  ((sample) << (chan << 2))
>> +#define SUN8I_I2S_TX_CHAN_SEL_REG0x34
>> +#define SUN8I_I2S_TX_CHAN_OFFSET(offset) (offset << 12)
>>  #define SUN4I_I2S_TX_CHAN_EN(num_chan)   (((1 << num_chan) - 1))
>>
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG0x3c
>>
>> +#define SUN8I_I2S_TX_CHAN_MAP_REG0x44
>> +
>> +#define SUN8I_I2S_RX_CHAN_SEL_REG0x54
>> +#define SUN8I_I2S_RX_CHAN_MAP_REG0x58
>> +
>
> I would not interleave those defines. It's a bit hard to see which
> generation has which set of registers. I guess you could just move the
> new ones to the bottom of the defines.

Ok...you especially see it when looking at the patch. I'll add a
comment and move everything to the bottom.
>
>>  struct sun4i_i2s_quirks {
>>   boolhas_reset;
>>   boolhas_master_slave_sel;
>> + boolhas_fmt_set_lrck_period;
>> + boolhas_chcfg;
>> + boolhas_chsel_tx_chen;
>> + boolhas_chsel_offset;
>>   unsigned intreg_offset_txdata;  /* TX FIFO */
>>   unsigned intreg_offset_txchanmap;
>>   unsigned intreg_offset_rxchanmap;
>> @@ -113,6 +131,11 @@ struct sun4i_i2s_quirks {
>>   struct reg_fieldfield_fmt_set_mode;
>>   struct reg_fieldfield_txchansel;
>>   struct reg_fieldfield_rxchansel;
>> + struct reg_fieldfield_fmt_set_lrck_period;
>> + struct reg_fieldfield_chcfg_tx_slot_num;
>> + struct reg_fieldfield_chcfg_rx_slot_num;
>> + struct reg_field

Re: [PATCH v2 1/2] ASoC: sun4i-i2s: Add more quirks for newer SoCs

[Code Kipper]

On 25 July 2017 at 07:52, Maxime Ripard
 wrote:
> Hi Markus,
>
> On Sat, Jul 22, 2017 at 08:53:51AM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> In preparation for changing this driver to support newer SoC
>> implementations then where needed there has been a switch from
>> regmap_update_bits to regmap_field. Also included are adjustment
>> variables although they are not set as no adjustment is required
>> for the current support.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 267 
>> +---
>>  1 file changed, 203 insertions(+), 64 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 62b307b0c846..1854405cbcb1 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -50,6 +50,8 @@
>>  #define SUN4I_I2S_FMT0_FMT_RIGHT_J   (2 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_LEFT_J(1 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_I2S   (0 << 0)
>> +#define SUN4I_I2S_FMT0_POLARITY_INVERTED (1)
>> +#define SUN4I_I2S_FMT0_POLARITY_NORMAL   (0)
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> @@ -72,7 +74,7 @@
>>  #define SUN4I_I2S_INT_STA_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> -#define SUN4I_I2S_CLK_DIV_MCLK_ENBIT(7)
>> +#define SUN4I_I2S_CLK_DIV_MCLK_EN7
>>  #define SUN4I_I2S_CLK_DIV_BCLK_MASK  GENMASK(6, 4)
>>  #define SUN4I_I2S_CLK_DIV_BCLK(bclk) ((bclk) << 4)
>>  #define SUN4I_I2S_CLK_DIV_MCLK_MASK  GENMASK(3, 0)
>> @@ -82,15 +84,39 @@
>>  #define SUN4I_I2S_TX_CNT_REG 0x2c
>>
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG0x30
>> -#define SUN4I_I2S_TX_CHAN_SEL(num_chan)  (((num_chan) - 1) << 0)
>> +#define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0)
>>
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)  ((sample) << (chan << 2))
>> +#define SUN4I_I2S_TX_CHAN_EN(num_chan)   (((1 << num_chan) - 1))
>>
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG0x3c
>>
>> +struct sun4i_i2s_quirks {
>> + boolhas_reset;
>> + boolhas_master_slave_sel;
>
> I think both variants have a master and slave mode, so it's a bit
> misleading.
>
> You should also have a kerneldoc for that structure, to make it clear
> what each quirk is supposed to be doing.
>
>> + unsigned intreg_offset_txdata;  /* TX FIFO */
>> + unsigned intreg_offset_txchanmap;
>> + unsigned intreg_offset_rxchanmap;
>
> Is there any reason for txchanmap and rxchanmap to not be
> regmap_fields too?
>
>> + const struct regmap_config  *sun4i_i2s_regmap;
>> + unsigned intmclk_adjust;
>> + unsigned intbclk_adjust;
>> + unsigned intfmt_adjust;
>
> I would replace adjust by offset
>
>> + /* Register fields for i2s */
>> + struct reg_fieldfield_clkdiv_mclk_en;
>> + struct reg_fieldfield_fmt_set_wss;
>> + struct reg_fieldfield_fmt_set_sr;
>> + struct reg_fieldfield_fmt_set_bclk_polarity;
>> + struct reg_fieldfield_fmt_set_lrclk_polarity;
>> + struct reg_fieldfield_fmt_set_mode;
>> + struct reg_fieldfield_txchansel;
>> + struct reg_fieldfield_rxchansel;
>> +};
>> +
>>  struct sun4i_i2s {
>> + struct device   *dev;
>
> You never use it outside of the probe function (and its callee), you
> can just pass it directly as an argument
>
>>   struct clk  *bus_clk;
>>   struct clk  *mod_clk;
>>   struct regmap   *regmap;
>> @@ -100,6 +126,18 @@ struct sun4i_i2s {
>>
>>   struct snd_dmaengine_dai_dma_data   capture_dma_data;
>>   struct snd_dmaengine_dai_dma_data   playback_dma_data;
>> +
>> + /* Register fields for i2s */
>> + struct regmap_field *field_clkdiv_mclk_en;
>> + struct regmap_field *field_fmt_set_wss;
>> + struct regmap_field *field_fmt_set_sr;
>> + struct regmap_field *field_fmt_set_bclk_polarity;
>> + struct regmap_field *field_fmt_set_lrclk_polarity;
>> + struct regmap_field *field_fmt_set_mode;
>> + struct regmap_field *field_txchansel;
>> + struct regmap_field *field_rxchansel;
>> +
>> + const struct sun4i_i2s_quirks   *variant;
>>  };
>>
>>  struct sun4i_i2s_clk_div {
>> @@ -138,7 +176,7 @@ static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s,
>>   const struct 

Re: [PATCH v2 1/2] ASoC: sun4i-i2s: Add more quirks for newer SoCs

[Code Kipper]

On 25 July 2017 at 07:52, Maxime Ripard
 wrote:
> Hi Markus,
>
> On Sat, Jul 22, 2017 at 08:53:51AM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> In preparation for changing this driver to support newer SoC
>> implementations then where needed there has been a switch from
>> regmap_update_bits to regmap_field. Also included are adjustment
>> variables although they are not set as no adjustment is required
>> for the current support.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/sun4i-i2s.c | 267 
>> +---
>>  1 file changed, 203 insertions(+), 64 deletions(-)
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index 62b307b0c846..1854405cbcb1 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -50,6 +50,8 @@
>>  #define SUN4I_I2S_FMT0_FMT_RIGHT_J   (2 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_LEFT_J(1 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_I2S   (0 << 0)
>> +#define SUN4I_I2S_FMT0_POLARITY_INVERTED (1)
>> +#define SUN4I_I2S_FMT0_POLARITY_NORMAL   (0)
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> @@ -72,7 +74,7 @@
>>  #define SUN4I_I2S_INT_STA_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> -#define SUN4I_I2S_CLK_DIV_MCLK_ENBIT(7)
>> +#define SUN4I_I2S_CLK_DIV_MCLK_EN7
>>  #define SUN4I_I2S_CLK_DIV_BCLK_MASK  GENMASK(6, 4)
>>  #define SUN4I_I2S_CLK_DIV_BCLK(bclk) ((bclk) << 4)
>>  #define SUN4I_I2S_CLK_DIV_MCLK_MASK  GENMASK(3, 0)
>> @@ -82,15 +84,39 @@
>>  #define SUN4I_I2S_TX_CNT_REG 0x2c
>>
>>  #define SUN4I_I2S_TX_CHAN_SEL_REG0x30
>> -#define SUN4I_I2S_TX_CHAN_SEL(num_chan)  (((num_chan) - 1) << 0)
>> +#define SUN4I_I2S_CHAN_SEL(num_chan) (((num_chan) - 1) << 0)
>>
>>  #define SUN4I_I2S_TX_CHAN_MAP_REG0x34
>>  #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)  ((sample) << (chan << 2))
>> +#define SUN4I_I2S_TX_CHAN_EN(num_chan)   (((1 << num_chan) - 1))
>>
>>  #define SUN4I_I2S_RX_CHAN_SEL_REG0x38
>>  #define SUN4I_I2S_RX_CHAN_MAP_REG0x3c
>>
>> +struct sun4i_i2s_quirks {
>> + boolhas_reset;
>> + boolhas_master_slave_sel;
>
> I think both variants have a master and slave mode, so it's a bit
> misleading.
>
> You should also have a kerneldoc for that structure, to make it clear
> what each quirk is supposed to be doing.
>
>> + unsigned intreg_offset_txdata;  /* TX FIFO */
>> + unsigned intreg_offset_txchanmap;
>> + unsigned intreg_offset_rxchanmap;
>
> Is there any reason for txchanmap and rxchanmap to not be
> regmap_fields too?
>
>> + const struct regmap_config  *sun4i_i2s_regmap;
>> + unsigned intmclk_adjust;
>> + unsigned intbclk_adjust;
>> + unsigned intfmt_adjust;
>
> I would replace adjust by offset
>
>> + /* Register fields for i2s */
>> + struct reg_fieldfield_clkdiv_mclk_en;
>> + struct reg_fieldfield_fmt_set_wss;
>> + struct reg_fieldfield_fmt_set_sr;
>> + struct reg_fieldfield_fmt_set_bclk_polarity;
>> + struct reg_fieldfield_fmt_set_lrclk_polarity;
>> + struct reg_fieldfield_fmt_set_mode;
>> + struct reg_fieldfield_txchansel;
>> + struct reg_fieldfield_rxchansel;
>> +};
>> +
>>  struct sun4i_i2s {
>> + struct device   *dev;
>
> You never use it outside of the probe function (and its callee), you
> can just pass it directly as an argument
>
>>   struct clk  *bus_clk;
>>   struct clk  *mod_clk;
>>   struct regmap   *regmap;
>> @@ -100,6 +126,18 @@ struct sun4i_i2s {
>>
>>   struct snd_dmaengine_dai_dma_data   capture_dma_data;
>>   struct snd_dmaengine_dai_dma_data   playback_dma_data;
>> +
>> + /* Register fields for i2s */
>> + struct regmap_field *field_clkdiv_mclk_en;
>> + struct regmap_field *field_fmt_set_wss;
>> + struct regmap_field *field_fmt_set_sr;
>> + struct regmap_field *field_fmt_set_bclk_polarity;
>> + struct regmap_field *field_fmt_set_lrclk_polarity;
>> + struct regmap_field *field_fmt_set_mode;
>> + struct regmap_field *field_txchansel;
>> + struct regmap_field *field_rxchansel;
>> +
>> + const struct sun4i_i2s_quirks   *variant;
>>  };
>>
>>  struct sun4i_i2s_clk_div {
>> @@ -138,7 +176,7 @@ static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s,
>>   const struct sun4i_i2s_clk_div *bdiv = _i2s_bclk_div[i];
>>
>>   if (bdiv->div == div)
>> -  

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 5 July 2017 at 18:20, Maxime Ripard  wrote:
> On Wed, Jul 05, 2017 at 05:43:24PM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> There are a lot of changes to the sun8i-h3 i2s block but not enough
>> to warrant to a new driver.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 339 
>> -
>>  2 files changed, 337 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>>   - "allwinner,sun6i-a31-i2s"
>> + - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index bb7affd53002..0b853fe320e0 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -26,9 +26,16 @@
>>  #include 
>>
>>  #define SUN4I_I2S_CTRL_REG   0x00
>> +#define SUN4I_I2S_CTRL_BCLK_OUT  BIT(18)
>> +#define SUN4I_I2S_CTRL_LRCK_OUT  BIT(17)
>> +#define SUN4I_I2S_CTRL_LRCKR_OUT BIT(16)
>>  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
>>  #define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
>>  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
>> +#define SUN8I_I2S_CTRL_MODE_MASK GENMASK(5, 4)
>> +#define SUN8I_I2S_CTRL_MODE_RIGHT_J  (2 << 4)
>> +#define SUN8I_I2S_CTRL_MODE_I2S  (1 << 4)
>> +#define SUN8I_I2S_CTRL_MODE_PCM  (0 << 4)
>>  #define SUN4I_I2S_CTRL_MODE_SLAVE(1 << 5)
>>  #define SUN4I_I2S_CTRL_MODE_MASTER   (0 << 5)
>>  #define SUN4I_I2S_CTRL_TX_EN BIT(2)
>> @@ -36,16 +43,27 @@
>>  #define SUN4I_I2S_CTRL_GL_EN BIT(0)
>>
>>  #define SUN4I_I2S_FMT0_REG   0x04
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK   BIT(19)
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED   (1 << 19)
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_NORMAL (0 << 19)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD_MASK  GENMASK(17, 8)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD(period)   ((period) << 8)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_MASK   BIT(7)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED   (1 << 7)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL (0 << 7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_MASKBIT(7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED(1 << 7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_NORMAL  (0 << 7)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_MASKBIT(6)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED(1 << 6)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL  (0 << 6)
>>  #define SUN4I_I2S_FMT0_SR_MASK   GENMASK(5, 4)
>> +#define SUN8I_I2S_FMT0_SR_MASK   GENMASK(6, 4)
>>  #define SUN4I_I2S_FMT0_SR(sr)((sr) << 4)
>>  #define SUN4I_I2S_FMT0_WSS_MASK  GENMASK(3, 2)
>>  #define SUN4I_I2S_FMT0_WSS(wss)  ((wss) << 2)
>> +#define SUN8I_I2S_FMT0_WSS_MASK  GENMASK(2, 0)
>> +#define SUN8I_I2S_FMT0_WSS(wss)  (wss)
>>  #define SUN4I_I2S_FMT0_FMT_MASK  GENMASK(1, 0)
>>  #define SUN4I_I2S_FMT0_FMT_RIGHT_J   (2 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_LEFT_J(1 << 0)
>> @@ -53,6 +71,7 @@
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> +#define SUN8I_I2S_INT_STA_REG0x0c
>>  #define SUN4I_I2S_FIFO_RX_REG0x10
>>
>>  #define SUN4I_I2S_FIFO_CTRL_REG  0x14
>> @@ -70,10 +89,13 @@
>>  #define SUN4I_I2S_DMA_INT_CTRL_RX_DRQ_EN BIT(3)
>>
>>  #define SUN4I_I2S_INT_STA_REG0x20
>> +#define SUN8I_I2S_FIFO_TX_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> +#define SUN8I_I2S_CLK_DIV_MCLK_ENBIT(8)
>>  #define SUN4I_I2S_CLK_DIV_MCLK_ENBIT(7)
>>  #define 

Re: [PATCH 3/3] ASoC: sun4i-i2s: Add support for H3

[Code Kipper]

On 5 July 2017 at 18:20, Maxime Ripard  wrote:
> On Wed, Jul 05, 2017 at 05:43:24PM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> There are a lot of changes to the sun8i-h3 i2s block but not enough
>> to warrant to a new driver.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|   2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 339 
>> -
>>  2 files changed, 337 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index ee21da865771..fc5da6080759 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -8,6 +8,7 @@ Required properties:
>>  - compatible: should be one of the following:
>> - "allwinner,sun4i-a10-i2s"
>> - "allwinner,sun6i-a31-i2s"
>> +   - "allwinner,sun8i-h3-i2s"
>>  - reg: physical base address of the controller and length of memory mapped
>>region.
>>  - interrupts: should contain the I2S interrupt.
>> @@ -22,6 +23,7 @@ Required properties:
>>
>>  Required properties for the following compatibles:
>>   - "allwinner,sun6i-a31-i2s"
>> + - "allwinner,sun8i-h3-i2s"
>>  - resets: phandle to the reset line for this codec
>>
>>  Example:
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index bb7affd53002..0b853fe320e0 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -26,9 +26,16 @@
>>  #include 
>>
>>  #define SUN4I_I2S_CTRL_REG   0x00
>> +#define SUN4I_I2S_CTRL_BCLK_OUT  BIT(18)
>> +#define SUN4I_I2S_CTRL_LRCK_OUT  BIT(17)
>> +#define SUN4I_I2S_CTRL_LRCKR_OUT BIT(16)
>>  #define SUN4I_I2S_CTRL_SDO_EN_MASK   GENMASK(11, 8)
>>  #define SUN4I_I2S_CTRL_SDO_EN(sdo)   BIT(8 + (sdo))
>>  #define SUN4I_I2S_CTRL_MODE_MASK BIT(5)
>> +#define SUN8I_I2S_CTRL_MODE_MASK GENMASK(5, 4)
>> +#define SUN8I_I2S_CTRL_MODE_RIGHT_J  (2 << 4)
>> +#define SUN8I_I2S_CTRL_MODE_I2S  (1 << 4)
>> +#define SUN8I_I2S_CTRL_MODE_PCM  (0 << 4)
>>  #define SUN4I_I2S_CTRL_MODE_SLAVE(1 << 5)
>>  #define SUN4I_I2S_CTRL_MODE_MASTER   (0 << 5)
>>  #define SUN4I_I2S_CTRL_TX_EN BIT(2)
>> @@ -36,16 +43,27 @@
>>  #define SUN4I_I2S_CTRL_GL_EN BIT(0)
>>
>>  #define SUN4I_I2S_FMT0_REG   0x04
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_MASK   BIT(19)
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED   (1 << 19)
>> +#define SUN8I_I2S_FMT0_LRCLK_POLARITY_NORMAL (0 << 19)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD_MASK  GENMASK(17, 8)
>> +#define SUN8I_I2S_FMT0_LRCK_PERIOD(period)   ((period) << 8)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_MASK   BIT(7)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED   (1 << 7)
>>  #define SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL (0 << 7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_MASKBIT(7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED(1 << 7)
>> +#define SUN8I_I2S_FMT0_BCLK_POLARITY_NORMAL  (0 << 7)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_MASKBIT(6)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED(1 << 6)
>>  #define SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL  (0 << 6)
>>  #define SUN4I_I2S_FMT0_SR_MASK   GENMASK(5, 4)
>> +#define SUN8I_I2S_FMT0_SR_MASK   GENMASK(6, 4)
>>  #define SUN4I_I2S_FMT0_SR(sr)((sr) << 4)
>>  #define SUN4I_I2S_FMT0_WSS_MASK  GENMASK(3, 2)
>>  #define SUN4I_I2S_FMT0_WSS(wss)  ((wss) << 2)
>> +#define SUN8I_I2S_FMT0_WSS_MASK  GENMASK(2, 0)
>> +#define SUN8I_I2S_FMT0_WSS(wss)  (wss)
>>  #define SUN4I_I2S_FMT0_FMT_MASK  GENMASK(1, 0)
>>  #define SUN4I_I2S_FMT0_FMT_RIGHT_J   (2 << 0)
>>  #define SUN4I_I2S_FMT0_FMT_LEFT_J(1 << 0)
>> @@ -53,6 +71,7 @@
>>
>>  #define SUN4I_I2S_FMT1_REG   0x08
>>  #define SUN4I_I2S_FIFO_TX_REG0x0c
>> +#define SUN8I_I2S_INT_STA_REG0x0c
>>  #define SUN4I_I2S_FIFO_RX_REG0x10
>>
>>  #define SUN4I_I2S_FIFO_CTRL_REG  0x14
>> @@ -70,10 +89,13 @@
>>  #define SUN4I_I2S_DMA_INT_CTRL_RX_DRQ_EN BIT(3)
>>
>>  #define SUN4I_I2S_INT_STA_REG0x20
>> +#define SUN8I_I2S_FIFO_TX_REG0x20
>>
>>  #define SUN4I_I2S_CLK_DIV_REG0x24
>> +#define SUN8I_I2S_CLK_DIV_MCLK_ENBIT(8)
>>  #define SUN4I_I2S_CLK_DIV_MCLK_ENBIT(7)
>>  #define SUN4I_I2S_CLK_DIV_BCLK_MASK  GENMASK(6, 4)
>> +#define 

Re: [linux-sunxi] Re: [PATCH] ASoC: sunxi: Add bindings for sun8i to SPDIF

[Code Kipper]

On 19 January 2017 at 18:03, Mark Brown <broo...@kernel.org> wrote:
> On Wed, Jan 18, 2017 at 08:09:00AM +0100, Code Kipper wrote:
>
>> I missed the binding documentation on the patch for the driver so I
>> pushed it separately instead of pushing a new patch version.
>> You can find it under the subject heading 'ASoC: sun4i-spdif: Add
>> support for the H3 SoC' and Maxime has ACK it (on the condition that I
>> add the binding doc).
>
> I don't seem to have that patch.  If Maxime said it needed changes for
> him to ack it there's every chance I just deleted it waiting for you to
> resend, it's certainly confusing to see a patch like this without the
> matching code.
No worries...I'll squash this patch into it and send as a V2.
CK

Re: [linux-sunxi] Re: [PATCH] ASoC: sunxi: Add bindings for sun8i to SPDIF

[Code Kipper]

On 19 January 2017 at 18:03, Mark Brown  wrote:
> On Wed, Jan 18, 2017 at 08:09:00AM +0100, Code Kipper wrote:
>
>> I missed the binding documentation on the patch for the driver so I
>> pushed it separately instead of pushing a new patch version.
>> You can find it under the subject heading 'ASoC: sun4i-spdif: Add
>> support for the H3 SoC' and Maxime has ACK it (on the condition that I
>> add the binding doc).
>
> I don't seem to have that patch.  If Maxime said it needed changes for
> him to ack it there's every chance I just deleted it waiting for you to
> resend, it's certainly confusing to see a patch like this without the
> matching code.
No worries...I'll squash this patch into it and send as a V2.
CK

Re: [linux-sunxi] Re: [PATCH] ASoC: sunxi: Add bindings for sun8i to SPDIF

[Code Kipper]

On 17 January 2017 at 19:15, Mark Brown  wrote:
> On Thu, Jan 12, 2017 at 06:33:43PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but the
>> transmit fifo is at a different address.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 1 +
>>  1 file changed, 1 insertion(+)
>
> This is fine but it doesn't actually add the compatible string to the
> driver which I'd expect.
Hi Mark,
I missed the binding documentation on the patch for the driver so I
pushed it separately instead of pushing a new patch version.
You can find it under the subject heading 'ASoC: sun4i-spdif: Add
support for the H3 SoC' and Maxime has ACK it (on the condition that I
add the binding doc).
BR,
CK
>
> --
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Re: [linux-sunxi] Re: [PATCH] ASoC: sunxi: Add bindings for sun8i to SPDIF

[Code Kipper]

On 17 January 2017 at 19:15, Mark Brown  wrote:
> On Thu, Jan 12, 2017 at 06:33:43PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but the
>> transmit fifo is at a different address.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 1 +
>>  1 file changed, 1 insertion(+)
>
> This is fine but it doesn't actually add the compatible string to the
> driver which I'd expect.
Hi Mark,
I missed the binding documentation on the patch for the driver so I
pushed it separately instead of pushing a new patch version.
You can find it under the subject heading 'ASoC: sun4i-spdif: Add
support for the H3 SoC' and Maxime has ACK it (on the condition that I
add the binding doc).
BR,
CK
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH] ASoC: sun4i-i2s: Add quirks for newer SoCs

[Code Kipper]

On 20 December 2016 at 20:16, Maxime Ripard
 wrote:
> Hi,
>
> On Tue, Dec 20, 2016 at 03:55:24PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> Newer SoCs have additional functionality so a quirks structure
>> has been added to handle them. So far we've seen the use of a
>> reset controller, a different address for the TXFIFO and varying
>> register changes.
>>
>> This patch prepares the driver for these changes and adds the
>> reset specifier.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|  2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 47 
>> --
>>  2 files changed, 45 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index 7a2c0945fd22..494a881ccd21 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -18,6 +18,8 @@ Required properties:
>> - "apb" : clock for the I2S bus interface
>> - "mod" : module clock for the I2S controller
>>  - #sound-dai-cells : Must be equal to 0
>> +- resets: reset specifier for the ahb reset (A31 and newer only)
>> +
>>
>>  Example:
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index f24d19526603..80fe4f1d6e3b 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -14,9 +14,11 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>
>>  #include 
>>  #include 
>> @@ -92,6 +94,7 @@ struct sun4i_i2s {
>>   struct clk  *bus_clk;
>>   struct clk  *mod_clk;
>>   struct regmap   *regmap;
>> + struct reset_control *rst;
>>
>>   unsigned intmclk_freq;
>>
>> @@ -104,6 +107,13 @@ struct sun4i_i2s_clk_div {
>>   u8  val;
>>  };
>>
>> +struct sun4i_i2s_quirks {
>> + unsigned intreg_dac_txdata; /* TX FIFO offset for DMA config */
>> + boolhas_reset;
>> + const struct regmap_config  *sun4i_i2s_regmap;
>> + const struct snd_soc_dai_ops*ops;
>> +};
>> +
>
> This is quite hard to review without actual example of what you'll put
> in there.
Fair enough...I have a patch for the A31 but haven't got any hardware
that I can verify it on. I've confirmed on the H3 but I feel like that
patch needs some tidying up. That being said...I'll push it as a patch
set and we can talk about the setup.

>
>>  static const struct sun4i_i2s_clk_div sun4i_i2s_bclk_div[] = {
>>   { .div = 2, .val = 0 },
>>   { .div = 4, .val = 1 },
>> @@ -541,7 +551,6 @@ static struct snd_soc_dai_driver sun4i_i2s_dai = {
>>   .rates = SNDRV_PCM_RATE_8000_192000,
>>   .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>   },
>> - .ops = _i2s_dai_ops,
>>   .symmetric_rates = 1,
>>  };
>>
>> @@ -655,6 +664,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>>  {
>>   struct sun4i_i2s *i2s;
>>   struct resource *res;
>> + const struct sun4i_i2s_quirks *quirks;
>>   void __iomem *regs;
>>   int irq, ret;
>>
>> @@ -680,8 +690,14 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>>   return PTR_ERR(i2s->bus_clk);
>>   }
>>
>> + quirks = of_device_get_match_data(>dev);
>> + if (quirks == NULL) {
>> + dev_err(>dev, "Failed to determine the quirks to use\n");
>> + return -ENODEV;
>> + }
>> +
>>   i2s->regmap = devm_regmap_init_mmio(>dev, regs,
>> - _i2s_regmap_config);
>> + quirks->sun4i_i2s_regmap);
>>   if (IS_ERR(i2s->regmap)) {
>>   dev_err(>dev, "Regmap initialisation failed\n");
>>   return PTR_ERR(i2s->regmap);
>> @@ -692,13 +708,25 @@ static int sun4i_i2s_probe(struct platform_device 
>> *pdev)
>>   dev_err(>dev, "Can't get our mod clock\n");
>>   return PTR_ERR(i2s->mod_clk);
>>   }
>> +
>
> Spurious change?
ACK
>
>>
>> - i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
>> + i2s->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
>>   i2s->playback_dma_data.maxburst = 4;
>>
>>   i2s->capture_dma_data.addr = res->start + SUN4I_I2S_FIFO_RX_REG;
>>   i2s->capture_dma_data.maxburst = 4;
>>
>> + if (quirks->has_reset) {
>> + i2s->rst = devm_reset_control_get_optional(>dev, NULL);
>> + if (IS_ERR(i2s->rst) && PTR_ERR(i2s->rst) == -EPROBE_DEFER) {
>> + ret = -EPROBE_DEFER;
>> + dev_err(>dev, "Failed to get reset: %d\n", ret);
>> + goto err_pm_disable;
>> + }
>> + if (!IS_ERR(i2s->rst))
>> + 

Re: [PATCH] ASoC: sun4i-i2s: Add quirks for newer SoCs

[Code Kipper]

On 20 December 2016 at 20:16, Maxime Ripard
 wrote:
> Hi,
>
> On Tue, Dec 20, 2016 at 03:55:24PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> Newer SoCs have additional functionality so a quirks structure
>> has been added to handle them. So far we've seen the use of a
>> reset controller, a different address for the TXFIFO and varying
>> register changes.
>>
>> This patch prepares the driver for these changes and adds the
>> reset specifier.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i-i2s.txt|  2 +
>>  sound/soc/sunxi/sun4i-i2s.c| 47 
>> --
>>  2 files changed, 45 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> index 7a2c0945fd22..494a881ccd21 100644
>> --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
>> @@ -18,6 +18,8 @@ Required properties:
>> - "apb" : clock for the I2S bus interface
>> - "mod" : module clock for the I2S controller
>>  - #sound-dai-cells : Must be equal to 0
>> +- resets: reset specifier for the ahb reset (A31 and newer only)
>> +
>>
>>  Example:
>>
>> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
>> index f24d19526603..80fe4f1d6e3b 100644
>> --- a/sound/soc/sunxi/sun4i-i2s.c
>> +++ b/sound/soc/sunxi/sun4i-i2s.c
>> @@ -14,9 +14,11 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>
>>  #include 
>>  #include 
>> @@ -92,6 +94,7 @@ struct sun4i_i2s {
>>   struct clk  *bus_clk;
>>   struct clk  *mod_clk;
>>   struct regmap   *regmap;
>> + struct reset_control *rst;
>>
>>   unsigned intmclk_freq;
>>
>> @@ -104,6 +107,13 @@ struct sun4i_i2s_clk_div {
>>   u8  val;
>>  };
>>
>> +struct sun4i_i2s_quirks {
>> + unsigned intreg_dac_txdata; /* TX FIFO offset for DMA config */
>> + boolhas_reset;
>> + const struct regmap_config  *sun4i_i2s_regmap;
>> + const struct snd_soc_dai_ops*ops;
>> +};
>> +
>
> This is quite hard to review without actual example of what you'll put
> in there.
Fair enough...I have a patch for the A31 but haven't got any hardware
that I can verify it on. I've confirmed on the H3 but I feel like that
patch needs some tidying up. That being said...I'll push it as a patch
set and we can talk about the setup.

>
>>  static const struct sun4i_i2s_clk_div sun4i_i2s_bclk_div[] = {
>>   { .div = 2, .val = 0 },
>>   { .div = 4, .val = 1 },
>> @@ -541,7 +551,6 @@ static struct snd_soc_dai_driver sun4i_i2s_dai = {
>>   .rates = SNDRV_PCM_RATE_8000_192000,
>>   .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>   },
>> - .ops = _i2s_dai_ops,
>>   .symmetric_rates = 1,
>>  };
>>
>> @@ -655,6 +664,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>>  {
>>   struct sun4i_i2s *i2s;
>>   struct resource *res;
>> + const struct sun4i_i2s_quirks *quirks;
>>   void __iomem *regs;
>>   int irq, ret;
>>
>> @@ -680,8 +690,14 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>>   return PTR_ERR(i2s->bus_clk);
>>   }
>>
>> + quirks = of_device_get_match_data(>dev);
>> + if (quirks == NULL) {
>> + dev_err(>dev, "Failed to determine the quirks to use\n");
>> + return -ENODEV;
>> + }
>> +
>>   i2s->regmap = devm_regmap_init_mmio(>dev, regs,
>> - _i2s_regmap_config);
>> + quirks->sun4i_i2s_regmap);
>>   if (IS_ERR(i2s->regmap)) {
>>   dev_err(>dev, "Regmap initialisation failed\n");
>>   return PTR_ERR(i2s->regmap);
>> @@ -692,13 +708,25 @@ static int sun4i_i2s_probe(struct platform_device 
>> *pdev)
>>   dev_err(>dev, "Can't get our mod clock\n");
>>   return PTR_ERR(i2s->mod_clk);
>>   }
>> +
>
> Spurious change?
ACK
>
>>
>> - i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
>> + i2s->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
>>   i2s->playback_dma_data.maxburst = 4;
>>
>>   i2s->capture_dma_data.addr = res->start + SUN4I_I2S_FIFO_RX_REG;
>>   i2s->capture_dma_data.maxburst = 4;
>>
>> + if (quirks->has_reset) {
>> + i2s->rst = devm_reset_control_get_optional(>dev, NULL);
>> + if (IS_ERR(i2s->rst) && PTR_ERR(i2s->rst) == -EPROBE_DEFER) {
>> + ret = -EPROBE_DEFER;
>> + dev_err(>dev, "Failed to get reset: %d\n", ret);
>> + goto err_pm_disable;
>> + }
>> + if (!IS_ERR(i2s->rst))
>> + reset_control_deassert(i2s->rst);
>> + }
>> +
>
> That reset line is not optional. The  cover that 

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks

[Code Kipper]

On 11 November 2016 at 11:05, Chen-Yu Tsai  wrote:
> The audio module clocks are supposed to be set according to the sample
> rate of the audio stream. The audio PLL provides the clock signal for
> thees module clocks, and only it is freely tunable.
nick! these
CK
>
> Set CLK_SET_RATE_PARENT for the audio module clocks so their users can
> properly tune the clock rate.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Signed-off-by: Chen-Yu Tsai 
> ---
>  drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
> b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> index 4d70590f05e3..21c427d86f28 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> @@ -394,16 +394,16 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", 
> mod0_default_parents, 0x0a4,
>  static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
> "pll-audio-2x", "pll-audio" };
>  static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
> -  0x0b0, 16, 2, BIT(31), 0);
> +  0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
> -  0x0b4, 16, 2, BIT(31), 0);
> +  0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_MUX_WITH_GATE(i2s2_clk, "i2s2", i2s_parents,
> -  0x0b8, 16, 2, BIT(31), 0);
> +  0x0b8, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_M_WITH_GATE(spdif_clk, "spdif", "pll-audio",
> -0x0c0, 0, 4, BIT(31), 0);
> +0x0c0, 0, 4, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_GATE(usb_phy0_clk,"usb-phy0", "osc24M",
>   0x0cc, BIT(8), 0);
> @@ -466,7 +466,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
>  0x13c, 16, 3, BIT(31), 0);
>
>  static SUNXI_CCU_GATE(ac_dig_clk,  "ac-dig",   "pll-audio",
> - 0x140, BIT(31), 0);
> + 0x140, BIT(31), CLK_SET_RATE_PARENT);
>  static SUNXI_CCU_GATE(avs_clk, "avs",  "osc24M",
>   0x144, BIT(31), 0);
>
> --
> 2.10.2
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks

[Code Kipper]

On 11 November 2016 at 11:05, Chen-Yu Tsai  wrote:
> The audio module clocks are supposed to be set according to the sample
> rate of the audio stream. The audio PLL provides the clock signal for
> thees module clocks, and only it is freely tunable.
nick! these
CK
>
> Set CLK_SET_RATE_PARENT for the audio module clocks so their users can
> properly tune the clock rate.
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Signed-off-by: Chen-Yu Tsai 
> ---
>  drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
> b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> index 4d70590f05e3..21c427d86f28 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
> @@ -394,16 +394,16 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", 
> mod0_default_parents, 0x0a4,
>  static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
> "pll-audio-2x", "pll-audio" };
>  static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
> -  0x0b0, 16, 2, BIT(31), 0);
> +  0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
> -  0x0b4, 16, 2, BIT(31), 0);
> +  0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_MUX_WITH_GATE(i2s2_clk, "i2s2", i2s_parents,
> -  0x0b8, 16, 2, BIT(31), 0);
> +  0x0b8, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_M_WITH_GATE(spdif_clk, "spdif", "pll-audio",
> -0x0c0, 0, 4, BIT(31), 0);
> +0x0c0, 0, 4, BIT(31), CLK_SET_RATE_PARENT);
>
>  static SUNXI_CCU_GATE(usb_phy0_clk,"usb-phy0", "osc24M",
>   0x0cc, BIT(8), 0);
> @@ -466,7 +466,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
>  0x13c, 16, 3, BIT(31), 0);
>
>  static SUNXI_CCU_GATE(ac_dig_clk,  "ac-dig",   "pll-audio",
> - 0x140, BIT(31), 0);
> + 0x140, BIT(31), CLK_SET_RATE_PARENT);
>  static SUNXI_CCU_GATE(avs_clk, "avs",  "osc24M",
>   0x144, BIT(31), 0);
>
> --
> 2.10.2
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH 07/14] ASoC: Add sun8i audio card

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the audio card for sun8i SoC. This card links the codec driver
> (digital part) with the DAI driver. The analog codec driver is
> added as an aux_device.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |  14 +++
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i.c  | 101 
> +++
>  3 files changed, 116 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index 9e287b0..7b97395 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -27,6 +27,20 @@ config SND_SUN4I_SPDIF
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
>
> +config SND_SUN8I
> +   tristate "Allwinner SUN6I/SUN8I audio card support"
> +   select SND_SUN8I_CODEC
> +   select SND_SUN4I_I2S
> +   select SND_SUN8I_CODEC_ANALOG
> +   select REGMAP_MMIO
> +   help
> + This option enables the audio card for Allwinner A33 (sun8i) SoC.
> + It enables the DAI driver (SND_SUN4I_I2S), the digital audio
> + codec driver (SND_SUN8I_CODEC) and the analog codec driver
> + (SND_SUN8I_CODEC_ANALOG).
> +
> + Say Y or M if you want to add sun8i/6i card support
> +
>  config SND_SUN8I_CODEC
> tristate "Allwinner SUN8I audio codec"
> select REGMAP_MMIO
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 1da63d3..7f1bab9 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,5 +1,6 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I) += sun8i.o
>  obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o
>  obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i.c b/sound/soc/sunxi/sun8i.c
> new file mode 100644
> index 000..565cd88
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i.c
> @@ -0,0 +1,101 @@
> +/*
> + * ALSA SoC driver for Allwinner sun8i SoC
> + *
> + * Copyright (C) 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static struct snd_soc_aux_dev sun8i_audio_prcm_aux_devs[] = {
> +   {
> +   .name = "sun8i-codec-analog",
> +   .codec_name = "sun8i-codec-analog.0",
> +   },
> +};
> +
> +static struct snd_soc_dai_link sun8i_dai_link = {
> +   .name   = "sun4i-i2s",
> +   .stream_name= "Playback",
> +   .codec_dai_name = "sun8i",
> +   .dai_fmt= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S |
> +   SND_SOC_DAIFMT_CBM_CFM,
> +};
> +
> +static struct snd_soc_card sun8i_card = {
> +   .name   = "sun8i-card",
> +   .owner  = THIS_MODULE,
> +   .dai_link   = _dai_link,
> +   .num_links  = 1,
> +   .aux_dev= sun8i_audio_prcm_aux_devs,
> +   .num_aux_devs   = ARRAY_SIZE(sun8i_audio_prcm_aux_devs),
> +};
> +
> +static int sun8i_probe(struct platform_device *pdev)
> +{
> +   struct snd_soc_dai_link *link = _dai_link;
> +   struct device_node *np = pdev->dev.of_node;
> +   int ret;
> +
> +   /* register the soc card */
> +   sun8i_card.dev = >dev;
> +
> +   /* Retrieve the audio-codec from DT */
> +   link->codec_of_node = of_parse_phandle(np, "allwinner,audio-codec", 
> 0);
> +   if (!link->codec_of_node) {
> +   dev_err(>dev, "Missing audio codec\n");
> +   return -EINVAL;
> +   }
> +
> +   /* Retrieve DAI from DT */
> +   link->cpu_of_node = of_parse_phandle(np, "allwinner,i2s-controller", 
> 0);
Now that I've spent some time trying to add my changes for the H3
ontop of your code,  I think this file should be more generic and rely
on the dtsi more. It's pretty A33 specific but with little effort it
can be worked to cover all of the sun8i type drivers. I would change
"allwinner,i2s-controller" to "allwinner,audio-dai" for starters and
then maybe pull in some info for the dai-link from the dtsi.
CK
> +   if (!link->cpu_of_node) {
> +   dev_err(>dev, "Missing I2S controller\n");
> +   

Re: [PATCH 07/14] ASoC: Add sun8i audio card

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the audio card for sun8i SoC. This card links the codec driver
> (digital part) with the DAI driver. The analog codec driver is
> added as an aux_device.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |  14 +++
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i.c  | 101 
> +++
>  3 files changed, 116 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index 9e287b0..7b97395 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -27,6 +27,20 @@ config SND_SUN4I_SPDIF
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
>
> +config SND_SUN8I
> +   tristate "Allwinner SUN6I/SUN8I audio card support"
> +   select SND_SUN8I_CODEC
> +   select SND_SUN4I_I2S
> +   select SND_SUN8I_CODEC_ANALOG
> +   select REGMAP_MMIO
> +   help
> + This option enables the audio card for Allwinner A33 (sun8i) SoC.
> + It enables the DAI driver (SND_SUN4I_I2S), the digital audio
> + codec driver (SND_SUN8I_CODEC) and the analog codec driver
> + (SND_SUN8I_CODEC_ANALOG).
> +
> + Say Y or M if you want to add sun8i/6i card support
> +
>  config SND_SUN8I_CODEC
> tristate "Allwinner SUN8I audio codec"
> select REGMAP_MMIO
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 1da63d3..7f1bab9 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,5 +1,6 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I) += sun8i.o
>  obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o
>  obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i.c b/sound/soc/sunxi/sun8i.c
> new file mode 100644
> index 000..565cd88
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i.c
> @@ -0,0 +1,101 @@
> +/*
> + * ALSA SoC driver for Allwinner sun8i SoC
> + *
> + * Copyright (C) 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static struct snd_soc_aux_dev sun8i_audio_prcm_aux_devs[] = {
> +   {
> +   .name = "sun8i-codec-analog",
> +   .codec_name = "sun8i-codec-analog.0",
> +   },
> +};
> +
> +static struct snd_soc_dai_link sun8i_dai_link = {
> +   .name   = "sun4i-i2s",
> +   .stream_name= "Playback",
> +   .codec_dai_name = "sun8i",
> +   .dai_fmt= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S |
> +   SND_SOC_DAIFMT_CBM_CFM,
> +};
> +
> +static struct snd_soc_card sun8i_card = {
> +   .name   = "sun8i-card",
> +   .owner  = THIS_MODULE,
> +   .dai_link   = _dai_link,
> +   .num_links  = 1,
> +   .aux_dev= sun8i_audio_prcm_aux_devs,
> +   .num_aux_devs   = ARRAY_SIZE(sun8i_audio_prcm_aux_devs),
> +};
> +
> +static int sun8i_probe(struct platform_device *pdev)
> +{
> +   struct snd_soc_dai_link *link = _dai_link;
> +   struct device_node *np = pdev->dev.of_node;
> +   int ret;
> +
> +   /* register the soc card */
> +   sun8i_card.dev = >dev;
> +
> +   /* Retrieve the audio-codec from DT */
> +   link->codec_of_node = of_parse_phandle(np, "allwinner,audio-codec", 
> 0);
> +   if (!link->codec_of_node) {
> +   dev_err(>dev, "Missing audio codec\n");
> +   return -EINVAL;
> +   }
> +
> +   /* Retrieve DAI from DT */
> +   link->cpu_of_node = of_parse_phandle(np, "allwinner,i2s-controller", 
> 0);
Now that I've spent some time trying to add my changes for the H3
ontop of your code,  I think this file should be more generic and rely
on the dtsi more. It's pretty A33 specific but with little effort it
can be worked to cover all of the sun8i type drivers. I would change
"allwinner,i2s-controller" to "allwinner,audio-dai" for starters and
then maybe pull in some info for the dai-link from the dtsi.
CK
> +   if (!link->cpu_of_node) {
> +   dev_err(>dev, "Missing I2S controller\n");
> +   return -EINVAL;
> +   }
> +
> +   link->platform_of_node = link->cpu_of_node;
> +
> +   /* Register 

Re: [PATCH 03/14] ASoC: sun4i-i2s: Add apb reset

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add APB deassert function for sun4i-i2s driver.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/sun4i-i2s.c | 16 +++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 687a8f8..f3f7026 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -17,6 +17,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #include 
>  #include 
> @@ -589,6 +590,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>  {
> struct sun4i_i2s *i2s;
> struct resource *res;
> +   struct reset_control *reset_apb;
> void __iomem *regs;
> int irq, ret;
>
> @@ -626,7 +628,19 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
> dev_err(>dev, "Can't get our mod clock\n");
> return PTR_ERR(i2s->mod_clk);
> }
> -
> +
> +   reset_apb = devm_reset_control_get(>dev, "apb_reset");
> +   if (IS_ERR(reset_apb)) {
> +   dev_err(>dev, "Can't get apb reset\n");
> +   return PTR_ERR(i2s->mod_clk);
> +   }
> +
> +   ret = reset_control_deassert(reset_apb);
> +   if (ret < 0) {
> +   dev_err(>dev, "Can't deassert apb reset (%d)\n", ret);
> +   return ret;
> +   }
> +
Is this functionality only required for A31 and onwards?,
CK
> i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
> i2s->playback_dma_data.maxburst = 4;
>
> --
> 2.9.3
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 03/14] ASoC: sun4i-i2s: Add apb reset

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add APB deassert function for sun4i-i2s driver.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/sun4i-i2s.c | 16 +++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
> index 687a8f8..f3f7026 100644
> --- a/sound/soc/sunxi/sun4i-i2s.c
> +++ b/sound/soc/sunxi/sun4i-i2s.c
> @@ -17,6 +17,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #include 
>  #include 
> @@ -589,6 +590,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
>  {
> struct sun4i_i2s *i2s;
> struct resource *res;
> +   struct reset_control *reset_apb;
> void __iomem *regs;
> int irq, ret;
>
> @@ -626,7 +628,19 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
> dev_err(>dev, "Can't get our mod clock\n");
> return PTR_ERR(i2s->mod_clk);
> }
> -
> +
> +   reset_apb = devm_reset_control_get(>dev, "apb_reset");
> +   if (IS_ERR(reset_apb)) {
> +   dev_err(>dev, "Can't get apb reset\n");
> +   return PTR_ERR(i2s->mod_clk);
> +   }
> +
> +   ret = reset_control_deassert(reset_apb);
> +   if (ret < 0) {
> +   dev_err(>dev, "Can't deassert apb reset (%d)\n", ret);
> +   return ret;
> +   }
> +
Is this functionality only required for A31 and onwards?,
CK
> i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
> i2s->playback_dma_data.maxburst = 4;
>
> --
> 2.9.3
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 04/14] ASoC: Add sun8i analog codec driver

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the analog part of the sun8i (A33) codec driver. This driver
> implements all the analog part of the codec using PRCM registers.
>
> The read/write regmap functions must be handled in a custom way as
> the PRCM register behaves as "mailbox" register.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |   7 +
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i-codec-analog.c | 304 
> +++
>  3 files changed, 312 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i-codec-analog.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index dd23682..7aee95a 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -26,4 +26,11 @@ config SND_SUN4I_SPDIF
> help
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
> +
> +config SND_SUN8I_CODEC_ANALOG
> +   tristate "Allwinner SUN8I analog codec"
> +   select REGMAP_MMIO
> +help
> + Say Y or M if you want to add sun8i analog audiocodec support
> +
>  endmenu
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 604c7b84..241c0df 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i-codec-analog.c 
> b/sound/soc/sunxi/sun8i-codec-analog.c
> new file mode 100644
> index 000..be3d540
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i-codec-analog.c
> @@ -0,0 +1,304 @@
> +/*
> + * This driver supports the analog controls for the internal codec
> + * found in Allwinner's A31s, A33 and A23 SoCs.
> + *
> + * Copyright 2016 Chen-Yu Tsai 
> + * Copyright 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +/* Codec analog control register offsets and bit fields */
> +#define SUN8I_ADDA_HP_VOLC 0x00
> +#define SUN8I_ADDA_HP_VOLC_PA_CLK_GATE 7
> +#define SUN8I_ADDA_HP_VOLC_HP_VOL  0
> +#define SUN8I_ADDA_LOMIXSC 0x01
> +#define SUN8I_ADDA_LOMIXSC_MIC16
> +#define SUN8I_ADDA_LOMIXSC_MIC25
> +#define SUN8I_ADDA_LOMIXSC_PHONE   4
> +#define SUN8I_ADDA_LOMIXSC_PHONEN  3
> +#define SUN8I_ADDA_LOMIXSC_LINEINL 2
> +#define SUN8I_ADDA_LOMIXSC_DACL1
> +#define SUN8I_ADDA_LOMIXSC_DACR0
> +#define SUN8I_ADDA_ROMIXSC 0x02
> +#define SUN8I_ADDA_ROMIXSC_MIC16
> +#define SUN8I_ADDA_ROMIXSC_MIC25
> +#define SUN8I_ADDA_ROMIXSC_PHONE   4
> +#define SUN8I_ADDA_ROMIXSC_PHONEP  3
> +#define SUN8I_ADDA_ROMIXSC_LINEINR 2
> +#define SUN8I_ADDA_ROMIXSC_DACR1
> +#define SUN8I_ADDA_ROMIXSC_DACL0
> +#define SUN8I_ADDA_DAC_PA_SRC  0x03
> +#define SUN8I_ADDA_DAC_PA_SRC_DACAREN  7
> +#define SUN8I_ADDA_DAC_PA_SRC_DACALEN  6
> +#define SUN8I_ADDA_DAC_PA_SRC_RMIXEN   5
> +#define SUN8I_ADDA_DAC_PA_SRC_LMIXEN   4
> +#define SUN8I_ADDA_DAC_PA_SRC_RHPPAMUTE3
> +#define SUN8I_ADDA_DAC_PA_SRC_LHPPAMUTE2
> +#define SUN8I_ADDA_DAC_PA_SRC_RHPIS1
> +#define SUN8I_ADDA_DAC_PA_SRC_LHPIS0
> +#define SUN8I_ADDA_PHONEIN_GCTRL   0x04
> +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONEPG   4
> +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONENG   0
> +#define SUN8I_ADDA_LINEIN_GCTRL0x05
> +#define SUN8I_ADDA_LINEIN_GCTRL_LINEING4
> +#define SUN8I_ADDA_LINEIN_GCTRL_PHONEG 0
> +#define SUN8I_ADDA_MICIN_GCTRL 0x06
> +#define 

Re: [PATCH 04/14] ASoC: Add sun8i analog codec driver

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the analog part of the sun8i (A33) codec driver. This driver
> implements all the analog part of the codec using PRCM registers.
>
> The read/write regmap functions must be handled in a custom way as
> the PRCM register behaves as "mailbox" register.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |   7 +
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i-codec-analog.c | 304 
> +++
>  3 files changed, 312 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i-codec-analog.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index dd23682..7aee95a 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -26,4 +26,11 @@ config SND_SUN4I_SPDIF
> help
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
> +
> +config SND_SUN8I_CODEC_ANALOG
> +   tristate "Allwinner SUN8I analog codec"
> +   select REGMAP_MMIO
> +help
> + Say Y or M if you want to add sun8i analog audiocodec support
> +
>  endmenu
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 604c7b84..241c0df 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i-codec-analog.c 
> b/sound/soc/sunxi/sun8i-codec-analog.c
> new file mode 100644
> index 000..be3d540
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i-codec-analog.c
> @@ -0,0 +1,304 @@
> +/*
> + * This driver supports the analog controls for the internal codec
> + * found in Allwinner's A31s, A33 and A23 SoCs.
> + *
> + * Copyright 2016 Chen-Yu Tsai 
> + * Copyright 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +/* Codec analog control register offsets and bit fields */
> +#define SUN8I_ADDA_HP_VOLC 0x00
> +#define SUN8I_ADDA_HP_VOLC_PA_CLK_GATE 7
> +#define SUN8I_ADDA_HP_VOLC_HP_VOL  0
> +#define SUN8I_ADDA_LOMIXSC 0x01
> +#define SUN8I_ADDA_LOMIXSC_MIC16
> +#define SUN8I_ADDA_LOMIXSC_MIC25
> +#define SUN8I_ADDA_LOMIXSC_PHONE   4
> +#define SUN8I_ADDA_LOMIXSC_PHONEN  3
> +#define SUN8I_ADDA_LOMIXSC_LINEINL 2
> +#define SUN8I_ADDA_LOMIXSC_DACL1
> +#define SUN8I_ADDA_LOMIXSC_DACR0
> +#define SUN8I_ADDA_ROMIXSC 0x02
> +#define SUN8I_ADDA_ROMIXSC_MIC16
> +#define SUN8I_ADDA_ROMIXSC_MIC25
> +#define SUN8I_ADDA_ROMIXSC_PHONE   4
> +#define SUN8I_ADDA_ROMIXSC_PHONEP  3
> +#define SUN8I_ADDA_ROMIXSC_LINEINR 2
> +#define SUN8I_ADDA_ROMIXSC_DACR1
> +#define SUN8I_ADDA_ROMIXSC_DACL0
> +#define SUN8I_ADDA_DAC_PA_SRC  0x03
> +#define SUN8I_ADDA_DAC_PA_SRC_DACAREN  7
> +#define SUN8I_ADDA_DAC_PA_SRC_DACALEN  6
> +#define SUN8I_ADDA_DAC_PA_SRC_RMIXEN   5
> +#define SUN8I_ADDA_DAC_PA_SRC_LMIXEN   4
> +#define SUN8I_ADDA_DAC_PA_SRC_RHPPAMUTE3
> +#define SUN8I_ADDA_DAC_PA_SRC_LHPPAMUTE2
> +#define SUN8I_ADDA_DAC_PA_SRC_RHPIS1
> +#define SUN8I_ADDA_DAC_PA_SRC_LHPIS0
> +#define SUN8I_ADDA_PHONEIN_GCTRL   0x04
> +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONEPG   4
> +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONENG   0
> +#define SUN8I_ADDA_LINEIN_GCTRL0x05
> +#define SUN8I_ADDA_LINEIN_GCTRL_LINEING4
> +#define SUN8I_ADDA_LINEIN_GCTRL_PHONEG 0
> +#define SUN8I_ADDA_MICIN_GCTRL 0x06
> +#define SUN8I_ADDA_MICIN_GCTRL_MIC1G   4
> +#define SUN8I_ADDA_MICIN_GCTRL_MIC2G   0
> +#define 

Re: [PATCH 07/14] ASoC: Add sun8i audio card

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the audio card for sun8i SoC. This card links the codec driver
> (digital part) with the DAI driver. The analog codec driver is
> added as an aux_device.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |  14 +++
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i.c  | 101 
> +++
>  3 files changed, 116 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index 9e287b0..7b97395 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -27,6 +27,20 @@ config SND_SUN4I_SPDIF
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
>
> +config SND_SUN8I
> +   tristate "Allwinner SUN6I/SUN8I audio card support"
> +   select SND_SUN8I_CODEC
> +   select SND_SUN4I_I2S
> +   select SND_SUN8I_CODEC_ANALOG
> +   select REGMAP_MMIO
> +   help
> + This option enables the audio card for Allwinner A33 (sun8i) SoC.
> + It enables the DAI driver (SND_SUN4I_I2S), the digital audio
> + codec driver (SND_SUN8I_CODEC) and the analog codec driver
> + (SND_SUN8I_CODEC_ANALOG).
> +
> + Say Y or M if you want to add sun8i/6i card support
> +
>  config SND_SUN8I_CODEC
> tristate "Allwinner SUN8I audio codec"
> select REGMAP_MMIO
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 1da63d3..7f1bab9 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,5 +1,6 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I) += sun8i.o
Great work with this...I've been battling with the audio codec for the
h3 for a while and it looks like almost everything that I need is
delivered here.
>  obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o
>  obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i.c b/sound/soc/sunxi/sun8i.c
> new file mode 100644
> index 000..565cd88
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i.c
> @@ -0,0 +1,101 @@
> +/*
> + * ALSA SoC driver for Allwinner sun8i SoC
> + *
> + * Copyright (C) 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static struct snd_soc_aux_dev sun8i_audio_prcm_aux_devs[] = {
> +   {
> +   .name = "sun8i-codec-analog",
> +   .codec_name = "sun8i-codec-analog.0",
> +   },
> +};
> +
> +static struct snd_soc_dai_link sun8i_dai_link = {
> +   .name   = "sun4i-i2s",
> +   .stream_name= "Playback",
> +   .codec_dai_name = "sun8i",
> +   .dai_fmt= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S |
> +   SND_SOC_DAIFMT_CBM_CFM,
> +};
> +
> +static struct snd_soc_card sun8i_card = {
> +   .name   = "sun8i-card",
> +   .owner  = THIS_MODULE,
> +   .dai_link   = _dai_link,
> +   .num_links  = 1,
> +   .aux_dev= sun8i_audio_prcm_aux_devs,
> +   .num_aux_devs   = ARRAY_SIZE(sun8i_audio_prcm_aux_devs),
> +};
> +
> +static int sun8i_probe(struct platform_device *pdev)
> +{
> +   struct snd_soc_dai_link *link = _dai_link;
> +   struct device_node *np = pdev->dev.of_node;
> +   int ret;
> +
> +   /* register the soc card */
> +   sun8i_card.dev = >dev;
> +
> +   /* Retrieve the audio-codec from DT */
> +   link->codec_of_node = of_parse_phandle(np, "allwinner,audio-codec", 
> 0);
> +   if (!link->codec_of_node) {
> +   dev_err(>dev, "Missing audio codec\n");
> +   return -EINVAL;
> +   }
> +
> +   /* Retrieve DAI from DT */
> +   link->cpu_of_node = of_parse_phandle(np, "allwinner,i2s-controller", 
> 0);
> +   if (!link->cpu_of_node) {
> +   dev_err(>dev, "Missing I2S controller\n");
> +   return -EINVAL;
> +   }
> +
My one question is that we have sun8i-a23 and sun8i-a33, and I think
we need to distinguish them here. The sun8i-a23 doesn't use the i2s
block but does use the prcm.
> +   link->platform_of_node = link->cpu_of_node;
> +
> 

Re: [PATCH 07/14] ASoC: Add sun8i audio card

[Code Kipper]

On 4 October 2016 at 11:46, Mylène Josserand
 wrote:
> Add the audio card for sun8i SoC. This card links the codec driver
> (digital part) with the DAI driver. The analog codec driver is
> added as an aux_device.
>
> Signed-off-by: Mylène Josserand 
> ---
>  sound/soc/sunxi/Kconfig  |  14 +++
>  sound/soc/sunxi/Makefile |   1 +
>  sound/soc/sunxi/sun8i.c  | 101 
> +++
>  3 files changed, 116 insertions(+)
>  create mode 100644 sound/soc/sunxi/sun8i.c
>
> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
> index 9e287b0..7b97395 100644
> --- a/sound/soc/sunxi/Kconfig
> +++ b/sound/soc/sunxi/Kconfig
> @@ -27,6 +27,20 @@ config SND_SUN4I_SPDIF
>   Say Y or M to add support for the S/PDIF audio block in the 
> Allwinner
>   A10 and affiliated SoCs.
>
> +config SND_SUN8I
> +   tristate "Allwinner SUN6I/SUN8I audio card support"
> +   select SND_SUN8I_CODEC
> +   select SND_SUN4I_I2S
> +   select SND_SUN8I_CODEC_ANALOG
> +   select REGMAP_MMIO
> +   help
> + This option enables the audio card for Allwinner A33 (sun8i) SoC.
> + It enables the DAI driver (SND_SUN4I_I2S), the digital audio
> + codec driver (SND_SUN8I_CODEC) and the analog codec driver
> + (SND_SUN8I_CODEC_ANALOG).
> +
> + Say Y or M if you want to add sun8i/6i card support
> +
>  config SND_SUN8I_CODEC
> tristate "Allwinner SUN8I audio codec"
> select REGMAP_MMIO
> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
> index 1da63d3..7f1bab9 100644
> --- a/sound/soc/sunxi/Makefile
> +++ b/sound/soc/sunxi/Makefile
> @@ -1,5 +1,6 @@
>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o
>  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
> +obj-$(CONFIG_SND_SUN8I) += sun8i.o
Great work with this...I've been battling with the audio codec for the
h3 for a while and it looks like almost everything that I need is
delivered here.
>  obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o
>  obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o
> diff --git a/sound/soc/sunxi/sun8i.c b/sound/soc/sunxi/sun8i.c
> new file mode 100644
> index 000..565cd88
> --- /dev/null
> +++ b/sound/soc/sunxi/sun8i.c
> @@ -0,0 +1,101 @@
> +/*
> + * ALSA SoC driver for Allwinner sun8i SoC
> + *
> + * Copyright (C) 2016 Mylène Josserand 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static struct snd_soc_aux_dev sun8i_audio_prcm_aux_devs[] = {
> +   {
> +   .name = "sun8i-codec-analog",
> +   .codec_name = "sun8i-codec-analog.0",
> +   },
> +};
> +
> +static struct snd_soc_dai_link sun8i_dai_link = {
> +   .name   = "sun4i-i2s",
> +   .stream_name= "Playback",
> +   .codec_dai_name = "sun8i",
> +   .dai_fmt= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S |
> +   SND_SOC_DAIFMT_CBM_CFM,
> +};
> +
> +static struct snd_soc_card sun8i_card = {
> +   .name   = "sun8i-card",
> +   .owner  = THIS_MODULE,
> +   .dai_link   = _dai_link,
> +   .num_links  = 1,
> +   .aux_dev= sun8i_audio_prcm_aux_devs,
> +   .num_aux_devs   = ARRAY_SIZE(sun8i_audio_prcm_aux_devs),
> +};
> +
> +static int sun8i_probe(struct platform_device *pdev)
> +{
> +   struct snd_soc_dai_link *link = _dai_link;
> +   struct device_node *np = pdev->dev.of_node;
> +   int ret;
> +
> +   /* register the soc card */
> +   sun8i_card.dev = >dev;
> +
> +   /* Retrieve the audio-codec from DT */
> +   link->codec_of_node = of_parse_phandle(np, "allwinner,audio-codec", 
> 0);
> +   if (!link->codec_of_node) {
> +   dev_err(>dev, "Missing audio codec\n");
> +   return -EINVAL;
> +   }
> +
> +   /* Retrieve DAI from DT */
> +   link->cpu_of_node = of_parse_phandle(np, "allwinner,i2s-controller", 
> 0);
> +   if (!link->cpu_of_node) {
> +   dev_err(>dev, "Missing I2S controller\n");
> +   return -EINVAL;
> +   }
> +
My one question is that we have sun8i-a23 and sun8i-a33, and I think
we need to distinguish them here. The sun8i-a23 doesn't use the i2s
block but does use the prcm.
> +   link->platform_of_node = link->cpu_of_node;
> +
> +   /* Register the sound card */
> +   ret = devm_snd_soc_register_card(>dev, _card);
> +   if 

Re: [linux-sunxi] [PATCH v9 2/2] Add mixer controls: Line-In, FM-In, Mic 2, Capture Source, Differential Line-In.

[Code Kipper]

On 29 August 2016 at 20:03, Danny Milosavljevic  wrote:
>
> Note: Mic1 Capture Volume is in a different register on A20 than on A10.
> Note: Mic2 Capture Volume is in a different register on A20 than on A10.
> ---
>  sound/soc/sunxi/sun4i-codec.c | 256 
> ++
>  1 file changed, 236 insertions(+), 20 deletions(-)
Hi Danny,
I think this should be delivered in a series of patches like what I've
attempted to do here
https://github.com/codekipper/linux-sunxi/commits/sunxi-wip?page=2
I haven't worked with my A20 for a while which is why I haven't
delivered these changes, however summer is coming to an end and should
be able to retest and deliver soon.
I can see that there is a difference like you've mentioned between the
A10 and A20 with the MIC pre-amps so approve of the use of a common
array.
Something also looks wrong with the whitespacing for sun4i_codec_codec.
BR,
CK
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] [PATCH v9 2/2] Add mixer controls: Line-In, FM-In, Mic 2, Capture Source, Differential Line-In.

[Code Kipper]

On 29 August 2016 at 20:03, Danny Milosavljevic  wrote:
>
> Note: Mic1 Capture Volume is in a different register on A20 than on A10.
> Note: Mic2 Capture Volume is in a different register on A20 than on A10.
> ---
>  sound/soc/sunxi/sun4i-codec.c | 256 
> ++
>  1 file changed, 236 insertions(+), 20 deletions(-)
Hi Danny,
I think this should be delivered in a series of patches like what I've
attempted to do here
https://github.com/codekipper/linux-sunxi/commits/sunxi-wip?page=2
I haven't worked with my A20 for a while which is why I haven't
delivered these changes, however summer is coming to an end and should
be able to retest and deliver soon.
I can see that there is a difference like you've mentioned between the
A10 and A20 with the MIC pre-amps so approve of the use of a common
array.
Something also looks wrong with the whitespacing for sun4i_codec_codec.
BR,
CK
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH 1/2] ASoC: sunxi: Add bindings for sun6i to SPDIF

[Code Kipper]

On 30 July 2016 at 17:17, Maxime Ripard
 wrote:
> On Sat, Jul 30, 2016 at 04:27:15PM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its
>> reset is controlled via a separate reset controller.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt 
>> b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> index 13503aa..4fe80f7 100644
>> --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> @@ -9,6 +9,7 @@ Required properties:
>>
>>- compatible   : should be one of the following:
>>  - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
>> +- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
>>
>>- reg  : Offset and length of the register set for 
>> the device.
>>
>> @@ -25,6 +26,8 @@ Required properties:
>>   "apb" clock for the spdif bus.
>>   "spdif"   clock for spdif controller.
>>
>> +  - reset: reset specifier for the ahb reset (A31 and newer 
>> only)
>
> Isn't it resets ? (plural)

Dohh..yes it is. Do you want me to send an updated patch series, a
single patch change or could I beg for your commit massaging?
Thanks,
CK
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH 1/2] ASoC: sunxi: Add bindings for sun6i to SPDIF

[Code Kipper]

On 30 July 2016 at 17:17, Maxime Ripard
 wrote:
> On Sat, Jul 30, 2016 at 04:27:15PM +0200, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its
>> reset is controlled via a separate reset controller.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt 
>> b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> index 13503aa..4fe80f7 100644
>> --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>> @@ -9,6 +9,7 @@ Required properties:
>>
>>- compatible   : should be one of the following:
>>  - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
>> +- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
>>
>>- reg  : Offset and length of the register set for 
>> the device.
>>
>> @@ -25,6 +26,8 @@ Required properties:
>>   "apb" clock for the spdif bus.
>>   "spdif"   clock for spdif controller.
>>
>> +  - reset: reset specifier for the ahb reset (A31 and newer 
>> only)
>
> Isn't it resets ? (plural)

Dohh..yes it is. Do you want me to send an updated patch series, a
single patch change or could I beg for your commit massaging?
Thanks,
CK
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH 2/4] ASoC: sunxi: Add Allwinner A10 Digital Audio driver

[Code Kipper]

snip
> +
> +   /* Always favor the highest oversampling rate */
> +   for (i = (ARRAY_SIZE(sun4i_i2s_oversample_rates) - 1); i >= 0; i--) {
> +   unsigned int oversample_rate = sun4i_i2s_oversample_rates[i];
> +
> +   bclk_div = sun4i_i2s_get_bclk_div(i2s, oversample_rate,
> + word_size);
> +   mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate,
> + clk_rate,
> + rate);
> +
> +   if ((bclk_div >= 0) && (mclk_div >= 0))
> +   break;
> +   }
> +
> +   if (bclk_div < 0 && mclk_div < 0)
Hi Maxime,
this wouldn't work if one of the divs returns a valid value and I saw
this when working with this driver. Use if ((bclk_div < 0) ||
(mclk_div < 0)). Rest of the code looks code and I will have a go at
testing with it ASAP,
Great work,
CK
> +   return -EINVAL;
> +
> +   regmap_write(i2s->regmap, SUN4I_I2S_CLK_DIV_REG,
> +SUN4I_I2S_CLK_DIV_BCLK(bclk_div) |
> +SUN4I_I2S_CLK_DIV_MCLK(mclk_div) |
> +SUN4I_I2S_CLK_DIV_MCLK_EN);
> +
> +   return 0;
> +}
> +
> +static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
> +  struct snd_pcm_hw_params *params,
> +  struct snd_soc_dai *dai)
> +{
> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> +   int sr, wss;
> +   u32 width;
> +
> +   if (params_channels(params) != 2)
> +   return -EINVAL;
> +
> +   /* Enable the first output line */
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
> +  SUN4I_I2S_CTRL_SDO_EN_MASK,
> +  SUN4I_I2S_CTRL_SDO_EN(0));
> +
> +   /* Enable the first two channels */
> +   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
> +SUN4I_I2S_TX_CHAN_SEL(2));
> +
> +   /* Map them to the two first samples coming in */
> +   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
> +SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 
> 1));
> +
> +   switch (params_physical_width(params)) {
> +   case 16:
> +   width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> +   break;
> +   default:
> +   return -EINVAL;
> +   }
> +   i2s->playback_dma_data.addr_width = width;
> +
> +   sr = sun4i_i2s_params_to_sr(params);
> +   if (sr < 0)
> +   return -EINVAL;
> +
> +   wss = sun4i_i2s_params_to_wss(params);
> +   if (wss < 0)
> +   return -EINVAL;
> +
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
> +  SUN4I_I2S_FMT0_WSS_MASK | SUN4I_I2S_FMT0_SR_MASK,
> +  SUN4I_I2S_FMT0_WSS(wss) | SUN4I_I2S_FMT0_SR(sr));
> +
> +   return sun4i_i2s_set_clk_rate(i2s, params_rate(params),
> + params_width(params));
> +}
> +
> +static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
> +{
> +struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> +   u32 val;
> +
> +   /* DAI Mode */
> +   switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
> +   case SND_SOC_DAIFMT_I2S:
> +   val = SUN4I_I2S_FMT0_FMT_I2S;
> +   break;
> +   case SND_SOC_DAIFMT_LEFT_J:
> +   val = SUN4I_I2S_FMT0_FMT_LEFT_J;
> +   break;
> +   case SND_SOC_DAIFMT_RIGHT_J:
> +   val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
> +   break;
> +   default:
> +   return -EINVAL;
> +   }
> +
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
> +  SUN4I_I2S_FMT0_FMT_MASK,
> +  val);
> +
> +   /* DAI clock polarity */
> +   switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
> +   case SND_SOC_DAIFMT_IB_IF:
> +   /* Invert both clocks */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
> +   break;
> +   case SND_SOC_DAIFMT_IB_NF:
> +   /* Invert bit clock */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL;
> +   break;
> +   case SND_SOC_DAIFMT_NB_IF:
> +   /* Invert frame clock */
> +   val = SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL;
> +   break;
> +   case SND_SOC_DAIFMT_NB_NF:
> +   /* Nothing to do for both normal cases */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL;
> +   break;
> +   default:
> +   return 

Re: [PATCH 2/4] ASoC: sunxi: Add Allwinner A10 Digital Audio driver

[Code Kipper]

snip
> +
> +   /* Always favor the highest oversampling rate */
> +   for (i = (ARRAY_SIZE(sun4i_i2s_oversample_rates) - 1); i >= 0; i--) {
> +   unsigned int oversample_rate = sun4i_i2s_oversample_rates[i];
> +
> +   bclk_div = sun4i_i2s_get_bclk_div(i2s, oversample_rate,
> + word_size);
> +   mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate,
> + clk_rate,
> + rate);
> +
> +   if ((bclk_div >= 0) && (mclk_div >= 0))
> +   break;
> +   }
> +
> +   if (bclk_div < 0 && mclk_div < 0)
Hi Maxime,
this wouldn't work if one of the divs returns a valid value and I saw
this when working with this driver. Use if ((bclk_div < 0) ||
(mclk_div < 0)). Rest of the code looks code and I will have a go at
testing with it ASAP,
Great work,
CK
> +   return -EINVAL;
> +
> +   regmap_write(i2s->regmap, SUN4I_I2S_CLK_DIV_REG,
> +SUN4I_I2S_CLK_DIV_BCLK(bclk_div) |
> +SUN4I_I2S_CLK_DIV_MCLK(mclk_div) |
> +SUN4I_I2S_CLK_DIV_MCLK_EN);
> +
> +   return 0;
> +}
> +
> +static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
> +  struct snd_pcm_hw_params *params,
> +  struct snd_soc_dai *dai)
> +{
> +   struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> +   int sr, wss;
> +   u32 width;
> +
> +   if (params_channels(params) != 2)
> +   return -EINVAL;
> +
> +   /* Enable the first output line */
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
> +  SUN4I_I2S_CTRL_SDO_EN_MASK,
> +  SUN4I_I2S_CTRL_SDO_EN(0));
> +
> +   /* Enable the first two channels */
> +   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
> +SUN4I_I2S_TX_CHAN_SEL(2));
> +
> +   /* Map them to the two first samples coming in */
> +   regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
> +SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 
> 1));
> +
> +   switch (params_physical_width(params)) {
> +   case 16:
> +   width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> +   break;
> +   default:
> +   return -EINVAL;
> +   }
> +   i2s->playback_dma_data.addr_width = width;
> +
> +   sr = sun4i_i2s_params_to_sr(params);
> +   if (sr < 0)
> +   return -EINVAL;
> +
> +   wss = sun4i_i2s_params_to_wss(params);
> +   if (wss < 0)
> +   return -EINVAL;
> +
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
> +  SUN4I_I2S_FMT0_WSS_MASK | SUN4I_I2S_FMT0_SR_MASK,
> +  SUN4I_I2S_FMT0_WSS(wss) | SUN4I_I2S_FMT0_SR(sr));
> +
> +   return sun4i_i2s_set_clk_rate(i2s, params_rate(params),
> + params_width(params));
> +}
> +
> +static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
> +{
> +struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
> +   u32 val;
> +
> +   /* DAI Mode */
> +   switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
> +   case SND_SOC_DAIFMT_I2S:
> +   val = SUN4I_I2S_FMT0_FMT_I2S;
> +   break;
> +   case SND_SOC_DAIFMT_LEFT_J:
> +   val = SUN4I_I2S_FMT0_FMT_LEFT_J;
> +   break;
> +   case SND_SOC_DAIFMT_RIGHT_J:
> +   val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
> +   break;
> +   default:
> +   return -EINVAL;
> +   }
> +
> +   regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG,
> +  SUN4I_I2S_FMT0_FMT_MASK,
> +  val);
> +
> +   /* DAI clock polarity */
> +   switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
> +   case SND_SOC_DAIFMT_IB_IF:
> +   /* Invert both clocks */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
> +   break;
> +   case SND_SOC_DAIFMT_IB_NF:
> +   /* Invert bit clock */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL;
> +   break;
> +   case SND_SOC_DAIFMT_NB_IF:
> +   /* Invert frame clock */
> +   val = SUN4I_I2S_FMT0_LRCLK_POLARITY_INVERTED |
> +   SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL;
> +   break;
> +   case SND_SOC_DAIFMT_NB_NF:
> +   /* Nothing to do for both normal cases */
> +   val = SUN4I_I2S_FMT0_BCLK_POLARITY_NORMAL |
> +   SUN4I_I2S_FMT0_LRCLK_POLARITY_NORMAL;
> +   break;
> +   default:
> +   return 

Re: [linux-sunxi] Re: [PATCH v8 2/2] ASoc: sun4i-codec: Add FM, Line and Mic inputs

[Code Kipper]

Hi Danny,
I've got some patches to go which covers pretty much everything that
we can manage with the sun4i-codec. I'm only lacking testing of
certain bits as I don't have capable hardware(i.e. FM capture). I've
ignored the phone out part of the A20 as I couldn't find the pins.
I'll try to upload them to my github this weekend. You should have
authorship on some of these so when I send the link feel free to
claim.
BR,
CK

On 12 March 2016 at 08:52, Danny Milosavljevic  wrote:
> Hi,
>
> does anyone know the answer to the questions below?
>
>> The other direction (making two controls which both do the same and update
>> each other's value) doesn't seem to be easily available.
>
>> Should I write a _put handler that does it manually?
>
>> (Or should that be handled by alsa-lib mixer modules instead?)
>
>> Is it possible to merge the "Left Mixer" control and respective
>> "Right Mixer" control into one selem in alsamixer?
>>
>> Because alsamixer actually has support for one-sided muting.
>
> If that's unknown, I can post v9 without doing the grouping-together of mixer 
> controls and we can use it like that - I don't want the patch to stall 
> indefinitely on mere usability issues...
>
> Regards,
> Danny
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] Re: [PATCH v8 2/2] ASoc: sun4i-codec: Add FM, Line and Mic inputs

[Code Kipper]

Hi Danny,
I've got some patches to go which covers pretty much everything that
we can manage with the sun4i-codec. I'm only lacking testing of
certain bits as I don't have capable hardware(i.e. FM capture). I've
ignored the phone out part of the A20 as I couldn't find the pins.
I'll try to upload them to my github this weekend. You should have
authorship on some of these so when I send the link feel free to
claim.
BR,
CK

On 12 March 2016 at 08:52, Danny Milosavljevic  wrote:
> Hi,
>
> does anyone know the answer to the questions below?
>
>> The other direction (making two controls which both do the same and update
>> each other's value) doesn't seem to be easily available.
>
>> Should I write a _put handler that does it manually?
>
>> (Or should that be handled by alsa-lib mixer modules instead?)
>
>> Is it possible to merge the "Left Mixer" control and respective
>> "Right Mixer" control into one selem in alsamixer?
>>
>> Because alsamixer actually has support for one-sided muting.
>
> If that's unknown, I can post v9 without doing the grouping-together of mixer 
> controls and we can use it like that - I don't want the patch to stall 
> indefinitely on mere usability issues...
>
> Regards,
> Danny
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] Re: [PATCH v7 0/2] ASoC: Add SPDIF support for Allwinner SoCs

[Code Kipper]

On 22 February 2016 at 04:12, Mark Brown  wrote:
> On Sun, Feb 21, 2016 at 12:13:36PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> For now just the SPDIF transmitter has been tested on a Mele A2000(A10)
>> and a Itead Ibox(A20).
>
> This was already applied.  If any updates are required or you are
> submitting further changes they should be sent as incremental updates
> against current git, existing patches will not be replaced.

No worries...I saw the ACK from Maxime and then your comment so I
thought I needed to do another revision. I can push an incremental
update later,
thanks,
CK
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] Re: [PATCH v7 0/2] ASoC: Add SPDIF support for Allwinner SoCs

[Code Kipper]

On 22 February 2016 at 04:12, Mark Brown  wrote:
> On Sun, Feb 21, 2016 at 12:13:36PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> For now just the SPDIF transmitter has been tested on a Mele A2000(A10)
>> and a Itead Ibox(A20).
>
> This was already applied.  If any updates are required or you are
> submitting further changes they should be sent as incremental updates
> against current git, existing patches will not be replaced.

No worries...I saw the ACK from Maxime and then your comment so I
thought I needed to do another revision. I can push an incremental
update later,
thanks,
CK
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Re: [PATCH v5 0/2] ASoC: Add SPDIF support for Allwinner SoCs

[Code Kipper]

NAK...last bunch of changes introduced a warning which slipped
through, I'll fix that and send a new patch series.
CK

On 8 February 2016 at 16:26,   wrote:
> From: Marcus Cooper 
>
> This patch set adds support for the Allwinner SPDIF transceiver.
>
> For now just the SPDIF transmitter has been tested on a Mele A2000(A10)
> and a Itead Ibox(A20).
>
> In order for this patch set to be functional we require an audio clock patch
> which will be delivered separately. For those that are interested I've pushed
> the patches here with all the required changes to get SPDIF audio out of the
> device.
>
> https://github.com/codekipper/linux-sunxi/commits/spdif_delivery
>
> Thanks in advance,
> CK
>
> ---
> Changes since v4:
> - corrected indentation issues
> - removed old macros
> - removed unnecessary enabling of apb clock
>
> Changes since v3:
> - removed code required for spdif capture
> - added disable/enable of apb clk to suspend/resume.
> - removed unnecessary dt checks in probe
> - fixed error conditions in probe/resume
> - modified pm_runtime functionality and confirmed that driver worked when PM 
> was disabled.
> - removed .owner from platform driver
> - renamed bindings file
>
> Changes since v2:
> - removed sunxi-machine-spdif and replaced with simple audio card
> - removed untested compatibilities from device tree documentation
> - added pm_runtime and remove shutdown
> - removed pll2 as it's the parent of the spdif clock
> - rename clk to spdif_clk
> - removed enabling of mclk output
> - removed interrupts status being cleared as it's not being used
> - use default fifo settings for now
> - fixed alignments for wrapped lines
>
> Changes since v1:
> - Moved sunxi-machine-spdif.c to separate patch
> - replaced sunxi in naming scheme with sun4i in the sun4i-spdif driver.
> - split tx controller into separate enable/disable functions
> - moved setclk and setfmt functionality into hw params
> - added support for mono signals.
> - cleaned up probe clock set up.
> - removed all writes to transmit status registers.
> - removed of_id
> - removed power management code.
> - Added support for more rates.
>
> Marcus Cooper (2):
>   dt-bindings: sunxi :add sun4i SPDIF transceiver
>   ASoC: sunxi: Add support for the SPDIF block
>
>  .../bindings/sound/sunxi,sun4i-spdif.txt   |  39 ++
>  sound/soc/sunxi/Kconfig|   8 +
>  sound/soc/sunxi/Makefile   |   1 +
>  sound/soc/sunxi/sun4i-spdif.c  | 549 
> +
>  4 files changed, 597 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>  create mode 100644 sound/soc/sunxi/sun4i-spdif.c
>
> --
> 2.7.1
>

Re: [PATCH v5 0/2] ASoC: Add SPDIF support for Allwinner SoCs

[Code Kipper]

NAK...last bunch of changes introduced a warning which slipped
through, I'll fix that and send a new patch series.
CK

On 8 February 2016 at 16:26,   wrote:
> From: Marcus Cooper 
>
> This patch set adds support for the Allwinner SPDIF transceiver.
>
> For now just the SPDIF transmitter has been tested on a Mele A2000(A10)
> and a Itead Ibox(A20).
>
> In order for this patch set to be functional we require an audio clock patch
> which will be delivered separately. For those that are interested I've pushed
> the patches here with all the required changes to get SPDIF audio out of the
> device.
>
> https://github.com/codekipper/linux-sunxi/commits/spdif_delivery
>
> Thanks in advance,
> CK
>
> ---
> Changes since v4:
> - corrected indentation issues
> - removed old macros
> - removed unnecessary enabling of apb clock
>
> Changes since v3:
> - removed code required for spdif capture
> - added disable/enable of apb clk to suspend/resume.
> - removed unnecessary dt checks in probe
> - fixed error conditions in probe/resume
> - modified pm_runtime functionality and confirmed that driver worked when PM 
> was disabled.
> - removed .owner from platform driver
> - renamed bindings file
>
> Changes since v2:
> - removed sunxi-machine-spdif and replaced with simple audio card
> - removed untested compatibilities from device tree documentation
> - added pm_runtime and remove shutdown
> - removed pll2 as it's the parent of the spdif clock
> - rename clk to spdif_clk
> - removed enabling of mclk output
> - removed interrupts status being cleared as it's not being used
> - use default fifo settings for now
> - fixed alignments for wrapped lines
>
> Changes since v1:
> - Moved sunxi-machine-spdif.c to separate patch
> - replaced sunxi in naming scheme with sun4i in the sun4i-spdif driver.
> - split tx controller into separate enable/disable functions
> - moved setclk and setfmt functionality into hw params
> - added support for mono signals.
> - cleaned up probe clock set up.
> - removed all writes to transmit status registers.
> - removed of_id
> - removed power management code.
> - Added support for more rates.
>
> Marcus Cooper (2):
>   dt-bindings: sunxi :add sun4i SPDIF transceiver
>   ASoC: sunxi: Add support for the SPDIF block
>
>  .../bindings/sound/sunxi,sun4i-spdif.txt   |  39 ++
>  sound/soc/sunxi/Kconfig|   8 +
>  sound/soc/sunxi/Makefile   |   1 +
>  sound/soc/sunxi/sun4i-spdif.c  | 549 
> +
>  4 files changed, 597 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt
>  create mode 100644 sound/soc/sunxi/sun4i-spdif.c
>
> --
> 2.7.1
>

Re: [PATCH v4 2/2] ASoC: sunxi: Add support for the SPDIF block

[Code Kipper]

On 5 February 2016 at 10:27, Maxime Ripard
 wrote:
> Hi,
>
> On Thu, Feb 04, 2016 at 12:09:22PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The sun4i, sun5i and sun7i SoC families have an SPDIF
>> block which is capable of playback and capture.
>>
>> This patch enables the playback of this block for
>> the sun4i families.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/Kconfig   |   8 +
>>  sound/soc/sunxi/Makefile  |   1 +
>>  sound/soc/sunxi/sun4i-spdif.c | 561 
>> ++
>>  3 files changed, 570 insertions(+)
>>  create mode 100644 sound/soc/sunxi/sun4i-spdif.c
>>
>> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
>> index 84c72ec..6af7224 100644
>> --- a/sound/soc/sunxi/Kconfig
>> +++ b/sound/soc/sunxi/Kconfig
>> @@ -8,4 +8,12 @@ config SND_SUN4I_CODEC
>> Select Y or M to add support for the Codec embedded in the Allwinner
>> A10 and affiliated SoCs.
>>
>> +config SND_SUN4I_SPDIF
>> +tristate "Allwinner A10 SPDIF Support"
>> + depends on OF
>
> The indentation looks off.
ACK
>
>> +select SND_SOC_GENERIC_DMAENGINE_PCM
>> +select REGMAP_MMIO
>> +help
>> +  Say Y or M to add support for the S/PDIF audio block in the 
>> Allwinner
>> +   A10 and affiliated SoCs.
>
> Here as well.
ACK
>
>>  endmenu
>> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
>> index ea8a08c..8f5e889 100644
>> --- a/sound/soc/sunxi/Makefile
>> +++ b/sound/soc/sunxi/Makefile
>> @@ -1,2 +1,3 @@
>>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>>
>> +obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
>> diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
>> new file mode 100644
>> index 000..bb32344
>> --- /dev/null
>> +++ b/sound/soc/sunxi/sun4i-spdif.c
>> @@ -0,0 +1,561 @@
>> +/*
>> + * ALSA SoC SPDIF Audio Layer
>> + *
>> + * Copyright 2015 Andrea Venturi 
>> + * Copyright 2015 Marcus Cooper 
>> + *
>> + * Based on the Allwinner SDK driver, released under the GPL.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#define  SUN4I_SPDIF_CTL (0x00)
>> + #define SUN4I_SPDIF_CTL_MCLKDIV(v)  ((v) << 4) /* v even */
>> + #define SUN4I_SPDIF_CTL_MCLKOUTEN   BIT(2)
>> + #define SUN4I_SPDIF_CTL_GEN BIT(1)
>> + #define SUN4I_SPDIF_CTL_RESET   BIT(0)
>> +
>> +#define SUN4I_SPDIF_TXCFG(0x04)
>> + #define SUN4I_SPDIF_TXCFG_SINGLEMOD BIT(31)
>> + #define SUN4I_SPDIF_TXCFG_ASS   BIT(17)
>> + #define SUN4I_SPDIF_TXCFG_NONAUDIO  BIT(16)
>> + #define SUN4I_SPDIF_TXCFG_TXRATIO(v)((v) << 4)
>> + #define SUN4I_SPDIF_TXCFG_TXRATIO_MASK  GENMASK(8, 4)
>> + #define SUN4I_SPDIF_TXCFG_FMTRVDGENMASK(3, 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT16BIT  (0 << 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT20BIT  (1 << 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT24BIT  (2 << 2)
>> + #define SUN4I_SPDIF_TXCFG_CHSTMODE  BIT(1)
>> + #define SUN4I_SPDIF_TXCFG_TXEN  BIT(0)
>> +
>> +#define SUN4I_SPDIF_RXCFG(0x08)
>> + #define SUN4I_SPDIF_RXCFG_LOCKFLAG  BIT(4)
>> + #define SUN4I_SPDIF_RXCFG_CHSTSRC   BIT(3)
>> + #define SUN4I_SPDIF_RXCFG_CHSTCPBIT(1)
>> + #define SUN4I_SPDIF_RXCFG_RXEN  BIT(0)
>> +
>> +#define SUN4I_SPDIF_TXFIFO   (0x0C)
>> +
>> +#define SUN4I_SPDIF_RXFIFO   (0x10)
>> +
>> +#define SUN4I_SPDIF_FCTL (0x14)
>> + #define SUN4I_SPDIF_FCTL_FIFOSRCBIT(31)
>> + #define SUN4I_SPDIF_FCTL_FTXBIT(17)
>> + #define SUN4I_SPDIF_FCTL_FRXBIT(16)
>> + #define SUN4I_SPDIF_FCTL_TXTL(v)((v) << 8)
>> + #define SUN4I_SPDIF_FCTL_TXTL_MASK  GENMASK(12, 8)
>> + #define SUN4I_SPDIF_FCTL_RXTL(v)((v) << 3)
>> + #define SUN4I_SPDIF_FCTL_RXTL_MASK  GENMASK(7, 3)
>> + #define SUN4I_SPDIF_FCTL_TXIM   BIT(2)
>> + #define SUN4I_SPDIF_FCTL_RXOM(v)((v) << 0)
>> + #define 

Re: [PATCH v4 2/2] ASoC: sunxi: Add support for the SPDIF block

[Code Kipper]

On 5 February 2016 at 10:27, Maxime Ripard
 wrote:
> Hi,
>
> On Thu, Feb 04, 2016 at 12:09:22PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> The sun4i, sun5i and sun7i SoC families have an SPDIF
>> block which is capable of playback and capture.
>>
>> This patch enables the playback of this block for
>> the sun4i families.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  sound/soc/sunxi/Kconfig   |   8 +
>>  sound/soc/sunxi/Makefile  |   1 +
>>  sound/soc/sunxi/sun4i-spdif.c | 561 
>> ++
>>  3 files changed, 570 insertions(+)
>>  create mode 100644 sound/soc/sunxi/sun4i-spdif.c
>>
>> diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig
>> index 84c72ec..6af7224 100644
>> --- a/sound/soc/sunxi/Kconfig
>> +++ b/sound/soc/sunxi/Kconfig
>> @@ -8,4 +8,12 @@ config SND_SUN4I_CODEC
>> Select Y or M to add support for the Codec embedded in the Allwinner
>> A10 and affiliated SoCs.
>>
>> +config SND_SUN4I_SPDIF
>> +tristate "Allwinner A10 SPDIF Support"
>> + depends on OF
>
> The indentation looks off.
ACK
>
>> +select SND_SOC_GENERIC_DMAENGINE_PCM
>> +select REGMAP_MMIO
>> +help
>> +  Say Y or M to add support for the S/PDIF audio block in the 
>> Allwinner
>> +   A10 and affiliated SoCs.
>
> Here as well.
ACK
>
>>  endmenu
>> diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile
>> index ea8a08c..8f5e889 100644
>> --- a/sound/soc/sunxi/Makefile
>> +++ b/sound/soc/sunxi/Makefile
>> @@ -1,2 +1,3 @@
>>  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o
>>
>> +obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o
>> diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
>> new file mode 100644
>> index 000..bb32344
>> --- /dev/null
>> +++ b/sound/soc/sunxi/sun4i-spdif.c
>> @@ -0,0 +1,561 @@
>> +/*
>> + * ALSA SoC SPDIF Audio Layer
>> + *
>> + * Copyright 2015 Andrea Venturi 
>> + * Copyright 2015 Marcus Cooper 
>> + *
>> + * Based on the Allwinner SDK driver, released under the GPL.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#define  SUN4I_SPDIF_CTL (0x00)
>> + #define SUN4I_SPDIF_CTL_MCLKDIV(v)  ((v) << 4) /* v even */
>> + #define SUN4I_SPDIF_CTL_MCLKOUTEN   BIT(2)
>> + #define SUN4I_SPDIF_CTL_GEN BIT(1)
>> + #define SUN4I_SPDIF_CTL_RESET   BIT(0)
>> +
>> +#define SUN4I_SPDIF_TXCFG(0x04)
>> + #define SUN4I_SPDIF_TXCFG_SINGLEMOD BIT(31)
>> + #define SUN4I_SPDIF_TXCFG_ASS   BIT(17)
>> + #define SUN4I_SPDIF_TXCFG_NONAUDIO  BIT(16)
>> + #define SUN4I_SPDIF_TXCFG_TXRATIO(v)((v) << 4)
>> + #define SUN4I_SPDIF_TXCFG_TXRATIO_MASK  GENMASK(8, 4)
>> + #define SUN4I_SPDIF_TXCFG_FMTRVDGENMASK(3, 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT16BIT  (0 << 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT20BIT  (1 << 2)
>> + #define SUN4I_SPDIF_TXCFG_FMT24BIT  (2 << 2)
>> + #define SUN4I_SPDIF_TXCFG_CHSTMODE  BIT(1)
>> + #define SUN4I_SPDIF_TXCFG_TXEN  BIT(0)
>> +
>> +#define SUN4I_SPDIF_RXCFG(0x08)
>> + #define SUN4I_SPDIF_RXCFG_LOCKFLAG  BIT(4)
>> + #define SUN4I_SPDIF_RXCFG_CHSTSRC   BIT(3)
>> + #define SUN4I_SPDIF_RXCFG_CHSTCPBIT(1)
>> + #define SUN4I_SPDIF_RXCFG_RXEN  BIT(0)
>> +
>> +#define SUN4I_SPDIF_TXFIFO   (0x0C)
>> +
>> +#define SUN4I_SPDIF_RXFIFO   (0x10)
>> +
>> +#define SUN4I_SPDIF_FCTL (0x14)
>> + #define SUN4I_SPDIF_FCTL_FIFOSRCBIT(31)
>> + #define SUN4I_SPDIF_FCTL_FTXBIT(17)
>> + #define SUN4I_SPDIF_FCTL_FRXBIT(16)
>> + #define SUN4I_SPDIF_FCTL_TXTL(v)((v) << 8)
>> + #define SUN4I_SPDIF_FCTL_TXTL_MASK  GENMASK(12, 8)
>> + #define SUN4I_SPDIF_FCTL_RXTL(v)((v) << 3)
>> + #define SUN4I_SPDIF_FCTL_RXTL_MASK  GENMASK(7, 3)
>> + #define 

Re: [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

[Code Kipper]

On 2 February 2016 at 22:17, Maxime Ripard
 wrote:
> Hi,
>
> It looks mostly good on my side, a few comments though.
>
> On Tue, Feb 02, 2016 at 03:49:54PM +0100, codekip...@gmail.com wrote:
>> +#ifdef CONFIG_PM
>> +static int sun4i_spdif_runtime_suspend(struct device *dev)
>> +{
>> + struct sun4i_spdif_dev *host  = dev_get_drvdata(dev);
>> +
>> + clk_disable_unprepare(host->spdif_clk);
>> +
>> + return 0;
>> +}
>> +
>> +static int sun4i_spdif_runtime_resume(struct device *dev)
>> +{
>> + struct sun4i_spdif_dev *host  = dev_get_drvdata(dev);
>> +
>> + clk_prepare_enable(host->spdif_clk);
>> +
>> + return 0;
>> +}
>> +#endif /* CONFIG_PM */
>
> You can also shut down the bus clock here. That will reset the device,
> so you'll have to reinit it in your resume, but since you won't be
> suspended while you play something, and that you set up most of your
> controller any way when you start streaming, it shouldn't be a big
> deal.
ACK
>
>> +
>> +static int sun4i_spdif_probe(struct platform_device *pdev)
>> +{
>> + struct device_node *np = pdev->dev.of_node;
>> + struct sun4i_spdif_dev *host;
>> + struct resource *res;
>> + int ret;
>> + void __iomem *base;
>> +
>> + dev_dbg(>dev, "Entered %s\n", __func__);
>> +
>> + if (!np)
>> + return -ENODEV;
>
> You won't probe without DT.
ACK
>
>> +
>> + if (!of_match_device(sun4i_spdif_of_match, >dev)) {
>> + dev_err(>dev, "No matched devices found.\n");
>> + return -EINVAL;
>> + }
>
> And you won't probe if the compatibles don't match.
ACK
>
>> + host = devm_kzalloc(>dev, sizeof(*host), GFP_KERNEL);
>> + if (!host)
>> + return -ENOMEM;
>> +
>> + host->pdev = pdev;
>> +
>> + /* Initialize this copy of the CPU DAI driver structure */
>> + memcpy(>cpu_dai_drv, _spdif_dai, sizeof(sun4i_spdif_dai));
>> + host->cpu_dai_drv.name = dev_name(>dev);
>> +
>> + /* Get the addresses */
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + base = devm_ioremap_resource(>dev, res);
>> + if (IS_ERR(base))
>> + return PTR_ERR(base);
>> +
>> + host->regmap = devm_regmap_init_mmio(>dev, base,
>> + _spdif_regmap_config);
>> +
>> + /* Clocks */
>> + host->apb_clk = devm_clk_get(>dev, "apb");
>> + if (IS_ERR(host->apb_clk)) {
>> + dev_err(>dev, "failed to get a apb clock.\n");
>> + return PTR_ERR(host->apb_clk);
>> + }
>> +
>> + ret = clk_prepare_enable(host->apb_clk);
>> + if (ret) {
>> + dev_err(>dev, "try to enable apb_spdif_clk failed\n");
>> + return ret;
>> + }
>> +
>> + host->spdif_clk = devm_clk_get(>dev, "spdif");
>> + if (IS_ERR(host->spdif_clk)) {
>> + dev_err(>dev, "failed to get a spdif clock.\n");
>> + goto exit_clkdisable_apb_clk;
>> + }
>> +
>> + host->playback_supported = false;
>> + host->capture_supported = false;
>> +
>> + if (of_property_read_bool(np, "spdif-out"))
>> + host->playback_supported = true;
>> +
>> + if (!host->playback_supported) {
>> + dev_err(>dev, "no enabled S/PDIF DAI link\n");
>> + goto exit_clkdisable_clk;
>> + }
>> +
>> + host->dma_params_tx.addr = res->start + SUN4I_SPDIF_TXFIFO;
>> + host->dma_params_tx.maxburst = 4;
>> + host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + host->dma_params_rx.addr = res->start + SUN4I_SPDIF_RXFIFO;
>> + host->dma_params_rx.maxburst = 4;
>> + host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> +
>> + platform_set_drvdata(pdev, host);
>> +
>> + ret = devm_snd_soc_register_component(>dev,
>> + _spdif_component, _spdif_dai, 1);
>> + if (ret)
>> + goto exit_clkdisable_clk;
>> +
>> + pm_runtime_enable(>dev);
>> +
>> + ret = devm_snd_dmaengine_pcm_register(>dev, NULL, 0);
>> + if (ret)
>> + goto exit_clkdisable_clk;
>> + return 0;
>> +
>> +exit_clkdisable_clk:
>> + clk_disable_unprepare(host->spdif_clk);
>
> You disabled a clock that you didn't enable.
ACK
>
>> +exit_clkdisable_apb_clk:
>> + clk_disable_unprepare(host->apb_clk);
>> + return ret;
>> +}
>> +
>> +static int sun4i_spdif_remove(struct platform_device *pdev)
>> +{
>> + struct sun4i_spdif_dev *host = dev_get_drvdata(>dev);
>> +
>> + snd_soc_unregister_platform(>dev);
>> + snd_soc_unregister_component(>dev);
>> +
>> + pm_runtime_disable(>dev);
>> +
>> + if (!IS_ERR(host->spdif_clk)) {
>
> Probe will fail on this condition. If probe failed, remove won't be
> called.
>
>> + clk_disable_unprepare(host->spdif_clk);
>
> And here as well.
>
>> + clk_disable_unprepare(host->apb_clk);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct dev_pm_ops sun4i_spdif_pm = {
>> + 

Re: [PATCH v3 2/2] ASOC: sunxi: Add support for the SPDIF block

[Code Kipper]

On 2 February 2016 at 22:17, Maxime Ripard
 wrote:
> Hi,
>
> It looks mostly good on my side, a few comments though.
>
> On Tue, Feb 02, 2016 at 03:49:54PM +0100, codekip...@gmail.com wrote:
>> +#ifdef CONFIG_PM
>> +static int sun4i_spdif_runtime_suspend(struct device *dev)
>> +{
>> + struct sun4i_spdif_dev *host  = dev_get_drvdata(dev);
>> +
>> + clk_disable_unprepare(host->spdif_clk);
>> +
>> + return 0;
>> +}
>> +
>> +static int sun4i_spdif_runtime_resume(struct device *dev)
>> +{
>> + struct sun4i_spdif_dev *host  = dev_get_drvdata(dev);
>> +
>> + clk_prepare_enable(host->spdif_clk);
>> +
>> + return 0;
>> +}
>> +#endif /* CONFIG_PM */
>
> You can also shut down the bus clock here. That will reset the device,
> so you'll have to reinit it in your resume, but since you won't be
> suspended while you play something, and that you set up most of your
> controller any way when you start streaming, it shouldn't be a big
> deal.
ACK
>
>> +
>> +static int sun4i_spdif_probe(struct platform_device *pdev)
>> +{
>> + struct device_node *np = pdev->dev.of_node;
>> + struct sun4i_spdif_dev *host;
>> + struct resource *res;
>> + int ret;
>> + void __iomem *base;
>> +
>> + dev_dbg(>dev, "Entered %s\n", __func__);
>> +
>> + if (!np)
>> + return -ENODEV;
>
> You won't probe without DT.
ACK
>
>> +
>> + if (!of_match_device(sun4i_spdif_of_match, >dev)) {
>> + dev_err(>dev, "No matched devices found.\n");
>> + return -EINVAL;
>> + }
>
> And you won't probe if the compatibles don't match.
ACK
>
>> + host = devm_kzalloc(>dev, sizeof(*host), GFP_KERNEL);
>> + if (!host)
>> + return -ENOMEM;
>> +
>> + host->pdev = pdev;
>> +
>> + /* Initialize this copy of the CPU DAI driver structure */
>> + memcpy(>cpu_dai_drv, _spdif_dai, sizeof(sun4i_spdif_dai));
>> + host->cpu_dai_drv.name = dev_name(>dev);
>> +
>> + /* Get the addresses */
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + base = devm_ioremap_resource(>dev, res);
>> + if (IS_ERR(base))
>> + return PTR_ERR(base);
>> +
>> + host->regmap = devm_regmap_init_mmio(>dev, base,
>> + _spdif_regmap_config);
>> +
>> + /* Clocks */
>> + host->apb_clk = devm_clk_get(>dev, "apb");
>> + if (IS_ERR(host->apb_clk)) {
>> + dev_err(>dev, "failed to get a apb clock.\n");
>> + return PTR_ERR(host->apb_clk);
>> + }
>> +
>> + ret = clk_prepare_enable(host->apb_clk);
>> + if (ret) {
>> + dev_err(>dev, "try to enable apb_spdif_clk failed\n");
>> + return ret;
>> + }
>> +
>> + host->spdif_clk = devm_clk_get(>dev, "spdif");
>> + if (IS_ERR(host->spdif_clk)) {
>> + dev_err(>dev, "failed to get a spdif clock.\n");
>> + goto exit_clkdisable_apb_clk;
>> + }
>> +
>> + host->playback_supported = false;
>> + host->capture_supported = false;
>> +
>> + if (of_property_read_bool(np, "spdif-out"))
>> + host->playback_supported = true;
>> +
>> + if (!host->playback_supported) {
>> + dev_err(>dev, "no enabled S/PDIF DAI link\n");
>> + goto exit_clkdisable_clk;
>> + }
>> +
>> + host->dma_params_tx.addr = res->start + SUN4I_SPDIF_TXFIFO;
>> + host->dma_params_tx.maxburst = 4;
>> + host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + host->dma_params_rx.addr = res->start + SUN4I_SPDIF_RXFIFO;
>> + host->dma_params_rx.maxburst = 4;
>> + host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> +
>> + platform_set_drvdata(pdev, host);
>> +
>> + ret = devm_snd_soc_register_component(>dev,
>> + _spdif_component, _spdif_dai, 1);
>> + if (ret)
>> + goto exit_clkdisable_clk;
>> +
>> + pm_runtime_enable(>dev);
>> +
>> + ret = devm_snd_dmaengine_pcm_register(>dev, NULL, 0);
>> + if (ret)
>> + goto exit_clkdisable_clk;
>> + return 0;
>> +
>> +exit_clkdisable_clk:
>> + clk_disable_unprepare(host->spdif_clk);
>
> You disabled a clock that you didn't enable.
ACK
>
>> +exit_clkdisable_apb_clk:
>> + clk_disable_unprepare(host->apb_clk);
>> + return ret;
>> +}
>> +
>> +static int sun4i_spdif_remove(struct platform_device *pdev)
>> +{
>> + struct sun4i_spdif_dev *host = dev_get_drvdata(>dev);
>> +
>> + snd_soc_unregister_platform(>dev);
>> + snd_soc_unregister_component(>dev);
>> +
>> + pm_runtime_disable(>dev);
>> +
>> + if (!IS_ERR(host->spdif_clk)) {
>
> Probe will fail on this condition. If probe failed, remove won't be
> called.
>
>> + clk_disable_unprepare(host->spdif_clk);
>
> And here as well.
>
>> + clk_disable_unprepare(host->apb_clk);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct dev_pm_ops 

Re: [PATCH v3 1/2] dt-bindings: add sun4i SPDIF transceiver bindings

[Code Kipper]

On 2 February 2016 at 23:31, Maxime Ripard
 wrote:
> Hi,
>
> On Tue, Feb 02, 2016 at 03:49:53PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> Add devicetree bindings for the SPDIF transceiver found on
>> found on Allwinners A10 and A20 SoCs.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i,spdif.txt  | 46 
>> ++
>>  1 file changed, 46 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i,spdif.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>> new file mode 100644
>> index 000..55ed2f6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>> @@ -0,0 +1,46 @@
>> +Allwinner Sony/Philips Digital Interface Format (S/PDIF) Controller
>> +
>> +The Allwinner S/PDIF audio block is a transceiver that allows the
>> +processor to receive and transmit digital audio via an coaxial cable or
>> +a fibre cable.
>> +
>> +Required properties:
>> +
>> +  - compatible   : should be one of the following:
>> +- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
>> +
>> +  - reg  : Offset and length of the register set for 
>> the device.
>> +
>> +  - interrupts   : Contains the spdif interrupt.
>> +
>> +  - dmas : Generic dma devicetree binding as described in
>> +   Documentation/devicetree/bindings/dma/dma.txt.
>> +
>> +  - dma-names: Two dmas have to be defined, "tx" and "rx".
>> +
>> +  - clocks   : Contains an entry for each entry in clock-names.
>> +
>> +  - clock-names  : Includes the following entries:
>> + "apb" clock for the spdif bus.
>> + "spdif"   clock for spdif controller.
>> +
>> +Optional:
>> +
>> +  - spdif-in : Enable block for capturing an SPDIF signal.
>> +
>> +  - spdif-out: Enable block for transmitting an SPDIF 
>> signal.
>
> Is that a generic property? What values can it hold?
Hi Maxime,

thanks for the review. I'm starting to prep a v4 patch series and I'm
here wondering if I should drop the spdif-in/out for now and just rely
on the status property to enable playback. It would simplify the
driver even more and it could be added back when someone gets around
to delivering spdif capture. I think that's going to be pretty low on
my list of things to do as I've only got one dev board where it's
possible.
BR,
Lazy Lazy CK
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com

Re: [PATCH v3 1/2] dt-bindings: add sun4i SPDIF transceiver bindings

[Code Kipper]

On 2 February 2016 at 23:31, Maxime Ripard
 wrote:
> Hi,
>
> On Tue, Feb 02, 2016 at 03:49:53PM +0100, codekip...@gmail.com wrote:
>> From: Marcus Cooper 
>>
>> Add devicetree bindings for the SPDIF transceiver found on
>> found on Allwinners A10 and A20 SoCs.
>>
>> Signed-off-by: Marcus Cooper 
>> ---
>>  .../devicetree/bindings/sound/sun4i,spdif.txt  | 46 
>> ++
>>  1 file changed, 46 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>>
>> diff --git a/Documentation/devicetree/bindings/sound/sun4i,spdif.txt 
>> b/Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>> new file mode 100644
>> index 000..55ed2f6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/sound/sun4i,spdif.txt
>> @@ -0,0 +1,46 @@
>> +Allwinner Sony/Philips Digital Interface Format (S/PDIF) Controller
>> +
>> +The Allwinner S/PDIF audio block is a transceiver that allows the
>> +processor to receive and transmit digital audio via an coaxial cable or
>> +a fibre cable.
>> +
>> +Required properties:
>> +
>> +  - compatible   : should be one of the following:
>> +- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
>> +
>> +  - reg  : Offset and length of the register set for 
>> the device.
>> +
>> +  - interrupts   : Contains the spdif interrupt.
>> +
>> +  - dmas : Generic dma devicetree binding as described in
>> +   Documentation/devicetree/bindings/dma/dma.txt.
>> +
>> +  - dma-names: Two dmas have to be defined, "tx" and "rx".
>> +
>> +  - clocks   : Contains an entry for each entry in clock-names.
>> +
>> +  - clock-names  : Includes the following entries:
>> + "apb" clock for the spdif bus.
>> + "spdif"   clock for spdif controller.
>> +
>> +Optional:
>> +
>> +  - spdif-in : Enable block for capturing an SPDIF signal.
>> +
>> +  - spdif-out: Enable block for transmitting an SPDIF 
>> signal.
>
> Is that a generic property? What values can it hold?
Hi Maxime,

thanks for the review. I'm starting to prep a v4 patch series and I'm
here wondering if I should drop the spdif-in/out for now and just rely
on the status property to enable playback. It would simplify the
driver even more and it could be added back when someone gets around
to delivering spdif capture. I think that's going to be pretty low on
my list of things to do as I've only got one dev board where it's
possible.
BR,
Lazy Lazy CK
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com

Re: [PATCH v2 4/4] ASOC: sunxi: Add support for the spdif block

[Code Kipper]

On 6 October 2015 at 11:00, Maxime Ripard
 wrote:
> On Fri, Oct 02, 2015 at 08:44:03AM +0200, Code Kipper wrote:
>> >> +config SND_SOC_SUNXI_DAI_SPDIF
>> >> +tristate
>> >> + depends on OF
>> >> +select SND_SOC_GENERIC_DMAENGINE_PCM
>> >> +select REGMAP_MMIO
>> >> +
>> >> +config SND_SOC_SUNXI_MACHINE_SPDIF
>> >> +tristate "APB on-chip sun4i/sun5i/sun7i SPDIF"
>> >> + depends on OF
>> >> +select SND_SOC_SUNXI_DAI_SPDIF
>> >> +help
>> >> +  Say Y if you want to add support for SoC S/PDIF audio as 
>> >> simple audio card.
>> >
>> > You still haven't said why you can't use simple-card...
>>
>> I mentioned in the covering letter that I thought that simple-card was
>> overkill.
>
> Overkill for what? It adds no code, that will put no new maintainance
> burden, without any duplication. While your code also adds all that.
>
>> There is also a thread concerning issues with the ordering
>> of module bringup here
>> http://mailman.alsa-project.org/pipermail/alsa-devel/2013-December/070534.html.
>> I was initially trying to use the dummy spdif transmitter but couldn't
>> get it working, this set up works for me. I haven't got an audio guy
>> sitting next to me to ping and have reached out for some guidance. I
>> can do this using simple-card, it just with all the driver refactoring
>> it was the main place where I thought things would break.
>
> We're all on IRC.

OK, let me sit on the next patch release until I've properly
investigated this. I'm not a big IRCer so I will need to change my
habits.

>
>
>> >> +static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
>> >> +{
>> >> + u32 reg_val;
>> >> +
>> >> + /* soft reset SPDIF */
>> >> + regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
>> >> +
>> >> + /* MCLK OUTPUT enable */
>> >> + regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
>> >> + SUN4I_SPDIF_CTL_MCLKOUTEN, 
>> >> SUN4I_SPDIF_CTL_MCLKOUTEN);
>> >
>> > The alignment is still not right
>>
>> I'm not even sure if we need mclk output enabled. Let me see what
>> happens when I remove this.
>
> It's not really the point. The alignment of all your wrapped lines is
> wrong.

AI was brought up to not mix tabs and spaces and I now see
with a quick check that checkpatch doesn't barf...I'll fix this.

>
>> >> +static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
>> >> + struct snd_soc_dai *cpu_dai)
>> >> +{
>> >> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
>> >> + struct sun4i_spdif_dev *host = 
>> >> snd_soc_dai_get_drvdata(rtd->cpu_dai);
>> >> +
>> >> + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
>> >> + return -EINVAL;
>> >> +
>> >> + sun4i_spdif_configure(host);
>> >> +
>> >> + return clk_prepare_enable(host->clk);
>> >
>> > You're still not using pm_runtime...
>>
>> I've removed the pm stuff and this is the same as you have it in
>> sun4i-codec.
>
> You've removed the suspend code, and both Mark and I asked you to use
> runtime_pm to handle your bus clock.
>
> And this has also been asked for the codec.

You asked if I had tested the pm operations which I hadn't so I
removed them after looking at your driver and searching for pm_runtime
usage elsewhere in sound/soc. I will add them back.

>
>> >> +
>> >> + ret = clk_set_rate(host->audio_clk, mclk);
>> >> + if (ret < 0) {
>> >> + dev_err(>dev,
>> >> + "Setting pll2 clock rate for %d Hz failed!\n", 
>> >> mclk);
>> >> + return ret;
>> >> + }
>> >
>> > You're still using the PLL2...
>>
>> I commented this out and it stopped working...let me check again.
>
> Then something is wrong somewhere else that needs to be fixed, either
> in the clock driver or in this driver. Did you update all the other
> references to PLL2 as well?

To be honest...the underlying clock code that I used wasn't based on
your latest patches. I'll relook at this, maybe my dsti is at fault.
>
>>
>> >
>> >> +
>> >> + ret = clk

Re: [PATCH v2 4/4] ASOC: sunxi: Add support for the spdif block

[Code Kipper]

On 6 October 2015 at 11:00, Maxime Ripard
<maxime.rip...@free-electrons.com> wrote:
> On Fri, Oct 02, 2015 at 08:44:03AM +0200, Code Kipper wrote:
>> >> +config SND_SOC_SUNXI_DAI_SPDIF
>> >> +tristate
>> >> + depends on OF
>> >> +select SND_SOC_GENERIC_DMAENGINE_PCM
>> >> +select REGMAP_MMIO
>> >> +
>> >> +config SND_SOC_SUNXI_MACHINE_SPDIF
>> >> +tristate "APB on-chip sun4i/sun5i/sun7i SPDIF"
>> >> + depends on OF
>> >> +select SND_SOC_SUNXI_DAI_SPDIF
>> >> +help
>> >> +  Say Y if you want to add support for SoC S/PDIF audio as 
>> >> simple audio card.
>> >
>> > You still haven't said why you can't use simple-card...
>>
>> I mentioned in the covering letter that I thought that simple-card was
>> overkill.
>
> Overkill for what? It adds no code, that will put no new maintainance
> burden, without any duplication. While your code also adds all that.
>
>> There is also a thread concerning issues with the ordering
>> of module bringup here
>> http://mailman.alsa-project.org/pipermail/alsa-devel/2013-December/070534.html.
>> I was initially trying to use the dummy spdif transmitter but couldn't
>> get it working, this set up works for me. I haven't got an audio guy
>> sitting next to me to ping and have reached out for some guidance. I
>> can do this using simple-card, it just with all the driver refactoring
>> it was the main place where I thought things would break.
>
> We're all on IRC.

OK, let me sit on the next patch release until I've properly
investigated this. I'm not a big IRCer so I will need to change my
habits.

>
>
>> >> +static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
>> >> +{
>> >> + u32 reg_val;
>> >> +
>> >> + /* soft reset SPDIF */
>> >> + regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
>> >> +
>> >> + /* MCLK OUTPUT enable */
>> >> + regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL,
>> >> + SUN4I_SPDIF_CTL_MCLKOUTEN, 
>> >> SUN4I_SPDIF_CTL_MCLKOUTEN);
>> >
>> > The alignment is still not right
>>
>> I'm not even sure if we need mclk output enabled. Let me see what
>> happens when I remove this.
>
> It's not really the point. The alignment of all your wrapped lines is
> wrong.

AI was brought up to not mix tabs and spaces and I now see
with a quick check that checkpatch doesn't barf...I'll fix this.

>
>> >> +static int sun4i_spdif_startup(struct snd_pcm_substream *substream,
>> >> + struct snd_soc_dai *cpu_dai)
>> >> +{
>> >> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
>> >> + struct sun4i_spdif_dev *host = 
>> >> snd_soc_dai_get_drvdata(rtd->cpu_dai);
>> >> +
>> >> + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
>> >> + return -EINVAL;
>> >> +
>> >> + sun4i_spdif_configure(host);
>> >> +
>> >> + return clk_prepare_enable(host->clk);
>> >
>> > You're still not using pm_runtime...
>>
>> I've removed the pm stuff and this is the same as you have it in
>> sun4i-codec.
>
> You've removed the suspend code, and both Mark and I asked you to use
> runtime_pm to handle your bus clock.
>
> And this has also been asked for the codec.

You asked if I had tested the pm operations which I hadn't so I
removed them after looking at your driver and searching for pm_runtime
usage elsewhere in sound/soc. I will add them back.

>
>> >> +
>> >> + ret = clk_set_rate(host->audio_clk, mclk);
>> >> + if (ret < 0) {
>> >> + dev_err(>dev,
>> >> + "Setting pll2 clock rate for %d Hz failed!\n", 
>> >> mclk);
>> >> + return ret;
>> >> + }
>> >
>> > You're still using the PLL2...
>>
>> I commented this out and it stopped working...let me check again.
>
> Then something is wrong somewhere else that needs to be fixed, either
> in the clock driver or in this driver. Did you update all the other
> references to PLL2 as well?

To be honest...the underlying clock code that I used wasn't based on
your latest patches. I'll relook at this, maybe my dsti is at fault.
>
>>
>> >
>> &g

Re: [PATCH v2 1/4] dt-bindings: add sunxi SPDIF transceiver bindings

[Code Kipper]

On 5 October 2015 at 10:41, Maxime Ripard
 wrote:
> On Fri, Oct 02, 2015 at 07:24:20AM +0200, Code Kipper wrote:
>> >> +
>> >> +  - compatible   : should be one of the following:
>> >> +- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
>> >> +- "allwinner,sun7i-a20-spdif": for the Allwinner A20 SoC
>> >> +- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
>> >
>> > Are all these compatibles really work? Is there any significant
>> > difference between the controller on all these SoCs?
>>
>> Let us assume that there isn't any difference. Remember SPDIF details
>> for all of these devices is sketchy. In the A10 User Manual, it's not
>> even mentioned although devices such as the Mele A2000 which I use
>> come with the physical connector. It's only when the A20 Manual was
>> released that we see the pin details and related components. We didn't
>> see a SPDIF block spec until the H3 User Manual was released.
>>
>> Looking at the SDK code I've only seen fifo level settings to be
>> different for the sun6i family. It was this release that also showed
>> Rx rotines. The fact of the matter is we won't know until these SoCs
>> have been tested and with that in mind I'm happy to remove all
>> capabilities for now until then.
>
> The point was more that you document compatibles that you are not
> actually supporting.
>
> You've only tested it on one SoC (and it actually works only on one
> SoC, or at least with one compatible), so only document that.

Fixed,
Thanks,
CK
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
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