[PATCH v2 0/1] thermal: mt8173: minor mtk_thermal.c cleanups

2017-02-21 Thread Dawei Chien
If thermal bank with 4 sensors, thermal driver should read TEMP_MSR3.

However, currently thermal driver would not read TEMP_MSR3 since mt8173
thermal driver only use 3 sensors on each thermal bank at the same time,
so this patch would not effect temperature.
Only if mt mt8173 thermal driver use 4 sensors on any thermal bank, would
read third sensor two times, and lose fourth sensor of vale.

Change since V1:
1. Update commis message
 a. Add Reviewed-by: Matthias Brugger 
 b. Add tag Fixes: b7cf0053738c ("thermal: Add Mediatek thermal driver for 
mt2701.")



[PATCH v2 1/1] thermal: mt8173: minor mtk_thermal.c cleanups

2017-02-21 Thread Dawei Chien
If thermal bank with 4 sensors, thermal driver should read TEMP_MSR3.

However, currently thermal driver would not read TEMP_MSR3 since mt8173
thermal driver only use 3 sensors on each thermal bank at the same time,
so this patch would not effect temperature.
Only if mt mt8173 thermal driver use 4 sensors on any thermal bank, would
read third sensor two times, and lose fourth sensor of vale.

cc: sta...@vger.kernel.org
Fixes: b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")
Reviewed-by: Matthias Brugger 
Signed-off-by: Dawei Chien 
---
 drivers/thermal/mtk_thermal.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 34169c3..c124151 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -191,7 +191,7 @@ struct mtk_thermal {
 };
 
 const int mt8173_msr[MT8173_NUM_SENSORS_PER_ZONE] = {
-   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR2
+   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR3
 };
 
 const int mt8173_adcpnp[MT8173_NUM_SENSORS_PER_ZONE] = {
-- 
1.9.1



Re: [PATCH] thermal: mt8173: minor mtk_thermal.c cleanups

2017-02-13 Thread Dawei Chien
Hi, Matthias,

On Thu, 2017-02-09 at 22:25 +0100, Matthias Brugger wrote:
> 
> On 02/08/2017 06:31 AM, Dawei Chien wrote:
> > Thermal driver should read TEMP_MSR3 if thermal bank with 4 sensors.
> > However, Currently thermal driver don't need read TEMP_MSR3 since
> > thermal controller only use 3 sensors for each thermal bank.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> 
> Actually the commit message should state:
> Fixes: b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")
> 
> ...and get backported to v4.9 and v4.10.
> 
> Reviewed-by: Matthias Brugger 
> 
> Regards,
> Matthias

Thank you for your review. I would add below commit message on next
version. However, currently 8173 thermal driver would not read TEMP_MSR3
since thermal driver only use 3 sensors on each bank, this patch would
not effect temperature.
Only if thermal driver use 4 sensors on any thermal bank, would read
third sensor two times, and lose fourth sensor of vale.
Fixes: b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")

> >  drivers/thermal/mtk_thermal.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > index 34169c3..c124151 100644
> > --- a/drivers/thermal/mtk_thermal.c
> > +++ b/drivers/thermal/mtk_thermal.c
> > @@ -191,7 +191,7 @@ struct mtk_thermal {
> >  };
> >
> >  const int mt8173_msr[MT8173_NUM_SENSORS_PER_ZONE] = {
> > -   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR2
> > +   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR3
> >  };
> >
> >  const int mt8173_adcpnp[MT8173_NUM_SENSORS_PER_ZONE] = {
> >




[PATCH] thermal: mt8173: minor mtk_thermal.c cleanups

2017-02-07 Thread Dawei Chien
Thermal driver should read TEMP_MSR3 if thermal bank with 4 sensors.
However, Currently thermal driver don't need read TEMP_MSR3 since
thermal controller only use 3 sensors for each thermal bank.

Signed-off-by: Dawei Chien 
---
 drivers/thermal/mtk_thermal.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 34169c3..c124151 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -191,7 +191,7 @@ struct mtk_thermal {
 };
 
 const int mt8173_msr[MT8173_NUM_SENSORS_PER_ZONE] = {
-   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR2
+   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR3
 };
 
 const int mt8173_adcpnp[MT8173_NUM_SENSORS_PER_ZONE] = {
-- 
1.9.1



Re: [PATCH v2 6/6] arm: dts: mt2701: Add thermal device node.

2017-01-15 Thread Dawei Chien
On Mon, 2017-01-16 at 11:44 +0800, Dawei Chien wrote:
> On Fri, 2017-01-13 at 16:27 +0100, Matthias Brugger wrote:
> > 
> > On 13/01/17 09:42, Erin Lo wrote:
> > > From: Dawei Chien 
> > >
> > > Add thermal controller device nodes for MT2701.
> > >
> > > Signed-off-by: Dawei Chien 
> > > Signed-off-by: Erin Lo 
> > > ---
> > >  arch/arm/boot/dts/mt2701.dtsi | 43 
> > > +++
> > >  1 file changed, 43 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > > index 3847f70..c43d5f8 100644
> > > --- a/arch/arm/boot/dts/mt2701.dtsi
> > > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > > @@ -89,6 +89,36 @@
> > >   clock-output-names = "rtc32k";
> > >   };
> > >
> > > + thermal-zones {
> > > + cpu_thermal: cpu_thermal {
> > > + polling-delay-passive = <1000>; /* milliseconds */
> > > + polling-delay = <1000>; /* milliseconds */
> > > +
> > > + thermal-sensors = <&thermal 0>;
> > > + sustainable-power = <1000>;
> > > +
> > > + trips {
> > > + threshold: trip-point@0 {
> > > + temperature = <68000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + target: trip-point@1 {
> > > + temperature = <85000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + cpu_crit: cpu_crit@0 {
> > > + temperature = <115000>;
> > > + hysteresis = <2000>;
> > > + type = "critical";
> > > + };
> > > + };
> > > + };
> > > + };
> > > +
> > >   timer {
> > >   compatible = "arm,armv7-timer";
> > >   interrupt-parent = <&gic>;
> > > @@ -270,6 +300,19 @@
> > >   status = "disabled";
> > >   };
> > >
> > > + thermal: thermal@1100b000 {
> > > + #thermal-sensor-cells = <0>;
> > > + compatible = "mediatek,mt2701-thermal";
> > > + reg = <0 0x1100b000 0 0x1000>;
> > > + interrupts = ;
> > > + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > > + clock-names = "therm", "auxadc";
> > > + resets = <&pericfg 0x10>;
> > 
> > should be MT2701_PERI_AUXADC_SW_RST, right?
> > 
> Thank you for your reminding, I didn't realize mt2701-resets.h upstream
> already, I would update on next version, thank you.
> 
> resets = <&pericfg MT2701_PERI_AUXADC_SW_RST>;

Actually, Should be MT2701_PERI_THERM_SW_RST.

resets = <&pericfg MT2701_PERI_THERM_SW_RST>;

> > > + reset-names = "therm";
> > > + mediatek,auxadc = <&auxadc>;
> > > + mediatek,apmixedsys = <&apmixedsys>;
> > > + };
> > > +
> > >   nandc: nfi@1100d000 {
> > >   compatible = "mediatek,mt2701-nfc";
> > >   reg = <0 0x1100d000 0 0x1000>;
> > >
> 




Re: [PATCH v2 6/6] arm: dts: mt2701: Add thermal device node.

2017-01-15 Thread Dawei Chien
On Fri, 2017-01-13 at 16:27 +0100, Matthias Brugger wrote:
> 
> On 13/01/17 09:42, Erin Lo wrote:
> > From: Dawei Chien 
> >
> > Add thermal controller device nodes for MT2701.
> >
> > Signed-off-by: Dawei Chien 
> > Signed-off-by: Erin Lo 
> > ---
> >  arch/arm/boot/dts/mt2701.dtsi | 43 
> > +++
> >  1 file changed, 43 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 3847f70..c43d5f8 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -89,6 +89,36 @@
> > clock-output-names = "rtc32k";
> > };
> >
> > +   thermal-zones {
> > +   cpu_thermal: cpu_thermal {
> > +   polling-delay-passive = <1000>; /* milliseconds */
> > +   polling-delay = <1000>; /* milliseconds */
> > +
> > +   thermal-sensors = <&thermal 0>;
> > +   sustainable-power = <1000>;
> > +
> > +   trips {
> > +   threshold: trip-point@0 {
> > +   temperature = <68000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   target: trip-point@1 {
> > +   temperature = <85000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   cpu_crit: cpu_crit@0 {
> > +   temperature = <115000>;
> > +   hysteresis = <2000>;
> > +   type = "critical";
> > +   };
> > +   };
> > +   };
> > +   };
> > +
> > timer {
> > compatible = "arm,armv7-timer";
> > interrupt-parent = <&gic>;
> > @@ -270,6 +300,19 @@
> > status = "disabled";
> > };
> >
> > +   thermal: thermal@1100b000 {
> > +   #thermal-sensor-cells = <0>;
> > +   compatible = "mediatek,mt2701-thermal";
> > +   reg = <0 0x1100b000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > +   clock-names = "therm", "auxadc";
> > +   resets = <&pericfg 0x10>;
> 
> should be MT2701_PERI_AUXADC_SW_RST, right?
> 
Thank you for your reminding, I didn't realize mt2701-resets.h upstream
already, I would update on next version, thank you.

resets = <&pericfg MT2701_PERI_AUXADC_SW_RST>;

> > +   reset-names = "therm";
> > +   mediatek,auxadc = <&auxadc>;
> > +   mediatek,apmixedsys = <&apmixedsys>;
> > +   };
> > +
> > nandc: nfi@1100d000 {
> > compatible = "mediatek,mt2701-nfc";
> > reg = <0 0x1100d000 0 0x1000>;
> >




arm64: dts: mt8173: add node for thermal calibration

2017-01-12 Thread Dawei Chien
From: "dawei.ch...@mediatek.com" 

Add this for supporting thermal calibration by e-fuse data.

Signed-off-by: Dawei Chien 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12e7027..adfac1e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -401,6 +401,11 @@
efuse: efuse@10206000 {
compatible = "mediatek,mt8173-efuse";
reg = <0 0x10206000 0 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   thermal_calibration: calib@528 {
+   reg = <0x528 0xc>;
+   };
};
 
apmixedsys: clock-controller@10209000 {
@@ -574,6 +579,8 @@
resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
+   nvmem-cells = <&thermal_calibration>;
+   nvmem-cell-names = "calibration-data";
};
 
nor_flash: spi@1100d000 {
-- 
1.9.1



Re: [PATCH v2 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-09-07 Thread Dawei Chien
On Tue, 2016-09-06 at 11:28 +0800, Dawei Chien wrote:
> Dear Rui,
> 
> On Tue, 2016-09-06 at 08:30 +0800, Zhang Rui wrote:
> > On 二, 2016-09-06 at 08:24 +0800, Zhang Rui wrote:
> > > On 四, 2016-08-18 at 11:50 +0800, Dawei Chien wrote:
> > > > 
> > > > This adds the thermal controller and auxadc nodes
> > > > to the Mediatek MT2701 dtsi file.
> > > > 
> > > > Signed-off-by: Dawei Chien 
> > > > ---
> > > > This patch depned on:
> > > > https://patchwork.kernel.org/patch/9249589/
> > > > https://patchwork.kernel.org/patch/9249589/
> > > Hmm, does this mean that I should take all these three patches and
> > > hold
> > > the patches in next merge window until the above patch has been
> > > merged?
> > > 
> Yes, this patch is base on auxadc patchset.
> 
> > Patch 3/3 can not be applied on top of upstream kernel, so I guess it
> > still has some other dependencies.
> > I think I can apply patch 1, 2 first. And patch 3/3 should be handled
> > in the dt tree.
> 
> Sorry, this patch is also need Mediatek's clock patchset what I miss to
> add in dependency list, I would resend this dt tree once clock patch
> merge, or resend this for right dependency on next version, thank you.

Actually, since patch1/patch2 would be OK so far, I would just only
resend patch3 after MTK clock pathcset ready, I prefer to merge
patch1/patch2 if possible, thank you.


> > thanks,
> > rui
> > > thanks,
> > > rui 
> > > > 
> > > > ---
> > > >  arch/arm/boot/dts/mt2701.dtsi |   44
> > > > +
> > > >  1 file changed, 44 insertions(+)
> > > > 
> > > > diff --git a/arch/arm/boot/dts/mt2701.dtsi
> > > > b/arch/arm/boot/dts/mt2701.dtsi
> > > > index e9150a4..cee4724 100644
> > > > --- a/arch/arm/boot/dts/mt2701.dtsi
> > > > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > > > @@ -87,6 +87,36 @@
> > > > clock-output-names = "rtc32k";
> > > > };
> > > >  
> > > > +   thermal-zones {
> > > > +   cpu_thermal: cpu_thermal {
> > > > +   polling-delay-passive = <1000>; /*
> > > > milliseconds */
> > > > +   polling-delay = <1000>; /* milliseconds */
> > > > +
> > > > +   thermal-sensors = <&thermal 0>;
> > > > +   sustainable-power = <1000>;
> > > > +
> > > > +   trips {
> > > > +   threshold: trip-point@0 {
> > > > +   temperature = <68000>;
> > > > +   hysteresis = <2000>;
> > > > +   type = "passive";
> > > > +   };
> > > > +
> > > > +   target: trip-point@1 {
> > > > +   temperature = <85000>;
> > > > +   hysteresis = <2000>;
> > > > +   type = "passive";
> > > > +   };
> > > > +
> > > > +   cpu_crit: cpu_crit@0 {
> > > > +   temperature = <115000>;
> > > > +   hysteresis = <2000>;
> > > > +   type = "critical";
> > > > +   };
> > > > +   };
> > > > +   };
> > > > +   };
> > > > +
> > > > timer {
> > > > compatible = "arm,armv7-timer";
> > > > interrupt-parent = <&gic>;
> > > > @@ -222,4 +252,18 @@
> > > > clock-names = "baud", "bus";
> > > > status = "disabled";
> > > > };
> > > > +
> > > > +   thermal: thermal@1100b000 {
> > > > +   #thermal-sensor-cells = <0>;
> > > > +   compatible = "mediatek,mt2701-thermal";
> > > > +   reg = <0 0x1100b000 0 0x1000>;
> > > > +   interrupts = ;
> > > > +   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg
> > > > CLK_PERI_AUXADC>;
> > > > +   clock-names = "therm", "auxadc";
> > > > +   resets = <&pericfg 0x10>;
> > > > +   reset-names = "therm";
> > > > +   mediatek,auxadc = <&auxadc>;
> > > > +   mediatek,apmixedsys = <&apmixedsys>;
> > > > +   };
> > > > +
> > > >  };
> > > --
> > > To unsubscribe from this list: send the line "unsubscribe linux-pm"
> > > in
> > > the body of a message to majord...@vger.kernel.org
> > > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 




Re: [PATCH v2 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-09-05 Thread Dawei Chien
Dear Rui,

On Tue, 2016-09-06 at 08:30 +0800, Zhang Rui wrote:
> On 二, 2016-09-06 at 08:24 +0800, Zhang Rui wrote:
> > On 四, 2016-08-18 at 11:50 +0800, Dawei Chien wrote:
> > > 
> > > This adds the thermal controller and auxadc nodes
> > > to the Mediatek MT2701 dtsi file.
> > > 
> > > Signed-off-by: Dawei Chien 
> > > ---
> > > This patch depned on:
> > > https://patchwork.kernel.org/patch/9249589/
> > > https://patchwork.kernel.org/patch/9249589/
> > Hmm, does this mean that I should take all these three patches and
> > hold
> > the patches in next merge window until the above patch has been
> > merged?
> > 
Yes, this patch is base on auxadc patchset.

> Patch 3/3 can not be applied on top of upstream kernel, so I guess it
> still has some other dependencies.
> I think I can apply patch 1, 2 first. And patch 3/3 should be handled
> in the dt tree.

Sorry, this patch is also need Mediatek's clock patchset what I miss to
add in dependency list, I would resend this dt tree once clock patch
merge, or resend this for right dependency on next version, thank you.

> thanks,
> rui
> > thanks,
> > rui 
> > > 
> > > ---
> > >  arch/arm/boot/dts/mt2701.dtsi |   44
> > > +
> > >  1 file changed, 44 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/mt2701.dtsi
> > > b/arch/arm/boot/dts/mt2701.dtsi
> > > index e9150a4..cee4724 100644
> > > --- a/arch/arm/boot/dts/mt2701.dtsi
> > > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > > @@ -87,6 +87,36 @@
> > >   clock-output-names = "rtc32k";
> > >   };
> > >  
> > > + thermal-zones {
> > > + cpu_thermal: cpu_thermal {
> > > + polling-delay-passive = <1000>; /*
> > > milliseconds */
> > > + polling-delay = <1000>; /* milliseconds */
> > > +
> > > + thermal-sensors = <&thermal 0>;
> > > + sustainable-power = <1000>;
> > > +
> > > + trips {
> > > + threshold: trip-point@0 {
> > > + temperature = <68000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + target: trip-point@1 {
> > > + temperature = <85000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + cpu_crit: cpu_crit@0 {
> > > + temperature = <115000>;
> > > + hysteresis = <2000>;
> > > + type = "critical";
> > > + };
> > > + };
> > > + };
> > > + };
> > > +
> > >   timer {
> > >   compatible = "arm,armv7-timer";
> > >   interrupt-parent = <&gic>;
> > > @@ -222,4 +252,18 @@
> > >   clock-names = "baud", "bus";
> > >   status = "disabled";
> > >   };
> > > +
> > > + thermal: thermal@1100b000 {
> > > + #thermal-sensor-cells = <0>;
> > > + compatible = "mediatek,mt2701-thermal";
> > > + reg = <0 0x1100b000 0 0x1000>;
> > > + interrupts = ;
> > > + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg
> > > CLK_PERI_AUXADC>;
> > > + clock-names = "therm", "auxadc";
> > > + resets = <&pericfg 0x10>;
> > > + reset-names = "therm";
> > > + mediatek,auxadc = <&auxadc>;
> > > + mediatek,apmixedsys = <&apmixedsys>;
> > > + };
> > > +
> > >  };
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-pm"
> > in
> > the body of a message to majord...@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html




[PATCH v2 0/3] Add Mediatek thermal driver for mt2701

2016-08-17 Thread Dawei Chien
This series support for mt2701 chip to mtk_thermal.c,
and integrate both mt8173 and mt2701 on the same driver.
MT8173 has four banks and five sensors, and MT2701 has
only one bank and three sensors.

Change since V1:
1. Restore macro name with MT8173 for nvmem calibration data
since original macro name could be used for both MT2701/MT8173.

2. Add flexible array member to instead of normal array since
thermal bank has different array size between MT2701 to MT8173.

Dawei Chien (3):
  dt-bindings: thermal: Add binding document for Mediatek thermal
controller
  thermal: Add Mediatek thermal driver for mt2701.
  arm: dts: thermal: add thermal/auxadc node.

 .../bindings/thermal/mediatek-thermal.txt  |4 +-
 arch/arm/boot/dts/mt2701.dtsi  |   44 
 drivers/thermal/mtk_thermal.c  |  215 ++--
 3 files changed, 199 insertions(+), 64 deletions(-)



[PATCH v2 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller

2016-08-17 Thread Dawei Chien
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT2701.

Signed-off-by: Dawei Chien 
---
 .../bindings/thermal/mediatek-thermal.txt  |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt 
b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 81f9a51..e2f494d 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -8,7 +8,9 @@ apmixedsys register space via AHB bus accesses, so a phandle to 
the APMIXEDSYS
 is also needed.
 
 Required properties:
-- compatible: "mediatek,mt8173-thermal"
+- compatible:
+  - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
+  - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
 - reg: Address range of the thermal controller
 - interrupts: IRQ for the thermal controller
 - clocks, clock-names: Clocks needed for the thermal controller. required
-- 
1.7.9.5



[PATCH v2 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-08-17 Thread Dawei Chien
This adds the thermal controller and auxadc nodes
to the Mediatek MT2701 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch depned on:
https://patchwork.kernel.org/patch/9249589/
---
 arch/arm/boot/dts/mt2701.dtsi |   44 +
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index e9150a4..cee4724 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -87,6 +87,36 @@
clock-output-names = "rtc32k";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal 0>;
+   sustainable-power = <1000>;
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&gic>;
@@ -222,4 +252,18 @@
clock-names = "baud", "bus";
status = "disabled";
};
+
+   thermal: thermal@1100b000 {
+   #thermal-sensor-cells = <0>;
+   compatible = "mediatek,mt2701-thermal";
+   reg = <0 0x1100b000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+   clock-names = "therm", "auxadc";
+   resets = <&pericfg 0x10>;
+   reset-names = "therm";
+   mediatek,auxadc = <&auxadc>;
+   mediatek,apmixedsys = <&apmixedsys>;
+   };
+
 };
-- 
1.7.9.5



[PATCH v2 2/3] thermal: Add Mediatek thermal driver for mt2701.

2016-08-17 Thread Dawei Chien
This patch adds support for mt2701 chip to mtk_thermal,
and integrate both mt8173 and mt2701 on the same driver.
MT8173 has four banks and five sensors, and MT2701 has
only one bank and three sensors.

Signed-off-by: Dawei Chien 
---
This patch dependents on "Add clock support for Mediatek MT2701"[1].
Please accept this patch together with [1].
[1]http://lists.infradead.org/pipermail/linux-mediatek/2016-August/006620.html
---
 drivers/thermal/mtk_thermal.c |  215 +
 1 file changed, 152 insertions(+), 63 deletions(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 262ab0a..7b233c7 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -2,6 +2,7 @@
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Hanyi Wu 
  * Sascha Hauer 
+ * Dawei Chien 
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -21,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -88,6 +90,7 @@
 #define TEMP_ADCVALIDMASK_VALID_HIGH   BIT(5)
 #define TEMP_ADCVALIDMASK_VALID_POS(bit)   (bit)
 
+/* MT8173 thermal sensors */
 #define MT8173_TS1 0
 #define MT8173_TS2 1
 #define MT8173_TS3 2
@@ -106,7 +109,12 @@
 /* The number of sensing points per bank */
 #define MT8173_NUM_SENSORS_PER_ZONE4
 
-/* Layout of the fuses providing the calibration data */
+/*
+ * Layout of the fuses providing the calibration data
+ * These macros could be used for both MT8173 and MT2701.
+ * MT8173 has five sensors and need five VTS calibration data,
+ * and MT2701 has three sensors and need three VTS calibration data.
+ */
 #define MT8173_CALIB_BUF0_VALIDBIT(0)
 #define MT8173_CALIB_BUF1_ADC_GE(x)(((x) >> 22) & 0x3ff)
 #define MT8173_CALIB_BUF0_VTS_TS1(x)   (((x) >> 17) & 0x1ff)
@@ -117,24 +125,50 @@
 #define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
 #define MT8173_CALIB_BUF0_O_SLOPE(x)   (((x) >> 26) & 0x3f)
 
+/* MT2701 thermal sensors */
+#define MT2701_TS1 0
+#define MT2701_TS2 1
+#define MT2701_TSABB   2
+
+/* AUXADC channel 11 is used for the temperature sensors */
+#define MT2701_TEMP_AUXADC_CHANNEL 11
+
+/* The total number of temperature sensors in the MT2701 */
+#define MT2701_NUM_SENSORS 3
+
 #define THERMAL_NAME"mtk-thermal"
 
+/* The number of sensing points per bank */
+#define MT2701_NUM_SENSORS_PER_ZONE3
+
 struct mtk_thermal;
 
+struct thermal_bank_cfg {
+   unsigned int num_sensors;
+   const int *sensors;
+};
+
 struct mtk_thermal_bank {
struct mtk_thermal *mt;
int id;
 };
 
+struct mtk_thermal_data {
+   s32 num_banks;
+   s32 num_sensors;
+   s32 auxadc_channel;
+   const int *sensor_mux_values;
+   const int *msr;
+   const int *adcpnp;
+   struct thermal_bank_cfg bank_data[];
+};
+
 struct mtk_thermal {
struct device *dev;
void __iomem *thermal_base;
 
struct clk *clk_peri_therm;
struct clk *clk_auxadc;
-
-   struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
-
/* lock: for getting and putting banks */
struct mutex lock;
 
@@ -144,16 +178,44 @@ struct mtk_thermal {
s32 o_slope;
s32 vts[MT8173_NUM_SENSORS];
 
+   const struct mtk_thermal_data *conf;
+   struct mtk_thermal_bank banks[];
 };
 
-struct mtk_thermal_bank_cfg {
-   unsigned int num_sensors;
-   unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
+/* MT8173 thermal sensor data */
+const int mt8173_bank_data[MT8173_NUM_ZONES][3] = {
+   { MT8173_TS2, MT8173_TS3 },
+   { MT8173_TS2, MT8173_TS4 },
+   { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
+   { MT8173_TS2 },
 };
 
-static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+const int mt8173_msr[MT8173_NUM_SENSORS_PER_ZONE] = {
+   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2, TEMP_MSR2
+};
 
-/*
+const int mt8173_adcpnp[MT8173_NUM_SENSORS_PER_ZONE] = {
+   TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2, TEMP_ADCPNP3
+};
+
+const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+
+/* MT2701 thermal sensor data */
+const int mt2701_bank_data[MT2701_NUM_SENSORS] = {
+   MT2701_TS1, MT2701_TS2, MT2701_TSABB
+};
+
+const int mt2701_msr[MT2701_NUM_SENSORS_PER_ZONE] = {
+   TEMP_MSR0, TEMP_MSR1, TEMP_MSR2
+};
+
+const int mt2701_adcpnp[MT2701_NUM_SENSORS_PER_ZONE] = {
+   TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2
+};
+
+const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
+
+/**
  * The MT8173 thermal controller has four banks. Each bank can read up to
  * four temperature sensors simultaneously. The MT8173 has a total of 5
  * temperature sensors. We use each bank to measure a certain area of the
@@ -166,42 +228,53 @@ static const int sensor_mux_values[MT8173_N

Re: [PATCH 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-08-15 Thread dawei chien
Hi Matthias,

On Thu, 2016-08-11 at 17:51 +0200, Matthias Brugger wrote:
> 
> On 07/07/16 11:06, Dawei Chien wrote:
> > This adds the thermal controller and auxadc nodes
> > to the Mediatek MT2701 dtsi file.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch depned on:
> > https://patchwork.kernel.org/patch/9213545/
> > ---
> >  arch/arm/boot/dts/mt2701.dtsi |   43 
> > +
> >  1 file changed, 43 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 2ac8b50..0834a23 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -77,6 +77,36 @@
> > #clock-cells = <0>;
> > };
> >
> > +   thermal-zones {
> > +   cpu_thermal: cpu_thermal {
> > +   polling-delay-passive = <1000>; /* milliseconds */
> > +   polling-delay = <1000>; /* milliseconds */
> > +
> > +   thermal-sensors = <&thermal 0>;
> > +   sustainable-power = <1000>;
> > +
> > +   trips {
> > +   threshold: trip-point@0 {
> > +   temperature = <68000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   target: trip-point@1 {
> > +   temperature = <85000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   cpu_crit: cpu_crit@0 {
> > +   temperature = <115000>;
> > +   hysteresis = <2000>;
> > +   type = "critical";
> > +   };
> > +   };
> > +   };
> > +   };
> > +
> > timer {
> > compatible = "arm,armv7-timer";
> > interrupt-parent = <&gic>;
> > @@ -183,4 +213,17 @@
> > clocks = <&uart_clk>;
> > status = "disabled";
> > };
> > +
> > +   thermal: thermal@1100b000 {
> > +   #thermal-sensor-cells = <0>;
> > +   compatible = "mediatek,mt2701-thermal";
> > +   reg = <0 0x1100b000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > +   clock-names = "therm", "auxadc";
> > +   resets = <&pericfg 0x10>;
> > +   reset-names = "therm";
> > +   mediatek,auxadc = <&auxadc>;
> > +   mediatek,apmixedsys = <&apmixedsys>;
> > +   };
> >  };
> >
> 
> what about:
> status = "disabled"; ?

Since thermal driver would protect our platform by shutdown method once
SoC temperature over critical point, I prefer keep this rather than
disabling, how do you think, thank you.

BR,
Dawei



Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller

2016-08-15 Thread dawei chien
Hi Matthias,

On Thu, 2016-08-11 at 17:48 +0200, Matthias Brugger wrote:
> 
> On 11/07/16 10:52, dawei chien wrote:
> > Dear Keerthy,
> >
> > On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
> >>
> >> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> >>> This adds the device tree binding documentation for the mediatek thermal
> >>> controller found on Mediatek MT2701.
> >>>
> >>> Signed-off-by: Dawei Chien 
> >>> ---
> >>>   .../bindings/thermal/mediatek-thermal.txt  |2 +-
> >>>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git 
> >>> a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt 
> >>> b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> index 81f9a51..bb55e79 100644
> >>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a 
> >>> phandle to the APMIXEDSYS
> >>>   is also needed.
> >>>
> >>>   Required properties:
> >>> -- compatible: "mediatek,mt8173-thermal"
> >>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
> >>
> >> - compatible :
> >>   - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> >>   - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> >
> > Thank you, I will update it on next version.
> >
> 
> Do you know about the compability to older SoCs (e.g. mt6589)?
> It might make sense to add mediatek,mtk-thermal if they are compatible 
> or nearly compatible.

I agree with you that we should add mediatek,mtk-thermal for compatible
or nearly compatible SoC.
However, there is no more compatible SoC so far. Once we have such new
nearly compatible SoC, we would update it on this binding document soon,
thank you.

BR,
Dawei

> >>
> >>>   - reg: Address range of the thermal controller
> >>>   - interrupts: IRQ for the thermal controller
> >>>   - clocks, clock-names: Clocks needed for the thermal controller. 
> >>> required
> >>>
> >
> >




Re: [PATCH 2/3] thermal: Add Mediatek thermal driver for mt2701.

2016-08-08 Thread dawei chien
Dear Keerthy,

On Mon, 2016-07-11 at 16:56 +0800, dawei chien wrote:
> Dear Keerthy,
> 
> On Thu, 2016-07-07 at 17:24 +0530, Keerthy wrote:
> > Hi Dawei Chien,
> > 
> > 
> > On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > > This patch adds support for mt2701 chip to mtk_thermal.c,
> > > and integrate both mt8173 and mt2701 on the same driver.
> > > MT8173 has four banks and five sensors, and MT2701 has
> > > only one bank and three sensors.
> > >
> > > Signed-off-by: Dawei Chien 
> > > ---
> > >   drivers/thermal/mtk_thermal.c |  258 
> > > ++---
> > >   1 file changed, 165 insertions(+), 93 deletions(-)
> > >
> > > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > > index 262ab0a..860f2e2 100644
> > > --- a/drivers/thermal/mtk_thermal.c
> > > +++ b/drivers/thermal/mtk_thermal.c
> > > @@ -2,6 +2,7 @@
> > >* Copyright (c) 2015 MediaTek Inc.
> > >* Author: Hanyi Wu 
> > >* Sascha Hauer 
> > > + * Dawei Chien 
> > >*
> > >* This program is free software; you can redistribute it and/or modify
> > >* it under the terms of the GNU General Public License version 2 as
> > > @@ -21,6 +22,7 @@
> > >   #include 
> > >   #include 
> > >   #include 
> > > +#include 
> > >   #include 
> > >   #include 
> > >   #include 
> > > @@ -88,6 +90,7 @@
> > >   #define TEMP_ADCVALIDMASK_VALID_HIGHBIT(5)
> > >   #define TEMP_ADCVALIDMASK_VALID_POS(bit)(bit)
> > >
> > > +/* MT8173 thermal sensors */
> > >   #define MT8173_TS1  0
> > >   #define MT8173_TS2  1
> > >   #define MT8173_TS3  2
> > > @@ -97,35 +100,62 @@
> > >   /* AUXADC channel 11 is used for the temperature sensors */
> > >   #define MT8173_TEMP_AUXADC_CHANNEL  11
> > >
> > > -/* The total number of temperature sensors in the MT8173 */
> > > -#define MT8173_NUM_SENSORS   5
> > > -
> > > -/* The number of banks in the MT8173 */
> > > -#define MT8173_NUM_ZONES 4
> > > -
> > > -/* The number of sensing points per bank */
> > > -#define MT8173_NUM_SENSORS_PER_ZONE  4
> > > -
> > >   /* Layout of the fuses providing the calibration data */
> > > -#define MT8173_CALIB_BUF0_VALID  BIT(0)
> > > -#define MT8173_CALIB_BUF1_ADC_GE(x)  (((x) >> 22) & 0x3ff)
> > > -#define MT8173_CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff)
> > > -#define MT8173_CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff)
> > > -#define MT8173_CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff)
> > > -#define MT8173_CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff)
> > > -#define MT8173_CALIB_BUF2_VTS_TSABB(x)   (((x) >> 14) & 0x1ff)
> > > -#define MT8173_CALIB_BUF0_DEGC_CALI(x)   (((x) >> 1) & 0x3f)
> > > -#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f)
> > > +#define CALIB_BUF0_VALID BIT(0)
> > > +#define CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff)
> > > +#define CALIB_BUF0_VTS_TS1(x)(((x) >> 17) & 0x1ff)
> > > +#define CALIB_BUF0_VTS_TS2(x)(((x) >> 8) & 0x1ff)
> > > +#define CALIB_BUF1_VTS_TS3(x)(((x) >> 0) & 0x1ff)
> > > +#define CALIB_BUF2_VTS_TS4(x)(((x) >> 23) & 0x1ff)
> > > +#define CALIB_BUF2_VTS_TS5(x)(((x) >> 14) & 0x1ff)
> > > +#define CALIB_BUF0_DEGC_CALI(x)  (((x) >> 1) & 0x3f)
> > > +#define CALIB_BUF0_O_SLOPE(x)(((x) >> 26) & 0x3f)
> > > +
> > 
> > IMHO the above changes from defining CALIB_BUF1_ADC_GE(x) to 
> > CALIB_BUF0_O_SLOPE(x) can be avoided. We are just renaming the same 
> > defines to a generic name. Instead the macro starting with MT8173 can 
> > only be used wherever needed commonly both by 8173 instance and for
> > 2701 instance.
> > 
> 
> I would have a try to keep MT8173 original one and add some comment for
> the macro starting on next version.

Just confirm again,
we don't need change common macro name, and just need to add comment for
MT8173/MT2701, right?

> > > +#define NVMEM_TS10
> > > +#define NVMEM_TS21
> > > +#define NVMEM_TS32
> > > +#define NVMEM_TS43
> > > +#define NVMEM_TS5

Re: [PATCH 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-07-11 Thread dawei chien
Dear Keerthy,

On Thu, 2016-07-07 at 17:39 +0530, Keerthy wrote:
> 
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This adds the thermal controller and auxadc nodes
> > to the Mediatek MT2701 dtsi file.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch depned on:
> > https://patchwork.kernel.org/patch/9213545/
> > ---
> >   arch/arm/boot/dts/mt2701.dtsi |   43 
> > +
> >   1 file changed, 43 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 2ac8b50..0834a23 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -77,6 +77,36 @@
> > #clock-cells = <0>;
> > };
> >
> > +   thermal-zones {
> > +   cpu_thermal: cpu_thermal {
> > +   polling-delay-passive = <1000>; /* milliseconds */
> > +   polling-delay = <1000>; /* milliseconds */
> > +
> > +   thermal-sensors = <&thermal 0>;
> > +   sustainable-power = <1000>;
> > +
> > +   trips {
> > +   threshold: trip-point@0 {
> > +   temperature = <68000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   target: trip-point@1 {
> > +   temperature = <85000>;
> > +   hysteresis = <2000>;
> > +   type = "passive";
> > +   };
> > +
> > +   cpu_crit: cpu_crit@0 {
> > +   temperature = <115000>;
> > +   hysteresis = <2000>;
> > +   type = "critical";
> > +   };
> > +   };
> > +   };
> > +   };
> > +
> 
> are there any corresponding cooling-maps?

Since MT2701 does not register CPUFREQ cooling device and its' own
device node, I could not add cooling-maps so far.
Could we add cooling map after CPUFREQ ready, thank you.

> 
> > timer {
> > compatible = "arm,armv7-timer";
> > interrupt-parent = <&gic>;
> > @@ -183,4 +213,17 @@
> > clocks = <&uart_clk>;
> > status = "disabled";
> > };
> > +
> > +   thermal: thermal@1100b000 {
> > +   #thermal-sensor-cells = <0>;
> > +   compatible = "mediatek,mt2701-thermal";
> > +   reg = <0 0x1100b000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > +   clock-names = "therm", "auxadc";
> > +   resets = <&pericfg 0x10>;
> > +   reset-names = "therm";
> > +   mediatek,auxadc = <&auxadc>;
> > +   mediatek,apmixedsys = <&apmixedsys>;
> > +   };
> >   };
> >




Re: [PATCH 2/3] thermal: Add Mediatek thermal driver for mt2701.

2016-07-11 Thread dawei chien
Dear Keerthy,

On Thu, 2016-07-07 at 17:24 +0530, Keerthy wrote:
> Hi Dawei Chien,
> 
> 
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This patch adds support for mt2701 chip to mtk_thermal.c,
> > and integrate both mt8173 and mt2701 on the same driver.
> > MT8173 has four banks and five sensors, and MT2701 has
> > only one bank and three sensors.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> >   drivers/thermal/mtk_thermal.c |  258 
> > ++---
> >   1 file changed, 165 insertions(+), 93 deletions(-)
> >
> > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > index 262ab0a..860f2e2 100644
> > --- a/drivers/thermal/mtk_thermal.c
> > +++ b/drivers/thermal/mtk_thermal.c
> > @@ -2,6 +2,7 @@
> >* Copyright (c) 2015 MediaTek Inc.
> >* Author: Hanyi Wu 
> >* Sascha Hauer 
> > + * Dawei Chien 
> >*
> >* This program is free software; you can redistribute it and/or modify
> >* it under the terms of the GNU General Public License version 2 as
> > @@ -21,6 +22,7 @@
> >   #include 
> >   #include 
> >   #include 
> > +#include 
> >   #include 
> >   #include 
> >   #include 
> > @@ -88,6 +90,7 @@
> >   #define TEMP_ADCVALIDMASK_VALID_HIGH  BIT(5)
> >   #define TEMP_ADCVALIDMASK_VALID_POS(bit)  (bit)
> >
> > +/* MT8173 thermal sensors */
> >   #define MT8173_TS10
> >   #define MT8173_TS21
> >   #define MT8173_TS32
> > @@ -97,35 +100,62 @@
> >   /* AUXADC channel 11 is used for the temperature sensors */
> >   #define MT8173_TEMP_AUXADC_CHANNEL11
> >
> > -/* The total number of temperature sensors in the MT8173 */
> > -#define MT8173_NUM_SENSORS 5
> > -
> > -/* The number of banks in the MT8173 */
> > -#define MT8173_NUM_ZONES   4
> > -
> > -/* The number of sensing points per bank */
> > -#define MT8173_NUM_SENSORS_PER_ZONE4
> > -
> >   /* Layout of the fuses providing the calibration data */
> > -#define MT8173_CALIB_BUF0_VALIDBIT(0)
> > -#define MT8173_CALIB_BUF1_ADC_GE(x)(((x) >> 22) & 0x3ff)
> > -#define MT8173_CALIB_BUF0_VTS_TS1(x)   (((x) >> 17) & 0x1ff)
> > -#define MT8173_CALIB_BUF0_VTS_TS2(x)   (((x) >> 8) & 0x1ff)
> > -#define MT8173_CALIB_BUF1_VTS_TS3(x)   (((x) >> 0) & 0x1ff)
> > -#define MT8173_CALIB_BUF2_VTS_TS4(x)   (((x) >> 23) & 0x1ff)
> > -#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
> > -#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
> > -#define MT8173_CALIB_BUF0_O_SLOPE(x)   (((x) >> 26) & 0x3f)
> > +#define CALIB_BUF0_VALID   BIT(0)
> > +#define CALIB_BUF1_ADC_GE(x)   (((x) >> 22) & 0x3ff)
> > +#define CALIB_BUF0_VTS_TS1(x)  (((x) >> 17) & 0x1ff)
> > +#define CALIB_BUF0_VTS_TS2(x)  (((x) >> 8) & 0x1ff)
> > +#define CALIB_BUF1_VTS_TS3(x)  (((x) >> 0) & 0x1ff)
> > +#define CALIB_BUF2_VTS_TS4(x)  (((x) >> 23) & 0x1ff)
> > +#define CALIB_BUF2_VTS_TS5(x)  (((x) >> 14) & 0x1ff)
> > +#define CALIB_BUF0_DEGC_CALI(x)(((x) >> 1) & 0x3f)
> > +#define CALIB_BUF0_O_SLOPE(x)  (((x) >> 26) & 0x3f)
> > +
> 
> IMHO the above changes from defining CALIB_BUF1_ADC_GE(x) to 
> CALIB_BUF0_O_SLOPE(x) can be avoided. We are just renaming the same 
> defines to a generic name. Instead the macro starting with MT8173 can 
> only be used wherever needed commonly both by 8173 instance and for
> 2701 instance.
> 

I would have a try to keep MT8173 original one and add some comment for
the macro starting on next version.

> > +#define NVMEM_TS1  0
> > +#define NVMEM_TS2  1
> > +#define NVMEM_TS3  2
> > +#define NVMEM_TS4  3
> > +#define NVMEM_TS5  4
> > +

Does these need to keep the old one
MT8173_TS1/MT8173_TS2/MT8173_TS3/MT8173_TS4/MT8173_TSABB


> > +/* MT2701 thermal sensors */
> > +#define MT2701_TS1 0
> > +#define MT2701_TS2 1
> > +#define MT2701_TSABB   2
> > +
> > +/* AUXADC channel 11 is used for the temperature sensors */
> > +#define MT2701_TEMP_AUXADC_CHANNEL 11
> >
> >   #define THERMAL_NAME"mtk-thermal"
> >
> > +/* Maximum support banks */
> > +#define MAX_NUM_BANK   5
> 
> Why is this 5?
> Commit message states: MT8173 has four banks and five sensors, and 
&

Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller

2016-07-11 Thread dawei chien
Dear Keerthy,

On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
> 
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT2701.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> >   .../bindings/thermal/mediatek-thermal.txt  |2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt 
> > b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > index 81f9a51..bb55e79 100644
> > --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a 
> > phandle to the APMIXEDSYS
> >   is also needed.
> >
> >   Required properties:
> > -- compatible: "mediatek,mt8173-thermal"
> > +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
> 
> - compatible :
>   - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
>   - "mediatek,mt2701-thermal" : For MT2701 family of SoCs

Thank you, I will update it on next version.

> 
> >   - reg: Address range of the thermal controller
> >   - interrupts: IRQ for the thermal controller
> >   - clocks, clock-names: Clocks needed for the thermal controller. required
> >




[PATCH 2/3] thermal: Add Mediatek thermal driver for mt2701.

2016-07-07 Thread Dawei Chien
This patch adds support for mt2701 chip to mtk_thermal.c,
and integrate both mt8173 and mt2701 on the same driver.
MT8173 has four banks and five sensors, and MT2701 has
only one bank and three sensors.

Signed-off-by: Dawei Chien 
---
 drivers/thermal/mtk_thermal.c |  258 ++---
 1 file changed, 165 insertions(+), 93 deletions(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 262ab0a..860f2e2 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -2,6 +2,7 @@
  * Copyright (c) 2015 MediaTek Inc.
  * Author: Hanyi Wu 
  * Sascha Hauer 
+ * Dawei Chien 
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -21,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -88,6 +90,7 @@
 #define TEMP_ADCVALIDMASK_VALID_HIGH   BIT(5)
 #define TEMP_ADCVALIDMASK_VALID_POS(bit)   (bit)
 
+/* MT8173 thermal sensors */
 #define MT8173_TS1 0
 #define MT8173_TS2 1
 #define MT8173_TS3 2
@@ -97,35 +100,62 @@
 /* AUXADC channel 11 is used for the temperature sensors */
 #define MT8173_TEMP_AUXADC_CHANNEL 11
 
-/* The total number of temperature sensors in the MT8173 */
-#define MT8173_NUM_SENSORS 5
-
-/* The number of banks in the MT8173 */
-#define MT8173_NUM_ZONES   4
-
-/* The number of sensing points per bank */
-#define MT8173_NUM_SENSORS_PER_ZONE4
-
 /* Layout of the fuses providing the calibration data */
-#define MT8173_CALIB_BUF0_VALIDBIT(0)
-#define MT8173_CALIB_BUF1_ADC_GE(x)(((x) >> 22) & 0x3ff)
-#define MT8173_CALIB_BUF0_VTS_TS1(x)   (((x) >> 17) & 0x1ff)
-#define MT8173_CALIB_BUF0_VTS_TS2(x)   (((x) >> 8) & 0x1ff)
-#define MT8173_CALIB_BUF1_VTS_TS3(x)   (((x) >> 0) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TS4(x)   (((x) >> 23) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
-#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
-#define MT8173_CALIB_BUF0_O_SLOPE(x)   (((x) >> 26) & 0x3f)
+#define CALIB_BUF0_VALID   BIT(0)
+#define CALIB_BUF1_ADC_GE(x)   (((x) >> 22) & 0x3ff)
+#define CALIB_BUF0_VTS_TS1(x)  (((x) >> 17) & 0x1ff)
+#define CALIB_BUF0_VTS_TS2(x)  (((x) >> 8) & 0x1ff)
+#define CALIB_BUF1_VTS_TS3(x)  (((x) >> 0) & 0x1ff)
+#define CALIB_BUF2_VTS_TS4(x)  (((x) >> 23) & 0x1ff)
+#define CALIB_BUF2_VTS_TS5(x)  (((x) >> 14) & 0x1ff)
+#define CALIB_BUF0_DEGC_CALI(x)(((x) >> 1) & 0x3f)
+#define CALIB_BUF0_O_SLOPE(x)  (((x) >> 26) & 0x3f)
+
+#define NVMEM_TS1  0
+#define NVMEM_TS2  1
+#define NVMEM_TS3  2
+#define NVMEM_TS4  3
+#define NVMEM_TS5  4
+
+/* MT2701 thermal sensors */
+#define MT2701_TS1 0
+#define MT2701_TS2 1
+#define MT2701_TSABB   2
+
+/* AUXADC channel 11 is used for the temperature sensors */
+#define MT2701_TEMP_AUXADC_CHANNEL 11
 
 #define THERMAL_NAME"mtk-thermal"
 
+/* Maximum support banks */
+#define MAX_NUM_BANK   5
+
 struct mtk_thermal;
 
+struct thermal_bank_cfg {
+   unsigned int num_sensors;
+   unsigned int sensors[MAX_NUM_BANK];
+};
+
 struct mtk_thermal_bank {
struct mtk_thermal *mt;
int id;
 };
 
+struct mtk_thermal_sense_point {
+   int msr;
+   int adcpnp;
+};
+
+struct mtk_thermal_data {
+   struct thermal_bank_cfg bank_data[MAX_NUM_BANK];
+   struct mtk_thermal_sense_point sensing_points[MAX_NUM_BANK];
+   int sensor_mux_values[MAX_NUM_BANK];
+   s32 num_banks;
+   s32 num_sensors;
+   s32 auxadc_channel;
+};
+
 struct mtk_thermal {
struct device *dev;
void __iomem *thermal_base;
@@ -133,27 +163,20 @@ struct mtk_thermal {
struct clk *clk_peri_therm;
struct clk *clk_auxadc;
 
-   struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
-
+   struct mtk_thermal_bank banks[MAX_NUM_BANK];
+   const struct mtk_thermal_data *conf;
/* lock: for getting and putting banks */
struct mutex lock;
+   struct thermal_zone_device *tzd;
 
/* Calibration values */
s32 adc_ge;
s32 degc_cali;
s32 o_slope;
-   s32 vts[MT8173_NUM_SENSORS];
-
-};
-
-struct mtk_thermal_bank_cfg {
-   unsigned int num_sensors;
-   unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
+   s32 vts[MAX_NUM_BANK];
 };
 
-static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
-
-/*
+/**
  * The MT8173 thermal controller has four banks. Each bank can read up to
  * four temperature sensors simultaneously. The MT8173 has a total of 5
  * temperature sensors. We use each bank to measure a certain area of the
@@ -166,42 +189,76 @@ static const int sensor_mux_values[MT81

[PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller

2016-07-07 Thread Dawei Chien
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT2701.

Signed-off-by: Dawei Chien 
---
 .../bindings/thermal/mediatek-thermal.txt  |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt 
b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 81f9a51..bb55e79 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to 
the APMIXEDSYS
 is also needed.
 
 Required properties:
-- compatible: "mediatek,mt8173-thermal"
+- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
 - reg: Address range of the thermal controller
 - interrupts: IRQ for the thermal controller
 - clocks, clock-names: Clocks needed for the thermal controller. required
-- 
1.7.9.5



[PATCH 0/3] thermal: Add Mediatek thermal driver for mt2701

2016-07-07 Thread Dawei Chien
This series support for mt2701 chip to mtk_thermal.c,
and integrate both mt8173 and mt2701 on the same driver.
MT8173 has four banks and five sensors, and MT2701 has
only one bank and three sensors.



[PATCH 3/3] arm: dts: thermal: add thermal/auxadc node.

2016-07-07 Thread Dawei Chien
This adds the thermal controller and auxadc nodes
to the Mediatek MT2701 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch depned on:
https://patchwork.kernel.org/patch/9213545/
---
 arch/arm/boot/dts/mt2701.dtsi |   43 +
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 2ac8b50..0834a23 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -77,6 +77,36 @@
#clock-cells = <0>;
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal 0>;
+   sustainable-power = <1000>;
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&gic>;
@@ -183,4 +213,17 @@
clocks = <&uart_clk>;
status = "disabled";
};
+
+   thermal: thermal@1100b000 {
+   #thermal-sensor-cells = <0>;
+   compatible = "mediatek,mt2701-thermal";
+   reg = <0 0x1100b000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+   clock-names = "therm", "auxadc";
+   resets = <&pericfg 0x10>;
+   reset-names = "therm";
+   mediatek,auxadc = <&auxadc>;
+   mediatek,apmixedsys = <&apmixedsys>;
+   };
 };
-- 
1.7.9.5



Re: [RESEND][PATCH 3/3] arm64: dts: mt8173: Add dynamic power node.

2016-04-20 Thread dawei chien
On Tue, 2016-03-15 at 16:10 +0800, Dawei Chien (錢大衛) wrote:
> This device node is for calculating dynamic power in mW.
> Since mt8173 has two clusters, there are two dynamic power
> coefficient as well.
> 
> Signed-off-by: Dawei Chien 
> ---
> This patch is base on patchset:
> https://lkml.org/lkml/2015/11/17/251

Sorry for miss one dependence for this device node.
https://lkml.org/lkml/2015/7/9/206

> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index f9c44cc..5cb6b4e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -71,6 +71,7 @@
> #cooling-cells = <2>;
> #cooling-min-level = <0>;
> #cooling-max-level = <7>;
> +   dynamic-power-coefficient = <263>;
> };
> 
> cpu1: cpu@1 {
> @@ -95,6 +96,7 @@
> #cooling-cells = <2>;
> #cooling-min-level = <0>;
> #cooling-max-level = <7>;
> +   dynamic-power-coefficient = <263>;
> };
> 
> cpu2: cpu@100 {
> @@ -119,6 +121,7 @@
> #cooling-cells = <2>;
> #cooling-min-level = <0>;
> #cooling-max-level = <7>;
> +   dynamic-power-coefficient = <530>;
> };
> 
> cpu3: cpu@101 {
> @@ -143,6 +146,7 @@
> #cooling-cells = <2>;
> #cooling-min-level = <0>;
> #cooling-max-level = <7>;
> +   dynamic-power-coefficient = <530>;
> };
> 
> idle-states {
> --
> 1.7.9.5
> 




Re: [PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-04-11 Thread dawei chien
On Tue, 2016-04-12 at 10:41 +0530, Viresh Kumar wrote:
> On 12-04-16, 10:32, dawei chien wrote:
> > On Tue, 2016-03-22 at 13:13 +0800, dawei chien wrote:
> > > On Tue, 2016-03-15 at 13:17 +0700, Viresh Kumar wrote:
> > > > Its Rafael, who is going to apply this one.
> > > > 
> > > > Can you please resend it as he may not have it in patchworks?
> > > > 
> > > 
> > > Hi Rafael,
> > > Would you merge this patch to your tree, thank you.
> > > 
> > > BR,
> > > Dawei
> > 
> > Hi Rafael,
> > Would you please merge this patch, or please kindly let me know for any
> > problem, thank you.
> 
> Didn't I ask you earlier to resend this patch as Rafael wouldn't have
> it in his queue now ?
> 
> Please resend it and that will make it earlier for Rafael to get it
> applied.
> 
Hi Viresh,
Please refer to following for my resending, thank you.

https://lkml.org/lkml/2016/3/15/101
https://patchwork.kernel.org/patch/8586131/
https://patchwork.kernel.org/patch/8586111/
https://patchwork.kernel.org/patch/8586081/

BR,
Dawei



Re: [PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-04-11 Thread dawei chien
On Tue, 2016-03-22 at 13:13 +0800, dawei chien wrote:
> On Tue, 2016-03-15 at 13:17 +0700, Viresh Kumar wrote:
> > On 15-03-16, 12:53, dawei chien wrote:
> > > On Thu, 2015-12-17 at 09:52 +0800, Viresh Kumar wrote:
> > > > On 16-12-15, 21:29, Dawei Chien wrote:
> > > > > Use Intelligent Power Allocation (IPA) technical to add dynamic power 
> > > > > model
> > > > > for binding CPU thermal zone. The power allocator governor allocates 
> > > > > power
> > > > > budget to control CPU temperature.
> > > > >
> > > > > Power Allocator governor is able to keep SOC temperature within a 
> > > > > defined
> > > > > temperature range to avoid SOC overheat and keep it's performance.
> > > > > mt8173-cpufreq.c need to register its' own power model with power 
> > > > > allocator
> > > > > thermal governor, so that power allocator governor can allocates 
> > > > > suitable
> > > > > power budget to control CPU temperature.
> > > > >
> > > > > Binding document is refer to this patchset
> > > > > https://lkml.org/lkml/2015/11/30/239
> > > > >
> > > > > Change since V5:
> > > > > 1. Remove thermal sensor ID from phandles
> > > > 
> > > > Though you should have included this in the new version, but still
> > > > 
> > > > Acked-by: Viresh Kumar 
> > > > 
> > > > --
> > > > viresh
> > > 
> > > Hi Viresh,
> > > Would you please pull this patch to your tree since following patch
> > > already pulled in, thank you.
> > > 
> > > https://lkml.org/lkml/2015/11/30/239
> > 
> > Its Rafael, who is going to apply this one.
> > 
> > Can you please resend it as he may not have it in patchworks?
> > 
> 
> Hi Rafael,
> Would you merge this patch to your tree, thank you.
> 
> BR,
> Dawei

Hi Rafael,
Would you please merge this patch, or please kindly let me know for any
problem, thank you.
 
BR,
Dawei



Re: [PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-03-21 Thread dawei chien
On Tue, 2016-03-15 at 13:17 +0700, Viresh Kumar wrote:
> On 15-03-16, 12:53, dawei chien wrote:
> > On Thu, 2015-12-17 at 09:52 +0800, Viresh Kumar wrote:
> > > On 16-12-15, 21:29, Dawei Chien wrote:
> > > > Use Intelligent Power Allocation (IPA) technical to add dynamic power 
> > > > model
> > > > for binding CPU thermal zone. The power allocator governor allocates 
> > > > power
> > > > budget to control CPU temperature.
> > > >
> > > > Power Allocator governor is able to keep SOC temperature within a 
> > > > defined
> > > > temperature range to avoid SOC overheat and keep it's performance.
> > > > mt8173-cpufreq.c need to register its' own power model with power 
> > > > allocator
> > > > thermal governor, so that power allocator governor can allocates 
> > > > suitable
> > > > power budget to control CPU temperature.
> > > >
> > > > Binding document is refer to this patchset
> > > > https://lkml.org/lkml/2015/11/30/239
> > > >
> > > > Change since V5:
> > > > 1. Remove thermal sensor ID from phandles
> > > 
> > > Though you should have included this in the new version, but still
> > > 
> > > Acked-by: Viresh Kumar 
> > > 
> > > --
> > > viresh
> > 
> > Hi Viresh,
> > Would you please pull this patch to your tree since following patch
> > already pulled in, thank you.
> > 
> > https://lkml.org/lkml/2015/11/30/239
> 
> Its Rafael, who is going to apply this one.
> 
> Can you please resend it as he may not have it in patchworks?
> 

Hi Rafael,
Would you merge this patch to your tee, thank you.

BR,
Dawei



[RESEND][PATCH 3/3] arm64: dts: mt8173: Add dynamic power node.

2016-03-15 Thread Dawei Chien
This device node is for calculating dynamic power in mW.
Since mt8173 has two clusters, there are two dynamic power
coefficient as well.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index f9c44cc..5cb6b4e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -71,6 +71,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu1: cpu@1 {
@@ -95,6 +96,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu2: cpu@100 {
@@ -119,6 +121,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
cpu3: cpu@101 {
@@ -143,6 +146,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
idle-states {
-- 
1.7.9.5



[RESEND][PATCH 1/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-03-15 Thread Dawei Chien
MT8173 cpufreq driver select of_cpufreq_power_cooling_register registering
cooling devices with dynamic power coefficient.

Signed-off-by: Dawei Chien 
Acked-by: Viresh Kumar 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 drivers/cpufreq/mt8173-cpufreq.c |   11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 1efba34..d8ad406 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -309,17 +309,24 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy 
*policy,
return 0;
 }
 
+#define DYNAMIC_POWER "dynamic-power-coefficient"
+
 static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
struct device_node *np = of_node_get(info->cpu_dev->of_node);
+   u32 capacitance = 0;
 
if (WARN_ON(!np))
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
+   of_property_read_u32(np, DYNAMIC_POWER, &capacitance);
+
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   NULL);
 
if (IS_ERR(info->cdev)) {
dev_err(info->cpu_dev,
-- 
1.7.9.5



[RESEND][PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-03-15 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add dynamic power model for 
binding CPU thermal zone. The power allocator governor allocates power budget 
to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined 
temperature range to avoid SOC overheat and keep it's performance.
mt8173-cpufreq.c need to register its' own power model with power allocator 
thermal governor, so that power allocator governor can allocates suitable power 
budget to control CPU temperature.

Binding document is refer to this patchset
https://lkml.org/lkml/2015/11/30/239

Change since V5:
1. Remove thermal sensor ID from phandles

Change since V4:
1. Remove unnecessary error-checking for mt8173-cpufreq.c 2. Initializing 
variable capacitance with 0

Change since V3:
1. Remove static power model
2. Split V3's device tree in two for thermal zones and dynamic power models 
respectively

Change since V2:
1. Move dynamic/static power model in device tree

Change since V1:
1. Include mt8171.h and sort header file for mt8173.dtsi

Dawei Chien (3):
  thermal: mediatek: Add cpu dynamic power cooling model.
  arm64: dts: mt8173: Add thermal zone node.
  arm64: dts: mt8173: Add dynamic power node.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   47 ++
 drivers/cpufreq/mt8173-cpufreq.c |   12 ++--
 2 files changed, 57 insertions(+), 2 deletions(-)


[RESEND][PATCH 2/3] arm64: dts: mt8173: Add thermal zone node.

2016-03-15 Thread Dawei Chien
This adds thermal zone node to Mediatek MT8173 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/30/239
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 47151e8..f9c44cc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -188,6 +188,49 @@
clock-output-names = "cpum_ck";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal>;
+   sustainable-power = <1500>; /* milliwatts */
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5



Re: [PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2016-03-14 Thread dawei chien
On Thu, 2015-12-17 at 09:52 +0800, Viresh Kumar wrote:
> On 16-12-15, 21:29, Dawei Chien wrote:
> > Use Intelligent Power Allocation (IPA) technical to add dynamic power model
> > for binding CPU thermal zone. The power allocator governor allocates power
> > budget to control CPU temperature.
> >
> > Power Allocator governor is able to keep SOC temperature within a defined
> > temperature range to avoid SOC overheat and keep it's performance.
> > mt8173-cpufreq.c need to register its' own power model with power allocator
> > thermal governor, so that power allocator governor can allocates suitable
> > power budget to control CPU temperature.
> >
> > Binding document is refer to this patchset
> > https://lkml.org/lkml/2015/11/30/239
> >
> > Change since V5:
> > 1. Remove thermal sensor ID from phandles
> 
> Though you should have included this in the new version, but still
> 
> Acked-by: Viresh Kumar 
> 
> --
> viresh

Hi Viresh,
Would you please pull this patch to your tree since following patch
already pulled in, thank you.

https://lkml.org/lkml/2015/11/30/239

BR,
Dawei



[PATCH] arm64: dts: mt8173: add node for thermal calibration

2016-02-04 Thread Dawei Chien
Add this for supporting thermal calibration by e-fuse data.

Signed-off-by: Dawei Chien 
---
Because MTK thermal/efuse patches hadn't landed on mainline, this patch
must base on following patchset:
https://lkml.org/lkml/2015/11/17/251
https://lkml.org/lkml/2015/11/19/169
https://lkml.org/lkml/2015/11/30/239
https://lkml.org/lkml/2015/12/16/195
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index ffcca66..0c9d17e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -391,6 +391,11 @@
efuse: efuse@10206000 {
compatible = "mediatek,mt8173-efuse";
reg = <0 0x10206000 0 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   thermal_calibration: calib@528 {
+   reg = <0x528 0xc>;
+   };
};
 
apmixedsys: clock-controller@10209000 {
@@ -744,6 +749,8 @@
resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
+   nvmem-cells = <&thermal_calibration>;
+   nvmem-cell-names = "calibration-data";
};
};
 };
-- 
1.7.9.5



[PATCH v6 1/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-12-16 Thread Dawei Chien
MT8173 cpufreq driver select of_cpufreq_power_cooling_register registering
cooling devices with dynamic power coefficient.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 drivers/cpufreq/mt8173-cpufreq.c |   11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 83001dc..d00bab5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -263,17 +263,24 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy 
*policy,
return 0;
 }
 
+#define DYNAMIC_POWER "dynamic-power-coefficient"
+
 static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
struct device_node *np = of_node_get(info->cpu_dev->of_node);
+   u32 capacitance = 0;
 
if (WARN_ON(!np))
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
+   of_property_read_u32(np, DYNAMIC_POWER, &capacitance);
+
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   NULL);
 
if (IS_ERR(info->cdev)) {
dev_err(info->cpu_dev,
-- 
1.7.9.5

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[PATCH v6 3/3] arm64: dts: mt8173: Add dynamic power node.

2015-12-16 Thread Dawei Chien
This device node is for calculating dynamic power in mW.
Since mt8173 has two clusters, there are two dynamic power
coefficient as well.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index c962d94..b6f4ea5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -71,6 +71,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu1: cpu@1 {
@@ -95,6 +96,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu2: cpu@100 {
@@ -119,6 +121,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
cpu3: cpu@101 {
@@ -143,6 +146,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
idle-states {
-- 
1.7.9.5

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[PATCH v6 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-12-16 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add dynamic power model
for binding CPU thermal zone. The power allocator governor allocates power
budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined
temperature range to avoid SOC overheat and keep it's performance.
mt8173-cpufreq.c need to register its' own power model with power allocator
thermal governor, so that power allocator governor can allocates suitable
power budget to control CPU temperature.

Binding document is refer to this patchset
https://lkml.org/lkml/2015/11/30/239

Change since V5:
1. Remove thermal sensor ID from phandles

Change since V4:
1. Remove unnecessary error-checking for mt8173-cpufreq.c
2. Initializing variable capacitance with 0

Change since V3:
1. Remove static power model
2. Split V3's device tree in two for thermal zones and dynamic power models 
respectively

Change since V2:
1. Move dynamic/static power model in device tree

Change since V1:
1. Include mt8171.h and sort header file for mt8173.dtsi

Dawei Chien (3):
  thermal: mediatek: Add cpu dynamic power cooling model.
  arm64: dts: mt8173: Add thermal zone node.
  arm64: dts: mt8173: Add dynamic power node.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   47 ++
 drivers/cpufreq/mt8173-cpufreq.c |   12 ++--
 2 files changed, 57 insertions(+), 2 deletions(-)

--
1.7.9.5
--
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Please read the FAQ at  http://www.tux.org/lkml/


[PATCH v6 2/3] arm64: dts: mt8173: Add thermal zone node.

2015-12-16 Thread Dawei Chien
This adds thermal zone node to Mediatek MT8173 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/30/239
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index fda805d..c962d94 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -188,6 +188,49 @@
clock-output-names = "cpum_ck";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal>;
+   sustainable-power = <1500>; /* milliwatts */
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5

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Re: [PATCH v5 2/3] arm64: dts: mt8173: Add thermal zone node.

2015-12-16 Thread dawei chien
On Wed, 2015-12-16 at 19:22 +0800, Daniel Kurtz wrote:
> On Wed, Dec 16, 2015 at 6:09 PM, dawei chien  wrote:
> > On Wed, 2015-12-16 at 16:34 +0800, Daniel Kurtz wrote:
> >> On Wed, Dec 16, 2015 at 11:59 AM, Dawei Chien  
> >> wrote:
> >> >
> >> > This adds thermal zone node to Mediatek MT8173 dtsi file.
> >> >
> >> > Signed-off-by: Dawei Chien 
> >> > ---
> >> > This patch is base on patchset:
> >> > https://lkml.org/lkml/2015/11/30/239
> >> > ---
> >> >  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 
> >> > ++
> >> >  1 file changed, 43 insertions(+)
> >> >
> >> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> >> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> > index fda805d..4114cee 100644
> >> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> > @@ -188,6 +188,49 @@
> >> > clock-output-names = "cpum_ck";
> >> > };
> >> >
> >> > +   thermal-zones {
> >> > +   cpu_thermal: cpu_thermal {
> >> > +   polling-delay-passive = <1000>; /* milliseconds 
> >> > */
> >> > +   polling-delay = <1000>; /* milliseconds */
> >> > +
> >> > +   thermal-sensors = <&thermal 0>;
> >>
> >> This should be <&thermal> with the MTK temp sensor node in
> >> https://lkml.org/lkml/2015/11/30/239 patch series.
> >>
> >> -Dan
> >
> > Hi Dan,
> > Sascha's thermal driver V12 only register sensor id as 0, so we need to
> > register sensor id as 0 to device tree as well.
> >
> > Either <&thermal 0> or <&thermal>, sensor id should be 0 for two cases.
> > I try this two case, function all work fine for two cases. May I have
> > any misunderstand? Please kindly give your comment.
> > I will re-send this patch again once you tell me the reason, thank you.
> 
> In the new patchset, Sascha changed it to:
> #thermal-sensor-cells = <0>;
> 
> Which means the <&thermal> phandle no longer has any arguments.
> 
> Thanks!
> -Dan
Hi Dan,
Thank you for your comment. Yes, I don't need to add sensor id since new
driver add thermal-sensor-cell as 0.
(Even I checked function OK to this patch with new patchset)

I will re-send this patch soon, thank you.

BR,
Dawei

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Re: [PATCH v5 2/3] arm64: dts: mt8173: Add thermal zone node.

2015-12-16 Thread dawei chien
On Wed, 2015-12-16 at 16:34 +0800, Daniel Kurtz wrote:
> On Wed, Dec 16, 2015 at 11:59 AM, Dawei Chien  
> wrote:
> >
> > This adds thermal zone node to Mediatek MT8173 dtsi file.
> >
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch is base on patchset:
> > https://lkml.org/lkml/2015/11/30/239
> > ---
> >  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 
> > ++
> >  1 file changed, 43 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index fda805d..4114cee 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -188,6 +188,49 @@
> > clock-output-names = "cpum_ck";
> > };
> >
> > +   thermal-zones {
> > +   cpu_thermal: cpu_thermal {
> > +   polling-delay-passive = <1000>; /* milliseconds */
> > +   polling-delay = <1000>; /* milliseconds */
> > +
> > +   thermal-sensors = <&thermal 0>;
> 
> This should be <&thermal> with the MTK temp sensor node in
> https://lkml.org/lkml/2015/11/30/239 patch series.
> 
> -Dan

Hi Dan,
Sascha's thermal driver V12 only register sensor id as 0, so we need to
register sensor id as 0 to device tree as well.

Either <&thermal 0> or <&thermal>, sensor id should be 0 for two cases.
I try this two case, function all work fine for two cases. May I have
any misunderstand? Please kindly give your comment.
I will re-send this patch again once you tell me the reason, thank you.

BR,
Dawei

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[PATCH v5 1/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-12-15 Thread Dawei Chien
MT8173 cpufreq driver select of_cpufreq_power_cooling_register registering
cooling devices with dynamic power coefficient.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 drivers/cpufreq/mt8173-cpufreq.c |   11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 83001dc..d00bab5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -263,17 +263,24 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy 
*policy,
return 0;
 }
 
+#define DYNAMIC_POWER "dynamic-power-coefficient"
+
 static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
struct device_node *np = of_node_get(info->cpu_dev->of_node);
+   u32 capacitance = 0;
 
if (WARN_ON(!np))
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
+   of_property_read_u32(np, DYNAMIC_POWER, &capacitance);
+
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   NULL);
 
if (IS_ERR(info->cdev)) {
dev_err(info->cpu_dev,
-- 
1.7.9.5

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Please read the FAQ at  http://www.tux.org/lkml/


[PATCH v5 0/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-12-15 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add dynamic power model
for binding CPU thermal zone. The power allocator governor allocates power
budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined
temperature range to avoid SOC overheat and keep it's performance.
mt8173-cpufreq.c need to register its' own power model with power allocator
thermal governor, so that power allocator governor can allocates suitable
power budget to control CPU temperature.

Binding document is refer to this patchset
https://lkml.org/lkml/2015/11/30/239

Change since V4:
1. Remove unnecessary error-checking for mt8173-cpufreq.c
2. Initializing variable capacitance with 0

Change since V3:
1. Remove static power model
2. Split V3's device tree in two for thermal zones and dynamic power models 
respectively

Change since V2:
1. Move dynamic/static power model in device tree

Change since V1:
1. Include mt8171.h and sort header file for mt8173.dtsi

Dawei Chien (3):
  thermal: mediatek: Add cpu dynamic power cooling model.
  arm64: dts: mt8173: Add thermal zone node.
  arm64: dts: mt8173: Add dynamic power node.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   47 ++
 drivers/cpufreq/mt8173-cpufreq.c |   12 ++--
 2 files changed, 57 insertions(+), 2 deletions(-)

--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
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[PATCH v5 3/3] arm64: dts: mt8173: Add dynamic power node.

2015-12-15 Thread Dawei Chien
This device node is for calculating dynamic power in mW.
Since mt8173 has two clusters, there are two dynamic power
coefficient as well.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4114cee..33fabe4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -71,6 +71,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu1: cpu@1 {
@@ -95,6 +96,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu2: cpu@100 {
@@ -119,6 +121,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
cpu3: cpu@101 {
@@ -143,6 +146,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
idle-states {
-- 
1.7.9.5

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[PATCH v5 2/3] arm64: dts: mt8173: Add thermal zone node.

2015-12-15 Thread Dawei Chien
This adds thermal zone node to Mediatek MT8173 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/30/239
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index fda805d..4114cee 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -188,6 +188,49 @@
clock-output-names = "cpum_ck";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal 0>;
+   sustainable-power = <1500>; /* milliwatts */
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5

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Re: [PATCH v4 3/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-11-30 Thread dawei chien
On Mon, 2015-11-30 at 16:04 +0530, Viresh Kumar wrote:
> On 30-11-15, 18:21, dawei chien wrote:
> > As far as I know, user or shell script has the right for using command 
> > online/offline cpu.
> 
> Right.
> 
> > Either user by console or shell script could make cpu2 online even cpu2 
> > already onlined.
> 
> Hey, no. You can't online that is already online. You can write '1' to
> the file /sys/devices/system/cpu/cpuX/online, but it wouldn't have any
> affect.
> 
> > That could cause of_cpufreq_cooling_register execute many times for the
> > same cooling device.
> 
> No.
You are right. certainly no, it's my misunderstand.

> > "echo 1 > /sys/devices/system/cpu/cpu2/online"
> > 
> > With above hotplug command, mtk_cpufreq_ready will register cooling
> > device again as well, but fail since the cooling device already created,
> > so we might need not register cooling device again on this case.
> 
> Have you tested this yourself ?

Truly sorry for misunderstanding, so we don't need to add error checking
code there.

(It seems whole of cluster offline, the cooling device unregister as
well. If just one cpu online, cooling device register as well)

Three months ago, Once I used following command, cooling device can't
create any more. err message will show once I echo online command.
However, this bug already fixed in mainline by you. 

echo 0 > /sys/devices/system/cpu/cpu2/online
echo 0 > /sys/devices/system/cpu/cpu3/online
echo 1 > /sys/devices/system/cpu/cpu2/online

commit 528464eaa46ae1bd319882e4dd3495802e55b8c4
Author: Viresh Kumar 
Date:   Thu Jul 23 14:32:32 2015 +0530

thermal: remove dangling 'weight_attr' device file

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Re: [PATCH v4 3/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-11-30 Thread dawei chien
On Mon, 2015-11-30 at 15:00 +0530, Viresh Kumar wrote:
> On 30-11-15, 17:26, dawei chien wrote:
> > On Mon, 2015-11-30 at 11:08 +0530, Viresh Kumar wrote:
> > > On 27-11-15, 17:32, Dawei Chien wrote:
> > > > MT8173 cpufreq driver use of_cpufreq_power_cooling_register registering
> > > > cooling devices with dynamic power coefficient.
> > > > 
> > > > Signed-off-by: Dawei Chien 
> > > > ---
> > > > This patch is base on patchset:
> > > > https://lkml.org/lkml/2015/11/17/251
> > > > ---
> > > >  drivers/cpufreq/mt8173-cpufreq.c |   28 
> > > >  1 file changed, 20 insertions(+), 8 deletions(-)
> > > > 
> > > > diff --git a/drivers/cpufreq/mt8173-cpufreq.c 
> > > > b/drivers/cpufreq/mt8173-cpufreq.c
> > > > index 83001dc..4d39468 100644
> > > > --- a/drivers/cpufreq/mt8173-cpufreq.c
> > > > +++ b/drivers/cpufreq/mt8173-cpufreq.c
> > > > @@ -263,24 +263,34 @@ static int mtk_cpufreq_set_target(struct 
> > > > cpufreq_policy *policy,
> > > > return 0;
> > > >  }
> > > >  
> > > > +#define DYNAMIC_POWER "dynamic-power-coefficient"
> > > > +
> > > >  static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
> > > >  {
> > > > struct mtk_cpu_dvfs_info *info = policy->driver_data;
> > > > struct device_node *np = of_node_get(info->cpu_dev->of_node);
> > > > +   u32 capacitance;
> > > >  
> > > > if (WARN_ON(!np))
> > > > return;
> > > >  
> > > > if (of_find_property(np, "#cooling-cells", NULL)) {
> > > > -   info->cdev = of_cpufreq_cooling_register(np,
> > > > -
> > > > policy->related_cpus);
> > > > +   if (!info->cdev) {
> > > 
> > > Why will info->cdev be non-NULL here ?
> > 
> > This is a error-checking to avoid user or any script by command line 
> > hotplug CPU
> > more than two times, we don't need to register cooling device on this case.
> 
> Why?
As far as I know, user or shell script has the right for using command 
online/offline cpu.
Either user by console or shell script could make cpu2 online even cpu2 already 
onlined.
That could cause of_cpufreq_cooling_register execute many times for the
same cooling device.

"echo 1 > /sys/devices/system/cpu/cpu2/online"

With above hotplug command, mtk_cpufreq_ready will register cooling
device again as well, but fail since the cooling device already created,
so we might need not register cooling device again on this case.

> > I will remove it if you don't agree it.
> 
> No, my agreeing or not doesn't matter. If what you are doing is useful
> (and I am not able to understand it), then you should make me
> understand that and don't change your code.
> 
> But, I really do not get the reasoning behind the logic. Please
> elaborate that step by step.

Please refer to above explaining, thank you.

> > > > @@ -460,7 +470,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy 
> > > > *policy)
> > > >  {
> > > > struct mtk_cpu_dvfs_info *info = policy->driver_data;
> > > >  
> > > > -   cpufreq_cooling_unregister(info->cdev);
> > > > +   if (info->cdev)
> > > > +   cpufreq_cooling_unregister(info->cdev);
> > > > +
> > > 
> > > Why do you need to update this?
> > 
> > This is a error-checking to avoid user or any script by command line
> > unplug CPU more than two times, we don't need to unregister cooling
> > device on this case.
> > 
> > I will remove it if you don't agree it.
> 
> Same here.
Please refer to the same reason as above. thank you.

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Re: [PATCH v4 3/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-11-30 Thread dawei chien
On Mon, 2015-11-30 at 11:08 +0530, Viresh Kumar wrote:
> On 27-11-15, 17:32, Dawei Chien wrote:
> > MT8173 cpufreq driver use of_cpufreq_power_cooling_register registering
> > cooling devices with dynamic power coefficient.
> > 
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch is base on patchset:
> > https://lkml.org/lkml/2015/11/17/251
> > ---
> >  drivers/cpufreq/mt8173-cpufreq.c |   28 
> >  1 file changed, 20 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/cpufreq/mt8173-cpufreq.c 
> > b/drivers/cpufreq/mt8173-cpufreq.c
> > index 83001dc..4d39468 100644
> > --- a/drivers/cpufreq/mt8173-cpufreq.c
> > +++ b/drivers/cpufreq/mt8173-cpufreq.c
> > @@ -263,24 +263,34 @@ static int mtk_cpufreq_set_target(struct 
> > cpufreq_policy *policy,
> > return 0;
> >  }
> >  
> > +#define DYNAMIC_POWER "dynamic-power-coefficient"
> > +
> >  static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
> >  {
> > struct mtk_cpu_dvfs_info *info = policy->driver_data;
> > struct device_node *np = of_node_get(info->cpu_dev->of_node);
> > +   u32 capacitance;
> >  
> > if (WARN_ON(!np))
> > return;
> >  
> > if (of_find_property(np, "#cooling-cells", NULL)) {
> > -   info->cdev = of_cpufreq_cooling_register(np,
> > -policy->related_cpus);
> > +   if (!info->cdev) {
> 
> Why will info->cdev be non-NULL here ?

This is a error-checking to avoid user or any script by command line hotplug CPU
more than two times, we don't need to register cooling device on this case.

I will remove it if you don't agree it.

> > +   of_property_read_u32(np, DYNAMIC_POWER, &capacitance);
> 
> This can fail, in which case capacitance will be used uninitialized.
> Fix that by initializing it with 0 at the beginning of this routine.

Thank you, I will follow your comment to fix it on next version.

> > +   info->cdev = of_cpufreq_power_cooling_register(np,
> > +   policy->related_cpus,
> > +   capacitance,
> > +   NULL);
> >  
> > -   if (IS_ERR(info->cdev)) {
> > -   dev_err(info->cpu_dev,
> > -   "running cpufreq without cooling device: %ld\n",
> > -   PTR_ERR(info->cdev));
> > +   if (IS_ERR(info->cdev)) {
> > +   dev_err(info->cpu_dev,
> > +   "running cpufreq without cooling 
> > device: %ld\n",
> > +   PTR_ERR(info->cdev));
> >  
> > -   info->cdev = NULL;
> > +   info->cdev = NULL;
> > +   }
> > }
> > }
> >  
> > @@ -460,7 +470,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy 
> > *policy)
> >  {
> > struct mtk_cpu_dvfs_info *info = policy->driver_data;
> >  
> > -   cpufreq_cooling_unregister(info->cdev);
> > +   if (info->cdev)
> > +   cpufreq_cooling_unregister(info->cdev);
> > +
> 
> Why do you need to update this?

This is a error-checking to avoid user or any script by command line
unplug CPU more than two times, we don't need to unregister cooling
device on this case.

I will remove it if you don't agree it.

> > dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
> > mtk_cpu_dvfs_info_release(info);
> > kfree(info);
> > -- 
> > 1.7.9.5
> 


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[PATCH v4 1/3] arm64: dts: mt8173: Add thermal zone node.

2015-11-27 Thread Dawei Chien
This adds thermal zone node to Mediatek MT8173 dtsi file.

Signed-off-by: Dawei Chien 
---
This patch is based on patchset:
https://lkml.org/lkml/2015/11/18/84
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index fda805d..4114cee 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -188,6 +188,49 @@
clock-output-names = "cpum_ck";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal 0>;
+   sustainable-power = <1500>; /* milliwatts */
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5

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[PATCH v4 3/3] thermal: mediatek: Add cpu dynamic power cooling model.

2015-11-27 Thread Dawei Chien
MT8173 cpufreq driver use of_cpufreq_power_cooling_register registering
cooling devices with dynamic power coefficient.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 drivers/cpufreq/mt8173-cpufreq.c |   28 
 1 file changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 83001dc..4d39468 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -263,24 +263,34 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy 
*policy,
return 0;
 }
 
+#define DYNAMIC_POWER "dynamic-power-coefficient"
+
 static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
struct device_node *np = of_node_get(info->cpu_dev->of_node);
+   u32 capacitance;
 
if (WARN_ON(!np))
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
+   if (!info->cdev) {
+   of_property_read_u32(np, DYNAMIC_POWER, &capacitance);
+
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   NULL);
 
-   if (IS_ERR(info->cdev)) {
-   dev_err(info->cpu_dev,
-   "running cpufreq without cooling device: %ld\n",
-   PTR_ERR(info->cdev));
+   if (IS_ERR(info->cdev)) {
+   dev_err(info->cpu_dev,
+   "running cpufreq without cooling 
device: %ld\n",
+   PTR_ERR(info->cdev));
 
-   info->cdev = NULL;
+   info->cdev = NULL;
+   }
}
}
 
@@ -460,7 +470,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
 
-   cpufreq_cooling_unregister(info->cdev);
+   if (info->cdev)
+   cpufreq_cooling_unregister(info->cdev);
+
dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
mtk_cpu_dvfs_info_release(info);
kfree(info);
-- 
1.7.9.5

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[PATCH v4 0/3] thermal: mediatek: Add cpu power cooling model

2015-11-27 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add dynamic power model
for binding CPU thermal zone. The power allocator governor allocates power
budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined
temperature range to avoid SOC overheat and keep it's performance.
mt8173-cpufreq.c need to register its' own power model with power allocator
thermal governor, so that power allocator governor can allocates suitable
power budget to control CPU temperature.

Binging document is refer to this patchset
https://lkml.org/lkml/2015/11/17/251

Change since V1:
1. Include mt8171.h and sort header file for mt8173.dtsi

Change since V2:
1. Move dynamic/static power model in device tree

Change since V3:
1. Remove static power model.
2. Split V3's device tree in two for thermal zones and dynamic power models 
respectively.

Dawei Chien (3):
  arm64: dts: mt8173: Add thermal zone node for mt8173 platform.
  arm64: dts: mt8173: Add dynamic power node for mt8173 platform.
  thermal: mediatek: Add cpu dynamic power cooling model.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   47 ++
 drivers/cpufreq/mt8173-cpufreq.c |   28 +-
 2 files changed, 67 insertions(+), 8 deletions(-)

--
1.7.9.5
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[PATCH v4 2/3] arm64: dts: mt8173: Add dynamic power node.

2015-11-27 Thread Dawei Chien
This device node is for calculating dynamic power in mW.
Since mt8173 has two clusters, there are two dynamic power
coefficient as well.

Signed-off-by: Dawei Chien 
---
This patch is base on patchset:
https://lkml.org/lkml/2015/11/17/251
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4114cee..33fabe4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -71,6 +71,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu1: cpu@1 {
@@ -95,6 +96,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <263>;
};
 
cpu2: cpu@100 {
@@ -119,6 +121,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
cpu3: cpu@101 {
@@ -143,6 +146,7 @@
#cooling-cells = <2>;
#cooling-min-level = <0>;
#cooling-max-level = <7>;
+   dynamic-power-coefficient = <530>;
};
 
idle-states {
-- 
1.7.9.5

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Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support

2015-11-23 Thread dawei chien
 TEMP_MONIDET1);
> +
> + /*
> +  * The MT8173 thermal controller does not have its own ADC. Instead it
> +  * uses AHB bus accesses to control the AUXADC. To do this the thermal
> +  * controller has to be programmed with the physical addresses of the
> +  * AUXADC registers and with the various bit positions in the AUXADC.
> +  * Also the thermal controller controls a mux in the APMIXEDSYS register
> +  * space.
> +  */
> +
> + /*
> +  * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> +  * automatically by hw
> +  */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
> +
> + /* AHB address for auxadc mux selection */
> + writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> + mt->thermal_base + TEMP_ADCMUXADDR);
> +
> + /* AHB address for pnp sensor mux selection */
> + writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> + mt->thermal_base + TEMP_PNPMUXADDR);
> +
> + /* AHB value for auxadc enable */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
> +
> + /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> + writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> + mt->thermal_base + TEMP_ADCENADDR);
> +
> + /* AHB address for auxadc valid bit */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVALIDADDR);
> +
> + /* AHB address for auxadc voltage output */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVOLTADDR);
> +
> + /* read valid & voltage are at the same register */
> + writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> +
> + /* indicate where the valid bit is */
> + writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> + mt->thermal_base + TEMP_ADCVALIDMASK);
> +
> + /* no shift */
> + writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> +
> + /* enable auxadc mux write transaction */
> + writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + for (i = 0; i < cfg->num_sensors; i++)
> + writel(sensor_mux_values[cfg->sensors[i]],
> + mt->thermal_base + sensing_points[i].adcpnp);
> +
> + writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
> +
> + writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | 
> TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + mtk_thermal_put_bank(bank);
> +}
> +
> +static u64 of_get_phys_base(struct device_node *np)
> +{
> + u64 size64;
> + const __be32 *regaddr_p;
> +
> + regaddr_p = of_get_address(np, 0, &size64, NULL);
> + if (!regaddr_p)
> + return OF_BAD_ADDR;
> +
> + return of_translate_address(np, regaddr_p);
> +}
> +
> +static int mtk_thermal_get_calibration_data(struct device *dev, struct 
> mtk_thermal *mt)
> +{
> + struct nvmem_cell *cell;
> + u32 *buf;
> + size_t len;
> + int i, ret;
> + /* Start with default values */
> + mt->adc_ge = 512;
> + for (i = 0; i < MT8173_NUM_SENSORS; i++)
> + mt->vts[i] = 260;
> + mt->degc_cali = 40;
> + mt->o_slope = 0;
> +
> + cell = nvmem_cell_get(dev, "calibration-data");
> + if (IS_ERR(cell)) {
> + if (PTR_ERR(cell) == -EPROBE_DEFER)
> + return PTR_ERR(cell);
> + return 0;
> + }
> +
> + buf = (u32 *)nvmem_cell_read(cell, &len);
> +
> + nvmem_cell_put(cell);
> +
> + if (IS_ERR(buf))
> + return PTR_ERR(buf);
> +
> + if (len < 3 * sizeof(u32)) {
> + dev_warn(dev, "invalid calibration data\n");
> + ret = -EINVAL;
> + goto out;
> + }

ret would not be assigned if the length of calibration data is correct.
Otherwise,
Tested-by: Dawei Chien 
Thanks.

> + if (buf[0] & MT8173_CALIB_BUF0_VALID) {
> + mt->adc_ge = MT8173_CALIB_BUF1_ADC_GE(buf[1]);
> + mt->vts[MT8173_TS1] = MT8173_CALIB_BUF0_VTS_TS1(buf[0]);
> + mt->vts[MT8173_TS2] = MT8173_CALIB_BUF0_VTS_TS2(buf[0]);
> + mt->vts[MT8173_TS3] = MT8173_CALIB_BUF1_VTS_TS3(buf[1]);
> + mt->vts[MT8173_TS4] = MT8173_CALIB_BUF2_VTS_TS4(buf[2]);
> +  

Re: [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

2015-11-11 Thread dawei chien
On Fri, 2015-11-06 at 08:50 +0530, Viresh Kumar wrote:
> On 05-11-15, 19:09, dawei chien wrote:
> > Thank you for your kindly explaining, now I could understand what I
> > miss, I will send device tree binding on next version such like
> > following description.
> > 
> > --- a/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
> > +++ b/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
> > @@ -10,6 +10,17 @@ Required properties:
> > Please refer to
> > Documentation/devicetree/bindings/clk/clock-bindings.txt for
> > generic clock consumer properties.
> >  - proc-supply: Regulator for Vproc of CPU cluster.
> > +- dynamic-power-coefficient:
> > +   Usage: optional
> > +   Value type: 
> > +   Definition: A u32 value that represents an indicative
> > +   running time dynamic power coefficient in
> > +   fundamental units of mW/MHz/uVolt^2.
> > +   The dynamic energy consumption of the CPU
> > +   is proportional to the square of the
> > +   Voltage (V) and the clock frequency (f).
> > +   Pdyn = dynamic-power-coefficient * V^2 * f
> > +   where voltage is in uV, frequency is in MHz.
> 
> Please check with Punit if he is planning to add the same.
Punit just sent the patch for this binding[1] yesterday, so I will re-send next 
version once his patch has been reviewed.
> > Thank you for your kindly explaining, Now I know I should develop and
> > test on mainline branch since this is where I try to add code.
> > 
> > However, please understanding currently mt8173_cpufreq.c is not ready
> > for OPPV2 in mainline as far, that's the reason why currently I can't
> > reuse OPPV2 and extend for static power table. My propose is for adding
> > CPU cooling device for our own product.
> 
> Firstly, we don't care. You are pushing something to mainline, you
> have to get it tested someway on mainline.
> 
> Secondly, there are *almost* no changes required to the mtk cpufreq
> driver for OPPV2. Just update your DT in a similar way it is done for
> one of the exynos platforms and it should just work fine.
> 
In our platform, thermal throttling is good enough with dynamic power
only, so my plan is to send dynamic power model first in next version.

Regarding static power model, we will continue discussing with ARM to
find a better solution.

Thanks.

[1] https://lkml.org/lkml/2015/11/9/542

BR,
Dawei


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Re: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-11-05 Thread dawei chien
On Wed, 2015-11-04 at 11:41 -0800, Eduardo Valentin wrote:
> On Thu, Oct 22, 2015 at 08:02:39PM +0800, Dawei Chien wrote:
> > Add thermal zone node to mt8173.dtsi.
> > 
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch is base on
> > https://patchwork.kernel.org/patch/7249821/
> > https://patchwork.kernel.org/patch/7249861/
> > https://patchwork.kernel.org/patch/7249891/
> > ---
> >  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 
> > ++
> 
> This patch adds also the static / dynamic power models too. Can you
> please split this patch in two: one for the thermal zones, one for the
> models.

Thank you for reviewing, I will split this patch in two and resend
again.

> >  1 file changed, 90 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 3b18f37..eaf12bf 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -16,6 +16,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include "mt8173-pinfunc.h"
> >  
> >  / {
> > @@ -54,6 +55,18 @@
> > reg = <0x000>;
> > enable-method = "psci";
> > cpu-idle-states = <&CPU_SLEEP_0>;
> > +   static-power-points = <
> > +   859000  43
> > +   908000  52
> > +   983000  86
> > +   1009000 123
> > +   1028000 138
> > +   1083000 172
> > +   1110900 180
> > +   1125000 192
> > +   >;
> > +   dynamic-power-coefficient = <263>;
> > +   #cooling-cells = <2>;
> > };
> >  
> > cpu1: cpu@1 {
> > @@ -62,6 +75,17 @@
> > reg = <0x001>;
> > enable-method = "psci";
> > cpu-idle-states = <&CPU_SLEEP_0>;
> > +   static-power-points = <
> > +   859000  43
> > +   908000  52
> > +   983000  86
> > +   1009000 123
> > +   1028000 138
> > +   1083000 172
> > +   1110900 180
> > +   1125000 192
> > +   >;
> > +   dynamic-power-coefficient = <263>;
> > };
> >  
> > cpu2: cpu@100 {
> > @@ -70,6 +94,18 @@
> > reg = <0x100>;
> > enable-method = "psci";
> > cpu-idle-states = <&CPU_SLEEP_0>;
> > +   static-power-points = <
> > +   828000  72
> > +   867000  90
> > +   927000  156
> > +   968000  181
> > +   1007000 298
> > +   1049000 435
> > +   1089900 533
> > +   1125000 533
> > +   >;
> > +   dynamic-power-coefficient = <530>;
> > +   #cooling-cells = <2>;
> > };
> >  
> > cpu3: cpu@101 {
> > @@ -78,6 +114,17 @@
> > reg = <0x101>;
> > enable-method = "psci";
> > cpu-idle-states = <&CPU_SLEEP_0>;
> > +   static-power-points = <
> > +   828000  72
> > +   867000  90
> > +   927000  156
> > +   968000  181
> > +   1007000 298
> > +   1049000 435
> > +   1089900 533
> > +   1125000 533
> > +   >;
> > +   dynamic-power-coefficient = <530>;
> > };
> >  
> > idle-states {
> > @@ -116,6 +163,49 @@
> > clock-output-names = "clk32k";
> > };
> >  
> > +   ther

Re: [PATCH v3 1/2] thermal: mediatek: Add cpu power cooling model.

2015-11-05 Thread dawei chien
On Wed, 2015-11-04 at 11:40 -0800, Eduardo Valentin wrote:
> On Thu, Oct 22, 2015 at 08:02:38PM +0800, Dawei Chien wrote:
> > This power model is base on Intelligent Power Allocation (IPA)
> > technical, requires that the operating-points of the CPUs are
> > registered using the kernel's opp library and the
> > `cpufreq_frequency_table` is assigned to the `struct device`
> > of the cpu MT8173.
> > 
> > Signed-off-by: Dawei.Chien 
> > ---
> > This patch is base on
> > https://patchwork.kernel.org/patch/7034601/
> > ---
> >  drivers/cpufreq/mt8173-cpufreq.c |  152 
> > --
> 
> Given that you are proposing this on top a DT binding, why reading a
> table of static power model applicable only to mt8173 cpufreq driver?
> 
> I have not seen anything specific (formula etc) that prevents this code
> to be generalized to other CPUs.
> 
> Can you please help me to understand?
> 
> BR,
This is because our platform currently only support mt8173_cpufreq.c, so
that I only add static power model for our owner IC.

Please understanding that I wouldn't give a DT binding document since I
will remove static power table on next version, but I can try to explain
it.

As far as I know, static power is somewhat leakage of CPU clusters, so
that we hardly to find a formula, which can suitable all kinds of CPUs
since leakage is different. In ARM IPA framework, static power only need
to be defined by who register cpufreq_power_cooling_register. The
voltage/power table is just one way to present leakage power of CPUs.

Actually, static power is optional since dynamic power is much more than
static power.

> >  1 file changed, 144 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/cpufreq/mt8173-cpufreq.c 
> > b/drivers/cpufreq/mt8173-cpufreq.c
> > index 49caed2..23c19c5 100644
> > --- a/drivers/cpufreq/mt8173-cpufreq.c
> > +++ b/drivers/cpufreq/mt8173-cpufreq.c
> > @@ -29,6 +29,16 @@
> >  #define MAX_VOLT_LIMIT (115)
> >  #define VOLT_TOL   (1)
> >  
> > +struct mtk_cpu_static_power {
> > +   unsigned long voltage;
> > +   unsigned int power;
> > +};
> > +
> > +static struct mtk_cpu_static_power *mtk_ca53_static_power_table;
> > +static struct mtk_cpu_static_power *mtk_ca57_static_power_table;
> > +static int mtk_ca53_static_table_length;
> > +static int mtk_ca57_static_table_length;
> > +
> >  /*
> >   * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU 
> > DVFS
> >   * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
> > @@ -51,6 +61,110 @@ struct mtk_cpu_dvfs_info {
> > bool need_voltage_tracking;
> >  };
> >  
> > +unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power 
> > *table,
> > +   unsigned int count, unsigned long voltage)
> > +{
> > +   int i;
> > +
> > +   for (i = 0; i < count; i++) {
> > +   if (voltage <= table[i].voltage)
> > +   return table[i].power;
> > +   }
> > +
> > +   return table[count - 1].power;
> > +}
> > +
> > +int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval,
> > +   unsigned long voltage, u32 *power)
> > +{
> > +   int nr_cpus = cpumask_weight(cpumask);
> > +
> > +   *power = 0;
> > +
> > +   if (nr_cpus) {
> > +   if (cpumask_test_cpu(0, cpumask))
> > +   *power += mtk_cpufreq_lookup_power(
> > +   mtk_ca53_static_power_table,
> > +   mtk_ca53_static_table_length,
> > +   voltage);
> > +
> > +   if (cpumask_test_cpu(2, cpumask))
> > +   *power += mtk_cpufreq_lookup_power(
> > +   mtk_ca57_static_power_table,
> > +   mtk_ca57_static_table_length,
> > +   voltage);
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +unsigned int mtk_get_power_table_info(struct cpufreq_policy *policy,
> > +   struct device_node *np, const char *node_name)
> > +{
> > +   int mtk_static_table_length;
> > +   const struct property *prop;
> > +   struct mtk_cpu_dvfs_info *info = policy->driver_data;
> > +   struct device *cpu_dev = info->cpu_dev;
> > +   const __be32 *val;
> > +   int nr, i;
> > +
> > +   prop = of_find_property(np, node_name, NULL);
> > +
> &

Re: [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

2015-11-05 Thread dawei chien
On Mon, 2015-11-02 at 17:40 +0530, Viresh Kumar wrote:
> On 02-11-15, 18:46, dawei chien wrote:
> > On Wed, 2015-10-28 at 21:14 +0530, Viresh Kumar wrote:
> > > Sorry for being extremely late in reviewing this stuff. You are
> > > already on v3 and I haven't reviewed it once. Mostly due to bad timing
> > > of my holidays and other work pressure.
> > 
> > You're welcome, truly thank you for your kindly reviewing
> 
> Thanks for understanding.
> 
> > > Now, there are few things that I feel are not properly addressed here,
> > > and I may be wrong:
> > > - Where are the bindings for static-power-points and
> > >   dynamic-power-coefficient. Sorry I failed to see them in this or
> > >   other series you mentioned.
> > 
> > Please refer to following document (2-1,2-2) for dynamic-power &
> > static-power in detail. Besides, do I need to add another document for
> > our own MT8173 IC.
> > http://lxr.free-electrons.com/source/Documentation/thermal/cpu-cooling-api.txt
> 
> That's about the power-API, but I am talking about the Device Tree
> bindings here. So, when you add any new DT bindings (Or a new property
> in device tree blobs), you need to add its documentation in
> Documentation/devicetree/bindings/... and get it approved by DT
> maintainers as well. You perhaps missed that completely, otherwise you
> would have been told really early that the new bindings aren't going
> to help.

Thank you for your kindly explaining, now I could understand what I
miss, I will send device tree binding on next version such like
following description.

--- a/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
+++ b/Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt
@@ -10,6 +10,17 @@ Required properties:
Please refer to
Documentation/devicetree/bindings/clk/clock-bindings.txt for
generic clock consumer properties.
 - proc-supply: Regulator for Vproc of CPU cluster.
+- dynamic-power-coefficient:
+   Usage: optional
+   Value type: 
+   Definition: A u32 value that represents an indicative
+   running time dynamic power coefficient in
+   fundamental units of mW/MHz/uVolt^2.
+   The dynamic energy consumption of the CPU
+   is proportional to the square of the
+   Voltage (V) and the clock frequency (f).
+   Pdyn = dynamic-power-coefficient * V^2 * f
+   where voltage is in uV, frequency is in MHz.

> > > - Even then, why should we be adding another table into DT for
> > >   voltage/power ? And not reuse and extend the opp-v2 stuff which is
> > >   already mainlined now.
> > 
> > We could reuse opp-v2 for static power points after OPPV2 back port to
> > our currently branch.
> 
> Your current branch doesn't matter to us. All that matters here is
> mainline, that's where you are adding code to. And you must test your
> stuff on the latest upstream branch only, not on some old kernel
> release. You can include other dependency patches though, that are
> required to make it work and mention them in cover-letter.

Thank you for your kindly explaining, Now I know I should develop and
test on mainline branch since this is where I try to add code.

However, please understanding currently mt8173_cpufreq.c is not ready
for OPPV2 in mainline as far, that's the reason why currently I can't
reuse OPPV2 and extend for static power table. My propose is for adding
CPU cooling device for our own product.

Actually, I would like to remove static power table on next patch since
static power is optional and dynamic power is much more than static
power.

> > However, as far as I know, there is no "power" in opp.c (suck like
> 
> s/suck/such ?
> 
> > opp-hz) as far, so I need to add something in opp.c for my purpose, suck
> > like add power in _opp_add_static_v2, and add something for return
> > "power", right? I may be wrong, please kindly give me your suggestion,
> > thank you.
> 
> You first need to propose a change in DT bindings for OPPs:
> Documentation/devicetree/bindings/opp/opp.txt
> 
> And then we can change the code properly.
> 
> > Actually, I am considering to remove the part of static power point
> > since it is optional for Power Model. Could you agree with this?
> 
> If its not important for your platform, then I don't have any issues
> with that..
> 


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Re: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-11-02 Thread dawei chien
On Wed, 2015-10-28 at 21:09 +0530, Viresh Kumar wrote:
> On 22-10-15, 20:02, Dawei Chien wrote:
> > Add thermal zone node to mt8173.dtsi.
> > 
> > Signed-off-by: Dawei Chien 
> > ---
> > This patch is base on
> > https://patchwork.kernel.org/patch/7249821/
> > https://patchwork.kernel.org/patch/7249861/
> > https://patchwork.kernel.org/patch/7249891/
> > ---
> >  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 
> > ++
> >  1 file changed, 90 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > index 3b18f37..eaf12bf 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> > @@ -16,6 +16,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include "mt8173-pinfunc.h"
> >  
> >  / {
> > @@ -54,6 +55,18 @@
> > reg = <0x000>;
> > enable-method = "psci";
> > cpu-idle-states = <&CPU_SLEEP_0>;
> > +   static-power-points = <
> > +   859000  43
> > +   908000  52
> > +   983000  86
> > +   1009000 123
> > +   1028000 138
> > +   1083000 172
> > +   1110900 180
> > +   1125000 192
> 
> What's the unit of power here? Is this power accurate? Or just a
> number representing the power ?

The unit is mW. This power was measured by tools, but it may be not
accurate enough since this tool has a error range.

> > +   >;
> > +   dynamic-power-coefficient = <263>;
> > +   #cooling-cells = <2>;
> > };
> 
> @Rob: Looks like another good candidate for the OPP-v2 table? Power.
> 


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Re: [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

2015-11-02 Thread dawei chien
Hi Viresh,
On Wed, 2015-10-28 at 21:14 +0530, Viresh Kumar wrote:
> On 22-10-15, 20:02, Dawei Chien wrote:
> > Use Intelligent Power Allocation (IPA) technical to add static/dynamic 
> > power model for binding CPU thermal zone.
> > The power allocator governor allocates power budget to control CPU 
> > temperature.
> > 
> > Power Allocator governor is able to keep SOC temperature within a defined 
> > temperature range to avoid SOC overheat and keep it's performance. 
> > mt8173-cpufreq.c need to register its' own power model with power allocator 
> > thermal governor, so that power allocator governor can allocates suitable 
> > power budget to control CPU temperature.
> > 
> > PATCH1 is base on
> > https://patchwork.kernel.org/patch/7034601/
> > 
> > PATCH2 is base on Sascha's thermal driver V9
> > https://patchwork.kernel.org/patch/7249821/
> > https://patchwork.kernel.org/patch/7249861/
> > https://patchwork.kernel.org/patch/7249891/
> > 
> > Change since V1:
> > include mt8171.h and sort header file for mt8173.dtsi
> > 
> > Change since V2:
> > Move dynamic/static power model in device tree
> > 
> > Dawei.Chien (2):
> >   thermal: mediatek: Add cpu power cooling model.
> >   arm64: dts: mt8173: Add thermal zone node for mt8173.
> 
> Sorry for being extremely late in reviewing this stuff. You are
> already on v3 and I haven't reviewed it once. Mostly due to bad timing
> of my holidays and other work pressure.

You're welcome, truly thank you for your kindly reviewing

> Now, there are few things that I feel are not properly addressed here,
> and I may be wrong:
> - Where are the bindings for static-power-points and
>   dynamic-power-coefficient. Sorry I failed to see them in this or
>   other series you mentioned.

Please refer to following document (2-1,2-2) for dynamic-power &
static-power in detail. Besides, do I need to add another document for
our own MT8173 IC.
http://lxr.free-electrons.com/source/Documentation/thermal/cpu-cooling-api.txt

> - Even then, why should we be adding another table into DT for
>   voltage/power ? And not reuse and extend the opp-v2 stuff which is
>   already mainlined now.

We could reuse opp-v2 for static power points after OPPV2 back port to
our currently branch.
However, as far as I know, there is no "power" in opp.c (suck like
opp-hz) as far, so I need to add something in opp.c for my purpose, suck
like add power in _opp_add_static_v2, and add something for return
"power", right? I may be wrong, please kindly give me your suggestion,
thank you.

Actually, I am considering to remove the part of static power point
since it is optional for Power Model. Could you agree with this?
> - There are few issues with the code as well, but I want to see where
>   the bindings should go first. And then only discuss the code
>   further.
> 


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[PATCH v3 1/2] thermal: mediatek: Add cpu power cooling model.

2015-10-22 Thread Dawei Chien
This power model is base on Intelligent Power Allocation (IPA)
technical, requires that the operating-points of the CPUs are
registered using the kernel's opp library and the
`cpufreq_frequency_table` is assigned to the `struct device`
of the cpu MT8173.

Signed-off-by: Dawei.Chien 
---
This patch is base on
https://patchwork.kernel.org/patch/7034601/
---
 drivers/cpufreq/mt8173-cpufreq.c |  152 --
 1 file changed, 144 insertions(+), 8 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 49caed2..23c19c5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -29,6 +29,16 @@
 #define MAX_VOLT_LIMIT (115)
 #define VOLT_TOL   (1)
 
+struct mtk_cpu_static_power {
+   unsigned long voltage;
+   unsigned int power;
+};
+
+static struct mtk_cpu_static_power *mtk_ca53_static_power_table;
+static struct mtk_cpu_static_power *mtk_ca57_static_power_table;
+static int mtk_ca53_static_table_length;
+static int mtk_ca57_static_table_length;
+
 /*
  * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
  * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
@@ -51,6 +61,110 @@ struct mtk_cpu_dvfs_info {
bool need_voltage_tracking;
 };
 
+unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table,
+   unsigned int count, unsigned long voltage)
+{
+   int i;
+
+   for (i = 0; i < count; i++) {
+   if (voltage <= table[i].voltage)
+   return table[i].power;
+   }
+
+   return table[count - 1].power;
+}
+
+int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval,
+   unsigned long voltage, u32 *power)
+{
+   int nr_cpus = cpumask_weight(cpumask);
+
+   *power = 0;
+
+   if (nr_cpus) {
+   if (cpumask_test_cpu(0, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca53_static_power_table,
+   mtk_ca53_static_table_length,
+   voltage);
+
+   if (cpumask_test_cpu(2, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca57_static_power_table,
+   mtk_ca57_static_table_length,
+   voltage);
+   }
+
+   return 0;
+}
+
+unsigned int mtk_get_power_table_info(struct cpufreq_policy *policy,
+   struct device_node *np, const char *node_name)
+{
+   int mtk_static_table_length;
+   const struct property *prop;
+   struct mtk_cpu_dvfs_info *info = policy->driver_data;
+   struct device *cpu_dev = info->cpu_dev;
+   const __be32 *val;
+   int nr, i;
+
+   prop = of_find_property(np, node_name, NULL);
+
+   if (!prop) {
+   pr_err("failed to get static-power-points\n");
+   return -ENODEV;
+   }
+
+   if (!prop->value) {
+   pr_err("failed to get static power array data\n");
+   return -EINVAL;
+   }
+
+   nr = prop->length / sizeof(u32);
+
+   if (nr % 2) {
+   pr_err("Invalid OPP list\n");
+   return -EINVAL;
+   }
+
+   mtk_static_table_length = nr / 2;
+
+   if (cpumask_test_cpu(0, policy->related_cpus)) {
+   mtk_ca53_static_table_length = mtk_static_table_length;
+   mtk_ca53_static_power_table = devm_kcalloc(cpu_dev,
+   mtk_static_table_length,
+   sizeof(*mtk_ca53_static_power_table),
+   GFP_KERNEL);
+
+   val = prop->value;
+   for (i = 0; i < mtk_static_table_length; ++i) {
+   unsigned long voltage = be32_to_cpup(val++);
+   unsigned int power = be32_to_cpup(val++);
+
+   mtk_ca53_static_power_table[i].voltage = voltage;
+   mtk_ca53_static_power_table[i].power = power;
+   pr_info("volt:%ld uv, power:%d mW\n", voltage, power);
+   }
+   } else {
+mtk_ca57_static_table_length = mtk_static_table_length;
+   mtk_ca57_static_power_table = devm_kcalloc(cpu_dev,
+   mtk_static_table_length,
+   sizeof(*mtk_ca57_static_power_table),
+   GFP_KERNEL);
+   val = prop->value;
+   for (i = 0; i < mtk_static_table_length; ++i) {
+   unsigned long voltage = be32_to_cpup(val++);
+   unsigned int power = be32_to_cpup(val++);
+
+   mtk_ca57_static_power_table[i].voltage = voltage;
+   mtk_ca57_sta

[PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-10-22 Thread Dawei Chien
Add thermal zone node to mt8173.dtsi.

Signed-off-by: Dawei Chien 
---
This patch is base on
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 ++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3b18f37..eaf12bf 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "mt8173-pinfunc.h"
 
 / {
@@ -54,6 +55,18 @@
reg = <0x000>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+   static-power-points = <
+   859000  43
+   908000  52
+   983000  86
+   1009000 123
+   1028000 138
+   1083000 172
+   1110900 180
+   1125000 192
+   >;
+   dynamic-power-coefficient = <263>;
+   #cooling-cells = <2>;
};
 
cpu1: cpu@1 {
@@ -62,6 +75,17 @@
reg = <0x001>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+   static-power-points = <
+   859000  43
+   908000  52
+   983000  86
+   1009000 123
+   1028000 138
+   1083000 172
+   1110900 180
+   1125000 192
+   >;
+   dynamic-power-coefficient = <263>;
};
 
cpu2: cpu@100 {
@@ -70,6 +94,18 @@
reg = <0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+   static-power-points = <
+   828000  72
+   867000  90
+   927000  156
+   968000  181
+   1007000 298
+   1049000 435
+   1089900 533
+   1125000 533
+   >;
+   dynamic-power-coefficient = <530>;
+   #cooling-cells = <2>;
};
 
cpu3: cpu@101 {
@@ -78,6 +114,17 @@
reg = <0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+   static-power-points = <
+   828000  72
+   867000  90
+   927000  156
+   968000  181
+   1007000 298
+   1049000 435
+   1089900 533
+   1125000 533
+   >;
+   dynamic-power-coefficient = <530>;
};
 
idle-states {
@@ -116,6 +163,49 @@
clock-output-names = "clk32k";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal MT8173_THERMAL_ZONE_CA57>;
+   sustainable-power = <1500>;
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hyste

[PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

2015-10-22 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add static/dynamic power 
model for binding CPU thermal zone.
The power allocator governor allocates power budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined 
temperature range to avoid SOC overheat and keep it's performance. 
mt8173-cpufreq.c need to register its' own power model with power allocator 
thermal governor, so that power allocator governor can allocates suitable power 
budget to control CPU temperature.

PATCH1 is base on
https://patchwork.kernel.org/patch/7034601/

PATCH2 is base on Sascha's thermal driver V9
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/

Change since V1:
include mt8171.h and sort header file for mt8173.dtsi

Change since V2:
Move dynamic/static power model in device tree

Dawei.Chien (2):
  thermal: mediatek: Add cpu power cooling model.
  arm64: dts: mt8173: Add thermal zone node for mt8173.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
 drivers/cpufreq/mt8173-cpufreq.c |   97 ++
 2 files changed, 130 insertions(+), 11 deletions(-)

--
1.7.9.5
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Re: [PATCH v2 1/2] thermal: mediatek: Add cpu power cooling model.

2015-10-15 Thread dawei chien
On Mon, 2015-10-12 at 18:26 +0100, Punit Agrawal wrote:
> Mark Rutland  writes:
> 
> > On Wed, Oct 07, 2015 at 08:22:40PM +0800, Dawei Chien wrote:
> >> From: "Dawei.Chien" 
> >> 
> >> This power model is base on Intelligent Power Allocation (IPA) technical,
> >> requires that the operating-points of the CPUs are registered using the
> >> kernel's opp library and the `cpufreq_frequency_table` is assigned to the
> >> `struct device` of the cpu MT8173.
> >> 
> >> Signed-off-by: Dawei.Chien 
> >> ---
> >> This patch is base on
> >> https://patchwork.kernel.org/patch/7034601/
> >> ---
> >>  drivers/cpufreq/mt8173-cpufreq.c |   97 
> >> +-
> >>  1 file changed, 86 insertions(+), 11 deletions(-)
> >> 
> >> diff --git a/drivers/cpufreq/mt8173-cpufreq.c 
> >> b/drivers/cpufreq/mt8173-cpufreq.c
> >> index 49caed2..9233ec5 100644
> >> --- a/drivers/cpufreq/mt8173-cpufreq.c
> >> +++ b/drivers/cpufreq/mt8173-cpufreq.c
> >> @@ -28,7 +28,8 @@
> >>  #define MAX_VOLT_SHIFT(20)
> >>  #define MAX_VOLT_LIMIT(115)
> >>  #define VOLT_TOL  (1)
> >> -
> >> +#define CAPACITANCE_CA53  (263)
> >> +#define CAPACITANCE_CA57  (530)
> >>  /*
> >>   * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU 
> >> DVFS
> >>   * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
> >> @@ -51,6 +52,72 @@ struct mtk_cpu_dvfs_info {
> >>bool need_voltage_tracking;
> >>  };
> >>  
> >> +struct mtk_cpu_static_power {
> >> +  unsigned long voltage;
> >> +  unsigned int power;
> >> +};
> >> +
> >> +/* measured by WA program. */
> >> +static const struct mtk_cpu_static_power mtk_ca53_static_power[] = {
> >> +  {859000, 43},
> >> +  {908000, 52},
> >> +  {983000, 86},
> >> +  {1009000, 123},
> >> +  {1028000, 138},
> >> +  {1083000, 172},
> >> +  {1109000, 180},
> >> +  {1125000, 192},
> >> +};
> >> +
> >> +/* measured by WA program. */
> >> +static const struct mtk_cpu_static_power mtk_ca57_static_power[] = {
> >> +  {828000, 72},
> >> +  {867000, 90},
> >> +  {927000, 156},
> >> +  {968000, 181},
> >> +  {1007000, 298},
> >> +  {1049000, 435},
> >> +  {1089000, 533},
> >> +  {1125000, 533},
> >> +};
> >
> > This should be described in the DT, rather than necessitating tonnes of
> > these tables in the kernel.
> 
> The above table is a simplification that is tying the static power of a
> device to a voltage (indirectly via frequency for ease of indexing
> perhaps).
> 
> We should definitely look at describing the static power model in the
> device tree - but it is not entirely clear what is the best model to
> use as basis for the device tree bindings.
> 
> Static power consumption depends on a few different parameters (silicon
> process, voltage, temperature, etc.). The relationship between them
> maybe non-linear and not all of these maybe significant for a given
> platform. e.g., for Juno, we are using a regression based on voltage and
> temperature which was deemed close enough (very subjective tbh).
> 
> On the other hand, dynamic power consumption is somewhat simpler and I
> have patches[0][1][2] enabling it's description in device tree. Your comments
> there would be very much appreciated.
> 
> As for this patch, I hope it can be moved to using the device tree when
> the bindings for static power are agreed upon. Although sub-optimal, I
> can't see any other way forward for now.
> 
> [0] http://thread.gmane.org/gmane.linux.kernel/2011466/focus=130373
> [1] http://thread.gmane.org/gmane.linux.kernel/2011466/focus=2011465
> [2] http://article.gmane.org/gmane.linux.drivers.sensors/37859

Hi Mark/Punit,
Thank you for your nice comments. I will resend this patch with device tree for 
dynamic/static power model,
and refer to Punit's patches, thank you.

> >
> > Mark.
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> > the body of a message to majord...@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html



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[PATCH v2 1/2] thermal: mediatek: Add cpu power cooling model.

2015-10-07 Thread Dawei Chien
From: "Dawei.Chien" 

This power model is base on Intelligent Power Allocation (IPA) technical,
requires that the operating-points of the CPUs are registered using the
kernel's opp library and the `cpufreq_frequency_table` is assigned to the
`struct device` of the cpu MT8173.

Signed-off-by: Dawei.Chien 
---
This patch is base on
https://patchwork.kernel.org/patch/7034601/
---
 drivers/cpufreq/mt8173-cpufreq.c |   97 +-
 1 file changed, 86 insertions(+), 11 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 49caed2..9233ec5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -28,7 +28,8 @@
 #define MAX_VOLT_SHIFT (20)
 #define MAX_VOLT_LIMIT (115)
 #define VOLT_TOL   (1)
-
+#define CAPACITANCE_CA53   (263)
+#define CAPACITANCE_CA57   (530)
 /*
  * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
  * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
@@ -51,6 +52,72 @@ struct mtk_cpu_dvfs_info {
bool need_voltage_tracking;
 };
 
+struct mtk_cpu_static_power {
+   unsigned long voltage;
+   unsigned int power;
+};
+
+/* measured by WA program. */
+static const struct mtk_cpu_static_power mtk_ca53_static_power[] = {
+   {859000, 43},
+   {908000, 52},
+   {983000, 86},
+   {1009000, 123},
+   {1028000, 138},
+   {1083000, 172},
+   {1109000, 180},
+   {1125000, 192},
+};
+
+/* measured by WA program. */
+static const struct mtk_cpu_static_power mtk_ca57_static_power[] = {
+   {828000, 72},
+   {867000, 90},
+   {927000, 156},
+   {968000, 181},
+   {1007000, 298},
+   {1049000, 435},
+   {1089000, 533},
+   {1125000, 533},
+};
+
+unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table,
+   unsigned int count, unsigned long voltage)
+{
+   int i;
+
+   for (i = 0; i < count; i++) {
+   if (voltage <= table[i].voltage)
+   return table[i].power;
+   }
+
+   return table[count - 1].power;
+}
+
+int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval,
+   unsigned long voltage, u32 *power)
+{
+   int nr_cpus = cpumask_weight(cpumask);
+
+   *power = 0;
+
+   if (nr_cpus) {
+
+   if (cpumask_test_cpu(0, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca53_static_power,
+   ARRAY_SIZE(mtk_ca53_static_power),
+   voltage);
+
+   if (cpumask_test_cpu(2, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca57_static_power,
+   ARRAY_SIZE(mtk_ca57_static_power),
+   voltage);
+   }
+   return 0;
+}
+
 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
int new_vproc)
 {
@@ -272,15 +339,21 @@ static void mtk_cpufreq_ready(struct cpufreq_policy 
*policy)
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
-
-   if (IS_ERR(info->cdev)) {
-   dev_err(info->cpu_dev,
-   "running cpufreq without cooling device: %ld\n",
-   PTR_ERR(info->cdev));
-
-   info->cdev = NULL;
+   u32 capacitance = cpumask_test_cpu(0, policy->related_cpus) ?
+   CAPACITANCE_CA53 : CAPACITANCE_CA57;
+
+   if (!info->cdev) {
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   mtk_cpufreq_get_static);
+
+   if (IS_ERR(info->cdev)) {
+   dev_err(info->cpu_dev,
+   "running cpufreq without cooling 
device: %ld\n",
+   PTR_ERR(info->cdev));
+   info->cdev = NULL;
+   }
}
}
 
@@ -460,7 +533,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
 
-   cpufreq_cooling_unregister(info->cdev);
+   if (info->cdev)
+   cpufreq_cooling_unregister(info->cdev);
+
dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
mtk_cpu_dvfs_info_release(info);
kfree(info);
-- 
1.7.9.5

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[PATCH v2 0/2] thermal: mediatek: Add cpu power cooling model

2015-10-07 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add static/dynamic power 
model for binding CPU thermal zone.
The power allocator governor allocates power budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined 
temperature range to avoid SOC overheat and keep it's performance. 
mt8173-cpufreq.c need to register its' own power model with power allocator 
thermal governor, so that power allocator governor can allocates suitable power 
budget to control CPU temperature.

PATCH1 is base on
https://patchwork.kernel.org/patch/7034601/

PATCH2 is base on Sascha's thermal driver V9 
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/

Change since V1:
include mt8171.h and sort header file for mt8173.dtsi

Dawei.Chien (2):
  thermal: mediatek: Add cpu power cooling model.
  arm64: dts: mt8173: Add thermal zone node for mt8173.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
 drivers/cpufreq/mt8173-cpufreq.c |   97 ++
 2 files changed, 130 insertions(+), 11 deletions(-)

--
1.7.9.5

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Please read the FAQ at  http://www.tux.org/lkml/


[PATCH v2 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-10-07 Thread Dawei Chien
From: "Dawei.Chien" 

Add thermal zone node to mt8173.dtsi.

Signed-off-by: Dawei.Chien 
---
This patch is base on
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3b18f37..01a7c46c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "mt8173-pinfunc.h"
 
 / {
@@ -116,6 +117,49 @@
clock-output-names = "clk32k";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal MT8173_THERMAL_ZONE_CA57>;
+   sustainable-power = <1500>;
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5

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Re: [PATCH 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-09-08 Thread dawei chien
Hi Daniel,
On Mon, 2015-09-07 at 12:05 +0800, Daniel Kurtz wrote:
> On Mon, Sep 7, 2015 at 12:00 PM, Daniel Kurtz  wrote:
> > Hi Dawei,
> >
> > On Fri, Sep 4, 2015 at 5:01 PM, Dawei Chien  
> > wrote:
> >> Add thermal zone node to mt8173.dtsi.
> >>
> >> Signed-off-by: Dawei Chien 
> >> ---
> >> This patch is base on following patches
> >> https://patchwork.kernel.org/patch/6969581/
> >> https://patchwork.kernel.org/patch/6969571/
> >> https://patchwork.kernel.org/patch/6969381/
> >> ---
> >>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 
> >> ++
> >>  1 file changed, 44 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> >> b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> index 208051a..6493bfd 100644
> >> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> >> @@ -17,6 +17,7 @@
> >>  #include 
> >>  #include 
> >>  #include "mt8173-pinfunc.h"
> >> +#include 
> 
> Also, as a nit, (#include ) should be
> above '#include "mt8173-pinfunc.h"'
Thank you, I will resend this patch with mt8171.h and sort header file.

> -djk


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Re: thermal: mediatek: Add cpu power cooling model

2015-09-08 Thread dawei chien
Hi Viresh,

On Mon, 2015-09-07 at 11:39 +0530, Viresh Kumar wrote:
> On 04-09-15, 17:01, Dawei Chien wrote:
> > Use Intelligent Power Allocation (IPA) technical to add
> > static/dynamic power model for binding CPU thermal zone.
> > The power allocator governor allocates power budget to control
> > CPU temperature.
> 
> Sorry but this isn't enough really.. I don't have time to go through
> the code and understand the purpose of the series.
> 
> Please explain here in detail:
> - Why this is needed.
Power Allocator governor is able to keep SOC temperature within a
defined temperature range to avoid SOC overheat and keep it's
performance. mt8173-cpufreq.c need to register its' own power model with
power allocator thermal governor, so that power allocator governor can
allocates suitable power budget to control CPU temperature.

> - What/How you are doing it.
Measure and create dynamic/static power model, and register cooling
device of_cpufreq_power_cooling_register for MT8173.
> 
> (Don't resend, just reply to this email :) )
> 


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Re: thermal: mediatek: Add cpu power cooling model

2015-09-04 Thread dawei chien
Sorry, forgot to add Rafael and Viresh as reviewer.

On Fri, 2015-09-04 at 17:01 +0800, Dawei Chien wrote:
> Use Intelligent Power Allocation (IPA) technical to add
> static/dynamic power model for binding CPU thermal zone.
> The power allocator governor allocates power budget to control
> CPU temperature.
> 
> Dawei.Chien (2):
>   thermal: mediatek: Add cpu power cooling model.
>   arm64: dts: mt8173: Add thermal zone node for mt8173.
> 
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
>  drivers/cpufreq/mt8173-cpufreq.c |   97 
> ++
>  2 files changed, 130 insertions(+), 11 deletions(-)
> 
> --
> 1.7.9.5
> 


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[PATCH 1/2] thermal: mediatek: Add cpu power cooling model

2015-09-04 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add
static/dynamic power model for binding CPU thermal zone.
The power allocator governor allocates power budget to control
CPU temperature.

Signed-off-by: Dawei Chien 
---
This patch is base on
https://patchwork.kernel.org/patch/7034601/
---
 drivers/cpufreq/mt8173-cpufreq.c |   97 +-
 1 file changed, 86 insertions(+), 11 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 49caed2..9233ec5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -28,7 +28,8 @@
 #define MAX_VOLT_SHIFT (20)
 #define MAX_VOLT_LIMIT (115)
 #define VOLT_TOL   (1)
-
+#define CAPACITANCE_CA53   (263)
+#define CAPACITANCE_CA57   (530)
 /*
  * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
  * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
@@ -51,6 +52,72 @@ struct mtk_cpu_dvfs_info {
bool need_voltage_tracking;
 };
 
+struct mtk_cpu_static_power {
+   unsigned long voltage;
+   unsigned int power;
+};
+
+/* measured by WA program. */
+static const struct mtk_cpu_static_power mtk_ca53_static_power[] = {
+   {859000, 43},
+   {908000, 52},
+   {983000, 86},
+   {1009000, 123},
+   {1028000, 138},
+   {1083000, 172},
+   {1109000, 180},
+   {1125000, 192},
+};
+
+/* measured by WA program. */
+static const struct mtk_cpu_static_power mtk_ca57_static_power[] = {
+   {828000, 72},
+   {867000, 90},
+   {927000, 156},
+   {968000, 181},
+   {1007000, 298},
+   {1049000, 435},
+   {1089000, 533},
+   {1125000, 533},
+};
+
+unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table,
+   unsigned int count, unsigned long voltage)
+{
+   int i;
+
+   for (i = 0; i < count; i++) {
+   if (voltage <= table[i].voltage)
+   return table[i].power;
+   }
+
+   return table[count - 1].power;
+}
+
+int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval,
+   unsigned long voltage, u32 *power)
+{
+   int nr_cpus = cpumask_weight(cpumask);
+
+   *power = 0;
+
+   if (nr_cpus) {
+
+   if (cpumask_test_cpu(0, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca53_static_power,
+   ARRAY_SIZE(mtk_ca53_static_power),
+   voltage);
+
+   if (cpumask_test_cpu(2, cpumask))
+   *power += mtk_cpufreq_lookup_power(
+   mtk_ca57_static_power,
+   ARRAY_SIZE(mtk_ca57_static_power),
+   voltage);
+   }
+   return 0;
+}
+
 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
int new_vproc)
 {
@@ -272,15 +339,21 @@ static void mtk_cpufreq_ready(struct cpufreq_policy 
*policy)
return;
 
if (of_find_property(np, "#cooling-cells", NULL)) {
-   info->cdev = of_cpufreq_cooling_register(np,
-policy->related_cpus);
-
-   if (IS_ERR(info->cdev)) {
-   dev_err(info->cpu_dev,
-   "running cpufreq without cooling device: %ld\n",
-   PTR_ERR(info->cdev));
-
-   info->cdev = NULL;
+   u32 capacitance = cpumask_test_cpu(0, policy->related_cpus) ?
+   CAPACITANCE_CA53 : CAPACITANCE_CA57;
+
+   if (!info->cdev) {
+   info->cdev = of_cpufreq_power_cooling_register(np,
+   policy->related_cpus,
+   capacitance,
+   mtk_cpufreq_get_static);
+
+   if (IS_ERR(info->cdev)) {
+   dev_err(info->cpu_dev,
+   "running cpufreq without cooling 
device: %ld\n",
+   PTR_ERR(info->cdev));
+   info->cdev = NULL;
+   }
}
}
 
@@ -460,7 +533,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
 {
struct mtk_cpu_dvfs_info *info = policy->driver_data;
 
-   cpufreq_cooling_unregister(info->cdev);
+   if (info->cdev)
+   cpufreq_cooling_unregister(info->cdev);
+
dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
mtk_cpu_dvfs_info_release(info);
kfree(info);
-- 
1.7.9.5

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[PATCH 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

2015-09-04 Thread Dawei Chien
Add thermal zone node to mt8173.dtsi.

Signed-off-by: Dawei Chien 
---
This patch is base on following patches
https://patchwork.kernel.org/patch/6969581/
https://patchwork.kernel.org/patch/6969571/
https://patchwork.kernel.org/patch/6969381/
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 208051a..6493bfd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include "mt8173-pinfunc.h"
+#include 
 
 / {
compatible = "mediatek,mt8173";
@@ -116,6 +117,49 @@
clock-output-names = "clk32k";
};
 
+   thermal-zones {
+   cpu_thermal: cpu_thermal {
+   polling-delay-passive = <1000>; /* milliseconds */
+   polling-delay = <1000>; /* milliseconds */
+
+   thermal-sensors = <&thermal MT8173_THERMAL_ZONE_CA57>;
+   sustainable-power = <1500>;
+
+   trips {
+   threshold: trip-point@0 {
+   temperature = <68000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   target: trip-point@1 {
+   temperature = <85000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+
+   cpu_crit: cpu_crit@0 {
+   temperature = <115000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+
+   cooling-maps {
+   map@0 {
+   trip = <&target>;
+   cooling-device = <&cpu0 0 0>;
+   contribution = <1024>;
+   };
+   map@1 {
+   trip = <&target>;
+   cooling-device = <&cpu2 0 0>;
+   contribution = <2048>;
+   };
+   };
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
-- 
1.7.9.5

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thermal: mediatek: Add cpu power cooling model

2015-09-04 Thread Dawei Chien
Use Intelligent Power Allocation (IPA) technical to add
static/dynamic power model for binding CPU thermal zone.
The power allocator governor allocates power budget to control
CPU temperature.

Dawei.Chien (2):
  thermal: mediatek: Add cpu power cooling model.
  arm64: dts: mt8173: Add thermal zone node for mt8173.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++
 drivers/cpufreq/mt8173-cpufreq.c |   97 ++
 2 files changed, 130 insertions(+), 11 deletions(-)

--
1.7.9.5

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