Re: [PATCH v7 3/4] spmi: mediatek: Add support for MT6873/8192
Hi Maintainers,
Gentle pin for this patch.
Thanks.
On Sun, 2021-03-14 at 02:00 +0800, Hsin-Hsiung Wang wrote:
> Add spmi support for MT6873/8192.
>
> Signed-off-by: Hsin-Hsiung Wang
> ---
> changes since v6:
> - remove unused spinlock.
> - remove redundant check for slave id.
> ---
> drivers/spmi/Kconfig | 10 +
> drivers/spmi/Makefile| 2 +
> drivers/spmi/spmi-mtk-pmif.c | 465 +++
> 3 files changed, 477 insertions(+)
> create mode 100644 drivers/spmi/spmi-mtk-pmif.c
>
> diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
> index a53bad541f1a..692bac98a120 100644
> --- a/drivers/spmi/Kconfig
> +++ b/drivers/spmi/Kconfig
> @@ -25,4 +25,14 @@ config SPMI_MSM_PMIC_ARB
> This is required for communicating with Qualcomm PMICs and
> other devices that have the SPMI interface.
>
> +config SPMI_MTK_PMIF
> + tristate "Mediatek SPMI Controller (PMIC Arbiter)"
> + help
> + If you say yes to this option, support will be included for the
> + built-in SPMI PMIC Arbiter interface on Mediatek family
> + processors.
> +
> + This is required for communicating with Mediatek PMICs and
> + other devices that have the SPMI interface.
> +
> endif
> diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
> index 55a94cadeffe..76fb3b3ab510 100644
> --- a/drivers/spmi/Makefile
> +++ b/drivers/spmi/Makefile
> @@ -5,3 +5,5 @@
> obj-$(CONFIG_SPMI) += spmi.o
>
> obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o
> +obj-$(CONFIG_SPMI_MTK_PMIF) += spmi-mtk-pmif.o
> +
> diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c
> new file mode 100644
> index ..94c45d46ab0c
> --- /dev/null
> +++ b/drivers/spmi/spmi-mtk-pmif.c
> @@ -0,0 +1,465 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2021 MediaTek Inc.
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define SWINF_IDLE 0x00
> +#define SWINF_WFVLDCLR 0x06
> +
> +#define GET_SWINF(x) (((x) >> 1) & 0x7)
> +
> +#define PMIF_CMD_REG_0 0
> +#define PMIF_CMD_REG 1
> +#define PMIF_CMD_EXT_REG 2
> +#define PMIF_CMD_EXT_REG_LONG3
> +
> +#define PMIF_DELAY_US 10
> +#define PMIF_TIMEOUT_US (10 * 1000)
> +
> +#define PMIF_CHAN_OFFSET 0x5
> +
> +#define PMIF_MAX_CLKS3
> +
> +#define SPMI_OP_ST_BUSY 1
> +
> +struct ch_reg {
> + u32 ch_sta;
> + u32 wdata;
> + u32 rdata;
> + u32 ch_send;
> + u32 ch_rdy;
> +};
> +
> +struct pmif_data {
> + const u32 *regs;
> + const u32 *spmimst_regs;
> + u32 soc_chan;
> +};
> +
> +struct pmif {
> + void __iomem*base;
> + void __iomem*spmimst_base;
> + struct ch_reg chan;
> + struct clk_bulk_data clks[PMIF_MAX_CLKS];
> + u32 nclks;
> + const struct pmif_data *data;
> +};
> +
> +static const char * const pmif_clock_names[] = {
> + "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux",
> +};
> +
> +enum pmif_regs {
> + PMIF_INIT_DONE,
> + PMIF_INF_EN,
> + PMIF_ARB_EN,
> + PMIF_CMDISSUE_EN,
> + PMIF_TIMER_CTRL,
> + PMIF_SPI_MODE_CTRL,
> + PMIF_IRQ_EVENT_EN_0,
> + PMIF_IRQ_FLAG_0,
> + PMIF_IRQ_CLR_0,
> + PMIF_IRQ_EVENT_EN_1,
> + PMIF_IRQ_FLAG_1,
> + PMIF_IRQ_CLR_1,
> + PMIF_IRQ_EVENT_EN_2,
> + PMIF_IRQ_FLAG_2,
> + PMIF_IRQ_CLR_2,
> + PMIF_IRQ_EVENT_EN_3,
> + PMIF_IRQ_FLAG_3,
> + PMIF_IRQ_CLR_3,
> + PMIF_IRQ_EVENT_EN_4,
> + PMIF_IRQ_FLAG_4,
> + PMIF_IRQ_CLR_4,
> + PMIF_WDT_EVENT_EN_0,
> + PMIF_WDT_FLAG_0,
> + PMIF_WDT_EVENT_EN_1,
> + PMIF_WDT_FLAG_1,
> + PMIF_SWINF_0_STA,
> + PMIF_SWINF_0_WDATA_31_0,
> + PMIF_SWINF_0_RDATA_31_0,
> + PMIF_SWINF_0_ACC,
> + PMIF_SWINF_0_VLD_CLR,
> + PMIF_SWINF_1_STA,
> + PMIF_SWINF_1_WDATA_31_0,
> + PMIF_SWINF_1_RDATA_31_0,
> + PMIF_SWINF_1_ACC,
> + PMIF_SWINF_1_VLD_CLR,
> + PMIF_SWINF_2_STA,
> + PMIF_SWINF_2_WDATA_31_0,
> + PMIF_SWINF_2_RDATA_31_0,
> + PMIF_SWINF_2_ACC,
> + PMIF_SWINF_2_VLD_CLR,
> + PMIF_SWINF_3_STA,
> + PMIF_SWINF_3_WDATA_31_0,
> + PMIF_SWINF_3_RDATA_31_0,
> + PMIF_SWINF_3_ACC,
> + PMIF_SWINF_3_VLD_CLR,
> +};
> +
> +static const u32 mt6873_regs[] = {
> + [PMIF_INIT_DONE] = 0x,
> + [PMIF_INF_EN] = 0x0024,
> + [PMIF_ARB_EN] = 0x0150,
> + [PMIF_CMDISS
[PATCH v7 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v6:
- update the regulator node.
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi| 298
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
2 files changed, 299 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..18c0d5325c22
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ };
+
+ regulators {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+ regulator-min-microvolt = <40>;
+ regu
[PATCH v7 5/8] mfd: Add support for the MediaTek MT6359 PMIC
This adds support for the MediaTek MT6359 PMIC. This is a
multifunction device with the following sub modules:
- Codec
- Interrupt
- Regulator
- RTC
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6359 MFD is a child device of the pwrap.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
changes since v6:
- no change.
---
drivers/mfd/mt6358-irq.c | 24 ++
drivers/mfd/mt6397-core.c| 24 ++
include/linux/mfd/mt6359/core.h | 133 +++
include/linux/mfd/mt6359/registers.h | 529 +++
include/linux/mfd/mt6397/core.h | 1 +
5 files changed, 711 insertions(+)
create mode 100644 include/linux/mfd/mt6359/core.h
create mode 100644 include/linux/mfd/mt6359/registers.h
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index 4b094e5e51cc..83f3ffbdbb4c 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -5,6 +5,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static const struct irq_top_t mt6359_ints[] = {
+ MT6359_TOP_GEN(BUCK),
+ MT6359_TOP_GEN(LDO),
+ MT6359_TOP_GEN(PSC),
+ MT6359_TOP_GEN(SCK),
+ MT6359_TOP_GEN(BM),
+ MT6359_TOP_GEN(HK),
+ MT6359_TOP_GEN(AUD),
+ MT6359_TOP_GEN(MISC),
+};
+
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
@@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
.pmic_ints = mt6358_ints,
};
+static struct pmic_irq_data mt6359_irqd = {
+ .num_top = ARRAY_SIZE(mt6359_ints),
+ .num_pmic_irqs = MT6359_IRQ_NR,
+ .top_int_status_reg = MT6359_TOP_INT_STATUS0,
+ .pmic_ints = mt6359_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
chip->irq_data = _irqd;
break;
+ case MT6359_CHIP_ID:
+ chip->irq_data = _irqd;
+ break;
+
default:
dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
return -ENODEV;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 7518d74c3b4c..9a615f75fbde 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -13,9 +13,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#define MT6323_RTC_BASE0x8000
@@ -99,6 +101,17 @@ static const struct mfd_cell mt6358_devs[] = {
},
};
+static const struct mfd_cell mt6359_devs[] = {
+ { .name = "mt6359-regulator", },
+ {
+ .name = "mt6359-rtc",
+ .num_resources = ARRAY_SIZE(mt6358_rtc_resources),
+ .resources = mt6358_rtc_resources,
+ .of_compatible = "mediatek,mt6358-rtc",
+ },
+ { .name = "mt6359-sound", },
+};
+
static const struct mfd_cell mt6397_devs[] = {
{
.name = "mt6397-rtc",
@@ -149,6 +162,14 @@ static const struct chip_data mt6358_core = {
.irq_init = mt6358_irq_init,
};
+static const struct chip_data mt6359_core = {
+ .cid_addr = MT6359_SWCID,
+ .cid_shift = 8,
+ .cells = mt6359_devs,
+ .cell_size = ARRAY_SIZE(mt6359_devs),
+ .irq_init = mt6358_irq_init,
+};
+
static const struct chip_data mt6397_core = {
.cid_addr = MT6397_CID,
.cid_shift = 0,
@@ -218,6 +239,9 @@ static const struct of_device_id mt6397_of_match[] = {
}, {
.compatible = "mediatek,mt6358",
.data = _core,
+ }, {
+ .compatible = "mediatek,mt6359",
+ .data = _core,
}, {
.compatible = "mediatek,mt6397",
.data = _core,
diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h
new file mode 100644
index ..8d298868126d
--- /dev/null
+++ b/include/linux/mfd/mt6359/core.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+#ifndef __MFD_MT6359_CORE_H__
+#define __MFD_MT6359_CORE_H__
+
+enum mt6359_irq_top_status_shift {
+ MT6359_BUCK_TOP = 0,
+ MT6359_LDO_TOP,
+ MT6359_PSC_TOP,
+ MT6359_SCK_TOP,
+ MT6359_BM_TOP,
+ MT6359_HK_TOP,
+ MT6359_AUD_TOP = 7,
+ MT6359_MISC_TOP,
+};
+
+enum mt6359_irq_numbers {
+ MT6359_IRQ_VCORE_OC = 1,
+ MT6359_IRQ_VGPU11_OC,
+ MT6359_IRQ_VGPU12_OC,
+ MT6359_IRQ_VMODEM_OC,
+ MT6359_IRQ_VPROC1_OC,
+ MT6359_IRQ_VPROC2_OC,
+ MT6359_
[PATCH v7 7/8] regulator: mt6359: Add support for MT6359P regulator
The MT6359P is a eco version for MT6359 regulator.
We add support based on MT6359 regulator driver.
Signed-off-by: Hsin-Hsiung Wang
Acked-by: Mark Brown
---
changes since v6:
- no change.
---
drivers/regulator/mt6359-regulator.c | 379 -
include/linux/mfd/mt6359p/registers.h | 249 ++
include/linux/regulator/mt6359-regulator.h | 1 +
3 files changed, 623 insertions(+), 6 deletions(-)
create mode 100644 include/linux/mfd/mt6359p/registers.h
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index 994d3f67f73d..4f517c9fd6c4 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
#include
@@ -147,6 +148,29 @@ struct mt6359_regulator_info {
.qi = BIT(0), \
}
+#define MT6359P_LDO1(match, _name, _ops, _volt_table, \
+ _enable_reg, _enable_mask, _status_reg, \
+ _vsel_reg, _vsel_mask) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = &_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .n_voltages = ARRAY_SIZE(_volt_table), \
+ .volt_table = _volt_table, \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(_enable_mask), \
+ }, \
+ .status_reg = _status_reg, \
+ .qi = BIT(0), \
+}
+
static const struct linear_range mt_volt_range1[] = {
REGULATOR_LINEAR_RANGE(80, 0, 0x70, 12500),
};
@@ -175,6 +199,10 @@ static const struct linear_range mt_volt_range7[] = {
REGULATOR_LINEAR_RANGE(50, 0, 0x7f, 6250),
};
+static const struct linear_range mt_volt_range8[] = {
+ REGULATOR_LINEAR_RANGE(506250, 0, 0x7f, 6250),
+};
+
static const u32 vsim1_voltages[] = {
0, 0, 0, 170, 180, 0, 0, 0, 270, 0, 0, 300, 310,
};
@@ -212,6 +240,10 @@ static const u32 vrfck_voltages[] = {
0, 0, 150, 0, 0, 0, 0, 160, 0, 0, 0, 0, 170,
};
+static const u32 vrfck_voltages_1[] = {
+ 124, 160,
+};
+
static const u32 vio28_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 280, 290, 300, 310, 330,
};
@@ -220,6 +252,11 @@ static const u32 vemc_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 290, 300, 0, 330,
};
+static const u32 vemc_voltages_1[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 250, 280, 290, 300, 310,
+ 330,
+};
+
static const u32 va12_voltages[] = {
0, 0, 0, 0, 0, 0, 120, 130,
};
@@ -356,6 +393,78 @@ static int mt6359_regulator_set_mode(struct regulator_dev
*rdev,
return ret;
}
+static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
+ u32 sel)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ sel <<= ffs(info->desc.vsel_mask) - 1;
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+
+ switch (val) {
+ case 0:
+ /* If HW trapping is 0, use VEMC_VOSEL_0 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg,
+info->desc.vsel_mask, sel);
+ break;
+ case 1:
+ /* If HW trapping is 1, use VEMC_VOSEL_1 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg + 0x2,
+info->desc.vsel_mask, sel);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (ret)
+ return ret;
+
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
+ return ret;
+}
+
+static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ re
[PATCH v7 6/8] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
Acked-by: Mark Brown
---
changes since v6:
- no change.
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 669 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 737 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 77c43134bc9e..1d671dbf4fd2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -759,6 +759,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 44d2f8bf4b74..c3ca97377044 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..994d3f67f73d
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,669 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(0), \
+
[PATCH v7 4/8] dt-bindings: regulator: Add document for MT6359 regulator
add dt-binding document for MediaTek MT6359 PMIC
Signed-off-by: Hsin-Hsiung Wang
---
changes since v6:
- fix yaml error.
---
.../bindings/regulator/mt6359-regulator.yaml | 385 ++
1 file changed, 385 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
new file mode 100644
index ..8cc413eb482d
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
@@ -0,0 +1,385 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MT6359 Regulator from MediaTek Integrated
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ List of regulators provided by this controller. It is named
+ according to its regulator type, buck_ and ldo_.
+ MT6359 regulators node should be sub node of the MT6397 MFD node.
+
+patternProperties:
+ "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(fe|bif|io)28$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(fe|bif|io)28$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(aud|io|aux|rf|m)18$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(aud|io|aux|rf|m)18$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsim[12]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsim[12]$"
+
+required:
+ - regulator-name
+
+unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+pmic {
+ regulators {
+mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+};
+mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+};
+mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+};
+mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+};
+mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+};
+
[PATCH v7 0/8] Add Support for MediaTek PMIC MT6359
This patchset includes refactoring interrupt and adding support to MT6359 PMIC. MT6359 is the primary PMIC for MT6779 and probably other SOCs. The series[1] sent by Wen will continue to upstream in this patchset afterwards. This patchset is based on the pmic wrapper patchset[2]. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=306579 [2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=447127 changes since v6: - fix yaml error. - update dts node. Hsin-Hsiung Wang (6): mfd: mt6358: refine interrupt code rtc: mt6397: refine RTC_TC_MTH dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC dt-bindings: regulator: Add document for MT6359 regulator mfd: Add support for the MediaTek MT6359 PMIC regulator: mt6359: Add support for MT6359P regulator Wen Su (2): regulator: mt6359: Add support for MT6359 regulator arm64: dts: mt6359: add PMIC MT6359 related nodes .../devicetree/bindings/mfd/mt6397.txt|1 + .../bindings/regulator/mt6359-regulator.yaml | 385 ++ arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 + arch/arm64/boot/dts/mediatek/mt8192-evb.dts |1 + drivers/mfd/mt6358-irq.c | 89 +- drivers/mfd/mt6397-core.c | 24 + drivers/regulator/Kconfig |9 + drivers/regulator/Makefile|1 + drivers/regulator/mt6359-regulator.c | 1036 + drivers/rtc/rtc-mt6397.c |2 +- include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6359/core.h | 133 +++ include/linux/mfd/mt6359/registers.h | 529 + include/linux/mfd/mt6359p/registers.h | 249 include/linux/mfd/mt6397/core.h |1 + include/linux/mfd/mt6397/rtc.h|1 + include/linux/regulator/mt6359-regulator.h| 59 + 17 files changed, 2793 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/mfd/mt6359/core.h create mode 100644 include/linux/mfd/mt6359/registers.h create mode 100644 include/linux/mfd/mt6359p/registers.h create mode 100644 include/linux/regulator/mt6359-regulator.h -- 2.18.0
[PATCH v7 1/8] mfd: mt6358: refine interrupt code
This patch refines the interrupt related code to support new chips.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
changes since v6:
- no change.
---
drivers/mfd/mt6358-irq.c| 65 +++--
include/linux/mfd/mt6358/core.h | 8 ++--
2 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index db734f2831ff..4b094e5e51cc 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -13,7 +13,9 @@
#include
#include
-static struct irq_top_t mt6358_ints[] = {
+#define MTK_PMIC_REG_WIDTH 16
+
+static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
MT6358_TOP_GEN(PSC),
@@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static struct pmic_irq_data mt6358_irqd = {
+ .num_top = ARRAY_SIZE(mt6358_ints),
+ .num_pmic_irqs = MT6358_IRQ_NR,
+ .top_int_status_reg = MT6358_TOP_INT_STATUS0,
+ .pmic_ints = mt6358_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -62,15 +71,15 @@ static void pmic_irq_sync_unlock(struct irq_data *data)
/* Find out the IRQ group */
top_gp = 0;
while ((top_gp + 1) < irqd->num_top &&
- i >= mt6358_ints[top_gp + 1].hwirq_base)
+ i >= irqd->pmic_ints[top_gp + 1].hwirq_base)
top_gp++;
/* Find the IRQ registers */
- gp_offset = i - mt6358_ints[top_gp].hwirq_base;
- int_regs = gp_offset / MT6358_REG_WIDTH;
- shift = gp_offset % MT6358_REG_WIDTH;
- en_reg = mt6358_ints[top_gp].en_reg +
-(mt6358_ints[top_gp].en_reg_shift * int_regs);
+ gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;
+ int_regs = gp_offset / MTK_PMIC_REG_WIDTH;
+ shift = gp_offset % MTK_PMIC_REG_WIDTH;
+ en_reg = irqd->pmic_ints[top_gp].en_reg +
+(irqd->pmic_ints[top_gp].en_reg_shift * int_regs);
regmap_update_bits(chip->regmap, en_reg, BIT(shift),
irqd->enable_hwirq[i] << shift);
@@ -95,10 +104,11 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
unsigned int irq_status, sta_reg, status;
unsigned int hwirq, virq;
int i, j, ret;
+ struct pmic_irq_data *irqd = chip->irq_data;
- for (i = 0; i < mt6358_ints[top_gp].num_int_regs; i++) {
- sta_reg = mt6358_ints[top_gp].sta_reg +
- mt6358_ints[top_gp].sta_reg_shift * i;
+ for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {
+ sta_reg = irqd->pmic_ints[top_gp].sta_reg +
+ irqd->pmic_ints[top_gp].sta_reg_shift * i;
ret = regmap_read(chip->regmap, sta_reg, _status);
if (ret) {
@@ -114,8 +124,8 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
do {
j = __ffs(status);
- hwirq = mt6358_ints[top_gp].hwirq_base +
- MT6358_REG_WIDTH * i + j;
+ hwirq = irqd->pmic_ints[top_gp].hwirq_base +
+ MTK_PMIC_REG_WIDTH * i + j;
virq = irq_find_mapping(chip->irq_domain, hwirq);
if (virq)
@@ -131,12 +141,12 @@ static void mt6358_irq_sp_handler(struct mt6397_chip
*chip,
static irqreturn_t mt6358_irq_handler(int irq, void *data)
{
struct mt6397_chip *chip = data;
- struct pmic_irq_data *mt6358_irq_data = chip->irq_data;
+ struct pmic_irq_data *irqd = chip->irq_data;
unsigned int bit, i, top_irq_status = 0;
int ret;
ret = regmap_read(chip->regmap,
- mt6358_irq_data->top_int_status_reg,
+ irqd->top_int_status_reg,
_irq_status);
if (ret) {
dev_err(chip->dev,
@@ -144,8 +154,8 @@ static irqreturn_t mt6358_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- for (i = 0; i < mt6358_irq_data->num_top; i++) {
- bit = BIT(mt6358_ints[i].top_offset);
+ for (i = 0; i < irqd->num_top; i++) {
+ bit = BIT(irqd->pmic_ints[i].top_offset);
if (top_irq_status & bit) {
mt6358_irq_sp_handler(chip, i);
top_irq_status &= ~bit;
@@ -180,17 +190,18 @@ int mt6358_irq_init(struct mt6397_chip *chip)
int i, j, ret;
struct pmic_irq_data *irqd;
- irqd = devm_kzalloc(chip->dev, sizeof(*i
[PATCH v7 2/8] rtc: mt6397: refine RTC_TC_MTH
This patch adds RTC_TC_MTH_MASK to support new chips. Signed-off-by: Yuchen Huang Signed-off-by: Hsin-Hsiung Wang Acked-by: Alexandre Belloni --- changes since v6: - no change. --- drivers/rtc/rtc-mt6397.c | 2 +- include/linux/mfd/mt6397/rtc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index 6655035e5164..80dc479a6ff0 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -75,7 +75,7 @@ static int __mtk_rtc_read_time(struct mt6397_rtc *rtc, tm->tm_min = data[RTC_OFFSET_MIN]; tm->tm_hour = data[RTC_OFFSET_HOUR]; tm->tm_mday = data[RTC_OFFSET_DOM]; - tm->tm_mon = data[RTC_OFFSET_MTH]; + tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_TC_MTH_MASK; tm->tm_year = data[RTC_OFFSET_YEAR]; ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec); diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index c3748b53bf7d..068ae1c0f0e8 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -36,6 +36,7 @@ #define RTC_AL_MASK_DOWBIT(4) #define RTC_TC_SEC 0x000a +#define RTC_TC_MTH_MASK0x000f /* Min, Hour, Dom... register offset to RTC_TC_SEC */ #define RTC_OFFSET_SEC 0 #define RTC_OFFSET_MIN 1 -- 2.18.0
[PATCH v7 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- changes since v6: - no change. --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..99a84b69a29f 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: -- 2.18.0
Re: [PATCH v6 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
Hi,
On Mon, 2021-03-29 at 17:24 +0200, Matthias Brugger wrote:
>
> On 15/03/2021 18:35, Hsin-Hsiung Wang wrote:
> > From: Wen Su
> >
> > add PMIC MT6359 related nodes which is for MT6779 platform
> >
> > Signed-off-by: Wen Su
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
> > changes since v5:
> > - update file date.
> > ---
> > arch/arm64/boot/dts/mediatek/mt6359.dtsi| 298
> > arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
> > 2 files changed, 299 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
> > new file mode 100644
> > index ..84235db460f8
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
> > @@ -0,0 +1,298 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2021 MediaTek Inc.
> > + */
> > +
> > + {
> > + pmic: pmic {
> > + compatible = "mediatek,mt6359";
> > + interrupt-controller;
> > + #interrupt-cells = <2>;
> > +
> > + mt6359codec: mt6359codec {
> > + };
> > +
> > + mt6359regulator: regulators {
>
> should be just:
> regulators {
>
> Other than that looks good to me.
>
Thanks for the review.
I will update it in next patch.
> Regards,
> Matthias
>
> > + mt6359_vs1_buck_reg: buck_vs1 {
> > + regulator-name = "vs1";
> > + regulator-min-microvolt = <80>;
> > + regulator-max-microvolt = <220>;
> > + regulator-enable-ramp-delay = <0>;
> > + regulator-always-on;
> > + };
> > + mt6359_vgpu11_buck_reg: buck_vgpu11 {
> > + regulator-name = "vgpu11";
> > + regulator-min-microvolt = <40>;
> > + regulator-max-microvolt = <1193750>;
> > + regulator-ramp-delay = <5000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-allowed-modes = <0 1 2>;
> > + };
> > + mt6359_vmodem_buck_reg: buck_vmodem {
> > + regulator-name = "vmodem";
> > + regulator-min-microvolt = <40>;
> > + regulator-max-microvolt = <110>;
> > + regulator-ramp-delay = <10760>;
> > + regulator-enable-ramp-delay = <200>;
> > + };
> > + mt6359_vpu_buck_reg: buck_vpu {
> > + regulator-name = "vpu";
> > + regulator-min-microvolt = <40>;
> > + regulator-max-microvolt = <1193750>;
> > + regulator-ramp-delay = <5000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-allowed-modes = <0 1 2>;
> > + };
> > + mt6359_vcore_buck_reg: buck_vcore {
> > + regulator-name = "vcore";
> > + regulator-min-microvolt = <40>;
> > + regulator-max-microvolt = <130>;
> > + regulator-ramp-delay = <5000>;
> > + regulator-enable-ramp-delay = <200>;
> > + regulator-allowed-modes = <0 1 2>;
> > + };
> > + mt6359_vs2_buck_reg: buck_vs2 {
> > + regulator-name = "vs2";
> > + regulator-min-microvolt = <80>;
> > + regulator-max-microvolt = <160>;
> > + regulator-enable-ramp-delay = <0>;
> > + regulator-always-on;
> > + };
> > + mt6359_vpa_buck_reg: buck_vpa {
> > + regulator-name = "vpa";
> > + regulator-min-microvolt
Re: [PATCH v6 4/8] dt-bindings: regulator: Add document for MT6359 regulator
Hi, On Tue, 2021-03-16 at 15:28 -0600, Rob Herring wrote: > On Tue, Mar 16, 2021 at 01:35:53AM +0800, Hsin-Hsiung Wang wrote: > > add dt-binding document for MediaTek MT6359 PMIC > > > > Signed-off-by: Hsin-Hsiung Wang > > --- > > changes since v5: > > - no change. > > --- > > .../bindings/regulator/mt6359-regulator.yaml | 169 ++ > > 1 file changed, 169 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > new file mode 100644 > > index ..62ff93eefd39 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > @@ -0,0 +1,169 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MT6359 Regulator from MediaTek Integrated > > + > > +maintainers: > > + - Hsin-Hsiung Wang > > + > > +description: | > > + List of regulators provided by this controller. It is named > > + according to its regulator type, buck_ and ldo_. > > + MT6359 regulators node should be sub node of the MT6397 MFD node. > > + > > +properties: > > + $nodename: > > +pattern: "^pmic$" > > The errors are because this schema will be applied to every 'pmic' node. > > > + > > + mt6359regulator: > > The node name here should be just 'regulators', but that should be in > the MFD schema and you should remove this level here. So the MFD would > have: > > properties: > regulators: > type: object > $ref: schemas/regulator/mt6359-regulator.yaml# > > > +type: object > > +description: > > + list of regulators provided by this controller. > > + > > +patternProperties: > > And this should be at the top level of this doc. > > > + "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: > > "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(fe|bif|io)28$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(fe|bif|io)28$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(aud|io|aux|rf|m)18$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(au
Re: [PATCH v6 4/8] dt-bindings: regulator: Add document for MT6359 regulator
Hi, Rob I am very grateful for the reviewing which addressed my yaml errors. I will check my codebase first and fix the error in the next patch. Thanks. On Tue, 2021-03-16 at 15:28 -0600, Rob Herring wrote: > On Tue, Mar 16, 2021 at 01:35:53AM +0800, Hsin-Hsiung Wang wrote: > > add dt-binding document for MediaTek MT6359 PMIC > > > > Signed-off-by: Hsin-Hsiung Wang > > --- > > changes since v5: > > - no change. > > --- > > .../bindings/regulator/mt6359-regulator.yaml | 169 ++ > > 1 file changed, 169 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > new file mode 100644 > > index ..62ff93eefd39 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml > > @@ -0,0 +1,169 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MT6359 Regulator from MediaTek Integrated > > + > > +maintainers: > > + - Hsin-Hsiung Wang > > + > > +description: | > > + List of regulators provided by this controller. It is named > > + according to its regulator type, buck_ and ldo_. > > + MT6359 regulators node should be sub node of the MT6397 MFD node. > > + > > +properties: > > + $nodename: > > +pattern: "^pmic$" > > The errors are because this schema will be applied to every 'pmic' node. > > > + > > + mt6359regulator: > > The node name here should be just 'regulators', but that should be in > the MFD schema and you should remove this level here. So the MFD would > have: > > properties: > regulators: > type: object > $ref: schemas/regulator/mt6359-regulator.yaml# > > > +type: object > > +description: > > + list of regulators provided by this controller. > > + > > +patternProperties: > > And this should be at the top level of this doc. > > > + "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: > > "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(fe|bif|io)28$": > > +type: object > > +$ref: "regulator.yaml#" > > + > > +properties: > > + regulator-name: > > +pattern: "^v(fe|bif|io)28$" > > + > > +unevaluatedProperties: false > > + > > + "^ldo_v(aud|io|aux|rf|m)18$": > > +type: object > > +$ref: "
[PATCH v6 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- update file date.
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi| 298
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
2 files changed, 299 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..84235db460f8
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ };
+
+ mt6359regulator: regulators {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+ regulator-min-microvolt = <40>;
+ regu
[PATCH v6 7/8] regulator: mt6359: Add support for MT6359P regulator
The MT6359P is a eco version for MT6359 regulator.
We add support based on MT6359 regulator driver.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- no change.
---
drivers/regulator/mt6359-regulator.c | 379 -
include/linux/mfd/mt6359p/registers.h | 249 ++
include/linux/regulator/mt6359-regulator.h | 1 +
3 files changed, 623 insertions(+), 6 deletions(-)
create mode 100644 include/linux/mfd/mt6359p/registers.h
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index 994d3f67f73d..4f517c9fd6c4 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
#include
@@ -147,6 +148,29 @@ struct mt6359_regulator_info {
.qi = BIT(0), \
}
+#define MT6359P_LDO1(match, _name, _ops, _volt_table, \
+ _enable_reg, _enable_mask, _status_reg, \
+ _vsel_reg, _vsel_mask) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = &_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .n_voltages = ARRAY_SIZE(_volt_table), \
+ .volt_table = _volt_table, \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(_enable_mask), \
+ }, \
+ .status_reg = _status_reg, \
+ .qi = BIT(0), \
+}
+
static const struct linear_range mt_volt_range1[] = {
REGULATOR_LINEAR_RANGE(80, 0, 0x70, 12500),
};
@@ -175,6 +199,10 @@ static const struct linear_range mt_volt_range7[] = {
REGULATOR_LINEAR_RANGE(50, 0, 0x7f, 6250),
};
+static const struct linear_range mt_volt_range8[] = {
+ REGULATOR_LINEAR_RANGE(506250, 0, 0x7f, 6250),
+};
+
static const u32 vsim1_voltages[] = {
0, 0, 0, 170, 180, 0, 0, 0, 270, 0, 0, 300, 310,
};
@@ -212,6 +240,10 @@ static const u32 vrfck_voltages[] = {
0, 0, 150, 0, 0, 0, 0, 160, 0, 0, 0, 0, 170,
};
+static const u32 vrfck_voltages_1[] = {
+ 124, 160,
+};
+
static const u32 vio28_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 280, 290, 300, 310, 330,
};
@@ -220,6 +252,11 @@ static const u32 vemc_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 290, 300, 0, 330,
};
+static const u32 vemc_voltages_1[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 250, 280, 290, 300, 310,
+ 330,
+};
+
static const u32 va12_voltages[] = {
0, 0, 0, 0, 0, 0, 120, 130,
};
@@ -356,6 +393,78 @@ static int mt6359_regulator_set_mode(struct regulator_dev
*rdev,
return ret;
}
+static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
+ u32 sel)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ sel <<= ffs(info->desc.vsel_mask) - 1;
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+
+ switch (val) {
+ case 0:
+ /* If HW trapping is 0, use VEMC_VOSEL_0 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg,
+info->desc.vsel_mask, sel);
+ break;
+ case 1:
+ /* If HW trapping is 1, use VEMC_VOSEL_1 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg + 0x2,
+info->desc.vsel_mask, sel);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (ret)
+ return ret;
+
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
+ return ret;
+}
+
+static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ ret = regmap_read(rdev
[PATCH v6 2/8] rtc: mt6397: refine RTC_TC_MTH
This patch adds RTC_TC_MTH_MASK to support new chips. Signed-off-by: Yuchen Huang Signed-off-by: Hsin-Hsiung Wang Acked-by: Alexandre Belloni --- changes since v5: - no change. --- drivers/rtc/rtc-mt6397.c | 2 +- include/linux/mfd/mt6397/rtc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index 6655035e5164..80dc479a6ff0 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -75,7 +75,7 @@ static int __mtk_rtc_read_time(struct mt6397_rtc *rtc, tm->tm_min = data[RTC_OFFSET_MIN]; tm->tm_hour = data[RTC_OFFSET_HOUR]; tm->tm_mday = data[RTC_OFFSET_DOM]; - tm->tm_mon = data[RTC_OFFSET_MTH]; + tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_TC_MTH_MASK; tm->tm_year = data[RTC_OFFSET_YEAR]; ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec); diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index c3748b53bf7d..068ae1c0f0e8 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -36,6 +36,7 @@ #define RTC_AL_MASK_DOWBIT(4) #define RTC_TC_SEC 0x000a +#define RTC_TC_MTH_MASK0x000f /* Min, Hour, Dom... register offset to RTC_TC_SEC */ #define RTC_OFFSET_SEC 0 #define RTC_OFFSET_MIN 1 -- 2.18.0
[PATCH v6 1/8] mfd: mt6358: refine interrupt code
This patch refines the interrupt related code to support new chips.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
changes since v5:
- no change.
---
drivers/mfd/mt6358-irq.c| 65 +++--
include/linux/mfd/mt6358/core.h | 8 ++--
2 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index db734f2831ff..4b094e5e51cc 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -13,7 +13,9 @@
#include
#include
-static struct irq_top_t mt6358_ints[] = {
+#define MTK_PMIC_REG_WIDTH 16
+
+static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
MT6358_TOP_GEN(PSC),
@@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static struct pmic_irq_data mt6358_irqd = {
+ .num_top = ARRAY_SIZE(mt6358_ints),
+ .num_pmic_irqs = MT6358_IRQ_NR,
+ .top_int_status_reg = MT6358_TOP_INT_STATUS0,
+ .pmic_ints = mt6358_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -62,15 +71,15 @@ static void pmic_irq_sync_unlock(struct irq_data *data)
/* Find out the IRQ group */
top_gp = 0;
while ((top_gp + 1) < irqd->num_top &&
- i >= mt6358_ints[top_gp + 1].hwirq_base)
+ i >= irqd->pmic_ints[top_gp + 1].hwirq_base)
top_gp++;
/* Find the IRQ registers */
- gp_offset = i - mt6358_ints[top_gp].hwirq_base;
- int_regs = gp_offset / MT6358_REG_WIDTH;
- shift = gp_offset % MT6358_REG_WIDTH;
- en_reg = mt6358_ints[top_gp].en_reg +
-(mt6358_ints[top_gp].en_reg_shift * int_regs);
+ gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;
+ int_regs = gp_offset / MTK_PMIC_REG_WIDTH;
+ shift = gp_offset % MTK_PMIC_REG_WIDTH;
+ en_reg = irqd->pmic_ints[top_gp].en_reg +
+(irqd->pmic_ints[top_gp].en_reg_shift * int_regs);
regmap_update_bits(chip->regmap, en_reg, BIT(shift),
irqd->enable_hwirq[i] << shift);
@@ -95,10 +104,11 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
unsigned int irq_status, sta_reg, status;
unsigned int hwirq, virq;
int i, j, ret;
+ struct pmic_irq_data *irqd = chip->irq_data;
- for (i = 0; i < mt6358_ints[top_gp].num_int_regs; i++) {
- sta_reg = mt6358_ints[top_gp].sta_reg +
- mt6358_ints[top_gp].sta_reg_shift * i;
+ for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {
+ sta_reg = irqd->pmic_ints[top_gp].sta_reg +
+ irqd->pmic_ints[top_gp].sta_reg_shift * i;
ret = regmap_read(chip->regmap, sta_reg, _status);
if (ret) {
@@ -114,8 +124,8 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
do {
j = __ffs(status);
- hwirq = mt6358_ints[top_gp].hwirq_base +
- MT6358_REG_WIDTH * i + j;
+ hwirq = irqd->pmic_ints[top_gp].hwirq_base +
+ MTK_PMIC_REG_WIDTH * i + j;
virq = irq_find_mapping(chip->irq_domain, hwirq);
if (virq)
@@ -131,12 +141,12 @@ static void mt6358_irq_sp_handler(struct mt6397_chip
*chip,
static irqreturn_t mt6358_irq_handler(int irq, void *data)
{
struct mt6397_chip *chip = data;
- struct pmic_irq_data *mt6358_irq_data = chip->irq_data;
+ struct pmic_irq_data *irqd = chip->irq_data;
unsigned int bit, i, top_irq_status = 0;
int ret;
ret = regmap_read(chip->regmap,
- mt6358_irq_data->top_int_status_reg,
+ irqd->top_int_status_reg,
_irq_status);
if (ret) {
dev_err(chip->dev,
@@ -144,8 +154,8 @@ static irqreturn_t mt6358_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- for (i = 0; i < mt6358_irq_data->num_top; i++) {
- bit = BIT(mt6358_ints[i].top_offset);
+ for (i = 0; i < irqd->num_top; i++) {
+ bit = BIT(irqd->pmic_ints[i].top_offset);
if (top_irq_status & bit) {
mt6358_irq_sp_handler(chip, i);
top_irq_status &= ~bit;
@@ -180,17 +190,18 @@ int mt6358_irq_init(struct mt6397_chip *chip)
int i, j, ret;
struct pmic_irq_data *irqd;
- irqd = devm_kzalloc(chip->dev, sizeof(*i
[PATCH v6 5/8] mfd: Add support for the MediaTek MT6359 PMIC
This adds support for the MediaTek MT6359 PMIC. This is a
multifunction device with the following sub modules:
- Codec
- Interrupt
- Regulator
- RTC
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6359 MFD is a child device of the pwrap.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
changes since v5:
- refine the code structure.
- update file date.
---
drivers/mfd/mt6358-irq.c | 24 ++
drivers/mfd/mt6397-core.c| 24 ++
include/linux/mfd/mt6359/core.h | 133 +++
include/linux/mfd/mt6359/registers.h | 529 +++
include/linux/mfd/mt6397/core.h | 1 +
5 files changed, 711 insertions(+)
create mode 100644 include/linux/mfd/mt6359/core.h
create mode 100644 include/linux/mfd/mt6359/registers.h
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index 4b094e5e51cc..83f3ffbdbb4c 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -5,6 +5,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static const struct irq_top_t mt6359_ints[] = {
+ MT6359_TOP_GEN(BUCK),
+ MT6359_TOP_GEN(LDO),
+ MT6359_TOP_GEN(PSC),
+ MT6359_TOP_GEN(SCK),
+ MT6359_TOP_GEN(BM),
+ MT6359_TOP_GEN(HK),
+ MT6359_TOP_GEN(AUD),
+ MT6359_TOP_GEN(MISC),
+};
+
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
@@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
.pmic_ints = mt6358_ints,
};
+static struct pmic_irq_data mt6359_irqd = {
+ .num_top = ARRAY_SIZE(mt6359_ints),
+ .num_pmic_irqs = MT6359_IRQ_NR,
+ .top_int_status_reg = MT6359_TOP_INT_STATUS0,
+ .pmic_ints = mt6359_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
chip->irq_data = _irqd;
break;
+ case MT6359_CHIP_ID:
+ chip->irq_data = _irqd;
+ break;
+
default:
dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
return -ENODEV;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 7518d74c3b4c..9a615f75fbde 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -13,9 +13,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#define MT6323_RTC_BASE0x8000
@@ -99,6 +101,17 @@ static const struct mfd_cell mt6358_devs[] = {
},
};
+static const struct mfd_cell mt6359_devs[] = {
+ { .name = "mt6359-regulator", },
+ {
+ .name = "mt6359-rtc",
+ .num_resources = ARRAY_SIZE(mt6358_rtc_resources),
+ .resources = mt6358_rtc_resources,
+ .of_compatible = "mediatek,mt6358-rtc",
+ },
+ { .name = "mt6359-sound", },
+};
+
static const struct mfd_cell mt6397_devs[] = {
{
.name = "mt6397-rtc",
@@ -149,6 +162,14 @@ static const struct chip_data mt6358_core = {
.irq_init = mt6358_irq_init,
};
+static const struct chip_data mt6359_core = {
+ .cid_addr = MT6359_SWCID,
+ .cid_shift = 8,
+ .cells = mt6359_devs,
+ .cell_size = ARRAY_SIZE(mt6359_devs),
+ .irq_init = mt6358_irq_init,
+};
+
static const struct chip_data mt6397_core = {
.cid_addr = MT6397_CID,
.cid_shift = 0,
@@ -218,6 +239,9 @@ static const struct of_device_id mt6397_of_match[] = {
}, {
.compatible = "mediatek,mt6358",
.data = _core,
+ }, {
+ .compatible = "mediatek,mt6359",
+ .data = _core,
}, {
.compatible = "mediatek,mt6397",
.data = _core,
diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h
new file mode 100644
index ..8d298868126d
--- /dev/null
+++ b/include/linux/mfd/mt6359/core.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+#ifndef __MFD_MT6359_CORE_H__
+#define __MFD_MT6359_CORE_H__
+
+enum mt6359_irq_top_status_shift {
+ MT6359_BUCK_TOP = 0,
+ MT6359_LDO_TOP,
+ MT6359_PSC_TOP,
+ MT6359_SCK_TOP,
+ MT6359_BM_TOP,
+ MT6359_HK_TOP,
+ MT6359_AUD_TOP = 7,
+ MT6359_MISC_TOP,
+};
+
+enum mt6359_irq_numbers {
+ MT6359_IRQ_VCORE_OC = 1,
+ MT6359_IRQ_VGPU11_OC,
+ MT6359_IRQ_VGPU12_OC,
+ MT6359_IRQ_VMODEM_OC,
+ MT6359_IRQ_VPROC1_OC,
+ MT6
[PATCH v6 4/8] dt-bindings: regulator: Add document for MT6359 regulator
add dt-binding document for MediaTek MT6359 PMIC
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- no change.
---
.../bindings/regulator/mt6359-regulator.yaml | 169 ++
1 file changed, 169 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
new file mode 100644
index ..62ff93eefd39
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
@@ -0,0 +1,169 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MT6359 Regulator from MediaTek Integrated
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ List of regulators provided by this controller. It is named
+ according to its regulator type, buck_ and ldo_.
+ MT6359 regulators node should be sub node of the MT6397 MFD node.
+
+properties:
+ $nodename:
+pattern: "^pmic$"
+
+ mt6359regulator:
+type: object
+description:
+ list of regulators provided by this controller.
+
+patternProperties:
+ "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(fe|bif|io)28$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(fe|bif|io)28$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(aud|io|aux|rf|m)18$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(aud|io|aux|rf|m)18$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsim[12]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsim[12]$"
+
+required:
+ - regulator-name
+
+unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+pmic {
+ mt6359regulator {
+mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-always-on;
+ regulator-allowed-modes = <0 1 2>;
+};
+
+mt6359_vcamio_ldo_reg: ldo_vcamio {
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <170>;
+ regulator-max-microvolt = <190>;
+};
+
+mt6359_vcn18_ldo_reg: ldo_vcn18 {
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-enable-ramp-delay = <240>;
+};
+
+mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 {
+ regulator-name = "vsram_proc2";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <1293750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <240>;
+ regulator-always-on;
+};
+
+mt6359_vfe28_ldo_reg: ldo_vfe28 {
+ regulator-name = "vfe28";
+
[PATCH v6 0/8] Add Support for MediaTek PMIC MT6359
This patchset includes refactoring interrupt and adding support to MT6359 PMIC. MT6359 is the primary PMIC for MT6779 and probably other SOCs. The series[1] sent by Wen will continue to upstream in this patchset afterwards. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=306579 changes since v5: - rebase to Linux 5.12. - refine the code structure. - update the file date. Hsin-Hsiung Wang (6): mfd: mt6358: refine interrupt code rtc: mt6397: refine RTC_TC_MTH dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC dt-bindings: regulator: Add document for MT6359 regulator mfd: Add support for the MediaTek MT6359 PMIC regulator: mt6359: Add support for MT6359P regulator Wen Su (2): regulator: mt6359: Add support for MT6359 regulator arm64: dts: mt6359: add PMIC MT6359 related nodes .../devicetree/bindings/mfd/mt6397.txt|1 + .../bindings/regulator/mt6359-regulator.yaml | 169 +++ arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 + arch/arm64/boot/dts/mediatek/mt8192-evb.dts |1 + drivers/mfd/mt6358-irq.c | 89 +- drivers/mfd/mt6397-core.c | 24 + drivers/regulator/Kconfig |9 + drivers/regulator/Makefile|1 + drivers/regulator/mt6359-regulator.c | 1036 + drivers/rtc/rtc-mt6397.c |2 +- include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6359/core.h | 133 +++ include/linux/mfd/mt6359/registers.h | 529 + include/linux/mfd/mt6359p/registers.h | 249 include/linux/mfd/mt6397/core.h |1 + include/linux/mfd/mt6397/rtc.h|1 + include/linux/regulator/mt6359-regulator.h| 59 + 17 files changed, 2577 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/mfd/mt6359/core.h create mode 100644 include/linux/mfd/mt6359/registers.h create mode 100644 include/linux/mfd/mt6359p/registers.h create mode 100644 include/linux/regulator/mt6359-regulator.h -- 2.18.0
[PATCH v6 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- changes since v5: - no change. --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..99a84b69a29f 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: -- 2.18.0
[PATCH v6 6/8] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- update the file date.
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 669 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 737 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 77c43134bc9e..1d671dbf4fd2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -759,6 +759,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 44d2f8bf4b74..c3ca97377044 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..994d3f67f73d
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,669 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(0), \
+
Re: [PATCH v7 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller
Hi, Sir On Mon, 2021-03-15 at 08:22 -0600, Rob Herring wrote: > On Sun, 14 Mar 2021 02:00:51 +0800, Hsin-Hsiung Wang wrote: > > This adds documentation for the SPMI controller found on Mediatek SoCs. > > > > Signed-off-by: Hsin-Hsiung Wang > > Reviewed-by: Rob Herring > > --- > > changes since v6: > > - no changes. > > --- > > .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++ > > 1 file changed, 74 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dts:19:18: > fatal error: dt-bindings/clock/mt8192-clk.h: No such file or directory >19 | #include > | ^~~~ > compilation terminated. > make[1]: *** [scripts/Makefile.lib:349: > Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.example.dt.yaml] > Error 1 > make[1]: *** Waiting for unfinished jobs > make: *** [Makefile:1380: dt_binding_check] Error 2 > > See https://patchwork.ozlabs.org/patch/1452529 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. > Thanks for the review. This series is based on Weiyi's patches. https://patchwork.kernel.org/project/linux-mediatek/patch/1608642587-15634-7-git-send-email-weiyi...@mediatek.com/
[PATCH v7 3/4] spmi: mediatek: Add support for MT6873/8192
Add spmi support for MT6873/8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v6:
- remove unused spinlock.
- remove redundant check for slave id.
---
drivers/spmi/Kconfig | 10 +
drivers/spmi/Makefile| 2 +
drivers/spmi/spmi-mtk-pmif.c | 465 +++
3 files changed, 477 insertions(+)
create mode 100644 drivers/spmi/spmi-mtk-pmif.c
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index a53bad541f1a..692bac98a120 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -25,4 +25,14 @@ config SPMI_MSM_PMIC_ARB
This is required for communicating with Qualcomm PMICs and
other devices that have the SPMI interface.
+config SPMI_MTK_PMIF
+ tristate "Mediatek SPMI Controller (PMIC Arbiter)"
+ help
+ If you say yes to this option, support will be included for the
+ built-in SPMI PMIC Arbiter interface on Mediatek family
+ processors.
+
+ This is required for communicating with Mediatek PMICs and
+ other devices that have the SPMI interface.
+
endif
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 55a94cadeffe..76fb3b3ab510 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,3 +5,5 @@
obj-$(CONFIG_SPMI) += spmi.o
obj-$(CONFIG_SPMI_MSM_PMIC_ARB)+= spmi-pmic-arb.o
+obj-$(CONFIG_SPMI_MTK_PMIF)+= spmi-mtk-pmif.o
+
diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c
new file mode 100644
index ..94c45d46ab0c
--- /dev/null
+++ b/drivers/spmi/spmi-mtk-pmif.c
@@ -0,0 +1,465 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+
+#define SWINF_IDLE 0x00
+#define SWINF_WFVLDCLR 0x06
+
+#define GET_SWINF(x) (((x) >> 1) & 0x7)
+
+#define PMIF_CMD_REG_0 0
+#define PMIF_CMD_REG 1
+#define PMIF_CMD_EXT_REG 2
+#define PMIF_CMD_EXT_REG_LONG 3
+
+#define PMIF_DELAY_US 10
+#define PMIF_TIMEOUT_US (10 * 1000)
+
+#define PMIF_CHAN_OFFSET 0x5
+
+#define PMIF_MAX_CLKS 3
+
+#define SPMI_OP_ST_BUSY 1
+
+struct ch_reg {
+ u32 ch_sta;
+ u32 wdata;
+ u32 rdata;
+ u32 ch_send;
+ u32 ch_rdy;
+};
+
+struct pmif_data {
+ const u32 *regs;
+ const u32 *spmimst_regs;
+ u32 soc_chan;
+};
+
+struct pmif {
+ void __iomem*base;
+ void __iomem*spmimst_base;
+ struct ch_reg chan;
+ struct clk_bulk_data clks[PMIF_MAX_CLKS];
+ u32 nclks;
+ const struct pmif_data *data;
+};
+
+static const char * const pmif_clock_names[] = {
+ "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux",
+};
+
+enum pmif_regs {
+ PMIF_INIT_DONE,
+ PMIF_INF_EN,
+ PMIF_ARB_EN,
+ PMIF_CMDISSUE_EN,
+ PMIF_TIMER_CTRL,
+ PMIF_SPI_MODE_CTRL,
+ PMIF_IRQ_EVENT_EN_0,
+ PMIF_IRQ_FLAG_0,
+ PMIF_IRQ_CLR_0,
+ PMIF_IRQ_EVENT_EN_1,
+ PMIF_IRQ_FLAG_1,
+ PMIF_IRQ_CLR_1,
+ PMIF_IRQ_EVENT_EN_2,
+ PMIF_IRQ_FLAG_2,
+ PMIF_IRQ_CLR_2,
+ PMIF_IRQ_EVENT_EN_3,
+ PMIF_IRQ_FLAG_3,
+ PMIF_IRQ_CLR_3,
+ PMIF_IRQ_EVENT_EN_4,
+ PMIF_IRQ_FLAG_4,
+ PMIF_IRQ_CLR_4,
+ PMIF_WDT_EVENT_EN_0,
+ PMIF_WDT_FLAG_0,
+ PMIF_WDT_EVENT_EN_1,
+ PMIF_WDT_FLAG_1,
+ PMIF_SWINF_0_STA,
+ PMIF_SWINF_0_WDATA_31_0,
+ PMIF_SWINF_0_RDATA_31_0,
+ PMIF_SWINF_0_ACC,
+ PMIF_SWINF_0_VLD_CLR,
+ PMIF_SWINF_1_STA,
+ PMIF_SWINF_1_WDATA_31_0,
+ PMIF_SWINF_1_RDATA_31_0,
+ PMIF_SWINF_1_ACC,
+ PMIF_SWINF_1_VLD_CLR,
+ PMIF_SWINF_2_STA,
+ PMIF_SWINF_2_WDATA_31_0,
+ PMIF_SWINF_2_RDATA_31_0,
+ PMIF_SWINF_2_ACC,
+ PMIF_SWINF_2_VLD_CLR,
+ PMIF_SWINF_3_STA,
+ PMIF_SWINF_3_WDATA_31_0,
+ PMIF_SWINF_3_RDATA_31_0,
+ PMIF_SWINF_3_ACC,
+ PMIF_SWINF_3_VLD_CLR,
+};
+
+static const u32 mt6873_regs[] = {
+ [PMIF_INIT_DONE] = 0x,
+ [PMIF_INF_EN] = 0x0024,
+ [PMIF_ARB_EN] = 0x0150,
+ [PMIF_CMDISSUE_EN] =0x03B4,
+ [PMIF_TIMER_CTRL] = 0x03E0,
+ [PMIF_SPI_MODE_CTRL] = 0x0400,
+ [PMIF_IRQ_EVENT_EN_0] = 0x0418,
+ [PMIF_IRQ_FLAG_0] = 0x0420,
+ [PMIF_IRQ_CLR_0] = 0x0424,
+ [PMIF_IRQ_EVENT_EN_1] = 0x0428,
+ [PMIF_IRQ_FLAG_1] = 0x0430,
+ [PMIF_IRQ_CLR_1] = 0x0434,
+ [PMIF_IRQ_EVENT_EN_2] = 0x0438,
+ [PMIF_IRQ_FLAG_2] = 0x0440,
+ [PMIF_IRQ_CLR_2] = 0x0444,
+ [PMIF_IRQ_EVENT_EN_3] = 0x0448,
+ [PMIF_IRQ_FLAG_3] = 0x0450,
+ [PMIF_IRQ_CLR_3] = 0x0454,
+ [PMIF_IRQ_EVENT_EN_4] = 0x0458,
+ [PMIF_IRQ_FLAG_4] = 0x0460,
+ [PMIF_IRQ_CLR_4] = 0x0464,
+ [PMIF_WDT_EVENT_EN_0] = 0x046C,
+ [PMIF_WDT_FLAG_0] =
[PATCH v7 4/4] arm64: dts: mt8192: add spmi node
Add spmi node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v6:
- no changes.
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd..9ceed617cd6d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -291,6 +291,23 @@
clock-names = "clk13m";
};
+ spmi: spmi@10027000 {
+ compatible = "mediatek,mt6873-spmi";
+ reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = < CLK_INFRA_PMIC_AP>,
+< CLK_INFRA_PMIC_TMR>,
+< CLK_TOP_SPMI_MST_SEL>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = < CLK_TOP_OSC_D10>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8192-uart",
"mediatek,mt6577-uart";
--
2.18.0
[PATCH v7 0/4] Add SPMI support for Mediatek MT6873/8192 SoC IC
This series adds support for new SoC MT6873/8192 to the spmi driver. This series is based on Weiyi's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1608642587-15634-7-git-send-email-weiyi...@mediatek.com/ changes since v6: - rebase to Linux 5.12. - refnie mtk-pmif spmi driver for batter code. Hsin-Hsiung Wang (4): dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems' dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 arm64: dts: mt8192: add spmi node .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++ .../devicetree/bindings/spmi/spmi.yaml| 2 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 17 + drivers/spmi/Kconfig | 10 + drivers/spmi/Makefile | 2 + drivers/spmi/spmi-mtk-pmif.c | 465 ++ 6 files changed, 569 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0
[PATCH v7 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller
This adds documentation for the SPMI controller found on Mediatek SoCs.
Signed-off-by: Hsin-Hsiung Wang
Reviewed-by: Rob Herring
---
changes since v6:
- no changes.
---
.../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++
1 file changed, 74 insertions(+)
create mode 100644
Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
new file mode 100644
index ..a43b0302d503
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek SPMI Controller Device Tree Bindings
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |+
+ On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
+ for multiple SoCs to control a single SPMI master.
+
+allOf:
+ - $ref: "spmi.yaml"
+
+properties:
+ compatible:
+const: mediatek,mt6873-spmi
+
+ reg:
+maxItems: 2
+
+ reg-names:
+items:
+ - const: pmif
+ - const: spmimst
+
+ clocks:
+minItems: 3
+maxItems: 3
+
+ clock-names:
+items:
+ - const: pmif_sys_ck
+ - const: pmif_tmr_ck
+ - const: spmimst_clk_mux
+
+ assigned-clocks:
+maxItems: 1
+
+ assigned-clock-parents:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+spmi: spmi@10027000 {
+compatible = "mediatek,mt6873-spmi";
+reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+reg-names = "pmif", "spmimst";
+clocks = < CLK_INFRA_PMIC_AP>,
+ < CLK_INFRA_PMIC_TMR>,
+ < CLK_TOP_SPMI_MST_SEL>;
+clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+assigned-clock-parents = < CLK_TOP_OSC_D10>;
+};
+...
--
2.18.0
[PATCH v7 1/4] dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems'
The constraint of 'maxItem: 1' might be larger than 1, so we modify it to 'minItem: 1'. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- changes since v6: - no change. --- Documentation/devicetree/bindings/spmi/spmi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 173940930719..12dbf6567d16 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -25,7 +25,7 @@ properties: pattern: "^spmi@.*" reg: -maxItems: 1 +minItems: 1 "#address-cells": const: 2 -- 2.18.0
Re: [PATCH v6 3/4] spmi: mediatek: Add support for MT6873/8192
Hi,
On Mon, 2021-02-08 at 14:21 -0800, Stephen Boyd wrote:
> Quoting Hsin-Hsiung Wang (2021-02-06 21:19:13)
> > diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
> > index a53bad541f1a..418848840999 100644
> > --- a/drivers/spmi/Kconfig
> > +++ b/drivers/spmi/Kconfig
> > @@ -25,4 +25,13 @@ config SPMI_MSM_PMIC_ARB
> > This is required for communicating with Qualcomm PMICs and
> > other devices that have the SPMI interface.
> >
> > +config SPMI_MTK_PMIF
> > + tristate "Mediatek SPMI Controller (PMIC Arbiter)"
> > + help
> > + If you say yes to this option, support will be included for the
> > + built-in SPMI PMIC Arbiter interface on Mediatek family
> > + processors.
> > +
> > + This is required for communicating with Mediatek PMICs and
> > + other devices that have the SPMI interface.
>
> Preferably add another newline here to unstick the 'endif'
>
Thanks. I will update it in the next patch.
> > endif
> > diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c
> > new file mode 100644
> > index ..4ac4643f89f3
> > --- /dev/null
> > +++ b/drivers/spmi/spmi-mtk-pmif.c
> > @@ -0,0 +1,488 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +//
> > +// Copyright (c) 2021 MediaTek Inc.
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define SWINF_IDLE 0x00
> > +#define SWINF_WFVLDCLR 0x06
> > +
> > +#define GET_SWINF(x) (((x) >> 1) & 0x7)
> > +
> > +#define PMIF_CMD_REG_0 0
> > +#define PMIF_CMD_REG 1
> > +#define PMIF_CMD_EXT_REG 2
> > +#define PMIF_CMD_EXT_REG_LONG 3
> > +
> > +#define PMIF_DELAY_US 10
> > +#define PMIF_TIMEOUT_US (10 * 1000)
> > +
> > +#define PMIF_CHAN_OFFSET 0x5
> > +
> > +#define PMIF_MAX_CLKS 3
> > +
> > +#define SPMI_OP_ST_BUSY 1
> > +
> > +struct ch_reg {
> > + u32 ch_sta;
> > + u32 wdata;
> > + u32 rdata;
> > + u32 ch_send;
> > + u32 ch_rdy;
> > +};
> > +
> > +struct pmif_data {
> > + const u32 *regs;
> > + const u32 *spmimst_regs;
> > + u32 soc_chan;
>
> Is this used?
>
Yes.
> > +};
> > +
> > +struct pmif {
> > + void __iomem*base;
> > + void __iomem*spmimst_base;
> > + raw_spinlock_t lock;
>
> Why is the spinlock raw? Is it used in hard irq handling?
>
Thanks for the comment. After reviewing the code, I will remove it and
update it in the next patch.
> > + struct ch_reg chan;
> > + struct clk_bulk_data clks[PMIF_MAX_CLKS];
> > + u32 nclks;
> > + const struct pmif_data *data;
> > +};
> > +
> > +static const char * const pmif_clock_names[] = {
> > + "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux",
> > +};
> > +
> > +enum pmif_regs {
> > + PMIF_INIT_DONE,
> > + PMIF_INF_EN,
> > + PMIF_ARB_EN,
> > + PMIF_CMDISSUE_EN,
> > + PMIF_TIMER_CTRL,
> > + PMIF_SPI_MODE_CTRL,
> > + PMIF_IRQ_EVENT_EN_0,
> > + PMIF_IRQ_FLAG_0,
> > + PMIF_IRQ_CLR_0,
> > + PMIF_IRQ_EVENT_EN_1,
> > + PMIF_IRQ_FLAG_1,
> > + PMIF_IRQ_CLR_1,
> > + PMIF_IRQ_EVENT_EN_2,
> > + PMIF_IRQ_FLAG_2,
> > + PMIF_IRQ_CLR_2,
> > + PMIF_IRQ_EVENT_EN_3,
> > + PMIF_IRQ_FLAG_3,
> > + PMIF_IRQ_CLR_3,
> > + PMIF_IRQ_EVENT_EN_4,
> > + PMIF_IRQ_FLAG_4,
> > + PMIF_IRQ_CLR_4,
> > + PMIF_WDT_EVENT_EN_0,
> > + PMIF_WDT_FLAG_0,
> > + PMIF_WDT_EVENT_EN_1,
> > + PMIF_WDT_FLAG_1,
> > + PMIF_SWINF_0_STA,
> > + PMIF_SWINF_0_WDATA_31_0,
> > + PMIF_SWINF_0_RDATA_31_0,
> > + PMIF_SWINF_0_ACC,
> > + PMIF_SWINF_0_VLD_CLR,
> > + PMIF_SWINF_1_STA,
> > + PMIF_SWINF_1_WDATA_31_0,
> > + PMIF_SWINF_1_RDATA_31_0,
> > + PMIF_SWINF_1_ACC,
> > + PMIF_SWINF_1_VLD_CLR,
> > + PMIF_SWINF_2_STA,
> > + PMIF_SWINF_2_WDATA_31_0,
> > + PMIF_SWINF_2_RDATA_31_0,
> > + PMIF_SWINF_2_ACC,
> > + PMIF_SWINF_2_VLD_CLR,
> > + PMIF_SWINF_3_STA,
> > + PMIF_SWINF_3_WDATA_31_0,
> > + PMIF_SWINF_3_RD
Re: [PATCH RESEND v5 7/8] regulator: mt6359: Add support for MT6359P regulator
On Mon, 2021-03-01 at 10:21 +, Lee Jones wrote: > On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote: > > > The MT6359P is a eco version for MT6359 regulator. > > We add support based on MT6359 regulator driver. > > > > Signed-off-by: Hsin-Hsiung Wang > > --- > > changes since v4: > > - add the regulators_node support. > > --- > > drivers/regulator/mt6359-regulator.c | 379 - > > > include/linux/mfd/mt6359p/registers.h | 249 ++ > > Although the code is fine, just be aware that Linus can get grumpy > having 100s and 100s of unused register defines in the kernel. > Thanks for the comment. We will mull it over. > > include/linux/regulator/mt6359-regulator.h | 1 + > > 3 files changed, 623 insertions(+), 6 deletions(-) > > create mode 100644 include/linux/mfd/mt6359p/registers.h >
Re: [PATCH RESEND v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC
Hi,
On Mon, 2021-03-01 at 10:20 +, Lee Jones wrote:
> On Fri, 29 Jan 2021, Hsin-Hsiung Wang wrote:
>
> > This adds support for the MediaTek MT6359 PMIC. This is a
> > multifunction device with the following sub modules:
> >
> > - Codec
> > - Interrupt
> > - Regulator
> > - RTC
> >
> > It is interfaced to the host controller using SPI interface
> > by a proprietary hardware called PMIC wrapper or pwrap.
> > MT6359 MFD is a child device of the pwrap.
> >
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
> > changes since v4:
> > - remove unused compatible name in the mt6359 mfd cells.
> > ---
> > drivers/mfd/mt6358-irq.c | 24 ++
> > drivers/mfd/mt6397-core.c| 26 ++
> > include/linux/mfd/mt6359/core.h | 133 +++
> > include/linux/mfd/mt6359/registers.h | 529 +++
> > include/linux/mfd/mt6397/core.h | 1 +
> > 5 files changed, 713 insertions(+)
> > create mode 100644 include/linux/mfd/mt6359/core.h
> > create mode 100644 include/linux/mfd/mt6359/registers.h
> >
> > diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
> > index 4b094e5e51cc..83f3ffbdbb4c 100644
> > --- a/drivers/mfd/mt6358-irq.c
> > +++ b/drivers/mfd/mt6358-irq.c
> > @@ -5,6 +5,8 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > #include
> > #include
> > #include
> > @@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
> > MT6358_TOP_GEN(MISC),
> > };
> >
> > +static const struct irq_top_t mt6359_ints[] = {
> > + MT6359_TOP_GEN(BUCK),
> > + MT6359_TOP_GEN(LDO),
> > + MT6359_TOP_GEN(PSC),
> > + MT6359_TOP_GEN(SCK),
> > + MT6359_TOP_GEN(BM),
> > + MT6359_TOP_GEN(HK),
> > + MT6359_TOP_GEN(AUD),
> > + MT6359_TOP_GEN(MISC),
> > +};
> > +
> > static struct pmic_irq_data mt6358_irqd = {
> > .num_top = ARRAY_SIZE(mt6358_ints),
> > .num_pmic_irqs = MT6358_IRQ_NR,
> > @@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
> > .pmic_ints = mt6358_ints,
> > };
> >
> > +static struct pmic_irq_data mt6359_irqd = {
> > + .num_top = ARRAY_SIZE(mt6359_ints),
> > + .num_pmic_irqs = MT6359_IRQ_NR,
> > + .top_int_status_reg = MT6359_TOP_INT_STATUS0,
> > + .pmic_ints = mt6359_ints,
> > +};
> > +
> > static void pmic_irq_enable(struct irq_data *data)
> > {
> > unsigned int hwirq = irqd_to_hwirq(data);
> > @@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
> > chip->irq_data = _irqd;
> > break;
> >
> > + case MT6359_CHIP_ID:
> > + chip->irq_data = _irqd;
> > + break;
> > +
> > default:
> > dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
> > return -ENODEV;
> > diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
> > index 7518d74c3b4c..617e4e4d5de0 100644
> > --- a/drivers/mfd/mt6397-core.c
> > +++ b/drivers/mfd/mt6397-core.c
> > @@ -13,9 +13,11 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > +#include
> > #include
> >
> > #define MT6323_RTC_BASE0x8000
> > @@ -99,6 +101,19 @@ static const struct mfd_cell mt6358_devs[] = {
> > },
> > };
> >
> > +static const struct mfd_cell mt6359_devs[] = {
> > + {
> > + .name = "mt6359-regulator",
> > + }, {
> > + .name = "mt6359-rtc",
> > + .num_resources = ARRAY_SIZE(mt6358_rtc_resources),
> > + .resources = mt6358_rtc_resources,
> > + .of_compatible = "mediatek,mt6358-rtc",
> > + }, {
> > + .name = "mt6359-sound",
> > + },
> > +};
>
> Nit: Please put the single-line entries on one line.
>
> Like this:
>
> { .name = "mt6359-sound" },
>
Thanks for the comment. I will update it in the next patch.
> > static const struct mfd_cell mt6397_devs[] = {
> > {
> > .name = "mt6397-rtc",
> > @@ -149,6 +164,14 @@ static const struct chip_data mt6358_core = {
> > .irq_init = mt6358_irq_init,
> > };
> >
> > +static const struct chip_data mt6359_core = {
> > + .cid_addr = MT6359_SWCID,
> > + .cid_sh
[PATCH v6 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- no change.
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index a75019fa02dc..e4de75f35c33 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] =0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] =0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] =0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] =0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1511,6 +1523,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1947,6 +1960,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2024,6 +2050,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
}, {
.compatible = "mediatek,mt6797-pwrap",
.data = _mt6797,
+ }, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = _mt6873,
}, {
.compatible = "mediatek,mt7622-pwrap",
.data = _mt7622,
--
2.18.0
[PATCH v6 2/5] soc: mediatek: pwrap: add arbiter capability
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- no change.
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 64 ++--
1 file changed, 51 insertions(+), 13 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205ad11f..a75019fa02dc 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
/* macro for wrapper status */
#define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x)
+#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x0007)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x0007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x0001)
#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
#define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE0x00
@@ -74,6 +76,7 @@
#define PWRAP_CAP_DCM BIT(2)
#define PWRAP_CAP_INT1_EN BIT(3)
#define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB BIT(5)
/* defines for slave device wrapper registers */
enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+ PWRAP_SWINF_2_WDATA_31_0,
+ PWRAP_SWINF_2_RDATA_31_0,
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1106,18 +,25 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32
val, enum pwrap_regs reg)
writel(val, wrp->base + wrp->master->regs[reg]);
}
-static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
+static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
- return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val);
+ else
+ return PWRAP_GET_WACS_FSM(val);
}
-static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
+static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_IDLE;
+}
- return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
+static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
+{
+ return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_WFVLDCLR;
}
/*
@@ -1165,6 +1177,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
int ret;
+ u32 val;
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
if (ret) {
@@ -1172,13 +1185,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32
adr, u32 *rdata)
return ret;
}
- pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = adr;
+ else
+ val = (adr >> 1) << 16;
+ pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
- *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+ else
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ *rdata = PWRAP_GET_WACS_RDATA(val);
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
@@ -1228,8 +1249,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32
adr, u32 wdata)
return ret;
}
- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
-PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+ pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+ pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+ } else {
+ pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+PWRAP_WACS2_CMD);
+ }
return 0;
}
@@ -2022,6 +2048,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
static int pwrap_probe(struct platform_device *pdev)
{
int ret, irq;
+ u32 mask_done;
struct pmic_wrapper *wrp;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_slave_id = NULL;
@@ -21
[PATCH v6 5/5] arm64: dts: mt8192: add pwrap node
Add pwrap node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- no change.
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 9757138a8bbd..fcd6b899d7f9 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -291,6 +291,18 @@
clock-names = "clk13m";
};
+ pwrap: pwrap@10026000 {
+ compatible = "mediatek,mt6873-pwrap";
+ reg = <0 0x10026000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = ;
+ clocks = < CLK_INFRA_PMIC_AP>,
+< CLK_INFRA_PMIC_TMR>;
+ clock-names = "spi", "wrap";
+ assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = < CLK_TOP_OSC_D10>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8192-uart",
"mediatek,mt6577-uart";
--
2.18.0
[PATCH v6 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC
This series adds support for new SoC MT6873/8192 to the pmic-wrap driver. This series is based on Weiyi's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1608642587-15634-7-git-send-email-weiyi...@mediatek.com/ changes since v5: - rebase to Linux 5.12 Hsin-Hsiung Wang (5): soc: mediatek: pwrap: use BIT() macro soc: mediatek: pwrap: add arbiter capability dt-bindings: mediatek: add compatible for MT6873/8192 pwrap soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs arm64: dts: mt8192: add pwrap node .../bindings/soc/mediatek/pwrap.txt | 1 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++ drivers/soc/mediatek/mtk-pmic-wrap.c | 97 --- 3 files changed, 95 insertions(+), 15 deletions(-) -- 2.18.0
[PATCH v6 1/5] soc: mediatek: pwrap: use BIT() macro
Use a better BIT() marco for the bit definition. No functional changes, cleanup only. Signed-off-by: Hsin-Hsiung Wang Reviewed-by: Nicolas Boichat --- changes since v5: - no change. --- drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 5d34e8b9c988..c897205ad11f 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -27,8 +27,8 @@ #define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x) #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x0007) #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x0001) -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20) -#define PWRAP_STATE_INIT_DONE0 (1 << 21) +#define PWRAP_STATE_SYNC_IDLE0 BIT(20) +#define PWRAP_STATE_INIT_DONE0 BIT(21) /* macro for WACS FSM */ #define PWRAP_WACS_FSM_IDLE0x00 -- 2.18.0
[PATCH v6 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192 SoCs Platform. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- changes since v5: - no change. --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index ecac2bbeae45..8051c17e640e 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -22,6 +22,7 @@ Required properties in pwrap device node. "mediatek,mt6765-pwrap" for MT6765 SoCs "mediatek,mt6779-pwrap" for MT6779 SoCs "mediatek,mt6797-pwrap" for MT6797 SoCs + "mediatek,mt6873-pwrap" for MT6873/8192 SoCs "mediatek,mt7622-pwrap" for MT7622 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs -- 2.18.0
[PATCH v4 3/3] arm64: dts: mt8192: add mt6315 regulator nodes
Add MT6315 regulator nodes to MT8192 evaluation board.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v3:
- update the dts node.
---
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 46 +
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
index 0205837fa698..83f26cd5f693 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
@@ -24,6 +24,52 @@
};
};
+ {
+ grpid = <11>;
+ mt6315_6: pmic@6 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x6 0>;
+
+ regulators {
+ mt6315_6_vbuck1: vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-name = "Vbcpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ regulator-always-on;
+ };
+
+ mt6315_6_vbuck3: vbuck3 {
+ regulator-compatible = "vbuck3";
+ regulator-name = "Vlcpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ regulator-always-on;
+ };
+ };
+ };
+
+ mt6315_7: pmic@7 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x7 0>;
+
+ regulators {
+ mt6315_7_vbuck1: vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-name = "Vgpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ };
+ };
+ };
+};
+
{
status = "okay";
};
--
2.18.0
[PATCH v4 0/3] Add support for MT6315 regulator
This patch series adds support for MediaTek PMIC MT6315 regulator driver, which adds MT6315 related buck voltage data to the driver. This series is based on below patch[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=429385 changes since v3: - fix the error of binding document. - refine the mt6315 regulator for better code quality. - update mt6315 regulator node in the mt8192-evb.dts. Hsin-Hsiung Wang (3): dt-bindings: regulator: document binding for MT6315 regulator regulator: mt6315: Add support for MT6315 regulator arm64: dts: mt8192: add mt6315 regulator nodes .../bindings/regulator/mt6315-regulator.yaml | 69 arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 46 +++ drivers/regulator/Kconfig | 10 + drivers/regulator/Makefile| 1 + drivers/regulator/mt6315-regulator.c | 299 ++ include/linux/regulator/mt6315-regulator.h| 44 +++ 6 files changed, 469 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml create mode 100644 drivers/regulator/mt6315-regulator.c create mode 100644 include/linux/regulator/mt6315-regulator.h -- 2.18.0
[PATCH v4 2/3] regulator: mt6315: Add support for MT6315 regulator
The MT6315 is a regulator found on boards based on MediaTek MT8192 and
probably other SoCs. It connects as a slave to SoC using SPMI.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v3:
- refine the mt6315 regulator for better code quality.
- remove unused registers.
---
drivers/regulator/Kconfig | 10 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6315-regulator.c | 299 +
include/linux/regulator/mt6315-regulator.h | 44 +++
4 files changed, 354 insertions(+)
create mode 100644 drivers/regulator/mt6315-regulator.c
create mode 100644 include/linux/regulator/mt6315-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 53fa84f4d1e1..0787a5cd64e2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -732,6 +732,16 @@ config REGULATOR_MT6311
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6315
+ tristate "MediaTek MT6315 PMIC"
+ depends on SPMI
+ select REGMAP_SPMI
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6315 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6323
tristate "MediaTek MT6323 PMIC"
depends on MFD_MT6397
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 680e539f6579..c50797e5f1f8 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_REGULATOR_MP8859) += mp8859.o
obj-$(CONFIG_REGULATOR_MP886X) += mp886x.o
obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
+obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
diff --git a/drivers/regulator/mt6315-regulator.c
b/drivers/regulator/mt6315-regulator.c
new file mode 100644
index ..d49a1534d8e9
--- /dev/null
+++ b/drivers/regulator/mt6315-regulator.c
@@ -0,0 +1,299 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6315_BUCK_MODE_AUTO 0
+#define MT6315_BUCK_MODE_FORCE_PWM 1
+#define MT6315_BUCK_MODE_LP2
+
+struct mt6315_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+struct mt_regulator_init_data {
+ u32 modeset_mask[MT6315_VBUCK_MAX];
+};
+
+struct mt6315_chip {
+ struct device *dev;
+ struct regmap *regmap;
+};
+
+#define MT_BUCK(_name, _bid, _vsel)\
+[_bid] = { \
+ .desc = { \
+ .name = _name, \
+ .of_match = of_match_ptr(_name),\
+ .regulators_node = "regulators",\
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = _bid, \
+ .owner = THIS_MODULE, \
+ .n_voltages = 0xbf, \
+ .linear_ranges = mt_volt_range1,\
+ .n_linear_ranges = ARRAY_SIZE(mt_volt_range1), \
+ .vsel_reg = _vsel, \
+ .vsel_mask = 0xff, \
+ .enable_reg = MT6315_BUCK_TOP_CON0, \
+ .enable_mask = BIT(_bid), \
+ .of_map_mode = mt6315_map_mode, \
+ }, \
+ .status_reg = _bid##_DBG4, \
+ .lp_mode_mask = BIT(_bid), \
+ .lp_mode_shift = _bid, \
+}
+
+static const struct linear_range mt_volt_range1[] = {
+ REGULATOR_LINEAR_RANGE(0, 0, 0xbf, 6250),
+};
+
+static unsigned int mt6315_map_mode(u32 mode)
+{
+ switch (mode) {
+ case MT6315_BUCK_MODE_AUTO:
+ return REGULATOR_MODE_NORMAL;
+ case MT6315_BUCK_MODE_FORCE_PWM:
+ return REGULATOR_MODE_FAST;
+ case MT6315_BUCK_MODE_LP:
+ return REGULATOR_MODE_IDLE;
+ default:
+ return -EINVAL;
+ }
+}
+
+static unsigned int mt6315_regulator_get_mode(struct regulator_dev *rdev)
+{
+ struct mt_regulator_init_data *init = rdev_get_drvda
[PATCH v4 1/3] dt-bindings: regulator: document binding for MT6315 regulator
Add device tree binding information for MT6315 regulator driver.
Example bindings for MT6315 are added.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v3:
- correct the yaml file name.
- remove unused description.
- update the example.
---
.../bindings/regulator/mt6315-regulator.yaml | 69 +++
1 file changed, 69 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
new file mode 100644
index ..61dd5af80db6
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6315-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT6315 Regulator
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ The MT6315 is a power management IC (PMIC) configurable with SPMI.
+ that contains 4 BUCKs output which can combine with each other
+ by different efuse settings.
+
+properties:
+ compatible:
+const: mediatek,mt6315-regulator
+
+ reg:
+maxItems: 1
+
+ regulators:
+type: object
+description: List of regulators and its properties
+
+patternProperties:
+ "^vbuck[1-4]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vbuck[1-4]$"
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - regulators
+
+additionalProperties: false
+
+examples:
+ - |
+pmic@6 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x6 0>;
+
+ regulators {
+vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+};
+
+vbuck3 {
+ regulator-compatible = "vbuck3";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+};
+ };
+};
--
2.18.0
[PATCH v6 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller
This adds documentation for the SPMI controller found on Mediatek SoCs.
Signed-off-by: Hsin-Hsiung Wang
Reviewed-by: Rob Herring
---
changes since v5: no changes
---
.../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++
1 file changed, 74 insertions(+)
create mode 100644
Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
new file mode 100644
index ..a43b0302d503
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek SPMI Controller Device Tree Bindings
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |+
+ On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
+ for multiple SoCs to control a single SPMI master.
+
+allOf:
+ - $ref: "spmi.yaml"
+
+properties:
+ compatible:
+const: mediatek,mt6873-spmi
+
+ reg:
+maxItems: 2
+
+ reg-names:
+items:
+ - const: pmif
+ - const: spmimst
+
+ clocks:
+minItems: 3
+maxItems: 3
+
+ clock-names:
+items:
+ - const: pmif_sys_ck
+ - const: pmif_tmr_ck
+ - const: spmimst_clk_mux
+
+ assigned-clocks:
+maxItems: 1
+
+ assigned-clock-parents:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+spmi: spmi@10027000 {
+compatible = "mediatek,mt6873-spmi";
+reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+reg-names = "pmif", "spmimst";
+clocks = < CLK_INFRA_PMIC_AP>,
+ < CLK_INFRA_PMIC_TMR>,
+ < CLK_TOP_SPMI_MST_SEL>;
+clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+assigned-clock-parents = < CLK_TOP_OSC_D10>;
+};
+...
--
2.18.0
[PATCH v6 3/4] spmi: mediatek: Add support for MT6873/8192
Add spmi support for MT6873/8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- add a newline at end of Makefile.
- refine the spmi-mtk-pmif driver for better code quality.
---
drivers/spmi/Kconfig | 9 +
drivers/spmi/Makefile| 2 +
drivers/spmi/spmi-mtk-pmif.c | 488 +++
3 files changed, 499 insertions(+)
create mode 100644 drivers/spmi/spmi-mtk-pmif.c
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index a53bad541f1a..418848840999 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -25,4 +25,13 @@ config SPMI_MSM_PMIC_ARB
This is required for communicating with Qualcomm PMICs and
other devices that have the SPMI interface.
+config SPMI_MTK_PMIF
+ tristate "Mediatek SPMI Controller (PMIC Arbiter)"
+ help
+ If you say yes to this option, support will be included for the
+ built-in SPMI PMIC Arbiter interface on Mediatek family
+ processors.
+
+ This is required for communicating with Mediatek PMICs and
+ other devices that have the SPMI interface.
endif
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 55a94cadeffe..76fb3b3ab510 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,3 +5,5 @@
obj-$(CONFIG_SPMI) += spmi.o
obj-$(CONFIG_SPMI_MSM_PMIC_ARB)+= spmi-pmic-arb.o
+obj-$(CONFIG_SPMI_MTK_PMIF)+= spmi-mtk-pmif.o
+
diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c
new file mode 100644
index ..4ac4643f89f3
--- /dev/null
+++ b/drivers/spmi/spmi-mtk-pmif.c
@@ -0,0 +1,488 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+
+#define SWINF_IDLE 0x00
+#define SWINF_WFVLDCLR 0x06
+
+#define GET_SWINF(x) (((x) >> 1) & 0x7)
+
+#define PMIF_CMD_REG_0 0
+#define PMIF_CMD_REG 1
+#define PMIF_CMD_EXT_REG 2
+#define PMIF_CMD_EXT_REG_LONG 3
+
+#define PMIF_DELAY_US 10
+#define PMIF_TIMEOUT_US (10 * 1000)
+
+#define PMIF_CHAN_OFFSET 0x5
+
+#define PMIF_MAX_CLKS 3
+
+#define SPMI_OP_ST_BUSY 1
+
+struct ch_reg {
+ u32 ch_sta;
+ u32 wdata;
+ u32 rdata;
+ u32 ch_send;
+ u32 ch_rdy;
+};
+
+struct pmif_data {
+ const u32 *regs;
+ const u32 *spmimst_regs;
+ u32 soc_chan;
+};
+
+struct pmif {
+ void __iomem*base;
+ void __iomem*spmimst_base;
+ raw_spinlock_t lock;
+ struct ch_reg chan;
+ struct clk_bulk_data clks[PMIF_MAX_CLKS];
+ u32 nclks;
+ const struct pmif_data *data;
+};
+
+static const char * const pmif_clock_names[] = {
+ "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux",
+};
+
+enum pmif_regs {
+ PMIF_INIT_DONE,
+ PMIF_INF_EN,
+ PMIF_ARB_EN,
+ PMIF_CMDISSUE_EN,
+ PMIF_TIMER_CTRL,
+ PMIF_SPI_MODE_CTRL,
+ PMIF_IRQ_EVENT_EN_0,
+ PMIF_IRQ_FLAG_0,
+ PMIF_IRQ_CLR_0,
+ PMIF_IRQ_EVENT_EN_1,
+ PMIF_IRQ_FLAG_1,
+ PMIF_IRQ_CLR_1,
+ PMIF_IRQ_EVENT_EN_2,
+ PMIF_IRQ_FLAG_2,
+ PMIF_IRQ_CLR_2,
+ PMIF_IRQ_EVENT_EN_3,
+ PMIF_IRQ_FLAG_3,
+ PMIF_IRQ_CLR_3,
+ PMIF_IRQ_EVENT_EN_4,
+ PMIF_IRQ_FLAG_4,
+ PMIF_IRQ_CLR_4,
+ PMIF_WDT_EVENT_EN_0,
+ PMIF_WDT_FLAG_0,
+ PMIF_WDT_EVENT_EN_1,
+ PMIF_WDT_FLAG_1,
+ PMIF_SWINF_0_STA,
+ PMIF_SWINF_0_WDATA_31_0,
+ PMIF_SWINF_0_RDATA_31_0,
+ PMIF_SWINF_0_ACC,
+ PMIF_SWINF_0_VLD_CLR,
+ PMIF_SWINF_1_STA,
+ PMIF_SWINF_1_WDATA_31_0,
+ PMIF_SWINF_1_RDATA_31_0,
+ PMIF_SWINF_1_ACC,
+ PMIF_SWINF_1_VLD_CLR,
+ PMIF_SWINF_2_STA,
+ PMIF_SWINF_2_WDATA_31_0,
+ PMIF_SWINF_2_RDATA_31_0,
+ PMIF_SWINF_2_ACC,
+ PMIF_SWINF_2_VLD_CLR,
+ PMIF_SWINF_3_STA,
+ PMIF_SWINF_3_WDATA_31_0,
+ PMIF_SWINF_3_RDATA_31_0,
+ PMIF_SWINF_3_ACC,
+ PMIF_SWINF_3_VLD_CLR,
+};
+
+static const u32 mt6873_regs[] = {
+ [PMIF_INIT_DONE] = 0x,
+ [PMIF_INF_EN] = 0x0024,
+ [PMIF_ARB_EN] = 0x0150,
+ [PMIF_CMDISSUE_EN] =0x03B4,
+ [PMIF_TIMER_CTRL] = 0x03E0,
+ [PMIF_SPI_MODE_CTRL] = 0x0400,
+ [PMIF_IRQ_EVENT_EN_0] = 0x0418,
+ [PMIF_IRQ_FLAG_0] = 0x0420,
+ [PMIF_IRQ_CLR_0] = 0x0424,
+ [PMIF_IRQ_EVENT_EN_1] = 0x0428,
+ [PMIF_IRQ_FLAG_1] = 0x0430,
+ [PMIF_IRQ_CLR_1] = 0x0434,
+ [PMIF_IRQ_EVENT_EN_2] = 0x0438,
+ [PMIF_IRQ_FLAG_2] = 0x0440,
+ [PMIF_IRQ_CLR_2] = 0x0444,
+ [PMIF_IRQ_EVENT_EN_3] = 0x0448,
+ [PMIF_IRQ_FLAG_3] = 0x0450,
+ [PMIF_IRQ_CLR_3] = 0x0454,
+ [PMIF_IRQ_EVENT_EN_4] = 0x0458,
+ [PMIF_IRQ_FLAG_4] = 0x0460,
+ [PMIF_IRQ_CLR_4] = 0x0464,
+ [PMIF_
[PATCH v6 4/4] arm64: dts: mt8192: add spmi node
Add spmi node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v5:
- fix the build error of MT8192.dtsi.
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index e12e024de122..5e002512441f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -247,6 +247,23 @@
clock-names = "clk13m";
};
+ spmi: spmi@10027000 {
+ compatible = "mediatek,mt6873-spmi";
+ reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = < CLK_INFRA_PMIC_AP>,
+< CLK_INFRA_PMIC_TMR>,
+< CLK_TOP_SPMI_MST_SEL>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = < CLK_TOP_OSC_D10>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8192-uart",
"mediatek,mt6577-uart";
--
2.18.0
[PATCH v6 1/4] dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems'
The constraint of 'maxItem: 1' might be larger than 1, so we modify it to 'minItem: 1'. Signed-off-by: Hsin-Hsiung Wang --- changes since v5: - update the constraint of minItem to 1. --- Documentation/devicetree/bindings/spmi/spmi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 173940930719..12dbf6567d16 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -25,7 +25,7 @@ properties: pattern: "^spmi@.*" reg: -maxItems: 1 +minItems: 1 "#address-cells": const: 2 -- 2.18.0
[PATCH v6 0/4] Add SPMI support for Mediatek MT6873/8192 SoC IC
This series adds support for new SoC MT6873/8192 to the spmi driver. This series is based on Weiyi's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1608642587-15634-7-git-send-email-weiyi...@mediatek.com/ changes since v5: - fix the yaml error. - refine the spmi-mtk-pmif driver for better code quality. - fix the build error about MT8192.dtsi Hsin-Hsiung Wang (4): dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems' dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 arm64: dts: mt8192: add spmi node .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++ .../devicetree/bindings/spmi/spmi.yaml| 2 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 17 + drivers/spmi/Kconfig | 9 + drivers/spmi/Makefile | 2 + drivers/spmi/spmi-mtk-pmif.c | 488 ++ 6 files changed, 591 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0
[PATCH v5 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192 SoCs Platform. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- changes since v4: no changes --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index ecac2bbeae45..8051c17e640e 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -22,6 +22,7 @@ Required properties in pwrap device node. "mediatek,mt6765-pwrap" for MT6765 SoCs "mediatek,mt6779-pwrap" for MT6779 SoCs "mediatek,mt6797-pwrap" for MT6797 SoCs + "mediatek,mt6873-pwrap" for MT6873/8192 SoCs "mediatek,mt7622-pwrap" for MT7622 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs -- 2.18.0
[PATCH v5 5/5] arm64: dts: mt8192: add pwrap node
Add pwrap node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- update correct pwrap node in the Mediatek MT8192 dtsi.
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index e12e024de122..537af653ac54 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -247,6 +247,18 @@
clock-names = "clk13m";
};
+ pwrap: pwrap@10026000 {
+ compatible = "mediatek,mt6873-pwrap";
+ reg = <0 0x10026000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = ;
+ clocks = < CLK_INFRA_PMIC_AP>,
+< CLK_INFRA_PMIC_TMR>;
+ clock-names = "spi", "wrap";
+ assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = < CLK_TOP_OSC_D10>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8192-uart",
"mediatek,mt6577-uart";
--
2.18.0
[PATCH v5 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4: no changes
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index a75019fa02dc..e4de75f35c33 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] =0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] =0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] =0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] =0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1511,6 +1523,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1947,6 +1960,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2024,6 +2050,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
}, {
.compatible = "mediatek,mt6797-pwrap",
.data = _mt6797,
+ }, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = _mt6873,
}, {
.compatible = "mediatek,mt7622-pwrap",
.data = _mt7622,
--
2.18.0
[PATCH v5 2/5] soc: mediatek: pwrap: add arbiter capability
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add pwrap_get_fsm_state() for better code quality.
- refine code about PWRAP_CAP_ARB capacity for better code quality.
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 64 ++--
1 file changed, 51 insertions(+), 13 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205ad11f..a75019fa02dc 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
/* macro for wrapper status */
#define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x)
+#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x0007)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x0007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x0001)
#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
#define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE0x00
@@ -74,6 +76,7 @@
#define PWRAP_CAP_DCM BIT(2)
#define PWRAP_CAP_INT1_EN BIT(3)
#define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB BIT(5)
/* defines for slave device wrapper registers */
enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+ PWRAP_SWINF_2_WDATA_31_0,
+ PWRAP_SWINF_2_RDATA_31_0,
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1106,18 +,25 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32
val, enum pwrap_regs reg)
writel(val, wrp->base + wrp->master->regs[reg]);
}
-static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
+static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
- return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val);
+ else
+ return PWRAP_GET_WACS_FSM(val);
}
-static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
+static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_IDLE;
+}
- return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
+static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
+{
+ return pwrap_get_fsm_state(wrp) == PWRAP_WACS_FSM_WFVLDCLR;
}
/*
@@ -1165,6 +1177,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
int ret;
+ u32 val;
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
if (ret) {
@@ -1172,13 +1185,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32
adr, u32 *rdata)
return ret;
}
- pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = adr;
+ else
+ val = (adr >> 1) << 16;
+ pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
- *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+ else
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ *rdata = PWRAP_GET_WACS_RDATA(val);
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
@@ -1228,8 +1249,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32
adr, u32 wdata)
return ret;
}
- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
-PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+ pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+ pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+ } else {
+ pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+PWRAP_WACS2_CMD);
+ }
return 0;
}
@@ -2022,6 +2048,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
static int pwrap_probe(struct platform_device *pdev)
{
int ret, irq;
+ u32 mask_done;
struct pmic_wrapper *wrp;
struct
[PATCH v5 1/5] soc: mediatek: pwrap: use BIT() macro
Use a better BIT() marco for the bit definition. No functional changes, cleanup only. Signed-off-by: Hsin-Hsiung Wang Reviewed-by: Nicolas Boichat --- changes since v4: no changes --- drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 5d34e8b9c988..c897205ad11f 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -27,8 +27,8 @@ #define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x) #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x0007) #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x0001) -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20) -#define PWRAP_STATE_INIT_DONE0 (1 << 21) +#define PWRAP_STATE_SYNC_IDLE0 BIT(20) +#define PWRAP_STATE_INIT_DONE0 BIT(21) /* macro for WACS FSM */ #define PWRAP_WACS_FSM_IDLE0x00 -- 2.18.0
[PATCH v5 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC
This series adds support for new SoC MT6873/8192 to the pmic-wrap driver. changes since v4: - refine code about PWRAP_CAP_ARB capacity for better code quality. - update correct pwrap node in the Mediatek MT8192 dtsi. Hsin-Hsiung Wang (5): soc: mediatek: pwrap: use BIT() macro soc: mediatek: pwrap: add arbiter capability dt-bindings: mediatek: add compatible for MT6873/8192 pwrap soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs arm64: dts: mt8192: add pwrap node .../bindings/soc/mediatek/pwrap.txt | 1 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++ drivers/soc/mediatek/mtk-pmic-wrap.c | 97 --- 3 files changed, 95 insertions(+), 15 deletions(-) -- 2.18.0
Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
Hi,
On Mon, 2020-12-21 at 10:33 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> wrote:
> >
> > Add arbiter capability for pwrap driver.
> > The arbiter capability uses new design to judge the priority and latency
> > for multi-channel.
> > This patch is preparing for adding mt6873/8192 pwrap support.
> >
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 57
> > ++--
> > 1 file changed, 48 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index c897205..5678f46 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -25,10 +25,12 @@
> >
> > /* macro for wrapper status */
> > #define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x)
> > +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x0007)
> > #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x0007)
> > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x0001)
> > #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> > #define PWRAP_STATE_INIT_DONE0 BIT(21)
> > +#define PWRAP_STATE_INIT_DONE1 BIT(15)
> >
> > /* macro for WACS FSM */
> > #define PWRAP_WACS_FSM_IDLE0x00
> > @@ -74,6 +76,7 @@
> > #define PWRAP_CAP_DCM BIT(2)
> > #define PWRAP_CAP_INT1_EN BIT(3)
> > #define PWRAP_CAP_WDT_SRC1 BIT(4)
> > +#define PWRAP_CAP_ARB BIT(5)
> >
> > /* defines for slave device wrapper registers */
> > enum dew_regs {
> > @@ -340,6 +343,8 @@ enum pwrap_regs {
> > PWRAP_DCM_DBC_PRD,
> > PWRAP_EINT_STA0_ADR,
> > PWRAP_EINT_STA1_ADR,
> > + PWRAP_SWINF_2_WDATA_31_0,
> > + PWRAP_SWINF_2_RDATA_31_0,
> >
> > /* MT2701 only regs */
> > PWRAP_ADC_CMD_ADDR,
> > @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp,
> > u32 val, enum pwrap_regs reg)
> >
> > static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> > }
> >
> > static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) ==
> > PWRAP_WACS_FSM_WFVLDCLR;
>
> This code is now copied twice. Do you think it'd be better to create a
> new function?
>
> static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
>if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> return PWRAP_GET_WACS_ARB_FSM(val);
>else
> return PWRAP_GET_WACS_FSM(val);
> }
>
Thanks for the review. I will update it in the next patch.
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> > }
> > @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper
> > *wrp,
> > static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > {
> > int ret;
> > + u32 val;
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> > if (ret) {
> > @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp,
> > u32 adr, u32 *rdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = adr;
> > + else
> > + val = (adr >> 1) << 16;
> > + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> > if (ret)
> > return ret;
> >
> > - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> > + if (HAS_CAP(wrp->master->caps, PWRA
Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
Hi,
On Mon, 2020-12-21 at 10:42 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> wrote:
> >
> > MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Hsin-Hsiung Wang
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +
> > 1 file changed, 29 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 5678f46..d1cd050 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> > [PWRAP_DCM_DBC_PRD] = 0x1D4,
> > };
> >
> > +static int mt6873_regs[] = {
> > + [PWRAP_INIT_DONE2] =0x0,
>
> I don't have the datasheet for the PWRAP interface, is this register
> at offset 0x0 real?
>
> If so, I'm concerned that mt6873_regs only defines very few registers
> offsets, so the init code will do a _lot_ writes at register address
> 0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
> PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
>
The register for the init_done is 0x0.
However, the pwrap driver of mt6873 only checks this register in the
beginning and wouldn't check it again.
In other words, the register is the first register we check, so I think
there is no problem for it.
> > + [PWRAP_TIMER_EN] = 0x3E0,
> > + [PWRAP_INT_EN] =0x448,
> > + [PWRAP_WACS2_CMD] = 0xC80,
> > + [PWRAP_SWINF_2_WDATA_31_0] =0xC84,
> > + [PWRAP_SWINF_2_RDATA_31_0] =0xC94,
> > + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> > + [PWRAP_WACS2_RDATA] = 0xCA8,
> > +};
> > +
> > static int mt7622_regs[] = {
> > [PWRAP_MUX_SEL] = 0x0,
> > [PWRAP_WRAP_EN] = 0x4,
> > @@ -1050,6 +1061,7 @@ enum pwrap_type {
> > PWRAP_MT6765,
> > PWRAP_MT6779,
> > PWRAP_MT6797,
> > + PWRAP_MT6873,
> > PWRAP_MT7622,
> > PWRAP_MT8135,
> > PWRAP_MT8173,
> > @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> > case PWRAP_MT7622:
> > pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> > break;
> > + case PWRAP_MT6873:
> > case PWRAP_MT8183:
> > break;
> > }
> > @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 =
> > {
> > .init_soc_specific = NULL,
> > };
> >
> > +static const struct pmic_wrapper_type pwrap_mt6873 = {
> > + .regs = mt6873_regs,
> > + .type = PWRAP_MT6873,
> > + .arb_en_all = 0x777f,
> > + .int_en_all = BIT(4) | BIT(5),
> > + .int1_en_all = 0,
> > + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> > + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> > + .caps = PWRAP_CAP_ARB,
> > + .init_reg_clock = pwrap_common_init_reg_clock,
> > + .init_soc_specific = NULL,
> > +};
> > +
> > static const struct pmic_wrapper_type pwrap_mt7622 = {
> > .regs = mt7622_regs,
> > .type = PWRAP_MT7622,
> > @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[]
> > = {
> > .compatible = "mediatek,mt6797-pwrap",
> > .data = _mt6797,
> > }, {
> > + .compatible = "mediatek,mt6873-pwrap",
> > + .data = _mt6873,
> > + }, {
> > .compatible = "mediatek,mt7622-pwrap",
> > .data = _mt7622,
> > }, {
> > --
> > 2.6.4
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
[PATCH RESEND v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang --- changes since v4: - remove unused compatible name. --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..99a84b69a29f 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: -- 2.18.0
[PATCH RESEND v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add pmic MT6359 support in the MT8192 evb dts.
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi| 298
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
2 files changed, 299 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..4bd85e33a4c9
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ };
+
+ mt6359regulator: regulators {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+
[PATCH RESEND v5 6/8] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add enable time of ldo.
- use the device of mfd driver for the regulator_config.
- add the regulators_node support.
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 669 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 737 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 53fa84f4d1e1..3de7bb5be8ac 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -750,6 +750,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 680e539f6579..4f65eaead82d 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..fabc3f57f334
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,669 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+
[PATCH v5 5/8] mfd: Add support for the MediaTek MT6359 PMIC
This adds support for the MediaTek MT6359 PMIC. This is a
multifunction device with the following sub modules:
- Codec
- Interrupt
- Regulator
- RTC
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6359 MFD is a child device of the pwrap.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- remove unused compatible name in the mt6359 mfd cells.
---
drivers/mfd/mt6358-irq.c | 24 ++
drivers/mfd/mt6397-core.c| 26 ++
include/linux/mfd/mt6359/core.h | 133 +++
include/linux/mfd/mt6359/registers.h | 529 +++
include/linux/mfd/mt6397/core.h | 1 +
5 files changed, 713 insertions(+)
create mode 100644 include/linux/mfd/mt6359/core.h
create mode 100644 include/linux/mfd/mt6359/registers.h
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index 4b094e5e51cc..83f3ffbdbb4c 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -5,6 +5,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static const struct irq_top_t mt6359_ints[] = {
+ MT6359_TOP_GEN(BUCK),
+ MT6359_TOP_GEN(LDO),
+ MT6359_TOP_GEN(PSC),
+ MT6359_TOP_GEN(SCK),
+ MT6359_TOP_GEN(BM),
+ MT6359_TOP_GEN(HK),
+ MT6359_TOP_GEN(AUD),
+ MT6359_TOP_GEN(MISC),
+};
+
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
@@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
.pmic_ints = mt6358_ints,
};
+static struct pmic_irq_data mt6359_irqd = {
+ .num_top = ARRAY_SIZE(mt6359_ints),
+ .num_pmic_irqs = MT6359_IRQ_NR,
+ .top_int_status_reg = MT6359_TOP_INT_STATUS0,
+ .pmic_ints = mt6359_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
chip->irq_data = _irqd;
break;
+ case MT6359_CHIP_ID:
+ chip->irq_data = _irqd;
+ break;
+
default:
dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
return -ENODEV;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 7518d74c3b4c..617e4e4d5de0 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -13,9 +13,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#define MT6323_RTC_BASE0x8000
@@ -99,6 +101,19 @@ static const struct mfd_cell mt6358_devs[] = {
},
};
+static const struct mfd_cell mt6359_devs[] = {
+ {
+ .name = "mt6359-regulator",
+ }, {
+ .name = "mt6359-rtc",
+ .num_resources = ARRAY_SIZE(mt6358_rtc_resources),
+ .resources = mt6358_rtc_resources,
+ .of_compatible = "mediatek,mt6358-rtc",
+ }, {
+ .name = "mt6359-sound",
+ },
+};
+
static const struct mfd_cell mt6397_devs[] = {
{
.name = "mt6397-rtc",
@@ -149,6 +164,14 @@ static const struct chip_data mt6358_core = {
.irq_init = mt6358_irq_init,
};
+static const struct chip_data mt6359_core = {
+ .cid_addr = MT6359_SWCID,
+ .cid_shift = 8,
+ .cells = mt6359_devs,
+ .cell_size = ARRAY_SIZE(mt6359_devs),
+ .irq_init = mt6358_irq_init,
+};
+
static const struct chip_data mt6397_core = {
.cid_addr = MT6397_CID,
.cid_shift = 0,
@@ -218,6 +241,9 @@ static const struct of_device_id mt6397_of_match[] = {
}, {
.compatible = "mediatek,mt6358",
.data = _core,
+ }, {
+ .compatible = "mediatek,mt6359",
+ .data = _core,
}, {
.compatible = "mediatek,mt6397",
.data = _core,
diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h
new file mode 100644
index ..61872f1ecbe4
--- /dev/null
+++ b/include/linux/mfd/mt6359/core.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#ifndef __MFD_MT6359_CORE_H__
+#define __MFD_MT6359_CORE_H__
+
+enum mt6359_irq_top_status_shift {
+ MT6359_BUCK_TOP = 0,
+ MT6359_LDO_TOP,
+ MT6359_PSC_TOP,
+ MT6359_SCK_TOP,
+ MT6359_BM_TOP,
+ MT6359_HK_TOP,
+ MT6359_AUD_TOP = 7,
+ MT6359_MISC_TOP,
+};
+
+enum mt6359_irq_numbers {
+ MT6359_IRQ_VCORE_OC = 1,
+ MT6359_IRQ_VGPU11_OC,
+ MT6359_IRQ_VGPU12_OC,
+ MT6359_IRQ_VMODEM_OC,
+ MT
[PATCH v5 0/8] Add Support for MediaTek PMIC MT6359
This patchset includes refactoring interrupt and adding support to MT6359 PMIC. MT6359 is the primary PMIC for MT6779 and probably other SOCs. The series[1] sent by Wen will continue to upstream in this patchset afterwards. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=306579 changes since v4: - fix yamllint errors in dt-binding document. - remove unused compatible name of mt6359-regulator in mfd driver. - update the name of regulator node in the dts. - merge the patch about enable time of ldo into the mt6359 regulator patch. - use the device of mfd driver for the regulator_config. - add the regulators_node support. - add pmic MT6359 support in the MT8192 evb dts. Hsin-Hsiung Wang (6): mfd: mt6358: refine interrupt code rtc: mt6397: refine RTC_TC_MTH dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC dt-bindings: regulator: Add document for MT6359 regulator mfd: Add support for the MediaTek MT6359 PMIC regulator: mt6359: Add support for MT6359P regulator Wen Su (2): regulator: mt6359: Add support for MT6359 regulator arm64: dts: mt6359: add PMIC MT6359 related nodes .../devicetree/bindings/mfd/mt6397.txt|1 + .../bindings/regulator/mt6359-regulator.yaml | 169 +++ arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 + arch/arm64/boot/dts/mediatek/mt8192-evb.dts |1 + drivers/mfd/mt6358-irq.c | 89 +- drivers/mfd/mt6397-core.c | 26 + drivers/regulator/Kconfig |9 + drivers/regulator/Makefile|1 + drivers/regulator/mt6359-regulator.c | 1036 + drivers/rtc/rtc-mt6397.c |2 +- include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6359/core.h | 133 +++ include/linux/mfd/mt6359/registers.h | 529 + include/linux/mfd/mt6359p/registers.h | 249 include/linux/mfd/mt6397/core.h |1 + include/linux/mfd/mt6397/rtc.h|1 + include/linux/regulator/mt6359-regulator.h| 59 + 17 files changed, 2579 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/mfd/mt6359/core.h create mode 100644 include/linux/mfd/mt6359/registers.h create mode 100644 include/linux/mfd/mt6359p/registers.h create mode 100644 include/linux/regulator/mt6359-regulator.h -- 2.18.0
[PATCH v5 6/8] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add enable time of ldo.
- use the device of mfd driver for the regulator_config.
- add the regulators_node support.
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 669 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 737 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 53fa84f4d1e1..3de7bb5be8ac 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -750,6 +750,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 680e539f6579..4f65eaead82d 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..fabc3f57f334
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,669 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+
[PATCH v5 4/8] dt-bindings: regulator: Add document for MT6359 regulator
add dt-binding document for MediaTek MT6359 PMIC
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4: fix yamllint errors in dt-binding document.
---
.../bindings/regulator/mt6359-regulator.yaml | 169 ++
1 file changed, 169 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
new file mode 100644
index ..62ff93eefd39
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
@@ -0,0 +1,169 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MT6359 Regulator from MediaTek Integrated
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ List of regulators provided by this controller. It is named
+ according to its regulator type, buck_ and ldo_.
+ MT6359 regulators node should be sub node of the MT6397 MFD node.
+
+properties:
+ $nodename:
+pattern: "^pmic$"
+
+ mt6359regulator:
+type: object
+description:
+ list of regulators provided by this controller.
+
+patternProperties:
+ "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(fe|bif|io)28$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(fe|bif|io)28$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(aud|io|aux|rf|m)18$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(aud|io|aux|rf|m)18$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsim[12]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsim[12]$"
+
+required:
+ - regulator-name
+
+unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+pmic {
+ mt6359regulator {
+mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-always-on;
+ regulator-allowed-modes = <0 1 2>;
+};
+
+mt6359_vcamio_ldo_reg: ldo_vcamio {
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <170>;
+ regulator-max-microvolt = <190>;
+};
+
+mt6359_vcn18_ldo_reg: ldo_vcn18 {
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-enable-ramp-delay = <240>;
+};
+
+mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 {
+ regulator-name = "vsram_proc2";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <1293750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <240>;
+ regulator-always-on;
+};
+
+mt6359_vfe28_ldo_reg: ldo_vfe28 {
+
[PATCH v5 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add pmic MT6359 support in the MT8192 evb dts.
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi| 298
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 1 +
2 files changed, 299 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..4bd85e33a4c9
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ };
+
+ mt6359regulator: regulators {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+
[PATCH v5 2/8] rtc: mt6397: refine RTC_TC_MTH
This patch adds RTC_TC_MTH_MASK to support new chips. Signed-off-by: Yuchen Huang Signed-off-by: Hsin-Hsiung Wang Acked-by: Alexandre Belloni --- changes since v4: no changes --- drivers/rtc/rtc-mt6397.c | 2 +- include/linux/mfd/mt6397/rtc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index 6655035e5164..80dc479a6ff0 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -75,7 +75,7 @@ static int __mtk_rtc_read_time(struct mt6397_rtc *rtc, tm->tm_min = data[RTC_OFFSET_MIN]; tm->tm_hour = data[RTC_OFFSET_HOUR]; tm->tm_mday = data[RTC_OFFSET_DOM]; - tm->tm_mon = data[RTC_OFFSET_MTH]; + tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_TC_MTH_MASK; tm->tm_year = data[RTC_OFFSET_YEAR]; ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec); diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index c3748b53bf7d..068ae1c0f0e8 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -36,6 +36,7 @@ #define RTC_AL_MASK_DOWBIT(4) #define RTC_TC_SEC 0x000a +#define RTC_TC_MTH_MASK0x000f /* Min, Hour, Dom... register offset to RTC_TC_SEC */ #define RTC_OFFSET_SEC 0 #define RTC_OFFSET_MIN 1 -- 2.18.0
[PATCH v5 3/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang --- changes since v4: - remove unused compatible name. --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..99a84b69a29f 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: -- 2.18.0
[PATCH v5 7/8] regulator: mt6359: Add support for MT6359P regulator
The MT6359P is a eco version for MT6359 regulator.
We add support based on MT6359 regulator driver.
Signed-off-by: Hsin-Hsiung Wang
---
changes since v4:
- add the regulators_node support.
---
drivers/regulator/mt6359-regulator.c | 379 -
include/linux/mfd/mt6359p/registers.h | 249 ++
include/linux/regulator/mt6359-regulator.h | 1 +
3 files changed, 623 insertions(+), 6 deletions(-)
create mode 100644 include/linux/mfd/mt6359p/registers.h
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index fabc3f57f334..522df38fe031 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
#include
@@ -147,6 +148,29 @@ struct mt6359_regulator_info {
.qi = BIT(0), \
}
+#define MT6359P_LDO1(match, _name, _ops, _volt_table, \
+ _enable_reg, _enable_mask, _status_reg, \
+ _vsel_reg, _vsel_mask) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .regulators_node = of_match_ptr("regulators"), \
+ .ops = &_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .n_voltages = ARRAY_SIZE(_volt_table), \
+ .volt_table = _volt_table, \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(_enable_mask), \
+ }, \
+ .status_reg = _status_reg, \
+ .qi = BIT(0), \
+}
+
static const struct linear_range mt_volt_range1[] = {
REGULATOR_LINEAR_RANGE(80, 0, 0x70, 12500),
};
@@ -175,6 +199,10 @@ static const struct linear_range mt_volt_range7[] = {
REGULATOR_LINEAR_RANGE(50, 0, 0x7f, 6250),
};
+static const struct linear_range mt_volt_range8[] = {
+ REGULATOR_LINEAR_RANGE(506250, 0, 0x7f, 6250),
+};
+
static const u32 vsim1_voltages[] = {
0, 0, 0, 170, 180, 0, 0, 0, 270, 0, 0, 300, 310,
};
@@ -212,6 +240,10 @@ static const u32 vrfck_voltages[] = {
0, 0, 150, 0, 0, 0, 0, 160, 0, 0, 0, 0, 170,
};
+static const u32 vrfck_voltages_1[] = {
+ 124, 160,
+};
+
static const u32 vio28_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 280, 290, 300, 310, 330,
};
@@ -220,6 +252,11 @@ static const u32 vemc_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 290, 300, 0, 330,
};
+static const u32 vemc_voltages_1[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 250, 280, 290, 300, 310,
+ 330,
+};
+
static const u32 va12_voltages[] = {
0, 0, 0, 0, 0, 0, 120, 130,
};
@@ -356,6 +393,78 @@ static int mt6359_regulator_set_mode(struct regulator_dev
*rdev,
return ret;
}
+static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
+ u32 sel)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ sel <<= ffs(info->desc.vsel_mask) - 1;
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+
+ switch (val) {
+ case 0:
+ /* If HW trapping is 0, use VEMC_VOSEL_0 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg,
+info->desc.vsel_mask, sel);
+ break;
+ case 1:
+ /* If HW trapping is 1, use VEMC_VOSEL_1 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg + 0x2,
+info->desc.vsel_mask, sel);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (ret)
+ return ret;
+
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
+ return ret;
+}
+
+static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ re
[PATCH v5 1/8] mfd: mt6358: refine interrupt code
This patch refines the interrupt related code to support new chips.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
changes since v4: no changes
---
drivers/mfd/mt6358-irq.c| 65 +++--
include/linux/mfd/mt6358/core.h | 8 ++--
2 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index db734f2831ff..4b094e5e51cc 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -13,7 +13,9 @@
#include
#include
-static struct irq_top_t mt6358_ints[] = {
+#define MTK_PMIC_REG_WIDTH 16
+
+static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
MT6358_TOP_GEN(PSC),
@@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static struct pmic_irq_data mt6358_irqd = {
+ .num_top = ARRAY_SIZE(mt6358_ints),
+ .num_pmic_irqs = MT6358_IRQ_NR,
+ .top_int_status_reg = MT6358_TOP_INT_STATUS0,
+ .pmic_ints = mt6358_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -62,15 +71,15 @@ static void pmic_irq_sync_unlock(struct irq_data *data)
/* Find out the IRQ group */
top_gp = 0;
while ((top_gp + 1) < irqd->num_top &&
- i >= mt6358_ints[top_gp + 1].hwirq_base)
+ i >= irqd->pmic_ints[top_gp + 1].hwirq_base)
top_gp++;
/* Find the IRQ registers */
- gp_offset = i - mt6358_ints[top_gp].hwirq_base;
- int_regs = gp_offset / MT6358_REG_WIDTH;
- shift = gp_offset % MT6358_REG_WIDTH;
- en_reg = mt6358_ints[top_gp].en_reg +
-(mt6358_ints[top_gp].en_reg_shift * int_regs);
+ gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;
+ int_regs = gp_offset / MTK_PMIC_REG_WIDTH;
+ shift = gp_offset % MTK_PMIC_REG_WIDTH;
+ en_reg = irqd->pmic_ints[top_gp].en_reg +
+(irqd->pmic_ints[top_gp].en_reg_shift * int_regs);
regmap_update_bits(chip->regmap, en_reg, BIT(shift),
irqd->enable_hwirq[i] << shift);
@@ -95,10 +104,11 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
unsigned int irq_status, sta_reg, status;
unsigned int hwirq, virq;
int i, j, ret;
+ struct pmic_irq_data *irqd = chip->irq_data;
- for (i = 0; i < mt6358_ints[top_gp].num_int_regs; i++) {
- sta_reg = mt6358_ints[top_gp].sta_reg +
- mt6358_ints[top_gp].sta_reg_shift * i;
+ for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {
+ sta_reg = irqd->pmic_ints[top_gp].sta_reg +
+ irqd->pmic_ints[top_gp].sta_reg_shift * i;
ret = regmap_read(chip->regmap, sta_reg, _status);
if (ret) {
@@ -114,8 +124,8 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
do {
j = __ffs(status);
- hwirq = mt6358_ints[top_gp].hwirq_base +
- MT6358_REG_WIDTH * i + j;
+ hwirq = irqd->pmic_ints[top_gp].hwirq_base +
+ MTK_PMIC_REG_WIDTH * i + j;
virq = irq_find_mapping(chip->irq_domain, hwirq);
if (virq)
@@ -131,12 +141,12 @@ static void mt6358_irq_sp_handler(struct mt6397_chip
*chip,
static irqreturn_t mt6358_irq_handler(int irq, void *data)
{
struct mt6397_chip *chip = data;
- struct pmic_irq_data *mt6358_irq_data = chip->irq_data;
+ struct pmic_irq_data *irqd = chip->irq_data;
unsigned int bit, i, top_irq_status = 0;
int ret;
ret = regmap_read(chip->regmap,
- mt6358_irq_data->top_int_status_reg,
+ irqd->top_int_status_reg,
_irq_status);
if (ret) {
dev_err(chip->dev,
@@ -144,8 +154,8 @@ static irqreturn_t mt6358_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- for (i = 0; i < mt6358_irq_data->num_top; i++) {
- bit = BIT(mt6358_ints[i].top_offset);
+ for (i = 0; i < irqd->num_top; i++) {
+ bit = BIT(irqd->pmic_ints[i].top_offset);
if (top_irq_status & bit) {
mt6358_irq_sp_handler(chip, i);
top_irq_status &= ~bit;
@@ -180,17 +190,18 @@ int mt6358_irq_init(struct mt6397_chip *chip)
int i, j, ret;
struct pmic_irq_data *irqd;
- irqd = devm_kzalloc(chip->dev, sizeof(*i
[PATCH v3 0/3] Add support for MT6315 regulator
This patch series adds support for MediaTek PMIC MT6315 regulator driver, which adds MT6315 related buck voltage data to the driver. This series is based on below patch[1]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/commit/?h=char-misc-next=d40c2d4ed62df64ce603c208bceff25245380157 changes since v2: - fix the error of binding document. - refine the mt6315 regulator for better code quality. - add mt6315 regulator node into mt8192-evb.dts. Hsin-Hsiung Wang (3): dt-bindings: regulator: document binding for MT6315 regulator regulator: mt6315: Add support for MT6315 regulator arm64: dts: mt8192: add mt6315 regulator nodes .../bindings/regulator/mt6315-regulator.yaml | 71 + arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 46 +++ drivers/regulator/Kconfig | 10 + drivers/regulator/Makefile| 1 + drivers/regulator/mt6315-regulator.c | 298 ++ include/linux/regulator/mt6315-regulator.h| 45 +++ 6 files changed, 471 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml create mode 100644 drivers/regulator/mt6315-regulator.c create mode 100644 include/linux/regulator/mt6315-regulator.h -- 2.18.0
[PATCH v3 2/3] regulator: mt6315: Add support for MT6315 regulator
The MT6315 is a regulator found on boards based on MediaTek MT8192 and
probably other SoCs. It connects as a slave to SoC using SPMI.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/regulator/Kconfig | 10 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6315-regulator.c | 298 +
include/linux/regulator/mt6315-regulator.h | 45
4 files changed, 354 insertions(+)
create mode 100644 drivers/regulator/mt6315-regulator.c
create mode 100644 include/linux/regulator/mt6315-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 020a00d6696b..65612ba2734f 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -703,6 +703,16 @@ config REGULATOR_MT6311
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6315
+ tristate "MediaTek MT6315 PMIC"
+ depends on SPMI
+ select REGMAP_SPMI
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6315 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6323
tristate "MediaTek MT6323 PMIC"
depends on MFD_MT6397
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 6ebae516258e..b2f47dd67112 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_REGULATOR_MP8859) += mp8859.o
obj-$(CONFIG_REGULATOR_MP886X) += mp886x.o
obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
+obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
diff --git a/drivers/regulator/mt6315-regulator.c
b/drivers/regulator/mt6315-regulator.c
new file mode 100644
index ..57ef628d48b4
--- /dev/null
+++ b/drivers/regulator/mt6315-regulator.c
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6315_REG_WIDTH 8
+
+#define MT6315_BUCK_MODE_AUTO 0
+#define MT6315_BUCK_MODE_FORCE_PWM 1
+#define MT6315_BUCK_MODE_LP2
+
+struct mt6315_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+struct mt_regulator_init_data {
+ u32 slvid;
+ u32 modeset_mask[MT6315_VBUCK_MAX];
+};
+
+struct mt6315_chip {
+ struct device *dev;
+ struct regmap *regmap;
+};
+
+#define MT_BUCK(_name, _bid, _vsel)\
+[_bid] = { \
+ .desc = { \
+ .name = _name, \
+ .of_match = of_match_ptr(_name),\
+ .regulators_node = "regulators",\
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = _bid, \
+ .owner = THIS_MODULE, \
+ .n_voltages = 0xbf, \
+ .linear_ranges = mt_volt_range1,\
+ .n_linear_ranges = ARRAY_SIZE(mt_volt_range1), \
+ .vsel_reg = _vsel, \
+ .vsel_mask = 0xff, \
+ .enable_reg = MT6315_BUCK_TOP_CON0, \
+ .enable_mask = BIT(_bid), \
+ .of_map_mode = mt6315_map_mode, \
+ }, \
+ .status_reg = _bid##_DBG4, \
+ .lp_mode_mask = BIT(_bid), \
+ .lp_mode_shift = _bid, \
+}
+
+static const struct linear_range mt_volt_range1[] = {
+ REGULATOR_LINEAR_RANGE(0, 0, 0xbf, 6250),
+};
+
+static unsigned int mt6315_map_mode(u32 mode)
+{
+ switch (mode) {
+ case MT6315_BUCK_MODE_AUTO:
+ return REGULATOR_MODE_NORMAL;
+ case MT6315_BUCK_MODE_FORCE_PWM:
+ return REGULATOR_MODE_FAST;
+ case MT6315_BUCK_MODE_LP:
+ return REGULATOR_MODE_IDLE;
+ default:
+ return -EINVAL;
+ }
+}
+
+static unsigned int mt6315_regulator_get_mode(struct regulator_dev *rdev)
+{
+ struct mt_regulator_init_data *init = rdev_get_drvda
[PATCH v3 3/3] arm64: dts: mt8192: add mt6315 regulator nodes
Add MT6315 regulator nodes to MT8192 evaluation board.
Signed-off-by: Hsin-Hsiung Wang
---
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 46 +
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
index 0205837fa698..6c1e2b3e8a60 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
@@ -24,6 +24,52 @@
};
};
+ {
+ grpid = <11>;
+ mt6315_6: pmic@6 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x6 0 0xb 1>;
+
+ regulators {
+ mt6315_6_vbuck1: vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-name = "Vbcpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ regulator-always-on;
+ };
+
+ mt6315_6_vbuck3: vbuck3 {
+ regulator-compatible = "vbuck3";
+ regulator-name = "Vlcpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ regulator-always-on;
+ };
+ };
+ };
+
+ mt6315_7: pmic@7 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x7 0 0xb 1>;
+
+ regulators {
+ mt6315_7_vbuck1: vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-name = "Vgpu";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+ };
+ };
+ };
+};
+
{
status = "okay";
};
--
2.18.0
[PATCH v3 1/3] dt-bindings: regulator: document binding for MT6315 regulator
Add device tree binding information for MT6315 regulator driver.
Example bindings for MT6315 are added.
Signed-off-by: Hsin-Hsiung Wang
---
.../bindings/regulator/mt6315-regulator.yaml | 71 +++
1 file changed, 71 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
new file mode 100644
index ..15ce83a36174
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mtk,mt6315-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek MT6315 Regulator
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ The MT6315 is a power management IC (PMIC) configurable with SPMI.
+ that contains 4 BUCKs output which can combine with each other
+ by different efuse settings.
+
+properties:
+ compatible:
+const: mediatek,mt6315-regulator
+
+ reg:
+maxItems: 1
+
+ regulators:
+type: object
+description: List of regulators and its properties
+
+patternProperties:
+ "^vbuck[1-4]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vbuck[1-4]$"
+description:
+ should be "vbuck1", ..., "vbuck4"
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - regulators
+
+additionalProperties: false
+
+examples:
+ - |
+pmic@6 {
+ compatible = "mediatek,mt6315-regulator";
+ reg = <0x6 0 0xb 1>;
+
+ regulators {
+vbuck1 {
+ regulator-compatible = "vbuck1";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+};
+
+vbuck3 {
+ regulator-compatible = "vbuck3";
+ regulator-min-microvolt = <30>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <256>;
+ regulator-allowed-modes = <0 1 2 4>;
+};
+ };
+};
--
2.18.0
[PATCH v5 2/4] dt-bindings: spmi: document binding for the Mediatek SPMI controller
This adds documentation for the SPMI controller found on Mediatek SoCs.
Signed-off-by: Hsin-Hsiung Wang
---
.../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++
1 file changed, 74 insertions(+)
create mode 100644
Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
new file mode 100644
index ..a43b0302d503
--- /dev/null
+++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek SPMI Controller Device Tree Bindings
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |+
+ On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
+ for multiple SoCs to control a single SPMI master.
+
+allOf:
+ - $ref: "spmi.yaml"
+
+properties:
+ compatible:
+const: mediatek,mt6873-spmi
+
+ reg:
+maxItems: 2
+
+ reg-names:
+items:
+ - const: pmif
+ - const: spmimst
+
+ clocks:
+minItems: 3
+maxItems: 3
+
+ clock-names:
+items:
+ - const: pmif_sys_ck
+ - const: pmif_tmr_ck
+ - const: spmimst_clk_mux
+
+ assigned-clocks:
+maxItems: 1
+
+ assigned-clock-parents:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+spmi: spmi@10027000 {
+compatible = "mediatek,mt6873-spmi";
+reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+reg-names = "pmif", "spmimst";
+clocks = < CLK_INFRA_PMIC_AP>,
+ < CLK_INFRA_PMIC_TMR>,
+ < CLK_TOP_SPMI_MST_SEL>;
+clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+assigned-clock-parents = < CLK_TOP_OSC_D10>;
+};
+...
--
2.18.0
[PATCH v5 3/4] spmi: mediatek: Add support for MT6873/8192
Add spmi support for MT6873/8192.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/spmi/Kconfig | 9 +
drivers/spmi/Makefile| 1 +
drivers/spmi/spmi-mtk-pmif.c | 504 +++
3 files changed, 514 insertions(+)
create mode 100644 drivers/spmi/spmi-mtk-pmif.c
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index a53bad541f1a..418848840999 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -25,4 +25,13 @@ config SPMI_MSM_PMIC_ARB
This is required for communicating with Qualcomm PMICs and
other devices that have the SPMI interface.
+config SPMI_MTK_PMIF
+ tristate "Mediatek SPMI Controller (PMIC Arbiter)"
+ help
+ If you say yes to this option, support will be included for the
+ built-in SPMI PMIC Arbiter interface on Mediatek family
+ processors.
+
+ This is required for communicating with Mediatek PMICs and
+ other devices that have the SPMI interface.
endif
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 55a94cadeffe..91f303b96925 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_SPMI) += spmi.o
obj-$(CONFIG_SPMI_MSM_PMIC_ARB)+= spmi-pmic-arb.o
+obj-$(CONFIG_SPMI_MTK_PMIF)+= spmi-mtk-pmif.o
\ No newline at end of file
diff --git a/drivers/spmi/spmi-mtk-pmif.c b/drivers/spmi/spmi-mtk-pmif.c
new file mode 100644
index ..711d3973800b
--- /dev/null
+++ b/drivers/spmi/spmi-mtk-pmif.c
@@ -0,0 +1,504 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+
+#define SWINF_IDLE 0x00
+#define SWINF_WFVLDCLR 0x06
+
+#define GET_SWINF(x) (((x) >> 1) & 0x7)
+
+#define PMIF_CMD_REG_0 0
+#define PMIF_CMD_REG 1
+#define PMIF_CMD_EXT_REG 2
+#define PMIF_CMD_EXT_REG_LONG 3
+
+#define PMIF_DELAY_US 10
+#define PMIF_TIMEOUT(10 * 1000)
+
+#define PMIF_CHAN_OFFSET 0x5
+
+#define SPMI_OP_ST_BUSY 1
+
+struct ch_reg {
+ u32 ch_sta;
+ u32 wdata;
+ u32 rdata;
+ u32 ch_send;
+ u32 ch_rdy;
+};
+
+struct pmif {
+ void __iomem*base;
+ const u32 *regs;
+ void __iomem*spmimst_base;
+ const u32 *spmimst_regs;
+ u32 soc_chan;
+ int grpid;
+ raw_spinlock_t lock;
+ struct clk *pmif_sys_ck;
+ struct clk *pmif_tmr_ck;
+ struct clk *spmimst_clk_mux;
+ struct ch_reg chan;
+};
+
+enum pmif_regs {
+ PMIF_INIT_DONE,
+ PMIF_INF_EN,
+ PMIF_ARB_EN,
+ PMIF_CMDISSUE_EN,
+ PMIF_TIMER_CTRL,
+ PMIF_SPI_MODE_CTRL,
+ PMIF_IRQ_EVENT_EN_0,
+ PMIF_IRQ_FLAG_0,
+ PMIF_IRQ_CLR_0,
+ PMIF_IRQ_EVENT_EN_1,
+ PMIF_IRQ_FLAG_1,
+ PMIF_IRQ_CLR_1,
+ PMIF_IRQ_EVENT_EN_2,
+ PMIF_IRQ_FLAG_2,
+ PMIF_IRQ_CLR_2,
+ PMIF_IRQ_EVENT_EN_3,
+ PMIF_IRQ_FLAG_3,
+ PMIF_IRQ_CLR_3,
+ PMIF_IRQ_EVENT_EN_4,
+ PMIF_IRQ_FLAG_4,
+ PMIF_IRQ_CLR_4,
+ PMIF_WDT_EVENT_EN_0,
+ PMIF_WDT_FLAG_0,
+ PMIF_WDT_EVENT_EN_1,
+ PMIF_WDT_FLAG_1,
+ PMIF_SWINF_0_STA,
+ PMIF_SWINF_0_WDATA_31_0,
+ PMIF_SWINF_0_RDATA_31_0,
+ PMIF_SWINF_0_ACC,
+ PMIF_SWINF_0_VLD_CLR,
+ PMIF_SWINF_1_STA,
+ PMIF_SWINF_1_WDATA_31_0,
+ PMIF_SWINF_1_RDATA_31_0,
+ PMIF_SWINF_1_ACC,
+ PMIF_SWINF_1_VLD_CLR,
+ PMIF_SWINF_2_STA,
+ PMIF_SWINF_2_WDATA_31_0,
+ PMIF_SWINF_2_RDATA_31_0,
+ PMIF_SWINF_2_ACC,
+ PMIF_SWINF_2_VLD_CLR,
+ PMIF_SWINF_3_STA,
+ PMIF_SWINF_3_WDATA_31_0,
+ PMIF_SWINF_3_RDATA_31_0,
+ PMIF_SWINF_3_ACC,
+ PMIF_SWINF_3_VLD_CLR,
+};
+
+static const u32 mt6873_regs[] = {
+ [PMIF_INIT_DONE] = 0x,
+ [PMIF_INF_EN] = 0x0024,
+ [PMIF_ARB_EN] = 0x0150,
+ [PMIF_CMDISSUE_EN] =0x03B4,
+ [PMIF_TIMER_CTRL] = 0x03E0,
+ [PMIF_SPI_MODE_CTRL] = 0x0400,
+ [PMIF_IRQ_EVENT_EN_0] = 0x0418,
+ [PMIF_IRQ_FLAG_0] = 0x0420,
+ [PMIF_IRQ_CLR_0] = 0x0424,
+ [PMIF_IRQ_EVENT_EN_1] = 0x0428,
+ [PMIF_IRQ_FLAG_1] = 0x0430,
+ [PMIF_IRQ_CLR_1] = 0x0434,
+ [PMIF_IRQ_EVENT_EN_2] = 0x0438,
+ [PMIF_IRQ_FLAG_2] = 0x0440,
+ [PMIF_IRQ_CLR_2] = 0x0444,
+ [PMIF_IRQ_EVENT_EN_3] = 0x0448,
+ [PMIF_IRQ_FLAG_3] = 0x0450,
+ [PMIF_IRQ_CLR_3] = 0x0454,
+ [PMIF_IRQ_EVENT_EN_4] = 0x0458,
+ [PMIF_IRQ_FLAG_4] = 0x0460,
+ [PMIF_IRQ_CLR_4] = 0x0464,
+ [PMIF_WDT_EVENT_EN_0] = 0x046C,
+ [PMIF_WDT_FLAG_0] = 0x0470,
+ [PMIF_WDT_EVENT_EN_1] = 0x0474,
+ [PMIF_WDT_FLAG_1] = 0x0478,
+ [PMIF_SWINF_0_ACC] =0x0C00,
+ [PMIF_SWINF_0_WDAT
[PATCH v5 4/4] arm64: dts: mt8192: add spmi node
Add spmi node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69d45c7b31f1..6dc8aa97acc3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -272,6 +272,21 @@
clock-names = "clk13m";
};
+ spmi: spmi@10027000 {
+ compatible = "mediatek,mt6873-spmi";
+ reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = < CLK_INFRA_PMIC_AP>,
+< CLK_INFRA_PMIC_TMR>,
+< CLK_TOP_SPMI_MST_SEL>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = < CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = < CLK_TOP_OSC_D10>;
+ };
+
scp_adsp: syscon@1072 {
compatible = "mediatek,mt8192-scp_adsp", "syscon";
reg = <0 0x1072 0 0x1000>;
--
2.18.0
[PATCH v5 1/4] dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems'
The constraint of 'maxItem: 1' might be larger than 1, so we modify it to 'minItem: 0'. Signed-off-by: Hsin-Hsiung Wang --- Documentation/devicetree/bindings/spmi/spmi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 173940930719..f1a26391ffde 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -25,7 +25,7 @@ properties: pattern: "^spmi@.*" reg: -maxItems: 1 +minItems: 0 "#address-cells": const: 2 -- 2.18.0
[PATCH v5 0/4] Add SPMI support for Mediatek MT6873/8192 SoC IC
This series adds support for new SoC MT6873/8192 to the spmi driver. This series is based on Weiyi's patches[1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1608642587-15634-7-git-send-email-weiyi...@mediatek.com/ changes since v4: - modify the constraint 'maxItems: 1' to 'minItems: 0'. - fix the error of the binding document. - refine the mtk spmi driver for the bettery quality. - add spmi node into MT8192 dtsi. Hsin-Hsiung Wang (4): dt-bindings: spmi: modify the constraint 'maxItems' to 'minItems' dt-bindings: spmi: document binding for the Mediatek SPMI controller spmi: mediatek: Add support for MT6873/8192 arm64: dts: mt8192: add spmi node .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 74 +++ .../devicetree/bindings/spmi/spmi.yaml| 2 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 15 + drivers/spmi/Kconfig | 9 + drivers/spmi/Makefile | 1 + drivers/spmi/spmi-mtk-pmif.c | 504 ++ 6 files changed, 604 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml create mode 100644 drivers/spmi/spmi-mtk-pmif.c -- 2.18.0
Re: [PATCH v4 3/9] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
Hi, On Thu, 2020-12-17 at 13:28 -0600, Rob Herring wrote: > On Wed, 16 Dec 2020 15:47:01 +0800, Hsin-Hsiung Wang wrote: > > This adds compatible for the MediaTek MT6359 PMIC. > > > > Signed-off-by: Hsin-Hsiung Wang > > --- > > Documentation/devicetree/bindings/mfd/mt6397.txt | 7 ++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > there's no need to repost patches *only* to add the tags. The upstream > maintainer will do that for acks received on the version they apply. > > If a tag was not added on purpose, please state why and what changed. > Sorry, the tag disappeared because of the change of rtc compatible name. I will list the change in the each patch for the next update. Thanks for your review.
[PATCH v4 7/9] regulator: mt6359: Set the enable time for LDOs
Add the enable time for LDOs.
This patch is preparing for adding mt6359p regulator support.
Signed-off-by: Hsin-Hsiung Wang
Acked-by: Mark Brown
---
drivers/regulator/mt6359-regulator.c | 65 ++--
1 file changed, 42 insertions(+), 23 deletions(-)
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index 4ac6380f9875..e46fb95b87e2 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -103,7 +103,7 @@ struct mt6359_regulator_info {
#define MT6359_LDO(match, _name, _volt_table, \
_enable_reg, _enable_mask, _status_reg, \
- _vsel_reg, _vsel_mask) \
+ _vsel_reg, _vsel_mask, _en_delay) \
[MT6359_ID_##_name] = {\
.desc = { \
.name = #_name, \
@@ -118,6 +118,7 @@ struct mt6359_regulator_info {
.vsel_mask = _vsel_mask,\
.enable_reg = _enable_reg, \
.enable_mask = BIT(_enable_mask), \
+ .enable_time = _en_delay, \
}, \
.status_reg = _status_reg, \
.qi = BIT(0), \
@@ -466,15 +467,18 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vsim1", VSIM1, vsim1_voltages,
MT6359_RG_LDO_VSIM1_EN_ADDR, MT6359_RG_LDO_VSIM1_EN_SHIFT,
MT6359_DA_VSIM1_B_EN_ADDR, MT6359_RG_VSIM1_VOSEL_ADDR,
- MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT),
+ MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT,
+ 480),
MT6359_LDO("ldo_vibr", VIBR, vibr_voltages,
MT6359_RG_LDO_VIBR_EN_ADDR, MT6359_RG_LDO_VIBR_EN_SHIFT,
MT6359_DA_VIBR_B_EN_ADDR, MT6359_RG_VIBR_VOSEL_ADDR,
- MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT),
+ MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT,
+ 240),
MT6359_LDO("ldo_vrf12", VRF12, vrf12_voltages,
MT6359_RG_LDO_VRF12_EN_ADDR, MT6359_RG_LDO_VRF12_EN_SHIFT,
MT6359_DA_VRF12_B_EN_ADDR, MT6359_RG_VRF12_VOSEL_ADDR,
- MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT),
+ MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT,
+ 120),
MT6359_REG_FIXED("ldo_vusb", VUSB, MT6359_RG_LDO_VUSB_EN_0_ADDR,
MT6359_DA_VUSB_B_EN_ADDR, 300),
MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, 50, 1293750, 6250,
@@ -486,11 +490,13 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vio18", VIO18, volt18_voltages,
MT6359_RG_LDO_VIO18_EN_ADDR, MT6359_RG_LDO_VIO18_EN_SHIFT,
MT6359_DA_VIO18_B_EN_ADDR, MT6359_RG_VIO18_VOSEL_ADDR,
- MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT),
+ MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT,
+ 960),
MT6359_LDO("ldo_vcamio", VCAMIO, volt18_voltages,
MT6359_RG_LDO_VCAMIO_EN_ADDR, MT6359_RG_LDO_VCAMIO_EN_SHIFT,
MT6359_DA_VCAMIO_B_EN_ADDR, MT6359_RG_VCAMIO_VOSEL_ADDR,
- MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT),
+ MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT,
+ 1290),
MT6359_REG_FIXED("ldo_vcn18", VCN18, MT6359_RG_LDO_VCN18_EN_ADDR,
MT6359_DA_VCN18_B_EN_ADDR, 180),
MT6359_REG_FIXED("ldo_vfe28", VFE28, MT6359_RG_LDO_VFE28_EN_ADDR,
@@ -498,19 +504,20 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vcn13", VCN13, vcn13_voltages,
MT6359_RG_LDO_VCN13_EN_ADDR, MT6359_RG_LDO_VCN13_EN_SHIFT,
MT6359_DA_VCN13_B_EN_ADDR, MT6359_RG_VCN13_VOSEL_ADDR,
- MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT),
+ MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT,
+ 240),
MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT, vcn33_voltages,
MT6359_RG_LDO_VCN33_1_EN_0_ADDR,
MT6359_RG_LDO_VCN33_1_EN_0_SHIFT,
MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR,
MT6359_R
[PATCH v4 6/9] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 649 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 717 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 020a00d6696b..7572efc38bd5 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -721,6 +721,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 6ebae516258e..56c28ab191e4 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..4ac6380f9875
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,649 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(0), \
+ .of_map_mode = mt6359_map_mode, \
+ }, \
+ .stat
[PATCH v4 9/9] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 +++
1 file changed, 298 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..649c661e9907
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ };
+
+ mt6359regulator: mt6359regulator {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-r
[PATCH v4 5/9] mfd: Add support for the MediaTek MT6359 PMIC
This adds support for the MediaTek MT6359 PMIC. This is a
multifunction device with the following sub modules:
- Codec
- Interrupt
- Regulator
- RTC
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6359 MFD is a child device of the pwrap.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/mfd/mt6358-irq.c | 24 ++
drivers/mfd/mt6397-core.c| 28 ++
include/linux/mfd/mt6359/core.h | 133 +++
include/linux/mfd/mt6359/registers.h | 529 +++
include/linux/mfd/mt6397/core.h | 1 +
5 files changed, 715 insertions(+)
create mode 100644 include/linux/mfd/mt6359/core.h
create mode 100644 include/linux/mfd/mt6359/registers.h
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index 4b094e5e51cc..83f3ffbdbb4c 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -5,6 +5,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static const struct irq_top_t mt6359_ints[] = {
+ MT6359_TOP_GEN(BUCK),
+ MT6359_TOP_GEN(LDO),
+ MT6359_TOP_GEN(PSC),
+ MT6359_TOP_GEN(SCK),
+ MT6359_TOP_GEN(BM),
+ MT6359_TOP_GEN(HK),
+ MT6359_TOP_GEN(AUD),
+ MT6359_TOP_GEN(MISC),
+};
+
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
@@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
.pmic_ints = mt6358_ints,
};
+static struct pmic_irq_data mt6359_irqd = {
+ .num_top = ARRAY_SIZE(mt6359_ints),
+ .num_pmic_irqs = MT6359_IRQ_NR,
+ .top_int_status_reg = MT6359_TOP_INT_STATUS0,
+ .pmic_ints = mt6359_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
chip->irq_data = _irqd;
break;
+ case MT6359_CHIP_ID:
+ chip->irq_data = _irqd;
+ break;
+
default:
dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
return -ENODEV;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index f6cd8a660602..07240eaf4055 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -13,9 +13,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#define MT6323_RTC_BASE0x8000
@@ -99,6 +101,21 @@ static const struct mfd_cell mt6358_devs[] = {
},
};
+static const struct mfd_cell mt6359_devs[] = {
+ {
+ .name = "mt6359-regulator",
+ .of_compatible = "mediatek,mt6359-regulator",
+ }, {
+ .name = "mt6359-rtc",
+ .num_resources = ARRAY_SIZE(mt6358_rtc_resources),
+ .resources = mt6358_rtc_resources,
+ .of_compatible = "mediatek,mt6358-rtc",
+ }, {
+ .name = "mt6359-sound",
+ .of_compatible = "mediatek,mt6359-sound",
+ },
+};
+
static const struct mfd_cell mt6397_devs[] = {
{
.name = "mt6397-rtc",
@@ -149,6 +166,14 @@ static const struct chip_data mt6358_core = {
.irq_init = mt6358_irq_init,
};
+static const struct chip_data mt6359_core = {
+ .cid_addr = MT6359_SWCID,
+ .cid_shift = 8,
+ .cells = mt6359_devs,
+ .cell_size = ARRAY_SIZE(mt6359_devs),
+ .irq_init = mt6358_irq_init,
+};
+
static const struct chip_data mt6397_core = {
.cid_addr = MT6397_CID,
.cid_shift = 0,
@@ -218,6 +243,9 @@ static const struct of_device_id mt6397_of_match[] = {
}, {
.compatible = "mediatek,mt6358",
.data = _core,
+ }, {
+ .compatible = "mediatek,mt6359",
+ .data = _core,
}, {
.compatible = "mediatek,mt6397",
.data = _core,
diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h
new file mode 100644
index ..61872f1ecbe4
--- /dev/null
+++ b/include/linux/mfd/mt6359/core.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#ifndef __MFD_MT6359_CORE_H__
+#define __MFD_MT6359_CORE_H__
+
+enum mt6359_irq_top_status_shift {
+ MT6359_BUCK_TOP = 0,
+ MT6359_LDO_TOP,
+ MT6359_PSC_TOP,
+ MT6359_SCK_TOP,
+ MT6359_BM_TOP,
+ MT6359_HK_TOP,
+ MT6359_AUD_TOP = 7,
+ MT6359_MISC_TOP,
+};
+
+enum mt6359_irq_numbers {
+ MT6359_IRQ_VCORE_OC = 1,
+ MT6359_IRQ_VGPU11_OC,
+ MT6359_IRQ_VGPU
[PATCH v4 4/9] dt-bindings: regulator: Add document for MT6359 regulator
add dt-binding document for MediaTek MT6359 PMIC
Signed-off-by: Hsin-Hsiung Wang
---
.../bindings/regulator/mt6359-regulator.yaml | 169 ++
1 file changed, 169 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
new file mode 100644
index ..09fd4cb90326
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
@@ -0,0 +1,169 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MT6359 Regulator from MediaTek Integrated
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ List of regulators provided by this controller. It is named
+ according to its regulator type, buck_ and ldo_.
+ MT6359 regulators node should be sub node of the MT6397 MFD node.
+
+properties:
+ $nodename:
+pattern: "^pmic$"
+
+ mt6359regulator:
+type: object
+description:
+ list of regulators provided by this controller.
+
+patternProperties:
+ "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(fe|bif|io)28$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(fe|bif|io)28$"
+
+unevaluatedProperties: false
+
+ "^ldo_v(aud|io|aux|rf|m)18$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(aud|io|aux|rf|m)18$"
+
+unevaluatedProperties: false
+
+ "^ldo_vsim[12]$":
+type: object
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsim[12]$"
+
+required:
+ - regulator-name
+
+unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+pmic {
+ mt6359regulator {
+mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-always-on;
+ regulator-allowed-modes = <0 1 2>;
+};
+
+mt6359_vcamio_ldo_reg: ldo_vcamio {
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <170>;
+ regulator-max-microvolt = <190>;
+};
+
+mt6359_vcn18_ldo_reg: ldo_vcn18 {
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-enable-ramp-delay = <240>;
+};
+
+mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 {
+ regulator-name = "vsram_proc2";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <1293750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <240>;
+ regulator-always-on;
+};
+
+mt6359_vfe28_ldo_reg: ldo_vfe28 {
+ regulator-name = "vfe28";
+
[PATCH v4 3/9] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang --- Documentation/devicetree/bindings/mfd/mt6397.txt | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..2b4ad0902d42 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: @@ -37,11 +38,15 @@ Optional subnodes: see ../regulator/mt6323-regulator.txt - compatible: "mediatek,mt6358-regulator" see ../regulator/mt6358-regulator.txt + - compatible: "mediatek,mt6359-regulator" + see ../regulator/mt6359-regulator.txt - compatible: "mediatek,mt6397-regulator" see ../regulator/mt6397-regulator.txt - codec Required properties: - - compatible: "mediatek,mt6397-codec" or "mediatek,mt6358-sound" + - compatible: "mediatek,mt6397-codec" + - compatible: "mediatek,mt6358-sound" + - compatible: "mediatek,mt6359-sound" - clk Required properties: - compatible: "mediatek,mt6397-clk" -- 2.18.0
[PATCH v4 0/9] Add Support for MediaTek PMIC MT6359
This patchset includes refactoring interrupt and adding support to MT6359 PMIC. MT6359 is the primary PMIC for MT6779 and probably other SOCs. The series[1] sent by Wen will continue to upstream in this patchset afterwards. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=306579 changes since v3: - fix yamllint errors in dt-binding document. - remove unused compatible name of mt6359 codec in the dts. - refine RTC_TC_MTH in the rtc-mt6397 driver to support new chips. - add mt6359 rtc support. - use regmap_get_voltage_sel_regmap() to get voltage instead of mt6359_get_linear_voltage_sel(). Hsin-Hsiung Wang (7): mfd: mt6358: refine interrupt code rtc: mt6397: refine RTC_TC_MTH dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC dt-bindings: regulator: Add document for MT6359 regulator mfd: Add support for the MediaTek MT6359 PMIC regulator: mt6359: Set the enable time for LDOs regulator: mt6359: Add support for MT6359P regulator Wen Su (2): regulator: mt6359: Add support for MT6359 regulator arm64: dts: mt6359: add PMIC MT6359 related nodes .../devicetree/bindings/mfd/mt6397.txt|7 +- .../bindings/regulator/mt6359-regulator.yaml | 169 +++ arch/arm64/boot/dts/mediatek/mt6359.dtsi | 298 + drivers/mfd/mt6358-irq.c | 89 +- drivers/mfd/mt6397-core.c | 28 + drivers/regulator/Kconfig |9 + drivers/regulator/Makefile|1 + drivers/regulator/mt6359-regulator.c | 1035 + drivers/rtc/rtc-mt6397.c |2 +- include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6359/core.h | 133 +++ include/linux/mfd/mt6359/registers.h | 529 + include/linux/mfd/mt6359p/registers.h | 249 include/linux/mfd/mt6397/core.h |1 + include/linux/mfd/mt6397/rtc.h|1 + include/linux/regulator/mt6359-regulator.h| 59 + 16 files changed, 2584 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/mfd/mt6359/core.h create mode 100644 include/linux/mfd/mt6359/registers.h create mode 100644 include/linux/mfd/mt6359p/registers.h create mode 100644 include/linux/regulator/mt6359-regulator.h -- 2.18.0
[PATCH v4 8/9] regulator: mt6359: Add support for MT6359P regulator
The MT6359P is a eco version for MT6359 regulator.
We add support based on MT6359 regulator driver.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/regulator/mt6359-regulator.c | 377 -
include/linux/mfd/mt6359p/registers.h | 249 ++
include/linux/regulator/mt6359-regulator.h | 1 +
3 files changed, 622 insertions(+), 5 deletions(-)
create mode 100644 include/linux/mfd/mt6359p/registers.h
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index e46fb95b87e2..42b958ced38a 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
#include
@@ -143,6 +144,28 @@ struct mt6359_regulator_info {
.qi = BIT(0), \
}
+#define MT6359P_LDO1(match, _name, _ops, _volt_table, \
+ _enable_reg, _enable_mask, _status_reg, \
+ _vsel_reg, _vsel_mask) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .ops = &_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .n_voltages = ARRAY_SIZE(_volt_table), \
+ .volt_table = _volt_table, \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(_enable_mask), \
+ }, \
+ .status_reg = _status_reg, \
+ .qi = BIT(0), \
+}
+
static const struct linear_range mt_volt_range1[] = {
REGULATOR_LINEAR_RANGE(80, 0, 0x70, 12500),
};
@@ -171,6 +194,10 @@ static const struct linear_range mt_volt_range7[] = {
REGULATOR_LINEAR_RANGE(50, 0, 0x7f, 6250),
};
+static const struct linear_range mt_volt_range8[] = {
+ REGULATOR_LINEAR_RANGE(506250, 0, 0x7f, 6250),
+};
+
static const u32 vsim1_voltages[] = {
0, 0, 0, 170, 180, 0, 0, 0, 270, 0, 0, 300, 310,
};
@@ -208,6 +235,10 @@ static const u32 vrfck_voltages[] = {
0, 0, 150, 0, 0, 0, 0, 160, 0, 0, 0, 0, 170,
};
+static const u32 vrfck_voltages_1[] = {
+ 124, 160,
+};
+
static const u32 vio28_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 280, 290, 300, 310, 330,
};
@@ -216,6 +247,11 @@ static const u32 vemc_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 290, 300, 0, 330,
};
+static const u32 vemc_voltages_1[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 250, 280, 290, 300, 310,
+ 330,
+};
+
static const u32 va12_voltages[] = {
0, 0, 0, 0, 0, 0, 120, 130,
};
@@ -352,6 +388,78 @@ static int mt6359_regulator_set_mode(struct regulator_dev
*rdev,
return ret;
}
+static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
+ u32 sel)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ sel <<= ffs(info->desc.vsel_mask) - 1;
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+
+ switch (val) {
+ case 0:
+ /* If HW trapping is 0, use VEMC_VOSEL_0 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg,
+info->desc.vsel_mask, sel);
+ break;
+ case 1:
+ /* If HW trapping is 1, use VEMC_VOSEL_1 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg + 0x2,
+info->desc.vsel_mask, sel);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (ret)
+ return ret;
+
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
+ return ret;
+}
+
+static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+ switch (val) {
+ case 0:
[PATCH v4 1/9] mfd: mt6358: refine interrupt code
This patch refines the interrupt related code to support new chips.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
drivers/mfd/mt6358-irq.c| 65 +++--
include/linux/mfd/mt6358/core.h | 8 ++--
2 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index db734f2831ff..4b094e5e51cc 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -13,7 +13,9 @@
#include
#include
-static struct irq_top_t mt6358_ints[] = {
+#define MTK_PMIC_REG_WIDTH 16
+
+static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
MT6358_TOP_GEN(PSC),
@@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static struct pmic_irq_data mt6358_irqd = {
+ .num_top = ARRAY_SIZE(mt6358_ints),
+ .num_pmic_irqs = MT6358_IRQ_NR,
+ .top_int_status_reg = MT6358_TOP_INT_STATUS0,
+ .pmic_ints = mt6358_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -62,15 +71,15 @@ static void pmic_irq_sync_unlock(struct irq_data *data)
/* Find out the IRQ group */
top_gp = 0;
while ((top_gp + 1) < irqd->num_top &&
- i >= mt6358_ints[top_gp + 1].hwirq_base)
+ i >= irqd->pmic_ints[top_gp + 1].hwirq_base)
top_gp++;
/* Find the IRQ registers */
- gp_offset = i - mt6358_ints[top_gp].hwirq_base;
- int_regs = gp_offset / MT6358_REG_WIDTH;
- shift = gp_offset % MT6358_REG_WIDTH;
- en_reg = mt6358_ints[top_gp].en_reg +
-(mt6358_ints[top_gp].en_reg_shift * int_regs);
+ gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;
+ int_regs = gp_offset / MTK_PMIC_REG_WIDTH;
+ shift = gp_offset % MTK_PMIC_REG_WIDTH;
+ en_reg = irqd->pmic_ints[top_gp].en_reg +
+(irqd->pmic_ints[top_gp].en_reg_shift * int_regs);
regmap_update_bits(chip->regmap, en_reg, BIT(shift),
irqd->enable_hwirq[i] << shift);
@@ -95,10 +104,11 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
unsigned int irq_status, sta_reg, status;
unsigned int hwirq, virq;
int i, j, ret;
+ struct pmic_irq_data *irqd = chip->irq_data;
- for (i = 0; i < mt6358_ints[top_gp].num_int_regs; i++) {
- sta_reg = mt6358_ints[top_gp].sta_reg +
- mt6358_ints[top_gp].sta_reg_shift * i;
+ for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {
+ sta_reg = irqd->pmic_ints[top_gp].sta_reg +
+ irqd->pmic_ints[top_gp].sta_reg_shift * i;
ret = regmap_read(chip->regmap, sta_reg, _status);
if (ret) {
@@ -114,8 +124,8 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
do {
j = __ffs(status);
- hwirq = mt6358_ints[top_gp].hwirq_base +
- MT6358_REG_WIDTH * i + j;
+ hwirq = irqd->pmic_ints[top_gp].hwirq_base +
+ MTK_PMIC_REG_WIDTH * i + j;
virq = irq_find_mapping(chip->irq_domain, hwirq);
if (virq)
@@ -131,12 +141,12 @@ static void mt6358_irq_sp_handler(struct mt6397_chip
*chip,
static irqreturn_t mt6358_irq_handler(int irq, void *data)
{
struct mt6397_chip *chip = data;
- struct pmic_irq_data *mt6358_irq_data = chip->irq_data;
+ struct pmic_irq_data *irqd = chip->irq_data;
unsigned int bit, i, top_irq_status = 0;
int ret;
ret = regmap_read(chip->regmap,
- mt6358_irq_data->top_int_status_reg,
+ irqd->top_int_status_reg,
_irq_status);
if (ret) {
dev_err(chip->dev,
@@ -144,8 +154,8 @@ static irqreturn_t mt6358_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- for (i = 0; i < mt6358_irq_data->num_top; i++) {
- bit = BIT(mt6358_ints[i].top_offset);
+ for (i = 0; i < irqd->num_top; i++) {
+ bit = BIT(irqd->pmic_ints[i].top_offset);
if (top_irq_status & bit) {
mt6358_irq_sp_handler(chip, i);
top_irq_status &= ~bit;
@@ -180,17 +190,18 @@ int mt6358_irq_init(struct mt6397_chip *chip)
int i, j, ret;
struct pmic_irq_data *irqd;
- irqd = devm_kzalloc(chip->dev, sizeof(*irqd), GFP_KERNEL);
- if (!irqd)
-
[PATCH v4 2/9] rtc: mt6397: refine RTC_TC_MTH
This patch adds RTC_TC_MTH_MASK to support new chips. Signed-off-by: Yuchen Huang Signed-off-by: Hsin-Hsiung Wang --- drivers/rtc/rtc-mt6397.c | 2 +- include/linux/mfd/mt6397/rtc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index 1894aded4c85..ea6da7476a5e 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -75,7 +75,7 @@ static int __mtk_rtc_read_time(struct mt6397_rtc *rtc, tm->tm_min = data[RTC_OFFSET_MIN]; tm->tm_hour = data[RTC_OFFSET_HOUR]; tm->tm_mday = data[RTC_OFFSET_DOM]; - tm->tm_mon = data[RTC_OFFSET_MTH]; + tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_TC_MTH_MASK; tm->tm_year = data[RTC_OFFSET_YEAR]; ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec); diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index c3748b53bf7d..068ae1c0f0e8 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -36,6 +36,7 @@ #define RTC_AL_MASK_DOWBIT(4) #define RTC_TC_SEC 0x000a +#define RTC_TC_MTH_MASK0x000f /* Min, Hour, Dom... register offset to RTC_TC_SEC */ #define RTC_OFFSET_SEC 0 #define RTC_OFFSET_MIN 1 -- 2.18.0
Re: [PATCH v2 3/8] dt-bindings: regulator: Add document for MT6359 regulator
Hi, On Wed, 2020-09-23 at 17:24 +0100, Mark Brown wrote: > On Mon, Sep 21, 2020 at 07:48:10PM +0800, Hsin-Hsiung Wang wrote: > > > +Required properties: > > +- compatible: "mediatek,mt6359-regulator" > > The compatible isn't used by the driver (which is good!) so should be > dropped from the binding document. Thanks for your comments, but I have a question about it. When I remove the compatible name in the dts, there will be some error message: [0.437562] mt6359-regulator: Failed to locate of_node [id: -1] [0.440612] mt6359-sound: Failed to locate of_node [id: -1] Do you mean that we don't need any compatible name in dts, mfd and regulator driver?
Re: [PATCH v3 5/8] regulator: mt6359: Add support for MT6359 regulator
Hi, On Tue, 2020-12-15 at 11:56 +, Mark Brown wrote: > On Tue, Dec 15, 2020 at 05:23:08PM +0800, Hsin-hsiung Wang wrote: > > On Tue, 2020-11-24 at 17:07 +, Mark Brown wrote: > > > > This looks like it could just be regmap_get_voltage_sel_regmap()? > > > Otherwise the driver looks good. > > > Thanks for the review. > > MT6359 regulator has sel_reg and status_reg, so we use > > mt6359_get_linear_voltage_sel for status_reg instead of > > regmap_get_voltage_sel_regmap() which uses sel_reg. > > Is the selector register not readable? In general the rule is that the > get should be reporting what was configured, the actual status should be > reported separately if it can be read separately. We don't currently > have a mechanism for doing that with voltage but one could be added. Thanks for your comments. The select register is readable, and I will update it in next patch.
Re: [PATCH v3 5/8] regulator: mt6359: Add support for MT6359 regulator
Hi,
On Tue, 2020-11-24 at 17:07 +, Mark Brown wrote:
> On Mon, Nov 23, 2020 at 11:48:07AM +0800, Hsin-Hsiung Wang wrote:
>
> > +static int mt6359_get_linear_voltage_sel(struct regulator_dev *rdev)
> > +{
> > + struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
> > + int ret, regval;
> > +
> > + ret = regmap_read(rdev->regmap, info->da_vsel_reg, );
> > + if (ret != 0) {
> > + dev_err(>dev,
> > + "Failed to get mt6359 Buck %s vsel reg: %d\n",
> > + info->desc.name, ret);
> > + return ret;
> > + }
> > +
> > + ret = (regval >> info->da_vsel_shift) & info->da_vsel_mask;
> > +
> > + return ret;
> > +}
>
> This looks like it could just be regmap_get_voltage_sel_regmap()?
> Otherwise the driver looks good.
Thanks for the review.
MT6359 regulator has sel_reg and status_reg, so we use
mt6359_get_linear_voltage_sel for status_reg instead of
regmap_get_voltage_sel_regmap() which uses sel_reg.
Thanks.
[PATCH v3 1/8] mfd: mt6358: refine interrupt code
This patch refines the interrupt related code to support new chips.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/mfd/mt6358-irq.c| 65 +++--
include/linux/mfd/mt6358/core.h | 8 ++--
2 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index db734f2831ff..4b094e5e51cc 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -13,7 +13,9 @@
#include
#include
-static struct irq_top_t mt6358_ints[] = {
+#define MTK_PMIC_REG_WIDTH 16
+
+static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(BUCK),
MT6358_TOP_GEN(LDO),
MT6358_TOP_GEN(PSC),
@@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static struct pmic_irq_data mt6358_irqd = {
+ .num_top = ARRAY_SIZE(mt6358_ints),
+ .num_pmic_irqs = MT6358_IRQ_NR,
+ .top_int_status_reg = MT6358_TOP_INT_STATUS0,
+ .pmic_ints = mt6358_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -62,15 +71,15 @@ static void pmic_irq_sync_unlock(struct irq_data *data)
/* Find out the IRQ group */
top_gp = 0;
while ((top_gp + 1) < irqd->num_top &&
- i >= mt6358_ints[top_gp + 1].hwirq_base)
+ i >= irqd->pmic_ints[top_gp + 1].hwirq_base)
top_gp++;
/* Find the IRQ registers */
- gp_offset = i - mt6358_ints[top_gp].hwirq_base;
- int_regs = gp_offset / MT6358_REG_WIDTH;
- shift = gp_offset % MT6358_REG_WIDTH;
- en_reg = mt6358_ints[top_gp].en_reg +
-(mt6358_ints[top_gp].en_reg_shift * int_regs);
+ gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;
+ int_regs = gp_offset / MTK_PMIC_REG_WIDTH;
+ shift = gp_offset % MTK_PMIC_REG_WIDTH;
+ en_reg = irqd->pmic_ints[top_gp].en_reg +
+(irqd->pmic_ints[top_gp].en_reg_shift * int_regs);
regmap_update_bits(chip->regmap, en_reg, BIT(shift),
irqd->enable_hwirq[i] << shift);
@@ -95,10 +104,11 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
unsigned int irq_status, sta_reg, status;
unsigned int hwirq, virq;
int i, j, ret;
+ struct pmic_irq_data *irqd = chip->irq_data;
- for (i = 0; i < mt6358_ints[top_gp].num_int_regs; i++) {
- sta_reg = mt6358_ints[top_gp].sta_reg +
- mt6358_ints[top_gp].sta_reg_shift * i;
+ for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {
+ sta_reg = irqd->pmic_ints[top_gp].sta_reg +
+ irqd->pmic_ints[top_gp].sta_reg_shift * i;
ret = regmap_read(chip->regmap, sta_reg, _status);
if (ret) {
@@ -114,8 +124,8 @@ static void mt6358_irq_sp_handler(struct mt6397_chip *chip,
do {
j = __ffs(status);
- hwirq = mt6358_ints[top_gp].hwirq_base +
- MT6358_REG_WIDTH * i + j;
+ hwirq = irqd->pmic_ints[top_gp].hwirq_base +
+ MTK_PMIC_REG_WIDTH * i + j;
virq = irq_find_mapping(chip->irq_domain, hwirq);
if (virq)
@@ -131,12 +141,12 @@ static void mt6358_irq_sp_handler(struct mt6397_chip
*chip,
static irqreturn_t mt6358_irq_handler(int irq, void *data)
{
struct mt6397_chip *chip = data;
- struct pmic_irq_data *mt6358_irq_data = chip->irq_data;
+ struct pmic_irq_data *irqd = chip->irq_data;
unsigned int bit, i, top_irq_status = 0;
int ret;
ret = regmap_read(chip->regmap,
- mt6358_irq_data->top_int_status_reg,
+ irqd->top_int_status_reg,
_irq_status);
if (ret) {
dev_err(chip->dev,
@@ -144,8 +154,8 @@ static irqreturn_t mt6358_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- for (i = 0; i < mt6358_irq_data->num_top; i++) {
- bit = BIT(mt6358_ints[i].top_offset);
+ for (i = 0; i < irqd->num_top; i++) {
+ bit = BIT(irqd->pmic_ints[i].top_offset);
if (top_irq_status & bit) {
mt6358_irq_sp_handler(chip, i);
top_irq_status &= ~bit;
@@ -180,17 +190,18 @@ int mt6358_irq_init(struct mt6397_chip *chip)
int i, j, ret;
struct pmic_irq_data *irqd;
- irqd = devm_kzalloc(chip->dev, sizeof(*irqd), GFP_KERNEL);
- if (!irqd)
- r
[PATCH v3 4/8] mfd: Add support for the MediaTek MT6359 PMIC
This adds support for the MediaTek MT6359 PMIC. This is a
multifunction device with the following sub modules:
- Regulator
- Codec
- Interrupt
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6359 MFD is a child device of the pwrap.
Signed-off-by: Hsin-Hsiung Wang
Acked-for-MFD-by: Lee Jones
---
drivers/mfd/mt6358-irq.c | 24 ++
drivers/mfd/mt6397-core.c| 23 ++
include/linux/mfd/mt6359/core.h | 133 +++
include/linux/mfd/mt6359/registers.h | 529 +++
include/linux/mfd/mt6397/core.h | 1 +
5 files changed, 710 insertions(+)
create mode 100644 include/linux/mfd/mt6359/core.h
create mode 100644 include/linux/mfd/mt6359/registers.h
diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
index 4b094e5e51cc..83f3ffbdbb4c 100644
--- a/drivers/mfd/mt6358-irq.c
+++ b/drivers/mfd/mt6358-irq.c
@@ -5,6 +5,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -26,6 +28,17 @@ static const struct irq_top_t mt6358_ints[] = {
MT6358_TOP_GEN(MISC),
};
+static const struct irq_top_t mt6359_ints[] = {
+ MT6359_TOP_GEN(BUCK),
+ MT6359_TOP_GEN(LDO),
+ MT6359_TOP_GEN(PSC),
+ MT6359_TOP_GEN(SCK),
+ MT6359_TOP_GEN(BM),
+ MT6359_TOP_GEN(HK),
+ MT6359_TOP_GEN(AUD),
+ MT6359_TOP_GEN(MISC),
+};
+
static struct pmic_irq_data mt6358_irqd = {
.num_top = ARRAY_SIZE(mt6358_ints),
.num_pmic_irqs = MT6358_IRQ_NR,
@@ -33,6 +46,13 @@ static struct pmic_irq_data mt6358_irqd = {
.pmic_ints = mt6358_ints,
};
+static struct pmic_irq_data mt6359_irqd = {
+ .num_top = ARRAY_SIZE(mt6359_ints),
+ .num_pmic_irqs = MT6359_IRQ_NR,
+ .top_int_status_reg = MT6359_TOP_INT_STATUS0,
+ .pmic_ints = mt6359_ints,
+};
+
static void pmic_irq_enable(struct irq_data *data)
{
unsigned int hwirq = irqd_to_hwirq(data);
@@ -195,6 +215,10 @@ int mt6358_irq_init(struct mt6397_chip *chip)
chip->irq_data = _irqd;
break;
+ case MT6359_CHIP_ID:
+ chip->irq_data = _irqd;
+ break;
+
default:
dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
return -ENODEV;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index f6cd8a660602..62942139b4e7 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -13,9 +13,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#define MT6323_RTC_BASE0x8000
@@ -99,6 +101,16 @@ static const struct mfd_cell mt6358_devs[] = {
},
};
+static const struct mfd_cell mt6359_devs[] = {
+ {
+ .name = "mt6359-regulator",
+ .of_compatible = "mediatek,mt6359-regulator",
+ }, {
+ .name = "mt6359-sound",
+ .of_compatible = "mediatek,mt6359-sound",
+ },
+};
+
static const struct mfd_cell mt6397_devs[] = {
{
.name = "mt6397-rtc",
@@ -149,6 +161,14 @@ static const struct chip_data mt6358_core = {
.irq_init = mt6358_irq_init,
};
+static const struct chip_data mt6359_core = {
+ .cid_addr = MT6359_SWCID,
+ .cid_shift = 8,
+ .cells = mt6359_devs,
+ .cell_size = ARRAY_SIZE(mt6359_devs),
+ .irq_init = mt6358_irq_init,
+};
+
static const struct chip_data mt6397_core = {
.cid_addr = MT6397_CID,
.cid_shift = 0,
@@ -218,6 +238,9 @@ static const struct of_device_id mt6397_of_match[] = {
}, {
.compatible = "mediatek,mt6358",
.data = _core,
+ }, {
+ .compatible = "mediatek,mt6359",
+ .data = _core,
}, {
.compatible = "mediatek,mt6397",
.data = _core,
diff --git a/include/linux/mfd/mt6359/core.h b/include/linux/mfd/mt6359/core.h
new file mode 100644
index ..61872f1ecbe4
--- /dev/null
+++ b/include/linux/mfd/mt6359/core.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#ifndef __MFD_MT6359_CORE_H__
+#define __MFD_MT6359_CORE_H__
+
+enum mt6359_irq_top_status_shift {
+ MT6359_BUCK_TOP = 0,
+ MT6359_LDO_TOP,
+ MT6359_PSC_TOP,
+ MT6359_SCK_TOP,
+ MT6359_BM_TOP,
+ MT6359_HK_TOP,
+ MT6359_AUD_TOP = 7,
+ MT6359_MISC_TOP,
+};
+
+enum mt6359_irq_numbers {
+ MT6359_IRQ_VCORE_OC = 1,
+ MT6359_IRQ_VGPU11_OC,
+ MT6359_IRQ_VGPU12_OC,
+ MT6359_IRQ_VMODEM_OC,
+ MT6359_IRQ_VPROC1_OC,
+ MT6359_IRQ_VPROC2_OC,
+ MT6359_IRQ_VS1_OC,
+ MT6359_IRQ_VS2_OC,
+ MT6359_IRQ_VPA_OC = 9,
+ MT6359_IRQ_VFE28_OC = 16,
+ MT635
[PATCH v3 7/8] regulator: mt6359: Add support for MT6359P regulator
The MT6359P is a eco version for MT6359 regulator.
We add support based on MT6359 regulator driver.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/regulator/mt6359-regulator.c | 413 -
include/linux/mfd/mt6359p/registers.h | 249 +
include/linux/regulator/mt6359-regulator.h | 1 +
3 files changed, 658 insertions(+), 5 deletions(-)
create mode 100644 include/linux/mfd/mt6359p/registers.h
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index 6ce782723eba..396bd1ed5e14 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
#include
@@ -154,6 +155,28 @@ struct mt6359_regulator_info {
.qi = BIT(0), \
}
+#define MT6359P_LDO1(match, _name, _ops, _volt_table, \
+ _enable_reg, _enable_mask, _status_reg, \
+ _vsel_reg, _vsel_mask) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .ops = &_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .n_voltages = ARRAY_SIZE(_volt_table), \
+ .volt_table = _volt_table, \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(_enable_mask), \
+ }, \
+ .status_reg = _status_reg, \
+ .qi = BIT(0), \
+}
+
static const struct linear_range mt_volt_range1[] = {
REGULATOR_LINEAR_RANGE(80, 0, 0x70, 12500),
};
@@ -182,6 +205,10 @@ static const struct linear_range mt_volt_range7[] = {
REGULATOR_LINEAR_RANGE(50, 0, 0x7f, 6250),
};
+static const struct linear_range mt_volt_range8[] = {
+ REGULATOR_LINEAR_RANGE(506250, 0, 0x7f, 6250),
+};
+
static const u32 vsim1_voltages[] = {
0, 0, 0, 170, 180, 0, 0, 0, 270, 0, 0, 300, 310,
};
@@ -219,6 +246,10 @@ static const u32 vrfck_voltages[] = {
0, 0, 150, 0, 0, 0, 0, 160, 0, 0, 0, 0, 170,
};
+static const u32 vrfck_voltages_1[] = {
+ 124, 160,
+};
+
static const u32 vio28_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 280, 290, 300, 310, 330,
};
@@ -227,6 +258,11 @@ static const u32 vemc_voltages[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 290, 300, 0, 330,
};
+static const u32 vemc_voltages_1[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 250, 280, 290, 300, 310,
+ 330,
+};
+
static const u32 va12_voltages[] = {
0, 0, 0, 0, 0, 0, 120, 130,
};
@@ -381,6 +417,78 @@ static int mt6359_regulator_set_mode(struct regulator_dev
*rdev,
return ret;
}
+static int mt6359p_vemc_set_voltage_sel(struct regulator_dev *rdev,
+ u32 sel)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ sel <<= ffs(info->desc.vsel_mask) - 1;
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, TMA_KEY);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+
+ switch (val) {
+ case 0:
+ /* If HW trapping is 0, use VEMC_VOSEL_0 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg,
+info->desc.vsel_mask, sel);
+ break;
+ case 1:
+ /* If HW trapping is 1, use VEMC_VOSEL_1 */
+ ret = regmap_update_bits(rdev->regmap,
+info->desc.vsel_reg + 0x2,
+info->desc.vsel_mask, sel);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (ret)
+ return ret;
+
+ ret = regmap_write(rdev->regmap, MT6359P_TMA_KEY_ADDR, 0);
+ return ret;
+}
+
+static int mt6359p_vemc_get_voltage_sel(struct regulator_dev *rdev)
+{
+ struct mt6359_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val = 0;
+
+ ret = regmap_read(rdev->regmap, MT6359P_VM_MODE_ADDR, );
+ if (ret)
+ return ret;
+ switch (val) {
+ case 0:
[PATCH v3 5/8] regulator: mt6359: Add support for MT6359 regulator
From: Wen Su
The MT6359 is a regulator found on boards based on MediaTek MT6779 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
Acked-by: Mark Brown
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/mt6359-regulator.c | 714 +
include/linux/regulator/mt6359-regulator.h | 58 ++
4 files changed, 782 insertions(+)
create mode 100644 drivers/regulator/mt6359-regulator.c
create mode 100644 include/linux/regulator/mt6359-regulator.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 020a00d6696b..7572efc38bd5 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -721,6 +721,15 @@ config REGULATOR_MT6358
This driver supports the control of different power rails of device
through regulator interface.
+config REGULATOR_MT6359
+ tristate "MediaTek MT6359 PMIC"
+ depends on MFD_MT6397
+ help
+ Say y here to select this option to enable the power regulator of
+ MediaTek MT6359 PMIC.
+ This driver supports the control of different power rails of device
+ through regulator interface.
+
config REGULATOR_MT6360
tristate "MT6360 SubPMIC Regulator"
depends on MFD_MT6360
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 6ebae516258e..56c28ab191e4 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
+obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o
obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o
obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
new file mode 100644
index ..9746e2c281ae
--- /dev/null
+++ b/drivers/regulator/mt6359-regulator.c
@@ -0,0 +1,714 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 MediaTek Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MT6359_BUCK_MODE_AUTO 0
+#define MT6359_BUCK_MODE_FORCE_PWM 1
+#define MT6359_BUCK_MODE_NORMAL0
+#define MT6359_BUCK_MODE_LP2
+
+/*
+ * MT6359 regulators' information
+ *
+ * @desc: standard fields of regulator description.
+ * @status_reg: for query status of regulators.
+ * @qi: Mask for query enable signal status of regulators.
+ * @modeset_reg: for operating AUTO/PWM mode register.
+ * @modeset_mask: MASK for operating modeset register.
+ * @modeset_shift: SHIFT for operating modeset register.
+ */
+struct mt6359_regulator_info {
+ struct regulator_desc desc;
+ u32 status_reg;
+ u32 qi;
+ u32 da_vsel_reg;
+ u32 da_vsel_mask;
+ u32 da_vsel_shift;
+ u32 modeset_reg;
+ u32 modeset_mask;
+ u32 modeset_shift;
+ u32 lp_mode_reg;
+ u32 lp_mode_mask;
+ u32 lp_mode_shift;
+};
+
+#define MT6359_BUCK(match, _name, min, max, step, min_sel, \
+ volt_ranges, _enable_reg, _status_reg, \
+ _da_vsel_reg, _da_vsel_mask, _da_vsel_shift,\
+ _vsel_reg, _vsel_mask, \
+ _lp_mode_reg, _lp_mode_shift, \
+ _modeset_reg, _modeset_shift) \
+[MT6359_ID_##_name] = {\
+ .desc = { \
+ .name = #_name, \
+ .of_match = of_match_ptr(match),\
+ .ops = _volt_range_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .id = MT6359_ID_##_name,\
+ .owner = THIS_MODULE, \
+ .uV_step = (step), \
+ .linear_min_sel = (min_sel),\
+ .n_voltages = ((max) - (min)) / (step) + 1, \
+ .min_uV = (min),\
+ .linear_ranges = volt_ranges, \
+ .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
+ .vsel_reg = _vsel_reg, \
+ .vsel_mask = _vsel_mask,\
+ .enable_reg = _enable_reg, \
+ .enable_mask = BIT(0), \
+
[PATCH v3 3/8] dt-bindings: regulator: Add document for MT6359 regulator
add dt-binding document for MediaTek MT6359 PMIC
Signed-off-by: Hsin-Hsiung Wang
---
.../bindings/regulator/mt6359-regulator.yaml | 145 ++
1 file changed, 145 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
new file mode 100644
index ..bc882b93c86a
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml
@@ -0,0 +1,145 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/regulator/mt6359-regulator.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MT6359 Regulator from MediaTek Integrated
+
+maintainers:
+ - Hsin-Hsiung Wang
+
+description: |
+ List of regulators provided by this controller. It is named
+ according to its regulator type, buck_ and ldo_.
+ MT6359 regulators node should be sub node of the MT6397 MFD node.
+
+properties:
+ $nodename:
+pattern: "^pmic$"
+
+ mt6359regulator:
+type: object
+description: |
+ list of regulators provided by this controller.
+
+patternProperties:
+ "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$"
+
+ "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(ibr|rf12|usb|camio|efuse|xo22)$"
+
+ "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
+
+ "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$"
+
+ "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsram_(proc2|others|md|proc1|others_sshub)$"
+
+ "^ldo_v(fe|bif|io)28$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(fe|bif|io)28$"
+
+ "^ldo_v(aud|io|aux|rf|m)18$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^v(aud|io|aux|rf|m)18$"
+
+ "^ldo_vsim[12]$":
+$ref: "regulator.yaml#"
+
+properties:
+ regulator-name:
+pattern: "^vsim[12]$"
+
+additionalProperties: false
+
+required:
+ - regulator-name
+
+examples:
+ - |
+pmic {
+ mt6359regulator {
+mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-always-on;
+ regulator-allowed-modes = <0 1 2>;
+};
+
+mt6359_vcamio_ldo_reg: ldo_vcamio {
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <170>;
+ regulator-max-microvolt = <190>;
+};
+
+mt6359_vcn18_ldo_reg: ldo_vcn18 {
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-enable-ramp-delay = <240>;
+};
+
+mt6359_vsram_proc2_ldo_reg: ldo_vsram_proc2 {
+ regulator-name = "vsram_proc2";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <1293750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <240>;
+ regulator-always-on;
+};
+
+mt6359_vfe28_ldo_reg: ldo_vfe28 {
+ regulator-name = "vfe28";
+ regulator-min-microvolt = <280>;
+ regulator-max-microvolt = <280>;
+ regulator-enable-ramp-delay = <120>;
+};
+
+mt6359_vaud18_ldo_reg: ldo_vaud18 {
+ regulator-name = "vaud18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-enable-ramp-delay = <240>;
+};
+
+mt6359_vsim1_ldo_reg: ldo_vsim1 {
+ regulator-name = "vsim1";
+ regulator-min-microvolt = <170>;
+ regulator-max-microvolt = <310>;
+ regulator-enable-ramp-delay = <480>;
+};
+ };
+};
+...
--
2.18.0
[PATCH v3 6/8] regulator: mt6359: Set the enable time for LDOs
Add the enable time for LDOs.
This patch is preparing for adding mt6359p regulator support.
Signed-off-by: Hsin-Hsiung Wang
Acked-by: Mark Brown
---
drivers/regulator/mt6359-regulator.c | 65 ++--
1 file changed, 42 insertions(+), 23 deletions(-)
diff --git a/drivers/regulator/mt6359-regulator.c
b/drivers/regulator/mt6359-regulator.c
index 9746e2c281ae..6ce782723eba 100644
--- a/drivers/regulator/mt6359-regulator.c
+++ b/drivers/regulator/mt6359-regulator.c
@@ -114,7 +114,7 @@ struct mt6359_regulator_info {
#define MT6359_LDO(match, _name, _volt_table, \
_enable_reg, _enable_mask, _status_reg, \
- _vsel_reg, _vsel_mask) \
+ _vsel_reg, _vsel_mask, _en_delay) \
[MT6359_ID_##_name] = {\
.desc = { \
.name = #_name, \
@@ -129,6 +129,7 @@ struct mt6359_regulator_info {
.vsel_mask = _vsel_mask,\
.enable_reg = _enable_reg, \
.enable_mask = BIT(_enable_mask), \
+ .enable_time = _en_delay, \
}, \
.status_reg = _status_reg, \
.qi = BIT(0), \
@@ -516,15 +517,18 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vsim1", VSIM1, vsim1_voltages,
MT6359_RG_LDO_VSIM1_EN_ADDR, MT6359_RG_LDO_VSIM1_EN_SHIFT,
MT6359_DA_VSIM1_B_EN_ADDR, MT6359_RG_VSIM1_VOSEL_ADDR,
- MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT),
+ MT6359_RG_VSIM1_VOSEL_MASK << MT6359_RG_VSIM1_VOSEL_SHIFT,
+ 480),
MT6359_LDO("ldo_vibr", VIBR, vibr_voltages,
MT6359_RG_LDO_VIBR_EN_ADDR, MT6359_RG_LDO_VIBR_EN_SHIFT,
MT6359_DA_VIBR_B_EN_ADDR, MT6359_RG_VIBR_VOSEL_ADDR,
- MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT),
+ MT6359_RG_VIBR_VOSEL_MASK << MT6359_RG_VIBR_VOSEL_SHIFT,
+ 240),
MT6359_LDO("ldo_vrf12", VRF12, vrf12_voltages,
MT6359_RG_LDO_VRF12_EN_ADDR, MT6359_RG_LDO_VRF12_EN_SHIFT,
MT6359_DA_VRF12_B_EN_ADDR, MT6359_RG_VRF12_VOSEL_ADDR,
- MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT),
+ MT6359_RG_VRF12_VOSEL_MASK << MT6359_RG_VRF12_VOSEL_SHIFT,
+ 120),
MT6359_REG_FIXED("ldo_vusb", VUSB, MT6359_RG_LDO_VUSB_EN_0_ADDR,
MT6359_DA_VUSB_B_EN_ADDR, 300),
MT6359_LDO_LINEAR("ldo_vsram_proc2", VSRAM_PROC2, 50, 1293750, 6250,
@@ -539,11 +543,13 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vio18", VIO18, volt18_voltages,
MT6359_RG_LDO_VIO18_EN_ADDR, MT6359_RG_LDO_VIO18_EN_SHIFT,
MT6359_DA_VIO18_B_EN_ADDR, MT6359_RG_VIO18_VOSEL_ADDR,
- MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT),
+ MT6359_RG_VIO18_VOSEL_MASK << MT6359_RG_VIO18_VOSEL_SHIFT,
+ 960),
MT6359_LDO("ldo_vcamio", VCAMIO, volt18_voltages,
MT6359_RG_LDO_VCAMIO_EN_ADDR, MT6359_RG_LDO_VCAMIO_EN_SHIFT,
MT6359_DA_VCAMIO_B_EN_ADDR, MT6359_RG_VCAMIO_VOSEL_ADDR,
- MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT),
+ MT6359_RG_VCAMIO_VOSEL_MASK << MT6359_RG_VCAMIO_VOSEL_SHIFT,
+ 1290),
MT6359_REG_FIXED("ldo_vcn18", VCN18, MT6359_RG_LDO_VCN18_EN_ADDR,
MT6359_DA_VCN18_B_EN_ADDR, 180),
MT6359_REG_FIXED("ldo_vfe28", VFE28, MT6359_RG_LDO_VFE28_EN_ADDR,
@@ -551,19 +557,20 @@ static struct mt6359_regulator_info mt6359_regulators[] =
{
MT6359_LDO("ldo_vcn13", VCN13, vcn13_voltages,
MT6359_RG_LDO_VCN13_EN_ADDR, MT6359_RG_LDO_VCN13_EN_SHIFT,
MT6359_DA_VCN13_B_EN_ADDR, MT6359_RG_VCN13_VOSEL_ADDR,
- MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT),
+ MT6359_RG_VCN13_VOSEL_MASK << MT6359_RG_VCN13_VOSEL_SHIFT,
+ 240),
MT6359_LDO("ldo_vcn33_1_bt", VCN33_1_BT, vcn33_voltages,
MT6359_RG_LDO_VCN33_1_EN_0_ADDR,
MT6359_RG_LDO_VCN33_1_EN_0_SHIFT,
MT6359_DA_VCN33_1_B_EN_ADDR, MT6359_RG_VCN33_1_VOSEL_ADDR,
MT6359_R
[PATCH v3 0/8] Add Support for MediaTek PMIC MT6359
This patchset includes refactoring interrupt and adding support to MT6359 PMIC. This patchset includes refactoring interrupt and adding support to MT6359 PMIC. MT6359 is the primary PMIC for MT6779 and probably other SOCs. The series[1] sent by Wen will continue to upstream in this patchset afterwards. The series[1] sent by Wen will continue to upstream in this patchset afterwards. The series[1] sent by Wen will continue to upstream in this patchset afterwards. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=306579 changes since v2: - update binding document in DT schema format. - remove unused compatible name. - update correct registers for VBBCK and VA09. Hsin-Hsiung Wang (6): mfd: mt6358: refine interrupt code dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC dt-bindings: regulator: Add document for MT6359 regulator mfd: Add support for the MediaTek MT6359 PMIC regulator: mt6359: Set the enable time for LDOs regulator: mt6359: Add support for MT6359P regulator Wen Su (2): regulator: mt6359: Add support for MT6359 regulator arm64: dts: mt6359: add PMIC MT6359 related nodes .../devicetree/bindings/mfd/mt6397.txt|8 +- .../bindings/regulator/mt6359-regulator.yaml | 145 +++ arch/arm64/boot/dts/mediatek/mt6359.dtsi | 295 + drivers/mfd/mt6358-irq.c | 89 +- drivers/mfd/mt6397-core.c | 23 + drivers/regulator/Kconfig |9 + drivers/regulator/Makefile|1 + drivers/regulator/mt6359-regulator.c | 1136 + include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6358/core.h |8 +- include/linux/mfd/mt6359/core.h | 133 ++ include/linux/mfd/mt6359/registers.h | 529 include/linux/mfd/mt6359p/registers.h | 249 include/linux/mfd/mt6397/core.h |1 + include/linux/regulator/mt6359-regulator.h| 59 + 14 files changed, 2652 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi create mode 100644 drivers/regulator/mt6359-regulator.c create mode 100644 include/linux/mfd/mt6359/core.h create mode 100644 include/linux/mfd/mt6359/registers.h create mode 100644 include/linux/mfd/mt6359p/registers.h create mode 100644 include/linux/regulator/mt6359-regulator.h -- 2.18.0
[PATCH v3 8/8] arm64: dts: mt6359: add PMIC MT6359 related nodes
From: Wen Su
add PMIC MT6359 related nodes which is for MT6779 platform
Signed-off-by: Wen Su
Signed-off-by: Hsin-Hsiung Wang
---
arch/arm64/boot/dts/mediatek/mt6359.dtsi | 295 +++
1 file changed, 295 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6359.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi
b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
new file mode 100644
index ..1f5e05480caa
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6359.dtsi
@@ -0,0 +1,295 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+ {
+ pmic: pmic {
+ compatible = "mediatek,mt6359";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6359codec: mt6359codec {
+ compatible = "mediatek,mt6359-sound";
+ };
+
+ mt6359regulator: mt6359regulator {
+ mt6359_vs1_buck_reg: buck_vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <220>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vgpu11_buck_reg: buck_vgpu11 {
+ regulator-name = "vgpu11";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vmodem_buck_reg: buck_vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <110>;
+ regulator-ramp-delay = <10760>;
+ regulator-enable-ramp-delay = <200>;
+ };
+ mt6359_vpu_buck_reg: buck_vpu {
+ regulator-name = "vpu";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vcore_buck_reg: buck_vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <5000>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vs2_buck_reg: buck_vs2 {
+ regulator-name = "vs2";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <160>;
+ regulator-enable-ramp-delay = <0>;
+ regulator-always-on;
+ };
+ mt6359_vpa_buck_reg: buck_vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <365>;
+ regulator-enable-ramp-delay = <300>;
+ };
+ mt6359_vproc2_buck_reg: buck_vproc2 {
+ regulator-name = "vproc2";
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <7500>;
+ regulator-enable-ramp-delay = <200>;
+ regulator-allowed-modes = <0 1 2>;
+ };
+ mt6359_vproc1_buck_reg: buck_vproc1 {
+ regulator-name = "vproc1";
+ regulator-min-microvolt = <40>;
+ regulator-ma
[PATCH v3 2/8] dt-bindings: mfd: Add compatible for the MediaTek MT6359 PMIC
This adds compatible for the MediaTek MT6359 PMIC. Signed-off-by: Hsin-Hsiung Wang Reviewed-by: Rob Herring Acked-for-MFD-by: Lee Jones --- Documentation/devicetree/bindings/mfd/mt6397.txt | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 2661775a3825..3d173b522aa8 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6358" for PMIC MT6358 + "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 Optional subnodes: @@ -29,6 +30,7 @@ Optional subnodes: Required properties: Should be one of follows - compatible: "mediatek,mt6323-rtc" - compatible: "mediatek,mt6358-rtc" + - compatible: "mediatek,mt6359-rtc" - compatible: "mediatek,mt6397-rtc" For details, see ../rtc/rtc-mt6397.txt - regulators @@ -37,11 +39,15 @@ Optional subnodes: see ../regulator/mt6323-regulator.txt - compatible: "mediatek,mt6358-regulator" see ../regulator/mt6358-regulator.txt + - compatible: "mediatek,mt6359-regulator" + see ../regulator/mt6359-regulator.txt - compatible: "mediatek,mt6397-regulator" see ../regulator/mt6397-regulator.txt - codec Required properties: - - compatible: "mediatek,mt6397-codec" or "mediatek,mt6358-sound" + - compatible: "mediatek,mt6397-codec" + - compatible: "mediatek,mt6358-sound" + - compatible: "mediatek,mt6359-sound" - clk Required properties: - compatible: "mediatek,mt6397-clk" -- 2.18.0
[PATCH v4 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192 SoCs Platform. Signed-off-by: Hsin-Hsiung Wang Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index ecac2bb..8051c17 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -22,6 +22,7 @@ Required properties in pwrap device node. "mediatek,mt6765-pwrap" for MT6765 SoCs "mediatek,mt6779-pwrap" for MT6779 SoCs "mediatek,mt6797-pwrap" for MT6797 SoCs + "mediatek,mt6873-pwrap" for MT6873/8192 SoCs "mediatek,mt7622-pwrap" for MT7622 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs -- 2.6.4
[PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5678f46..d1cd050 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] =0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] =0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] =0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] =0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
.compatible = "mediatek,mt6797-pwrap",
.data = _mt6797,
}, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = _mt6873,
+ }, {
.compatible = "mediatek,mt7622-pwrap",
.data = _mt7622,
}, {
--
2.6.4
