[PATCH v4 1/4] dt-bindings: arm: rockchip: Update ROCKPi 4 binding
ROCKPi 4 has 3 variants of hardware platforms called ROCKPi 4A, 4B, and 4C. - ROCKPi 4A has no Wif/BT. - ROCKPi 4B has AP6256 Wifi/BT, PoE. - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C So, update the existing ROCKPi 4 binding to support ROCKPi 4A/B/C hardware platforms. Signed-off-by: Jagan Teki --- Changes for v4: - update binding to satisfy dt_binding_check. Changes for v3: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index db2e35796795..7025d00c06cc 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -430,8 +430,12 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A/B/C items: + - enum: + - radxa,rockpi4a + - radxa,rockpi4b + - radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 -- 2.25.1
[PATCH v4 4/4] arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4c
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 8832d05c2571..02cdb3c4a6c1 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
new file mode 100644
index ..4c7ebb1c5d2d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4C";
+ compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
+
+_host {
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+};
+
+_host_en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO _pull_none>;
+};
--
2.25.1
[PATCH v2] arm64: defconfig: Enable REGULATOR_MP8859
RK3399 boards like ROC-RK3399-PC is using MP8859 DC/DC converter for 12V supply. roc-rk3399-pc initially used 12V fixed regulator for this supply, but the below commit has switched to use MP8859. commit <1fc61ed04d309b0b8b3562acf701ab988eee12de> "arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc" So, enable bydefault on the defconfig. Signed-off-by: Jagan Teki Tested-by: Suniel Mahesh --- Changes for v2: - none arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 883e8bace3ed..62bcbf987a70 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -556,6 +556,7 @@ CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX8973=y +CONFIG_REGULATOR_MP8859=y CONFIG_REGULATOR_PFUZE100=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_QCOM_RPMH=y -- 2.25.1
Re: [PATCH v3 1/4] dt-bindings: arm: rockchip: Update ROCKPi 4 binding
On Thu, Jul 23, 2020 at 9:20 PM Rob Herring wrote: > > On Thu, Jul 23, 2020 at 02:32:07PM +0530, Jagan Teki wrote: > > ROCKPi 4 has 3 variants of hardware platforms called > > ROCKPi 4A, 4B, and 4C. > > > > - ROCKPi 4A has no Wif/BT. > > - ROCKPi 4B has AP6256 Wifi/BT, PoE. > > - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled > > GPIO pin change compared to 4B, 4C > > > > So, update the existing ROCKPi 4 binding to support > > ROCKPi 4A/B/C hardware platforms. > > > > Signed-off-by: Jagan Teki > > --- > > Changes for v3: > > - new patch > > > > Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml > > b/Documentation/devicetree/bindings/arm/rockchip.yaml > > index db2e35796795..e6f656b0bd56 100644 > > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > > @@ -430,8 +430,12 @@ properties: > >- const: radxa,rock > >- const: rockchip,rk3188 > > > > - - description: Radxa ROCK Pi 4 > > + - description: Radxa ROCK Pi 4A/B/C > > items: > > + - enum: > > + - const: radxa,rockpi4a > > + - const: radxa,rockpi4b > > + - const: radxa,rockpi4c > >- const: radxa,rockpi4 > > radxa,rockpi4 already meant 'ROCKPi 4A' and should continue to do so. > Just add 4B and 4C strings. It's up to you if they should be backwards > compatible with 'radxa,rockpi4' (meaning 4A), but I'd guess not unless > it's just a board pop option. At-least from dts nodes enablement point of view the existing dts (with radxa,rockpi4) is 4B since it has wifi/bt enabled. 4A is the real name of the board so having a compatible with radxa,rockpi4a is meaningful as I understood. So, based on the above statements the respective binding look like - description: Radxa ROCK Pi 4A/B/C items: - enum: - radxa,rockpi4a - radxa,rockpi4b - radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 Comments, please? Jagan.
[PATCH 6/7] arm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0 10.1" OF
Engicam C.TOUCH 2.0 10.1" Open Frame is a Carrier board with Capacitive touch 10.1" open frame. Genaral features: - TFT 10.1" industrial, 1280x800 LVDS display - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN SOM's like PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add support for it. Signed-off-by: Jagan Teki --- .../arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi | 7 +++ 1 file changed, 7 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi new file mode 100644 index ..cb00988953e9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +#include "px30-engicam-common.dtsi" -- 2.25.1
[PATCH 7/7] arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 10.1" Open Frame is a Carrier board with Capacitive
touch 10.1" open frame from Engicam.
PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
Add support for it.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../rockchip/px30-px30-core-ctouch2-of10.dts | 21 +++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core-ctouch2-of10.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 65116fcb7368..5b85e315f14d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-px30-core-ctouch2-of10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-px30-core-edimm2.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-px30-core-ctouch2-of10.dts
b/arch/arm64/boot/dts/rockchip/px30-px30-core-ctouch2-of10.dts
new file mode 100644
index ..9c957a21e38f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-px30-core-ctouch2-of10.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-engicam-ctouch2-of10.dtsi"
+#include "px30-px30-core.dtsi"
+
+/ {
+ model = "Engicam PX30.Core C.TOUCH 2.0 10.1\" Open Frame";
+ compatible = "engicam,px30-core-ctouch2-of10", "engicam,px30-px30-core",
+"rockchip,px30";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+};
--
2.25.1
[PATCH 5/7] dt-bindings: arm: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 10.1" Open Frame is a Carrier board with Capacitive touch 10.1" open frame from Engicam. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add bindings for it. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 392bdb7042de..910b28dcbe53 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -70,6 +70,12 @@ properties: - const: elgin,rv1108-r1 - const: rockchip,rv1108 + - description: Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame +items: + - const: engicam,px30-core-ctouch2-of10 + - const: engicam,px30-px30-core + - const: rockchip,px30 + - description: Engicam PX30.Core EDIMM2.2 Starter Kit items: - const: engicam,px30-core-edimm2.2 -- 2.25.1
[PATCH 2/7] arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
SOM's like PX30.Core needs to mount on top of this Evaluation board
for creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki
---
.../dts/rockchip/px30-engicam-common.dtsi | 31 +++
.../dts/rockchip/px30-engicam-edimm2.2.dtsi | 7 +
2 files changed, 38 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi
create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi
b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi
new file mode 100644
index ..fa0645231b09
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/ {
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-name = "vcc5v0_sys"; /* +5V */
+ };
+};
+
+ {
+ phy-supply = <_3v3>;/* +3V3_SOM */
+ status = "okay";
+};
+
+ {
+ vmmc-supply = <_3v3>; /* +3V3_SOM */
+ status = "okay";
+};
+
+ {
+ pinctrl-0 = <_xfer>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi
b/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi
new file mode 100644
index ..cb00988953e9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "px30-engicam-common.dtsi"
--
2.25.1
[PATCH 1/7] dt-bindings: arm: rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add bindings for it. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index e6f656b0bd56..392bdb7042de 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -70,6 +70,12 @@ properties: - const: elgin,rv1108-r1 - const: rockchip,rv1108 + - description: Engicam PX30.Core EDIMM2.2 Starter Kit +items: + - const: engicam,px30-core-edimm2.2 + - const: engicam,px30-px30-core + - const: rockchip,px30 + - description: Firefly Firefly-RK3288 items: - enum: -- 2.25.1
[PATCH 0/7] arm64: dts: rockchip: Add Engicam PX30.Core
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 Starter Kit - C.TOUCH 2.0 10.1" Open Frame Note: These baseboards can be used for i.MX8 SOM's as well. So having baseboard on respective SoC seems to be easy rather than making it common across all. Any inputs? Jagan. Jagan Teki (7): dt-bindings: arm: rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit arm64: dts: rockchip: Add Engicam PX30.Core SOM arm64: dts: rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit dt-bindings: arm: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF arm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0 10.1" OF arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF .../devicetree/bindings/arm/rockchip.yaml | 12 + arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/px30-engicam-common.dtsi | 31 +++ .../rockchip/px30-engicam-ctouch2-of10.dtsi | 7 + .../dts/rockchip/px30-engicam-edimm2.2.dtsi | 7 + .../rockchip/px30-px30-core-ctouch2-of10.dts | 21 ++ .../dts/rockchip/px30-px30-core-edimm2.2.dts | 21 ++ .../boot/dts/rockchip/px30-px30-core.dtsi | 250 ++ 8 files changed, 351 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2-of10.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/px30-engicam-edimm2.2.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core-ctouch2-of10.dts create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core-edimm2.2.dts create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi -- 2.25.1
[PATCH 4/7] arm64: dts: rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/px30-px30-core-edimm2.2.dts | 21 +++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core-edimm2.2.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 02cdb3c4a6c1..65116fcb7368 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-px30-core-edimm2.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
diff --git a/arch/arm64/boot/dts/rockchip/px30-px30-core-edimm2.2.dts
b/arch/arm64/boot/dts/rockchip/px30-px30-core-edimm2.2.dts
new file mode 100644
index ..c36280ce7fc7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-px30-core-edimm2.2.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-engicam-edimm2.2.dtsi"
+#include "px30-px30-core.dtsi"
+
+/ {
+ model = "Engicam PX30.Core EDIMM2.2 Starter Kit";
+ compatible = "engicam,px30-core-edimm2.2", "engicam,px30-px30-core",
+"rockchip,px30";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+};
--
2.25.1
[PATCH 3/7] arm64: dts: rockchip: Add Engicam PX30.Core SOM
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
General features:
- Rockchip PX30
- Up to 2GB DDR4
- eMMC 4 GB expandible
- rest of PX30 features
PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0 10.1" Open Frame
Add support for it.
Signed-off-by: Jagan Teki
---
.../boot/dts/rockchip/px30-px30-core.dtsi | 250 ++
1 file changed, 250 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi
b/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi
new file mode 100644
index ..26f81dbeab4d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/px30-px30-core.dtsi
@@ -0,0 +1,250 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "engicam,px30-px30-core", "rockchip,px30";
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ non-removable;
+ status = "okay";
+};
+
+ {
+ clock_in_out = "output";
+ phy-supply = <_3v3>;/* +3V3_SOM */
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 5 5>;
+ snps,reset-gpio = < RK_PB5 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ status = "okay";
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc5-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_sys>;
+ vcc9-supply = <_sys>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <135>;
+ regulator-min-microvolt = <95>;
+ regulator-name = "vdd_log";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <95>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-max-microvolt = <135>;
+ regulator-min-microvolt = <95>;
+ regulator-name = "vdd_arm";
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <95>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <330>;
+ regulator-min-microvolt = <330>;
+ regulator-name = "vcc_3v3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+
[PATCH v3 4/4] arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4c
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 8832d05c2571..02cdb3c4a6c1 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
new file mode 100644
index ..4c7ebb1c5d2d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4C";
+ compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
+
+_host {
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+};
+
+_host_en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO _pull_none>;
+};
--
2.25.1
[PATCH v3 3/4] arm64: dts: rockchip: Add Radxa ROCK Pi 4B support
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
instead of enable in common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4b
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 23 --
.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 42 +++
3 files changed, 43 insertions(+), 23 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 42f9e1861461..8832d05c2571 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index e163f438f836..678a336010bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -584,17 +584,6 @@ {
pinctrl-names = "default";
pinctrl-0 = <_bus4 _cmd _clk>;
sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <>;
- interrupts = ;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l>;
- };
};
{
@@ -663,18 +652,6 @@ u2phy1_host: host-port {
{
pinctrl-names = "default";
pinctrl-0 = <_xfer _cts _rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = < 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
- };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
new file mode 100644
index ..f0055ce2fda0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4B";
+ compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
--
2.25.1
[PATCH v3 2/4] arm64: dts: rockchip: Mark rock-pi-4 as rock-pi-4a dts
ROCKPi 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4a
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
.../{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 3 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 13 +
3 files changed, 14 insertions(+), 4 deletions(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-rock-pi-4.dts =>
rk3399-rock-pi-4.dtsi} (99%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..42f9e1861461 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -33,7 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
similarity index 99%
rename from arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
rename to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 60f98a3e19d8..e163f438f836 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -11,9 +11,6 @@
#include "rk3399-opp.dtsi"
/ {
- model = "Radxa ROCK Pi 4";
- compatible = "radxa,rockpi4", "rockchip,rk3399";
-
chosen {
stdout-path = "serial2:150n8";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
new file mode 100644
index ..89f2af5e111d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4A";
+ compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
+};
--
2.25.1
[PATCH v3 1/4] dt-bindings: arm: rockchip: Update ROCKPi 4 binding
ROCKPi 4 has 3 variants of hardware platforms called ROCKPi 4A, 4B, and 4C. - ROCKPi 4A has no Wif/BT. - ROCKPi 4B has AP6256 Wifi/BT, PoE. - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C So, update the existing ROCKPi 4 binding to support ROCKPi 4A/B/C hardware platforms. Signed-off-by: Jagan Teki --- Changes for v3: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index db2e35796795..e6f656b0bd56 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -430,8 +430,12 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A/B/C items: + - enum: + - const: radxa,rockpi4a + - const: radxa,rockpi4b + - const: radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 -- 2.25.1
Re: [PATCH v2 3/6] dt-bindings: arm: rockchip: Add ROCKPi 4B binding
Hi Heiko, On Thu, Jul 23, 2020 at 4:43 AM Heiko Stuebner wrote: > > Hi Jagan, > > Am Mittwoch, 22. Juli 2020, 21:09:46 CEST schrieb Jagan Teki: > > Add dt-bindings for ROCKPi 4B which is similar to 4A with > > additional AP6256 Wifi/BT, PoE. > > > > Signed-off-by: Jagan Teki > > --- > > Changes for v2: > > - new patch > > > > Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml > > b/Documentation/devicetree/bindings/arm/rockchip.yaml > > index 36057c9e4b83..7250adb43d24 100644 > > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > > @@ -448,6 +448,12 @@ properties: > >- const: radxa,rockpi4a > >- const: rockchip,rk3399 > > > > + - description: Radxa ROCK Pi 4B > > +items: > > + - const: radxa,rockpi4 > > + - const: radxa,rockpi4b > > + - const: rockchip,rk3399 > > + > > Please do all RockPi4 variants into one entry, so we want something like: > > - description: Radxa ROCK Pi 4 What if the description has something like below. - description: Radxa ROCK Pi 4A/B/C Jagan.
[PATCH v2 5/6] dt-bindings: arm: rockchip: Add ROCKPi 4C binding
Add dt-bindings for ROCKPi 4C which is similar to 4B with additional mDP and HDMI port replaced with Micro HDMI port. Signed-off-by: Jagan Teki --- Changes for v2: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7250adb43d24..1faf1ce92dba 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -454,6 +454,12 @@ properties: - const: radxa,rockpi4b - const: rockchip,rk3399 + - description: Radxa ROCK Pi 4C +items: + - const: radxa,rockpi4 + - const: radxa,rockpi4c + - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 items: - const: radxa,rockpi-n8 -- 2.25.1
[PATCH v2 6/6] arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v2:
- add radxa,rockpi4c
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index e7b11e8fd9b6..48cc045e6928 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -37,6 +37,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
new file mode 100644
index ..4c7ebb1c5d2d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4C";
+ compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
+
+_host {
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+};
+
+_host_en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO _pull_none>;
+};
--
2.25.1
[PATCH v2 4/6] arm64: dts: rockchip: Add Radxa ROCK Pi 4B support
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
instead of enable in common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v2:
- add radxa,rockpi4b
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 23 --
.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 42 +++
3 files changed, 43 insertions(+), 23 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 1250c62205a4..e7b11e8fd9b6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index e163f438f836..678a336010bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -584,17 +584,6 @@ {
pinctrl-names = "default";
pinctrl-0 = <_bus4 _cmd _clk>;
sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <>;
- interrupts = ;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l>;
- };
};
{
@@ -663,18 +652,6 @@ u2phy1_host: host-port {
{
pinctrl-names = "default";
pinctrl-0 = <_xfer _cts _rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = < 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
- };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
new file mode 100644
index ..f0055ce2fda0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4B";
+ compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
--
2.25.1
[PATCH v2 3/6] dt-bindings: arm: rockchip: Add ROCKPi 4B binding
Add dt-bindings for ROCKPi 4B which is similar to 4A with additional AP6256 Wifi/BT, PoE. Signed-off-by: Jagan Teki --- Changes for v2: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 36057c9e4b83..7250adb43d24 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -448,6 +448,12 @@ properties: - const: radxa,rockpi4a - const: rockchip,rk3399 + - description: Radxa ROCK Pi 4B +items: + - const: radxa,rockpi4 + - const: radxa,rockpi4b + - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 items: - const: radxa,rockpi-n8 -- 2.25.1
[PATCH v2 2/6] arm64: dts: rockchip: Mark rock-pi-4 as rock-pi-4a dts
ROCKPi 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Signed-off-by: Jagan Teki
---
Changes for v2:
- update commit message
- add radxa,rockpi4a
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
.../{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 3 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 13 +
3 files changed, 14 insertions(+), 4 deletions(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-rock-pi-4.dts =>
rk3399-rock-pi-4.dtsi} (99%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 2ab77206699b..1250c62205a4 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -35,7 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
similarity index 99%
rename from arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
rename to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 60f98a3e19d8..e163f438f836 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -11,9 +11,6 @@
#include "rk3399-opp.dtsi"
/ {
- model = "Radxa ROCK Pi 4";
- compatible = "radxa,rockpi4", "rockchip,rk3399";
-
chosen {
stdout-path = "serial2:150n8";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
new file mode 100644
index ..89f2af5e111d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4A";
+ compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
+};
--
2.25.1
[PATCH v2 1/6] dt-bindings: arm: rockchip: Update ROCKPi 4 with 4A binding
ROCKPi 4 has 3 variants of hardware platforms called ROCKPi 4A, 4B, and 4C. - ROCKPi 4A has no Wif/BT. - ROCKPi 4B has AP6256 Wifi/BT, PoE. - ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C So, update the existing ROCKPi 4 with ROCKPi 4A binding. Signed-off-by: Jagan Teki --- Changes for v2: - new patch Documentation/devicetree/bindings/arm/rockchip.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 41f919de1ad4..36057c9e4b83 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -442,9 +442,10 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A items: - const: radxa,rockpi4 + - const: radxa,rockpi4a - const: rockchip,rk3399 - description: Radxa ROCK Pi N8 -- 2.25.1
Re: [PATCH 3/3] arm64: dts: rockchip: Add PCIe for RockPI N10
Hi Heiko,
On Mon, Jul 20, 2020 at 4:33 PM Jagan Teki wrote:
>
> This patch adds support to enable PCIe for RockPI N10.
>
> Signed-off-by: Jagan Teki
> ---
> .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 41 ++-
> 1 file changed, 39 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> index ebccc4a153a2..b415b8a16c78 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
> @@ -11,6 +11,19 @@
>
> / {
> compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
> +
> +
Sorry for this extra space, let me know so that I can resend next version.
Jagan.
Re: [PATCH v3] ARM: dts: rockchip: Add usb host0 ohci node for rk3288
Hi Heiko, On Thu, Jul 23, 2020 at 12:04 AM Heiko Stuebner wrote: > > Hi Jaganm > > Am Montag, 20. Juli 2020, 12:58:46 CEST schrieb Jagan Teki: > > rk3288 and rk3288w have a usb host0 ohci controller. > > > > Although rk3288 ohci doesn't actually work on hardware, but > > rk3288w ohci can work well. > > > > So add usb host0 ohci node in rk3288 dtsi and the quirk in > > ohci platform driver will disable ohci on rk3288. > > If I remember the discussion correctly, we expect the board dts > or the bootloader to enable the ohci, right? > So that block go away ... just making sure, I don't remember > untrue stuff ;-) Our (with Robin) initial discussion [1] is to manage OHCI enablement in the bootloader but since it requires many checks at bootloader level we finally rely on board dts to enable it as normal. [1] https://lkml.org/lkml/2020/7/3/424 Jagan.
[PATCH 2/3] ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.
Signed-off-by: Jagan Teki
Signed-off-by: Suniel Mahesh
---
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 10 ++
.../dts/rockchip-radxa-dalang-carrier.dtsi| 20 +++
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 12 +++
3 files changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
index abe3c01d13aa..ba2732ec72da 100644
--- a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -38,6 +38,12 @@ {
snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
};
+ {
+ ddc-i2c-bus = <>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_cec_c0>;
+};
+
{
clock-frequency = <40>;
status = "okay";
@@ -225,6 +231,10 @@ regulator-state-mem {
};
};
+ {
+ status = "okay";
+};
+
_domains {
bb-supply = <_io>;
flash0-supply = <_flash>;
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index d2b6ead148a2..26b53eac4706 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -66,6 +66,10 @@ {
status = "okay";
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -94,3 +98,19 @@ {
{
status = "okay";
};
+
+ {
+ status = "okay";
+};
+
+_mmu {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+_mmu {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 111d6cf9a4e6..ebccc4a153a2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -39,6 +39,12 @@ {
snps,reset-gpio = < RK_PB7 GPIO_ACTIVE_LOW>;
};
+ {
+ ddc-i2c-bus = <>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_cec>;
+};
+
{
clock-frequency = <40>;
i2c-scl-falling-time-ns = <30>;
@@ -285,6 +291,12 @@ hym8563: hym8563@51 {
};
};
+ {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
_domains {
status = "okay";
bt656-supply = <_1v8>;
--
2.25.1
[PATCH 3/3] arm64: dts: rockchip: Add PCIe for RockPI N10
This patch adds support to enable PCIe for RockPI N10.
Signed-off-by: Jagan Teki
---
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 41 ++-
1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index ebccc4a153a2..b415b8a16c78 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -11,6 +11,19 @@
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
+
+
+ vcc3v3_pcie: vcc-pcie-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = < RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pwr>;
+ regulator-name = "vcc3v3_pcie";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <_sys>;
+ };
};
_l0 {
@@ -142,7 +155,8 @@ vcca_0v9: LDO_REG1 {
regulator-min-microvolt = <90>;
regulator-max-microvolt = <90>;
regulator-state-mem {
- regulator-off-in-suspend;
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <90>;
};
};
@@ -177,7 +191,8 @@ vcca_1v8: LDO_REG4 {
regulator-min-microvolt = <185>;
regulator-max-microvolt = <185>;
regulator-state-mem {
- regulator-off-in-suspend;
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <185>;
};
};
@@ -304,6 +319,22 @@ _domains {
sdmmc-supply = <_sd>;
};
+_phy {
+ status = "okay";
+};
+
+ {
+ ep-gpios = < RK_PB4 GPIO_ACTIVE_HIGH>;
+ max-link-speed = <2>;
+ num-lanes = <4>;
+ pinctrl-0 = <_clkreqnb_cpm>;
+ pinctrl-names = "default";
+ vpcie0v9-supply = <_0v9>; /* VCC_0V9_S0 */
+ vpcie1v8-supply = <_1v8>; /* VCC_1V8_S0 */
+ vpcie3v3-supply = <_pcie>;
+ status = "okay";
+};
+
{
hym8563 {
hym8563_int: hym8563-int {
@@ -311,6 +342,12 @@ hym8563_int: hym8563-int {
};
};
+ pcie {
+ pcie_pwr: pcie-pwr {
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO _pull_up>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC2 0 _pull_up>;
--
2.25.1
[PATCH 1/3] ARM: dts: rockchip: Add USB for RockPI N8/N10
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.
This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.
Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.
Signed-off-by: Jagan Teki
---
Note:
- depends on https://lkml.org/lkml/2020/7/20/446
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 42 ++
.../dts/rockchip-radxa-dalang-carrier.dtsi| 18 +
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 78 +++
3 files changed, 138 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
index 0bcb9f067d66..abe3c01d13aa 100644
--- a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -267,4 +267,46 @@ sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 RK_PC5 1 _pull_up_drv_8ma>;
};
};
+
+ vbus_host {
+ usb1_en_oc: usb1-en-oc {
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO _pull_up>;
+ };
+ };
+
+ vbus_typec {
+ usb0_en_oc: usb0-en-oc {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO _pull_up>;
+ };
+ };
+};
+
+ {
+ status = "okay";
+};
+
+_host0_ehci {
+ status = "okay";
+};
+
+_host0_ohci {
+ status = "okay";
+};
+
+_host1 {
+ status = "okay";
+};
+
+_otg {
+ status = "okay";
+};
+
+_host {
+ enable-active-high;
+ gpio = < RK_PC1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */
+};
+
+_typec {
+ enable-active-high;
+ gpio = < RK_PB5 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */
};
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index 450e5bb5af0b..d2b6ead148a2 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -33,6 +33,24 @@ vcc5v0_sys: vcc5v0-sys-regulator {
regulator-max-microvolt = <500>;
vin-supply = <_dcin>;
};
+
+ vbus_host: vbus-host {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_oc>;
+ regulator-name = "vbus_host"; /* HOST-5V */
+ regulator-always-on;
+ vin-supply = <_sys>;
+ };
+
+ vbus_typec: vbus-typec {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_oc>;
+ regulator-name = "vbus_typec";
+ regulator-always-on;
+ vin-supply = <_sys>;
+ };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 37ed95d5f7e9..111d6cf9a4e6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -304,6 +304,18 @@ pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC2 0 _pull_up>;
};
};
+
+ vbus_host {
+ usb1_en_oc: usb1-en-oc {
+ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO _pull_up>;
+ };
+ };
+
+ vbus_typec {
+ usb0_en_oc: usb0-en-oc {
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO _pull_up>;
+ };
+ };
};
_io_domains {
@@ -324,8 +336,74 @@ {
max-frequency = <15000>;
};
+ {
+ status = "okay";
+};
+
{
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
status = "okay";
};
+
+ {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ phy-supply = <_typec>;
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <_host>;
+ status = "okay";
+ };
+};
+
+
+ {
+ status = "okay";
+
+ u2phy1_host: host-port {
+ phy-supply = <_host>;
+ status = "okay";
+ };
+};
+
+_host0_ehci {
+ status = "okay";
+};
+
+_host0_ohci {
+ status = "okay";
+};
+
+_host1_ehci {
+ status = "okay";
+};
+
+_host1_ohci {
+ status = "okay";
+};
+
+_0 {
+ status = "okay";
+};
+
+_dwc3_0 {
+ status = "okay";
+};
+
+_host {
+ enable-active-high;
+ gpio = < RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_oc>;
+};
+
+_typec {
+ enable-active-high;
+ gpio = < RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_oc>;
+};
--
2.25.1
[PATCH v3] ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.
Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.
So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.
Cc: William Wu
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
arch/arm/boot/dts/rk3288.dtsi | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0cd88774db95..f0774d9afb67 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -614,7 +614,16 @@ usb_host0_ehci: usb@ff50 {
status = "disabled";
};
- /* NOTE: ohci@ff52 doesn't actually work on hardware */
+ /* NOTE: doesn't work on RK3288, but fixed on RK3288W */
+ usb_host0_ohci: usb@ff52 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff52 0x0 0x100>;
+ interrupts = ;
+ clocks = < HCLK_USBHOST0>;
+ phys = <>;
+ phy-names = "usb";
+ status = "disabled";
+ };
usb_host1: usb@ff54 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
--
2.25.1
[PATCH 2/3] arm64: dts: rockchip: Add Radxa ROCK Pi 4B support
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
instead of enable in common dtsi.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 23 --
.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 42 +++
3 files changed, 43 insertions(+), 23 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 42f9e1861461..8832d05c2571 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index c39334b139cc..1c55a4645b59 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -584,17 +584,6 @@ {
pinctrl-names = "default";
pinctrl-0 = <_bus4 _cmd _clk>;
sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <>;
- interrupts = ;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l>;
- };
};
{
@@ -663,18 +652,6 @@ u2phy1_host: host-port {
{
pinctrl-names = "default";
pinctrl-0 = <_xfer _cts _rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = < 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
- };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
new file mode 100644
index ..4ca970acacd3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4B";
+ compatible = "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
--
2.25.1
[PATCH 1/3] arm64: dts: rockchip: Mark rock-pi-4 as rock-pi-4a dts
Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
.../{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 3 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 13 +
3 files changed, 14 insertions(+), 4 deletions(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-rock-pi-4.dts =>
rk3399-rock-pi-4.dtsi} (99%)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index b87b1f773083..42f9e1861461 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -33,7 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
similarity index 99%
rename from arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
rename to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 3923ec01ef66..c39334b139cc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -11,9 +11,6 @@
#include "rk3399-opp.dtsi"
/ {
- model = "Radxa ROCK Pi 4";
- compatible = "radxa,rockpi4", "rockchip,rk3399";
-
chosen {
stdout-path = "serial2:150n8";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
new file mode 100644
index ..d96dd3ebd3e0
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar
+ * Copyright (c) 2019 Pragnesh Patel
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4A";
+ compatible = "radxa,rockpi4", "rockchip,rk3399";
+};
--
2.25.1
[PATCH 3/3] arm64: dts: rockchip: Add Radxa ROCK Pi 4C support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 8832d05c2571..02cdb3c4a6c1 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
new file mode 100644
index ..9d07ebd1ec82
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4C";
+ compatible = "radxa,rockpi4", "rockchip,rk3399";
+};
+
+ {
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <>;
+ interrupts = ;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l>;
+ };
+};
+
+ {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ device-wakeup-gpios = < RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = < RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
+ };
+};
+
+_host {
+ gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+};
+
+_host_en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO _pull_none>;
+};
--
2.25.1
[PATCH v6 7/7] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
Changes for v6:
- none
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..b19593021713
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include
+#include "rk3288-vmarc-som.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH v6 6/7] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
Changes for v6:
- none
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270
1 file changed, 270 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..0bcb9f067d66
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_io>;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ vmmc-supply = <_io>;
+ vqmmc-supply = <_flash>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ phy-supply = <_io>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+
[PATCH v6 3/7] arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier
Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.
So, move the supply regulators into carrier board dtsi.
Signed-off-by: Jagan Teki
---
Changes for v6:
- spilt of previous version Trivial patch
.../dts/rockchip-radxa-dalang-carrier.dtsi| 19 +++
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 19 ---
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index 176b53b8e41a..00b200a62263 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -11,6 +11,25 @@ / {
chosen {
stdout-path = "serial2:150n8";
};
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
};
{
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 121a430d6a70..d8fa8127d9dc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -18,25 +18,6 @@ clkin_gmac: external-gmac-clock {
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200>;
- regulator-max-microvolt = <1200>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- vin-supply = <_dcin>;
- };
};
_l0 {
--
2.25.1
[PATCH v6 4/7] arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.
Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.
Signed-off-by: Jagan Teki
---
Changes for v6:
- spilt of previous version Trivial patch
.../dts/rockchip-radxa-dalang-carrier.dtsi| 18
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 4
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 21 +--
3 files changed, 23 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index 00b200a62263..450e5bb5af0b 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -8,8 +8,11 @@
#include
/ {
- chosen {
- stdout-path = "serial2:150n8";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
};
vcc12v_dcin: vcc12v-dcin-regulator {
@@ -33,6 +36,15 @@ vcc5v0_sys: vcc5v0-sys-regulator {
};
{
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
status = "okay";
};
@@ -48,10 +60,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index 539f4005386d..369de5dc0ebd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -15,4 +15,8 @@ / {
model = "Radxa ROCK Pi N10";
compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som",
"rockchip,rk3399pro";
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index d8fa8127d9dc..37ed95d5f7e9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -11,13 +11,6 @@
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <12500>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
};
_l0 {
@@ -42,17 +35,8 @@ _phy {
{
assigned-clocks = < SCLK_RMII_SRC>;
- assigned-clock-parents = <_gmac>;
- clock_in_out = "input";
phy-supply = <_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
snps,reset-gpio = < RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
};
{
@@ -335,6 +319,11 @@ {
status = "okay";
};
+ {
+ cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
+ max-frequency = <15000>;
+};
+
{
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
--
2.25.1
[PATCH v6 1/7] ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM
I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.
So, move them into SOM dtsi.
Signed-off-by: Jagan Teki
---
Changes for v6:
- spilt of previous version Trivial patch
.../dts/rockchip-radxa-dalang-carrier.dtsi| 32 ---
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 29 +
2 files changed, 29 insertions(+), 32 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..176b53b8e41a 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -17,29 +17,6 @@ {
status = "okay";
};
- {
- status = "okay";
- i2c-scl-rising-time-ns = <140>;
- i2c-scl-falling-time-ns = <30>;
-};
-
- {
- status = "okay";
- clock-frequency = <40>;
-
- hym8563: hym8563@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <_int>;
- interrupt-parent = <>;
- interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
{
status = "okay";
};
@@ -70,12 +47,3 @@ {
{
status = "okay";
};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins =
- <4 RK_PD6 0 _pull_up>;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..e11538171e67 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -297,6 +297,29 @@ regulator-state-mem {
};
};
+ {
+ i2c-scl-falling-time-ns = <30>;
+ i2c-scl-rising-time-ns = <140>;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <_int>;
+ interrupt-parent = <>;
+ interrupts = ;
+ };
+};
+
_domains {
status = "okay";
bt656-supply = <_1v8>;
@@ -324,6 +347,12 @@ {
};
{
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <4 RK_PD6 0 _pull_up>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
--
2.25.1
[PATCH v6 2/7] arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties
Fix node, properties sorting on RockPI N10 board dts(i) files.
Signed-off-by: Jagan Teki
---
Changes for v6:
- spilt of previous version Trivial patch
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +-
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 35 +--
2 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..539f4005386d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,8 +8,8 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index e11538171e67..121a430d6a70 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -76,8 +76,8 @@ {
{
clock-frequency = <40>;
- i2c-scl-rising-time-ns = <180>;
i2c-scl-falling-time-ns = <30>;
+ i2c-scl-rising-time-ns = <180>;
status = "okay";
rk809: pmic@20 {
@@ -323,8 +323,22 @@ hym8563: hym8563@51 {
_domains {
status = "okay";
bt656-supply = <_1v8>;
- sdmmc-supply = <_sd>;
gpio1830-supply = <_3v0>;
+ sdmmc-supply = <_sd>;
+};
+
+ {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <4 RK_PD6 0 _pull_up>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC2 0 _pull_up>;
+ };
+ };
};
_io_domains {
@@ -341,22 +355,7 @@ {
};
{
- status = "okay";
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
-};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <4 RK_PD6 0 _pull_up>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC2 0 _pull_up>;
- };
- };
+ status = "okay";
};
--
2.25.1
[PATCH v6 5/7] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Reviewed-by: Rob Herring Signed-off-by: Jagan Teki --- Changes for v6: - collect Rob reviewed-by Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH v6 0/7] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Changes for v6: - spilt the trivial patch into multiple patches - collect Rob review tag Changes for v5: - drop redundent hym8563_int pin in rk3399pro dtsi Changes for v4: - move i2c2 from carrier board to rk3399pro dtsi Changes for v3: - move hym8563_int pin to rk3399pro dtsi Changes for v2: - add more trivial cleanups - update commit message Jagan Teki (7): ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 ++ arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 67 +++-- .../dts/rockchip/rk3399pro-rock-pi-n10.dts| 6 +- .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 92 +++--- 7 files changed, 376 insertions(+), 83 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
[PATCH v5 4/4] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
Changes for v5, v4, v3:
- none
Changes for v2:
- reorder dtsi include so-that common properties will
visible to main dts.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..b19593021713
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include
+#include "rk3288-vmarc-som.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH v5 2/4] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Signed-off-by: Jagan Teki --- Changes for v5, v4, v3, v2: - none Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH v5 3/4] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
Changes for v5, v4, v3:
- none
Changes for v2:
- drop pwm include
- adjust dtsi based on trivial changes in 1/4
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270
1 file changed, 270 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..0bcb9f067d66
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_io>;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ vmmc-supply = <_io>;
+ vqmmc-supply = <_flash>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ phy-supply = <_io>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <
[PATCH v5 1/4] arm64: dts: rockchip: Trivial cleanups for RockPI N10
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
So, this patch adds trivial changes to properties.
- move common properties into radxa dalang carrier dtsi.
- maintain ascending order for nodes, properties.
- change the order of dtsi include so-that common properties
will reflect in main dts.
- drop unnecessary header includes.
No functionally changes.
Signed-off-by: Jagan Teki
---
Changes for v5:
- drop redundent hym8563_int pin
Changes for v4:
- move i2c2 into rk3399pro dtsi
Changes for v3:
- move hym8563_int into rk3399pro dtsi
Changes for v2:
- updated commit message
- add more trivial changes
.../dts/rockchip-radxa-dalang-carrier.dtsi| 67 +++--
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +-
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 93 ++-
3 files changed, 80 insertions(+), 82 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..450e5bb5af0b 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -8,36 +8,44 @@
#include
/ {
- chosen {
- stdout-path = "serial2:150n8";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
};
-};
- {
- status = "okay";
-};
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
- {
- status = "okay";
- i2c-scl-rising-time-ns = <140>;
- i2c-scl-falling-time-ns = <30>;
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
};
- {
+ {
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
status = "okay";
- clock-frequency = <40>;
-
- hym8563: hym8563@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <_int>;
- interrupt-parent = <>;
- interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
- };
};
{
@@ -52,10 +60,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
@@ -70,12 +76,3 @@ {
{
status = "okay";
};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins =
- <4 RK_PD6 0 _pull_up>;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..539f4005386d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,8 +8,8 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..9ed5b27d715c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -7,35 +7,12 @@
#include
#include
-#inclu
[PATCH v5 0/4] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. This series moved i2c2 into rk3399pro dtsi and rest are similar to v4. Changes for v5: - drop redundent hym8563_int pin in rk3399pro dtsi Changes for v4: - move i2c2 from carrier board to rk3399pro dtsi Changes for v3: - move hym8563_int pin to rk3399pro dtsi Changes for v2: - add more trivial cleanups - update commit message Jagan Teki (4): arm64: dts: rockchip: Trivial cleanups for RockPI N10 dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 ++ arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 67 +++-- .../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +- .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 93 +++--- 7 files changed, 374 insertions(+), 82 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
[PATCH v4 2/4] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Signed-off-by: Jagan Teki --- Changes for v4, v3, v2: - none Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH v4 1/4] arm64: dts: rockchip: Trivial cleanups for RockPI N10
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
So, this patch adds trivial changes to properties.
- move common properties into radxa dalang carrier dtsi.
- maintain ascending order for nodes, properties.
- change the order of dtsi include so-that common properties
will reflect in main dts.
- drop unnecessary header includes.
No functionally changes.
Signed-off-by: Jagan Teki
---
Changes for v4:
- move i2c2 into rk3399pro dtsi
Changes for v3:
- move hym8563_int into rk3399pro dtsi
Changes for v2:
- updated commit message
- add more trivial changes
.../dts/rockchip-radxa-dalang-carrier.dtsi| 67 ++---
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +-
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 98 ++-
3 files changed, 85 insertions(+), 82 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..450e5bb5af0b 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -8,36 +8,44 @@
#include
/ {
- chosen {
- stdout-path = "serial2:150n8";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
};
-};
- {
- status = "okay";
-};
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
- {
- status = "okay";
- i2c-scl-rising-time-ns = <140>;
- i2c-scl-falling-time-ns = <30>;
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
+ };
};
- {
+ {
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
status = "okay";
- clock-frequency = <40>;
-
- hym8563: hym8563@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <_int>;
- interrupt-parent = <>;
- interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
- };
};
{
@@ -52,10 +60,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
@@ -70,12 +76,3 @@ {
{
status = "okay";
};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins =
- <4 RK_PD6 0 _pull_up>;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..539f4005386d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,8 +8,8 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..63eb498b365e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -7,35 +7,12 @@
#include
#include
-#include
/ {
compatible = "v
[PATCH v4 3/4] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- drop pwm include
- adjust dtsi based on trivial changes in 1/4
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270
1 file changed, 270 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..0bcb9f067d66
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_io>;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ vmmc-supply = <_io>;
+ vqmmc-supply = <_flash>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ phy-supply = <_io>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <
[PATCH v4 4/4] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- reorder dtsi include so-that common properties will
visible to main dts.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..b19593021713
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include
+#include "rk3288-vmarc-som.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH v4 0/4] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. This series moved i2c2 into rk3399pro dtsi and rest are similar to v3. Changes for v4: - move i2c2 from carrier board to rk3399pro dtsi Changes for v3: - move hym8563_int pin to rk3399pro dtsi Changes for v2: - add more trivial cleanups - update commit message Jagan Teki (4): arm64: dts: rockchip: Trivial cleanups for RockPI N10 dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 ++ arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 67 +++-- .../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +- .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 98 --- 7 files changed, 379 insertions(+), 82 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
Re: [PATCH] arm64: defconfig: Enable REGULATOR_MP8859
Hi Heiko, On Thu, Feb 20, 2020 at 6:57 PM wrote: > > From: Jagan Teki > > RK3399 boards like ROC-RK3399-PC is using MP8859 DC/DC converter > for 12V supply. > > roc-rk3399-pc initially used 12V fixed regulator for this supply, > but the below commit has switched to use MP8859. > > commit <1fc61ed04d309b0b8b3562acf701ab988eee12de> "arm64: dts: rockchip: > Enable mp8859 regulator on rk3399-roc-pc" > > So, enable bydefault on the defconfig. > > Signed-off-by: Jagan Teki > Cc: Markus Reichl > Tested-by: Suniel Mahesh > --- > Note: > This change set is applied on top of linux-rockchip, branch v5.7-armsoc/dts64. > (git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git -b > v5.7-armsoc/dts64) > This change set was tested on ROC-RK3399-PC, an rk3399 based target. > --- Any update on this? Jagan.
Re: [PATCH] arm64: defconfig: Enable GPIO_SYSCON
Hi Heiko, On Fri, Apr 3, 2020 at 7:36 PM Jagan Teki wrote: > > roc-rk3328-cc board has vcc_sdio regulator controlled > by a special output only gpio pin. This special pin can > now be reference as <_gpio 0> via gpio-syscon driver, > as mentioned in below commit. > > commit <99165b93dafe4f2a821b5dae106f2ef6b4ceff7e> "arm64: dts: rockchip: > add sdmmc UHS support for roc-rk3328-cc" > > So, enable bydefault on the defconfig. > > Cc: Levin Du > Signed-off-by: Jagan Teki > --- Any update on this? Jagan.
[PATCH v3 4/4] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- reorder dtsi include so-that common properties will
visible to main dts.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..b19593021713
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include
+#include "rk3288-vmarc-som.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH v3 3/4] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
Changes for v3:
- none
Changes for v2:
- drop pwm include
- adjust dtsi based on trivial changes in 1/4
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270
1 file changed, 270 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..0bcb9f067d66
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_io>;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ vmmc-supply = <_io>;
+ vqmmc-supply = <_flash>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ phy-supply = <_io>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <
[PATCH v3 1/4] arm64: dts: rockchip: Trivial cleanups for RockPI N10
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
So, this patch adds trivial changes to properties.
- move common properties into radxa dalang carrier dtsi.
- maintain ascending order for nodes, properties.
- change the order of dtsi include so-that common properties
will reflect in main dts.
- drop unnecessary header includes.
No functionally changes.
Signed-off-by: Jagan Teki
---
Changes for v3:
- move hym8563_int into rk3399pro dtsi
Changes for v2:
- updated commit message
- add more trivial changes
.../dts/rockchip-radxa-dalang-carrier.dtsi| 60 ++-
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +-
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 75 +++
3 files changed, 73 insertions(+), 64 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..6330ede90e35 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -8,24 +8,55 @@
#include
/ {
- chosen {
- stdout-path = "serial2:150n8";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
};
};
{
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
status = "okay";
};
{
- status = "okay";
i2c-scl-rising-time-ns = <140>;
i2c-scl-falling-time-ns = <30>;
+ status = "okay";
};
{
- status = "okay";
clock-frequency = <40>;
+ status = "okay";
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
@@ -35,8 +66,14 @@ hym8563: hym8563@51 {
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <_int>;
- interrupt-parent = <>;
- interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+ {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <4 RK_PD6 0 _pull_up>;
+ };
};
};
@@ -52,10 +89,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
@@ -70,12 +105,3 @@ {
{
status = "okay";
};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins =
- <4 RK_PD6 0 _pull_up>;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..539f4005386d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,8 +8,8 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..9d1dadb94380 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmar
[PATCH v3 2/4] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Signed-off-by: Jagan Teki --- Changes for v3: - none Changes for v2: - none Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH v3 0/4] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. This series moved hym8563_int pin into rk3399pro dtsi and rest are similar to v2. Changes for v3: - move hym8563_int pin to rk3399pro dtsi Changes for v2: - add more trivial cleanups - update commit message Jagan Teki (4): arm64: dts: rockchip: Trivial cleanups for RockPI N10 dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 ++ arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 60 ++-- .../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +- .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 75 ++--- 7 files changed, 367 insertions(+), 64 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
[PATCH v2] ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.
Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.
So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.
Cc: William Wu
Signed-off-by: Jagan Teki
---
Changes for v2:
- Updated NOTE comments.
arch/arm/boot/dts/rk3288.dtsi | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0cd88774db95..f0774d9afb67 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -614,7 +614,16 @@ usb_host0_ehci: usb@ff50 {
status = "disabled";
};
- /* NOTE: ohci@ff52 doesn't actually work on hardware */
+ /* NOTE: doesn't work on RK3288, but fixed on RK3288W */
+ usb_host0_ohci: usb@ff52 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff52 0x0 0x100>;
+ interrupts = ;
+ clocks = < HCLK_USBHOST0>;
+ phys = <>;
+ phy-names = "usb";
+ status = "disabled";
+ };
usb_host1: usb@ff54 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
--
2.25.1
Re: [PATCH v2] clk: rockchip: use separate compatibles for rk3288w-cru
On Fri, Jul 3, 2020 at 9:19 PM Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> Commit 1627f683636d ("clk: rockchip: Handle clock tree for rk3288w variant")
> added the check for rk3288w-specific clock-tree changes but in turn would
> require a double-compatible due to re-using the main rockchip,rk3288-cru
> compatible as entry point.
>
> The binding change actually describes the compatibles as one or the other
> so adapt the code accordingly and add a real second entry-point for the
> clock controller.
>
> Signed-off-by: Heiko Stuebner
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # rock-pi-n8
Note: These are U-Boot changes,
https://patchwork.ozlabs.org/project/uboot/list/?series=187546
Jagan.
Re: [PATCH v4 1/2] clk: rockchip: rk3288: Handle clock tree for rk3288w
On Fri, Jul 3, 2020 at 7:41 PM Heiko Stuebner wrote:
>
> Hi Jagan,
>
> Am Montag, 29. Juni 2020, 21:11:03 CEST schrieb Jagan Teki:
> > On Tue, Jun 2, 2020 at 1:37 PM Mylène Josserand
> > wrote:
> > >
> > > The revision rk3288w has a different clock tree about "hclk_vio"
> > > clock, according to the BSP kernel code.
> > >
> > > This patch handles this difference by detecting which device-tree
> > > we are using. If it is a "rockchip,rk3288-cru", let's register
> > > the clock tree as it was before. If the device-tree node is
> > > "rockchip,rk3288w-cru", we will apply the difference with this
> > > version of this SoC.
> > >
> > > Noticed that this new device-tree compatible must be handled in
> > > bootloader such as u-boot.
> > >
> > > Signed-off-by: Mylène Josserand
> > > ---
> > > drivers/clk/rockchip/clk-rk3288.c | 20 ++--
> > > 1 file changed, 18 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/clk/rockchip/clk-rk3288.c
> > > b/drivers/clk/rockchip/clk-rk3288.c
> > > index cc2a177bbdbf..204976e2d0cb 100644
> > > --- a/drivers/clk/rockchip/clk-rk3288.c
> > > +++ b/drivers/clk/rockchip/clk-rk3288.c
> > > @@ -425,8 +425,6 @@ static struct rockchip_clk_branch
> > > rk3288_clk_branches[] __initdata = {
> > > COMPOSITE(0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p,
> > > CLK_IGNORE_UNUSED,
> > > RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
> > > RK3288_CLKGATE_CON(3), 0, GFLAGS),
> > > - DIV(0, "hclk_vio", "aclk_vio0", 0,
> > > - RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> > > COMPOSITE(0, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p,
> > > CLK_IGNORE_UNUSED,
> > > RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5,
> > > DFLAGS,
> > > RK3288_CLKGATE_CON(3), 2, GFLAGS),
> > > @@ -819,6 +817,16 @@ static struct rockchip_clk_branch
> > > rk3288_clk_branches[] __initdata = {
> > > INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3,
> > > IFLAGS),
> > > };
> > >
> > > +static struct rockchip_clk_branch rk3288w_hclkvio_branch[] __initdata = {
> > > + DIV(0, "hclk_vio", "aclk_vio1", 0,
> > > + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> > > +};
> > > +
> > > +static struct rockchip_clk_branch rk3288_hclkvio_branch[] __initdata = {
> > > + DIV(0, "hclk_vio", "aclk_vio0", 0,
> > > + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> > > +};
> > > +
> > > static const char *const rk3288_critical_clocks[] __initconst = {
> > > "aclk_cpu",
> > > "aclk_peri",
> > > @@ -936,6 +944,14 @@ static void __init rk3288_clk_init(struct
> > > device_node *np)
> > >RK3288_GRF_SOC_STATUS1);
> > > rockchip_clk_register_branches(ctx, rk3288_clk_branches,
> > > ARRAY_SIZE(rk3288_clk_branches));
> > > +
> > > + if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
> > > + rockchip_clk_register_branches(ctx,
> > > rk3288w_hclkvio_branch,
> > > +
> > > ARRAY_SIZE(rk3288w_hclkvio_branch));
> > > + else
> > > + rockchip_clk_register_branches(ctx, rk3288_hclkvio_branch,
> > > +
> > > ARRAY_SIZE(rk3288_hclkvio_branch));
> > > +
> >
> > Sorry for the late query on this. I am a bit unclear about this
> > compatible change, does Linux expect to replace rockchip,rk3288-cru
> > with rockchip,rk3288w-cru in bootloader if the chip is RK3288w? or
> > append the existing cru compatible node with rockchip,rk3288w-cru?
> > because replace new cru node make clock never probe since the
> > CLK_OF_DECLARE checking rockchip,rk3288-cru
>
> I guess right now we'd expect "rockchip,rk3288w-cru", "rockchip,rk3288-cru",
>
> Thinking again about this, I'm wondering if we should switch to having
> only one per variant ... like on the two rk3188 variants,
> so declaring separate rk3288-cru and rk3288w-cru of-clks with shared
> common code.
What if can check the root compatible instead cru compatible for revision W like
- if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
+ if (of_device_is_compatible(np, "rockchip,rk3288w"))
This way we can have a single compatible update at bootloader that
makes Linux adjust revision W chips code.
Doesn't it make sense?
Jagan.
Re: [PATCH] usb: host: ohci-platform: Disable ohci for rk3288
On Thu, Jul 2, 2020 at 8:08 PM Robin Murphy wrote:
>
> On 2020-07-02 10:05, Jagan Teki wrote:
> > rk3288 has usb host0 ohci controller but doesn't actually work
> > on real hardware but it works with new revision chip rk3288w.
> >
> > So, disable ohci for rk3288.
> >
> > For rk3288w chips the compatible update code is handled by bootloader.
> >
> > Cc: William Wu
> > Signed-off-by: Jagan Teki
> > ---
> > Note:
> > - U-Boot patch for compatible update
> > https://patchwork.ozlabs.org/project/uboot/patch/20200702084820.35942-1-ja...@amarulasolutions.com/
> >
> > drivers/usb/host/ohci-platform.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/host/ohci-platform.c
> > b/drivers/usb/host/ohci-platform.c
> > index 7addfc2cbadc..24655ed6a7e0 100644
> > --- a/drivers/usb/host/ohci-platform.c
> > +++ b/drivers/usb/host/ohci-platform.c
> > @@ -96,7 +96,7 @@ static int ohci_platform_probe(struct platform_device
> > *dev)
> > struct ohci_hcd *ohci;
> > int err, irq, clk = 0;
> >
> > - if (usb_disabled())
> > + if (usb_disabled() || of_machine_is_compatible("rockchip,rk3288"))
>
> This seems unnecessary to me - if we've even started probing a driver
> for a broken piece of hardware to the point that we need magic checks to
> bail out again, then something is already fundamentally wrong.
>
> Old boards only sold with the original SoC variant have no reason to
> enable the OHCI (since it never worked originally), thus will never
> execute this check.
>
> New boards designed around the W variant to make use of the OHCI can
> freely enable it either way.
>
> The only relative-edge-case where it might matter is older board designs
> still in production which have shipped with both SoC variants. Enabling
> OHCI can't be *necessary* given that it's still broken on a lot of
> deployed boards, so at best it must be an opportunistic nice-to-have.
> Since we're already having to rely on the bootloader to patch up the
> devicetree for other low-level differences in this case, it should be
> part of that responsibility for it to only enable the OHCI on the
> appropriate SoC variant too. Statically enabling it in the DTS for a
> board where it may well not work is just bad.
You mean enable OHCI by identifying revision W with dts status "okay"?
doesn't it complex for the bootloader to update all effecting changes?
Jagan.
[PATCH] usb: host: ohci-platform: Disable ohci for rk3288
rk3288 has usb host0 ohci controller but doesn't actually work
on real hardware but it works with new revision chip rk3288w.
So, disable ohci for rk3288.
For rk3288w chips the compatible update code is handled by bootloader.
Cc: William Wu
Signed-off-by: Jagan Teki
---
Note:
- U-Boot patch for compatible update
https://patchwork.ozlabs.org/project/uboot/patch/20200702084820.35942-1-ja...@amarulasolutions.com/
drivers/usb/host/ohci-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
index 7addfc2cbadc..24655ed6a7e0 100644
--- a/drivers/usb/host/ohci-platform.c
+++ b/drivers/usb/host/ohci-platform.c
@@ -96,7 +96,7 @@ static int ohci_platform_probe(struct platform_device *dev)
struct ohci_hcd *ohci;
int err, irq, clk = 0;
- if (usb_disabled())
+ if (usb_disabled() || of_machine_is_compatible("rockchip,rk3288"))
return -ENODEV;
/*
--
2.25.1
[PATCH] ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.
Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.
So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.
The bootloader must update the compatible in order to bypass
host0_ohci in legacy rk3288 platform.
Cc: William Wu
Signed-off-by: Jagan Teki
---
Note:
- U-Boot patch for compatible update
https://patchwork.ozlabs.org/project/uboot/patch/20200702084820.35942-1-ja...@amarulasolutions.com/
arch/arm/boot/dts/rk3288.dtsi | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0cd88774db95..fd0066d07dfc 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -614,7 +614,19 @@ usb_host0_ehci: usb@ff50 {
status = "disabled";
};
- /* NOTE: ohci@ff52 doesn't actually work on hardware */
+ /**
+* NOTE: ohci@ff52 doesn't actually work on hardware
+* hardware, but can work on rk3288w hardware.
+*/
+ usb_host0_ohci: usb@ff52 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff52 0x0 0x100>;
+ interrupts = ;
+ clocks = < HCLK_USBHOST0>;
+ phys = <>;
+ phy-names = "usb";
+ status = "disabled";
+ };
usb_host1: usb@ff54 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
--
2.25.1
[PATCH v2 4/4] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
Changes for v2:
- reorder dtsi include so-that common properties will
visible to main dts.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..b19593021713
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include
+#include "rk3288-vmarc-som.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH v2 3/4] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
Changes for v2:
- drop pwm include
- adjust dtsi based on trivial changes in 1/4
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270
1 file changed, 270 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..0bcb9f067d66
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_io>;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ vmmc-supply = <_io>;
+ vqmmc-supply = <_flash>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ phy-supply = <_io>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <
[PATCH v2 0/4] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. This series fixs few trivial changes related to properties moved into main carrier board dts and commit message rephrase. Changes for v2: - add more trivial cleanups - update commit message Jagan Teki (4): arm64: dts: rockchip: Trivial cleanups for RockPI N10 dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 ++ arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 270 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 58 +++- .../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +- .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 64 ++--- 7 files changed, 356 insertions(+), 62 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
[PATCH v2 2/4] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Signed-off-by: Jagan Teki --- Changes for v2: - none Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH v2 1/4] arm64: dts: rockchip: Trivial cleanups for RockPI N10
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
So, this patch adds trivial changes to properties.
- move common properties into radxa dalang carrier dtsi.
- maintain ascending order for nodes, properties.
- change the order of dtsi include so-that common properties
will reflect in main dts.
- drop unnecessary header includes.
No functionally changes.
Signed-off-by: Jagan Teki
---
Changes for v2:
- updated commit message
- add more trivial changes
.../dts/rockchip-radxa-dalang-carrier.dtsi| 58 -
.../dts/rockchip/rk3399pro-rock-pi-n10.dts| 2 +-
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 64 ++-
3 files changed, 62 insertions(+), 62 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..8b0b03681667 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -8,24 +8,55 @@
#include
/ {
- chosen {
- stdout-path = "serial2:150n8";
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_dcin>;
};
};
{
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
status = "okay";
};
{
- status = "okay";
i2c-scl-rising-time-ns = <140>;
i2c-scl-falling-time-ns = <30>;
+ status = "okay";
};
{
- status = "okay";
clock-frequency = <40>;
+ status = "okay";
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
@@ -40,6 +71,14 @@ hym8563: hym8563@51 {
};
};
+ {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <4 RK_PD6 0 _pull_up>;
+ };
+ };
+};
+
{
status = "okay";
};
@@ -52,10 +91,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
@@ -70,12 +107,3 @@ {
{
status = "okay";
};
-
- {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins =
- <4 RK_PD6 0 _pull_up>;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
index a1783e7f769a..539f4005386d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-rock-pi-n10.dts
@@ -8,8 +8,8 @@
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
-#include "rk3399pro-vmarc-som.dtsi"
#include
+#include "rk3399pro-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N10";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..0b150881ab6c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -7,35 +7,12 @@
#include
#include
-#include
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
Re: [PATCH v4 1/2] clk: rockchip: rk3288: Handle clock tree for rk3288w
On Tue, Jun 2, 2020 at 1:37 PM Mylène Josserand
wrote:
>
> The revision rk3288w has a different clock tree about "hclk_vio"
> clock, according to the BSP kernel code.
>
> This patch handles this difference by detecting which device-tree
> we are using. If it is a "rockchip,rk3288-cru", let's register
> the clock tree as it was before. If the device-tree node is
> "rockchip,rk3288w-cru", we will apply the difference with this
> version of this SoC.
>
> Noticed that this new device-tree compatible must be handled in
> bootloader such as u-boot.
>
> Signed-off-by: Mylène Josserand
> ---
> drivers/clk/rockchip/clk-rk3288.c | 20 ++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3288.c
> b/drivers/clk/rockchip/clk-rk3288.c
> index cc2a177bbdbf..204976e2d0cb 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -425,8 +425,6 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
> __initdata = {
> COMPOSITE(0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p,
> CLK_IGNORE_UNUSED,
> RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
> RK3288_CLKGATE_CON(3), 0, GFLAGS),
> - DIV(0, "hclk_vio", "aclk_vio0", 0,
> - RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> COMPOSITE(0, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p,
> CLK_IGNORE_UNUSED,
> RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS,
> RK3288_CLKGATE_CON(3), 2, GFLAGS),
> @@ -819,6 +817,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
> __initdata = {
> INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3,
> IFLAGS),
> };
>
> +static struct rockchip_clk_branch rk3288w_hclkvio_branch[] __initdata = {
> + DIV(0, "hclk_vio", "aclk_vio1", 0,
> + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> +};
> +
> +static struct rockchip_clk_branch rk3288_hclkvio_branch[] __initdata = {
> + DIV(0, "hclk_vio", "aclk_vio0", 0,
> + RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
> +};
> +
> static const char *const rk3288_critical_clocks[] __initconst = {
> "aclk_cpu",
> "aclk_peri",
> @@ -936,6 +944,14 @@ static void __init rk3288_clk_init(struct device_node
> *np)
>RK3288_GRF_SOC_STATUS1);
> rockchip_clk_register_branches(ctx, rk3288_clk_branches,
> ARRAY_SIZE(rk3288_clk_branches));
> +
> + if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
> + rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
> +
> ARRAY_SIZE(rk3288w_hclkvio_branch));
> + else
> + rockchip_clk_register_branches(ctx, rk3288_hclkvio_branch,
> +
> ARRAY_SIZE(rk3288_hclkvio_branch));
> +
Sorry for the late query on this. I am a bit unclear about this
compatible change, does Linux expect to replace rockchip,rk3288-cru
with rockchip,rk3288w-cru in bootloader if the chip is RK3288w? or
append the existing cru compatible node with rockchip,rk3288w-cru?
because replace new cru node make clock never probe since the
CLK_OF_DECLARE checking rockchip,rk3288-cru
Jagan.
[PATCH 4/4] ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..1d1b6ac26394 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -964,6 +964,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
+ rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
diff --git a/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
new file mode 100644
index ..ffec77f0a1b6
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-rock-pi-n8.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+#include "rk3288-vmarc-som.dtsi"
+#include
+
+/ {
+ model = "Radxa ROCK Pi N8";
+ compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
+"rockchip,rk3288";
+};
--
2.25.1
[PATCH 3/4] ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 298
1 file changed, 298 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
new file mode 100644
index ..1549ac404428
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Vamrs Limited
+ * Copyright (c) 2019 Amarula Solutions(India)
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
+
+ ext_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <12500>;
+ clock-output-names = "ext_gmac";
+ #clock-cells = <0>;
+ };
+
+ vccio_flash: vccio-flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ startup-delay-us = <150>;
+ vin-supply = <_io>;
+ };
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+ {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _pwr _bus8>;
+ status = "okay";
+};
+
+ {
+ assigned-clocks = < SCLK_MAC>;
+ assigned-clock-parents = <_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ phy-supply = <_io>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_HIGH>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 1 5>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+ max-speed = <1000>;
+};
+
+ {
+ clock-frequency = <40>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <_int _pwroff>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_io>;
+ vcc9-supply = <_io>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
+ vcc12-supply = <_io>;
+ vddio-supply = <_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <140>;
+ regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <125>;
+ regulator-name = "vdd_gpu";
+
[PATCH 2/4] dt-bindings: arm: rockchip: Add Rock Pi N8 binding
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Add dt-bindings for it. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index d4a4045092df..db2e35796795 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -435,6 +435,12 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK Pi N8 +items: + - const: radxa,rockpi-n8 + - const: vamrs,rk3288-vmarc-som + - const: rockchip,rk3288 + - description: Radxa ROCK Pi N10 items: - const: radxa,rockpi-n10 -- 2.25.1
[PATCH 1/4] ARM: dts: rockchip: radxa-dalang: Update sdmmc properties
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
Among these combinations, card detection gpio, max-frequency
properties are used with rk3399pro SoM but not required for
rk3288 SoM based on the hardware schematics.
So, let's move these sdmmc specific properties on associate
vmarc dtsi to make common use of dalang carrier device tree file.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi | 2 --
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 5 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index df3712aedf8a..3e54f38f0ab6 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -52,10 +52,8 @@ {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <_sd>;
- max-frequency = <15000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 0a516334f15f..6fd17e8a815f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -317,6 +317,11 @@ {
status = "okay";
};
+ {
+ cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
+ max-frequency = <15000>;
+};
+
{
status = "okay";
rockchip,hw-tshut-mode = <1>;
--
2.25.1
[PATCH 0/4] ARM: dts: rockchip: Radxa Rock Pi N8 initial support
Rock Pi N8 is a Rockchip RK3288 based SBC, which has - VMARC RK3288 SOM (as per SMARC standard) from Vamrs. - Compatible carrier board from Radxa. VMARC RK3288 SOM need to mount on top of dalang carrier board for making Rock PI N8 SBC. Any inputs? Jagan. Jagan Teki (4): ARM: dts: rockchip: radxa-dalang: Update sdmmc properties dt-bindings: arm: rockchip: Add Rock Pi N8 binding ARM: dts: rockchip: Add VMARC RK3288 SOM initial support ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support .../devicetree/bindings/arm/rockchip.yaml | 6 + arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/rk3288-rock-pi-n8.dts | 17 + arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 298 ++ .../dts/rockchip-radxa-dalang-carrier.dtsi| 2 - .../dts/rockchip/rk3399pro-vmarc-som.dtsi | 5 + 6 files changed, 327 insertions(+), 2 deletions(-) create mode 100644 arch/arm/boot/dts/rk3288-rock-pi-n8.dts create mode 100644 arch/arm/boot/dts/rk3288-vmarc-som.dtsi -- 2.25.1
Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin
Hi Markus,
On Thu, Oct 17, 2019 at 6:56 PM Markus Reichl wrote:
>
> Hi Jagan,
>
> your patch fixes booting my rk3399-roc-pc with 5.4.0-rc3-next-20191017.
> Without your patch roc-pc hangs here:
> [9.703526] pwm-regulator: supplied by regulator-dummy
Thanks for testing this.
Indeed the same change available in BSP
https://github.com/FireflyTeam/kernel/blob/stable-4.4-rk3399-linux/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi#L1184
I'm waiting for Levin response on this issue, need to update commit
information accordingly.
>
> Am 16.10.19 um 19:09 schrieb Jagan Teki:
> > Hi Levin,
> >
> > On Tue, Oct 8, 2019 at 8:42 AM wrote:
> >>
> >> Jagan Teki writes:
> >>
> >> > Hi Heiko,
> >> >
> >> > On Mon, Sep 30, 2019 at 2:51 AM Heiko Stuebner wrote:
> >> >>
> >> >> Hi Jagan,
> >> >>
> >> >> Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki:
> >> >> > ROC-PC is not able to boot linux console if PWM2_d is
> >> >> > unattached to any pinctrl logic.
> >> >> >
> >> >> > To be precise the linux boot hang with last logs as,
> >> >> > ...
> >> >> > .
> >> >> > [0.003367] Console: colour dummy device 80x25
> >> >> > [0.003788] printk: console [tty0] enabled
> >> >> > [0.004178] printk: bootconsole [uart8250] disabled
> >> >> >
> >> >> > In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of
> >> >> > VDD_LOG. So, for normal working operations this needs to
> >> >> > active and pull-down.
> >> >> >
> >> >> > This patch fix, by attaching pinctrl active and pull-down
> >> >> > the pwm2.
> >> >>
> >> >> This looks highly dubious on first glance. The pwm subsystem nor
> >> >> the Rockchip pwm driver do not do any pinctrl handling.
> >> >>
> >> >> So I don't really see where that "active" pinctrl state is supposed
> >> >> to come from.
> >> >>
> >> >> Comparing with the pwm driver in the vendor tree I see that there
> >> >> is such a state defined there. But that code there also looks strange
> >> >> as that driver never again leaves this active state after entering it.
> >> >>
> >> >> Also for example all the Gru devices run with quite a number of pwm-
> >> >> regulators without needing additional fiddling with the pwm itself, so
> >> >> I don't really see why that should be different here.
> >> >
> >> > I deed, I was supposed to think the same. but the vendor kernel dts
> >> > from firefly do follow the pwm2 pinctrl [1]. I wouldn't find any
> >> > information other than this vensor information, ie one of the reason I
> >> > have marked "Levin Du" who initially supported this board.
> >> >
> >> > One, think I have seen was this pinctrl active fixed the boot hang.
> >> > any inputs from would be very helpful.
> >> >
> >> > Levin Du, any inputs?
> >> >
> >> > [1]
> >> > https://github.com/FireflyTeam/kernel/blob/stable-4.4-rk3399-linux/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi#L1184
> >> >
> >>
> >> A grep of the `pwm2` shows that there's such block in rk3399-nanopi4.dtsi:
> >>
> >> {
> >> pinctrl-names = "active";
> >> pinctrl-0 = <_pin_pull_down>;
> >> status = "okay";
> >> };
> >>
> >> But last time I checked, using the mainline U-Boot (the roc-rk3399-pc is
> >> in mainline now) with mainline linux v5.2-rc7, no such setting is
> >> necessary, and the board boots happily.
> >>
> >> I cannot find the use of "active" pinctrl state in the
> >> `drivers/pwm/pwm-rockchip.c`. If the pinctrl state needs to be setup as
> >> default, the `pinctrl-names` needs to be "default" or "init" (see
> >> `drivers/base/pinctrl.c`) .
> >>
> >> Jagan, what version of board do you use? I checked with
> >> "ROC-RK3399-PC-V1.0-A 2018-07-12".
> >
> > I have ROC-RK3399-PC-V1.A 2018.09.25 and powering with TYPE-C0 port.
> >
> > And here the boot log
> >
> > [0.00] Booting Linux on physical CPU 0x00 [0x410fd034]
> &
Re: [PATCH 0/6] arm64: dts: rockchip: ROC-PC fixes
Hi Heiko, On Thu, Sep 19, 2019 at 10:58 AM Jagan Teki wrote: > > This series is trying to fix the Linux boot and other > regulators stuff for ROC-RK3399-PC board. > > patch 1: attach pinctrl to pwm2 pin > > patch 2-4: libretech naming conventions > > patch 5-6: regulator renaming, input rails fixes > > Any inputs? > Jagan. > > Jagan Teki (6): > arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin > dt-bindings: arm: rockchip: Use libretech for roc-pc binding > arm64: dts: rockchip: Use libretech model, compatible for ROC-PC These two patches are still valid right apart from renaming patch? any comments on those?
Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin
Hi Levin,
On Tue, Oct 8, 2019 at 8:42 AM wrote:
>
> Jagan Teki writes:
>
> > Hi Heiko,
> >
> > On Mon, Sep 30, 2019 at 2:51 AM Heiko Stuebner wrote:
> >>
> >> Hi Jagan,
> >>
> >> Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki:
> >> > ROC-PC is not able to boot linux console if PWM2_d is
> >> > unattached to any pinctrl logic.
> >> >
> >> > To be precise the linux boot hang with last logs as,
> >> > ...
> >> > .
> >> > [0.003367] Console: colour dummy device 80x25
> >> > [0.003788] printk: console [tty0] enabled
> >> > [0.004178] printk: bootconsole [uart8250] disabled
> >> >
> >> > In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of
> >> > VDD_LOG. So, for normal working operations this needs to
> >> > active and pull-down.
> >> >
> >> > This patch fix, by attaching pinctrl active and pull-down
> >> > the pwm2.
> >>
> >> This looks highly dubious on first glance. The pwm subsystem nor
> >> the Rockchip pwm driver do not do any pinctrl handling.
> >>
> >> So I don't really see where that "active" pinctrl state is supposed
> >> to come from.
> >>
> >> Comparing with the pwm driver in the vendor tree I see that there
> >> is such a state defined there. But that code there also looks strange
> >> as that driver never again leaves this active state after entering it.
> >>
> >> Also for example all the Gru devices run with quite a number of pwm-
> >> regulators without needing additional fiddling with the pwm itself, so
> >> I don't really see why that should be different here.
> >
> > I deed, I was supposed to think the same. but the vendor kernel dts
> > from firefly do follow the pwm2 pinctrl [1]. I wouldn't find any
> > information other than this vensor information, ie one of the reason I
> > have marked "Levin Du" who initially supported this board.
> >
> > One, think I have seen was this pinctrl active fixed the boot hang.
> > any inputs from would be very helpful.
> >
> > Levin Du, any inputs?
> >
> > [1]
> > https://github.com/FireflyTeam/kernel/blob/stable-4.4-rk3399-linux/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi#L1184
> >
>
> A grep of the `pwm2` shows that there's such block in rk3399-nanopi4.dtsi:
>
> {
> pinctrl-names = "active";
> pinctrl-0 = <_pin_pull_down>;
> status = "okay";
> };
>
> But last time I checked, using the mainline U-Boot (the roc-rk3399-pc is
> in mainline now) with mainline linux v5.2-rc7, no such setting is
> necessary, and the board boots happily.
>
> I cannot find the use of "active" pinctrl state in the
> `drivers/pwm/pwm-rockchip.c`. If the pinctrl state needs to be setup as
> default, the `pinctrl-names` needs to be "default" or "init" (see
> `drivers/base/pinctrl.c`) .
>
> Jagan, what version of board do you use? I checked with
> "ROC-RK3399-PC-V1.0-A 2018-07-12".
I have ROC-RK3399-PC-V1.A 2018.09.25 and powering with TYPE-C0 port.
And here the boot log
[0.00] Booting Linux on physical CPU 0x00 [0x410fd034]
[0.00] Linux version 5.4.0-rc3-next-20191016
(jagan@jagan-XPS-13-9350) (gcc version 6.3.1 20170109 (Linaro GCC
6.3-2017.02)) #1 SMP PREEMPT Wed Oct 16 21:17:23 IST 2019
[0.00] Machine model: Firefly ROC-RK3399-PC Board
[0.00] earlycon: uart8250 at MMIO32 0xff1a (options '')
[0.00] printk: bootconsole [uart8250] enabled
[0.00] efi: Getting EFI parameters from FDT:
[0.00] efi: UEFI not found.
[0.00] cma: Reserved 32 MiB at 0x3e00
[0.00] NUMA: No NUMA configuration found
[0.00] NUMA: Faking a node at [mem
0x0020-0xf7ff]
[0.00] NUMA: NODE_DATA [mem 0xf77ef100-0xf77f0fff]
[0.00] Zone ranges:
[0.00] DMA [mem 0x0020-0x3fff]
[0.00] DMA32[mem 0x4000-0xf7ff]
[0.00] Normal empty
[0.00] Movable zone start for each node
[0.00] Early memory node ranges
[0.00] node 0: [mem 0x0020-0xf7ff]
[0.00] Initmem setup node 0 [mem 0x0020-0xf7ff]
[0.00] psci: probing for conduit method from DT.
[0.00] psci: PSCIv1.1 detected in firmware.
[0.00] psci: Using standard PSCI v0.2 function IDs
[0.00] psci: MIGRATE_INFO_TYPE not supported.
[0.0
[PATCH v10 5/6] arm64: dts: allwinner: a64: Add MIPI DSI pipeline
Add MIPI DSI pipeline for Allwinner A64.
- dsi node, with A64 compatible since it doesn't support
DSI_SCLK gating unlike A33
- dphy node, with A64 compatible with A33 fallback since
DPHY on A64 and A33 is similar
- finally, attach the dsi_in to tcon0 for complete MIPI DSI
Signed-off-by: Jagan Teki
Tested-by: Merlijn Wajer
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 38 +++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 69128a6dfc46..ad4170b8aee0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -382,6 +382,12 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ tcon0_out_dsi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint =
<_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
};
};
};
@@ -1003,6 +1009,38 @@
status = "disabled";
};
+ dsi: dsi@1ca {
+ compatible = "allwinner,sun50i-a64-mipi-dsi";
+ reg = <0x01ca 0x1000>;
+ interrupts = ;
+ clocks = < CLK_BUS_MIPI_DSI>;
+ clock-names = "bus";
+ resets = < RST_BUS_MIPI_DSI>;
+ phys = <>;
+ phy-names = "dphy";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port {
+ dsi_in_tcon0: endpoint {
+ remote-endpoint = <_out_dsi>;
+ };
+ };
+ };
+
+ dphy: d-phy@1ca1000 {
+ compatible = "allwinner,sun50i-a64-mipi-dphy",
+"allwinner,sun6i-a31-mipi-dphy";
+ reg = <0x01ca1000 0x1000>;
+ clocks = < CLK_BUS_MIPI_DSI>,
+< CLK_DSI_DPHY>;
+ clock-names = "bus", "mod";
+ resets = < RST_BUS_MIPI_DSI>;
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
hdmi: hdmi@1ee {
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
--
2.18.0.321.gffc6fa0e3
[PATCH v10 0/6] drm/sun4i: Allwinner A64 MIPI-DSI support
This is v10 version for Allwinner A64 MIPI-DSI support and here is the previous version set[1]. This series on top of drm-misc/for-linux-next along with video start delay fix [2] Changes for v10: - updated dt-bindings as per .yaml format - rebased on drm-misc/for-linux-next Changes for v9: - moved dsi fixes in separate series on top of A33 [2] - rebase on linux-next and on top of [2] Changes for v8: - rebased on drm-misc change along with linux-next - reworked video start delay patch - tested on 4 different dsi panels - reworked commit messages Changes for v7: - moved vcc-dsi binding to required filed. - drop quotes on fallback dphy bindings. - drop min_rate clock pll-mipi patches. - introduce dclk divider computation as like A64 BSP. - add A64 DSI quark patches. - fixed A64 DSI pipeline. - add proper commit messages. - collect Merlijn Wajer Tested-by credits. Changes for v6: - dropped unneeded changes, patches - fixed all burst mode patches as per previous version comments - rebase on master - update proper commit message - dropped unneeded comments - order the patches that make review easy Changes for v5: - collect Rob, Acked-by - droped "Fix VBP size calculation" patch - updated vblk timing calculation. - droped techstar, bananapi dsi panel drivers which may require bridge or other setup. it's under discussion. Changes for v4: - droppoed untested CCU_FEATURE_FIXED_POSTDIV check code in nkm min, max rate patches - create two patches for "Add Allwinner A64 MIPI DSI support" one for has_mod_clk quirk and other one for A64 support - use existing driver code construct for hblk computation - dropped "Increase hfp packet overhead" patch [2], though BSP added this but we have no issues as of now. (no issues on panel side w/o this change) - create separate function for vblk computation - enable vcc-dsi regulator in dsi_runtime_resume - collect Rob, Acked-by - update MAINTAINERS file for panel drivers - cleanup commit messages - fixed checkpatch warnings/errors [1] https://patchwork.freedesktop.org/series/61310/ [2] https://patchwork.freedesktop.org/patch/334086/ Any inputs? Jagan. Jagan Teki (6): dt-bindings: sun6i-dsi: Add A64 MIPI-DSI compatible dt-bindings: sun6i-dsi: Add A64 DPHY compatible (w/ A31 fallback) drm/sun4i: dsi: Add has_mod_clk quirk drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support arm64: dts: allwinner: a64: Add MIPI DSI pipeline [DO NOT MERGE] arm64: dts: allwinner: bananapi-m64: Enable Bananapi S070WV20-CT16 DSI panel .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 4 +- .../phy/allwinner,sun6i-a31-mipi-dphy.yaml| 6 ++- .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 31 ++ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 38 + drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c| 42 ++- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h| 5 +++ 6 files changed, 114 insertions(+), 12 deletions(-) -- 2.18.0.321.gffc6fa0e3
Re: [PATCH 4/6] arm64: dts: rockchip: Rename roc-pc with libretech notation
On Mon, Sep 30, 2019 at 3:02 AM Heiko Stuebner wrote:
>
> Hi Jagan,
>
> Am Donnerstag, 19. September 2019, 07:28:20 CEST schrieb Jagan Teki:
> > Though the ROC-PC is manufactured by firefly, it is co-designed
> > by libretch like other Libretech computer boards from allwinner,
> > amlogic does.
> >
> > So, it is always meaningful to keep maintain those vendors who
> > are part of design participation so-that the linux mainline
> > code will expose outside world who are the makers of such
> > hardware prototypes.
> >
> > So, rename the existing rk3399-roc-pc.dts with libretch notation,
> > rk3399-libretech-roc-rk3399-pc.dts
> >
> > Signed-off-by: Jagan Teki
> > ---
> > arch/arm64/boot/dts/rockchip/Makefile | 2 +-
> > .../{rk3399-roc-pc.dts => rk3399-libretech-roc-rk3399-pc.dts} | 0
>
> Somewhat "randomly" renaming files for "exposure" of the maker isn't the
> way to go. Especially as the file name itself is merely a handle and not
> meant for fame. The board filename should mainly enable developers to
> hopefully the correct board file to use/change - and "rk3399-roc-pc"
> is sufficiently unique to do that.
>
> Similar to how the NanoPi boards do that.
>
> And renames not only loose the history of changes but also in this case
> the file is in the kernel since july 2018 - more than a year, so this might
> actually affect the workflow of someone.
Yes, I agreed this point.
>
> So I'd really expect an actual technical reason for a rename.
This changes purely based on the recent changes on naming conventions
that have been followed in amlogic and allwinner with regards to
libretech [1]. I have seen few Bananapi boards from Allwinner H3 has
been converted as per Libretech computer recently. I assume these
changes are because libretech has part of co-designed vendor and also
open source forum supported for these hardware.
For further information, may be Da Xue can comment on this.
[1] https://libre.computer/products/boards/
Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin
Hi Heiko, On Mon, Sep 30, 2019 at 2:51 AM Heiko Stuebner wrote: > > Hi Jagan, > > Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki: > > ROC-PC is not able to boot linux console if PWM2_d is > > unattached to any pinctrl logic. > > > > To be precise the linux boot hang with last logs as, > > ... > > . > > [0.003367] Console: colour dummy device 80x25 > > [0.003788] printk: console [tty0] enabled > > [0.004178] printk: bootconsole [uart8250] disabled > > > > In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of > > VDD_LOG. So, for normal working operations this needs to > > active and pull-down. > > > > This patch fix, by attaching pinctrl active and pull-down > > the pwm2. > > This looks highly dubious on first glance. The pwm subsystem nor > the Rockchip pwm driver do not do any pinctrl handling. > > So I don't really see where that "active" pinctrl state is supposed > to come from. > > Comparing with the pwm driver in the vendor tree I see that there > is such a state defined there. But that code there also looks strange > as that driver never again leaves this active state after entering it. > > Also for example all the Gru devices run with quite a number of pwm- > regulators without needing additional fiddling with the pwm itself, so > I don't really see why that should be different here. I deed, I was supposed to think the same. but the vendor kernel dts from firefly do follow the pwm2 pinctrl [1]. I wouldn't find any information other than this vensor information, ie one of the reason I have marked "Levin Du" who initially supported this board. One, think I have seen was this pinctrl active fixed the boot hang. any inputs from would be very helpful. Levin Du, any inputs? [1] https://github.com/FireflyTeam/kernel/blob/stable-4.4-rk3399-linux/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi#L1184
[PATCH 5/6] arm64: dts: rockchip: Rename vcc12v_sys into dc_12v for roc-rk3399-pc
It is always better practice to follow regulator naming conventions
as per the schematics for future references.
This would indeed helpful to review and check the naming convention
directly on schematics, both for the code reviewers and the developers.
So, rename vcc12v_sys into dc_12v as per rk3399 power tree as per
roc-rk3399-pc schematics.
Signed-off-by: Jagan Teki
---
.../boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
index e09bcbdd92f5..51242ea5447d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
@@ -57,9 +57,9 @@
* should be placed inside mp8859, but not until mp8859 has
* its own dt-binding.
*/
- vcc12v_sys: mp8859-dcdc1 {
+ dc_12v: mp8859-dcdc1 {
compatible = "regulator-fixed";
- regulator-name = "vcc12v_sys";
+ regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200>;
@@ -85,7 +85,7 @@
regulator-boot-on;
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
- vin-supply = <_sys>;
+ vin-supply = <_12v>;
};
/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
@@ -118,7 +118,7 @@
regulator-boot-on;
regulator-min-microvolt = <500>;
regulator-max-microvolt = <500>;
- vin-supply = <_sys>;
+ vin-supply = <_12v>;
};
vdd_log: vdd-log {
--
2.18.0.321.gffc6fa0e3
[PATCH 6/6] arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails
Few, know rk808 pmic regulators VCC[1-4], VCC[6-7], VCC[9-11],
VDD_LOG, VDD_GPU, VDD_CPU_B, VCC3V3_SYS are inputting with vcc_sys
which is 5V power rail from dc_12v.
So, replace the vin-supply of above mentioned regulators
with vcc_sys as per the PMIC-RK808-D page of roc-rk3399-pc
schematics.
Signed-off-by: Jagan Teki
---
.../rk3399-libretech-roc-rk3399-pc.dts| 26 +--
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
index 51242ea5447d..1eddb2e00809 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
@@ -85,7 +85,7 @@
regulator-boot-on;
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
- vin-supply = <_12v>;
+ vin-supply = <_sys>;
};
/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
@@ -129,7 +129,7 @@
regulator-boot-on;
regulator-min-microvolt = <80>;
regulator-max-microvolt = <140>;
- vin-supply = <_sys>;
+ vin-supply = <_sys>;
};
};
@@ -202,16 +202,16 @@
rockchip,system-power-controller;
wakeup-source;
- vcc1-supply = <_sys>;
- vcc2-supply = <_sys>;
- vcc3-supply = <_sys>;
- vcc4-supply = <_sys>;
- vcc6-supply = <_sys>;
- vcc7-supply = <_sys>;
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc6-supply = <_sys>;
+ vcc7-supply = <_sys>;
vcc8-supply = <_sys>;
- vcc9-supply = <_sys>;
- vcc10-supply = <_sys>;
- vcc11-supply = <_sys>;
+ vcc9-supply = <_sys>;
+ vcc10-supply = <_sys>;
+ vcc11-supply = <_sys>;
vcc12-supply = <_sys>;
vddio-supply = <_pmu>;
@@ -385,7 +385,7 @@
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
- vin-supply = <_sys>;
+ vin-supply = <_sys>;
regulator-state-mem {
regulator-off-in-suspend;
@@ -404,7 +404,7 @@
regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
- vin-supply = <_sys>;
+ vin-supply = <_sys>;
regulator-state-mem {
regulator-off-in-suspend;
--
2.18.0.321.gffc6fa0e3
[PATCH 3/6] arm64: dts: rockchip: Use libretech model, compatible for ROC-PC
Though the ROC-PC is manufactured by firefly, it is co-designed
by libretch like other Libretech computer boards from allwinner,
amlogic does.
So, it is always meaningful to keep maintain those vendors who
are part of design participation so-that the linux mainline
code will expose outside world who are the makers of such
hardware prototypes.
So,
- append the compatible to "libretech,roc-rk3399-pc" and
- update the model to "Libre Computer Board ROC-RK3399-PC"
like other libretech computer boards does.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
index c53f3d571620..e09bcbdd92f5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
@@ -9,8 +9,8 @@
#include "rk3399-opp.dtsi"
/ {
- model = "Firefly ROC-RK3399-PC Board";
- compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
+ model = "Libre Computer Board ROC-RK3399-PC";
+ compatible = "libretech,roc-rk3399-pc", "firefly,roc-rk3399-pc",
"rockchip,rk3399";
chosen {
stdout-path = "serial2:150n8";
--
2.18.0.321.gffc6fa0e3
[PATCH 4/6] arm64: dts: rockchip: Rename roc-pc with libretech notation
Though the ROC-PC is manufactured by firefly, it is co-designed
by libretch like other Libretech computer boards from allwinner,
amlogic does.
So, it is always meaningful to keep maintain those vendors who
are part of design participation so-that the linux mainline
code will expose outside world who are the makers of such
hardware prototypes.
So, rename the existing rk3399-roc-pc.dts with libretch notation,
rk3399-libretech-roc-rk3399-pc.dts
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
.../{rk3399-roc-pc.dts => rk3399-libretech-roc-rk3399-pc.dts} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-roc-pc.dts =>
rk3399-libretech-roc-rk3399-pc.dts} (100%)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index 1f18a9392d15..73c10ddb4300 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -21,12 +21,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-leez-p710.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-libretech-roc-rk3399-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
b/arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
similarity index 100%
rename from arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
rename to arch/arm64/boot/dts/rockchip/rk3399-libretech-roc-rk3399-pc.dts
--
2.18.0.321.gffc6fa0e3
[PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin
ROC-PC is not able to boot linux console if PWM2_d is
unattached to any pinctrl logic.
To be precise the linux boot hang with last logs as,
...
.
[0.003367] Console: colour dummy device 80x25
[0.003788] printk: console [tty0] enabled
[0.004178] printk: bootconsole [uart8250] disabled
In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of
VDD_LOG. So, for normal working operations this needs to
active and pull-down.
This patch fix, by attaching pinctrl active and pull-down
the pwm2.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
index 19f7732d728c..c53f3d571620 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
@@ -548,6 +548,8 @@
};
{
+ pinctrl-names = "active";
+ pinctrl-0 = <_pin_pull_down>;
status = "okay";
};
--
2.18.0.321.gffc6fa0e3
[PATCH 2/6] dt-bindings: arm: rockchip: Use libretech for roc-pc binding
Though the ROC-PC is manufactured by firefly, it is co-designed by libretch like other Libretech computer boards from allwinner, amlogic does. So, it is always meaningful to keep maintain those vendors who are part of design participation so-that the linux mainline code will expose outside world who are the makers of such hardware prototypes. So, update the dt-bindings of ROC-PC with libretch notation like other libretech computer boards does. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/rockchip.yaml | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 110fcca1a94e..bb65a10e85ce 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -87,11 +87,6 @@ properties: - const: firefly,roc-rk3328-cc - const: rockchip,rk3328 - - description: Firefly ROC-RK3399-PC -items: - - const: firefly,roc-rk3399-pc - - const: rockchip,rk3399 - - description: FriendlyElec NanoPi4 series boards items: - enum: @@ -364,6 +359,12 @@ properties: - const: leez,p710 - const: rockchip,rk3399 + - description: Libre Computer Board ROC-RK3399-PC +items: + - const: libretech,roc-rk3399-pc + - const: firefly,roc-rk3399-pc + - const: rockchip,rk3399 + - description: Mecer Xtreme Mini S6 items: - const: mecer,xms6 -- 2.18.0.321.gffc6fa0e3
[PATCH 0/6] arm64: dts: rockchip: ROC-PC fixes
This series is trying to fix the Linux boot and other
regulators stuff for ROC-RK3399-PC board.
patch 1: attach pinctrl to pwm2 pin
patch 2-4: libretech naming conventions
patch 5-6: regulator renaming, input rails fixes
Any inputs?
Jagan.
Jagan Teki (6):
arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin
dt-bindings: arm: rockchip: Use libretech for roc-pc binding
arm64: dts: rockchip: Use libretech model, compatible for ROC-PC
arm64: dts: rockchip: Rename roc-pc with libretech notation
arm64: dts: rockchip: Rename vcc12v_sys into dc_12v for roc-rk3399-pc
arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails
.../devicetree/bindings/arm/rockchip.yaml | 11 +++---
arch/arm64/boot/dts/rockchip/Makefile | 2 +-
...dts => rk3399-libretech-roc-rk3399-pc.dts} | 38 ++-
3 files changed, 27 insertions(+), 24 deletions(-)
rename arch/arm64/boot/dts/rockchip/{rk3399-roc-pc.dts =>
rk3399-libretech-roc-rk3399-pc.dts} (95%)
--
2.18.0.321.gffc6fa0e3
Re: [PATCH 01/25] arm64: dts: allwinner: Switch A64 dts(i) to use SPDX identifier
On Wed, Jul 3, 2019 at 6:58 PM Maxime Ripard wrote: > > On Wed, Jul 03, 2019 at 06:15:45PM +0530, Jagan Teki wrote: > > Adopt the SPDX license identifier headers to ease license > > compliance management on Allwinner A64 dts(i) files. > > > > While the text specifies "of the GPL or the X11 license" > > but the actual license text matches the MIT license as > > specified at [0] > > > > [0] https://spdx.org/licenses/MIT.html > > > > Signed-off-by: Jagan Teki > > --- > > .../dts/allwinner/sun50i-a64-bananapi-m64.dts | 39 +-- > > .../dts/allwinner/sun50i-a64-nanopi-a64.dts | 39 +-- > > .../dts/allwinner/sun50i-a64-olinuxino.dts| 39 +-- > > .../dts/allwinner/sun50i-a64-orangepi-win.dts | 39 +-- > > .../dts/allwinner/sun50i-a64-pine64-plus.dts | 39 +-- > > .../boot/dts/allwinner/sun50i-a64-pine64.dts | 39 +-- > > .../allwinner/sun50i-a64-sopine-baseboard.dts | 39 +-- > > .../boot/dts/allwinner/sun50i-a64-sopine.dtsi | 39 +-- > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 39 +-- > > 9 files changed, 9 insertions(+), 342 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > > b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > > index 208373efee49..efdd84c362b0 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts > > @@ -1,43 +1,6 @@ > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > You say that this is a GPL2 only license > > > /* > > * Copyright (c) 2016 ARM Ltd. > > - * > > - * This file is dual-licensed: you can use it either under the terms > > - * of the GPL or the X11 license, at your option. Note that this dual > > - * licensing only applies to this file, and not this project as a > > - * whole. > > - * > > - * a) This library is free software; you can redistribute it and/or > > - * modify it under the terms of the GNU General Public License as > > - * published by the Free Software Foundation; either version 2 of the > > - * License, or (at your option) any later version. > > While this is GPL2 or later. Yes, this is where I was confused with compared to existing architectures. It seems like it is a call from author of the file or make GPL-2.0 for generic purpose [1], not really sure. > > Also, I'm not sure why we need 25 patches to do that. Can't you just > send one (there's no even need to separate arm and arm64, since we > will do only a single PR from now as opposed to what we were doing > before). Just to make a clear conversion possible with individual SoC + boards files, I did based on existing arch's does. np, if require I can send it in single patch. [1] https://patchwork.kernel.org/patch/10963113/
[PATCH 13/25] ARM: dts: sun8i: Switch A33 dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner A33 dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts| 39 +-- .../arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 39 +-- arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 39 +-- arch/arm/boot/dts/sun8i-a33-q8-tablet.dts | 39 +-- .../arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 39 +-- arch/arm/boot/dts/sun8i-a33.dtsi | 39 +-- arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts | 39 +-- arch/arm/boot/dts/sun8i-r16-parrot.dts| 39 +-- 8 files changed, 8 insertions(+), 304 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts index 2dfdd0a3151e..434ff35fdd7a 100644 --- a/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts +++ b/arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dts @@ -1,43 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Hans de Goede - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts index 317763069c0a..6b6c0d326bcc 100644 --- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts +++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts @@ -1,44 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Hans de Goede * Copyright 2016 Icenowy Zheng - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions
[PATCH 22/25] ARM: dts: axp223: Switch to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on axp223.dtsi. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/axp223.dtsi | 39 +-- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/arch/arm/boot/dts/axp223.dtsi b/arch/arm/boot/dts/axp223.dtsi index b91b6c1278c7..77e8e26f1314 100644 --- a/arch/arm/boot/dts/axp223.dtsi +++ b/arch/arm/boot/dts/axp223.dtsi @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2016 Free Electrons * * Quentin Schulz - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /* -- 2.18.0.321.gffc6fa0e3
[PATCH 14/25] ARM: dts: sun8i: Switch A83T dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner A83T dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- .../dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 39 +-- arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 39 +-- .../boot/dts/sun8i-a83t-cubietruck-plus.dts | 39 +-- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 39 +-- arch/arm/boot/dts/sun8i-a83t.dtsi | 39 +-- 5 files changed, 5 insertions(+), 190 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts index 9c006fc18821..172a15694ad6 100644 --- a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts +++ b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts @@ -1,44 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Vishnu Patekar * Vishnu Patekar - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index 9d34eabba121..ff1eec61ab53 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2017 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS P
[PATCH 25/25] ARM: dts: axp81x: Switch to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on axp81x.dtsi. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/axp81x.dtsi | 39 +-- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi index 1dfeeceabf4c..83649e75f86d 100644 --- a/arch/arm/boot/dts/axp81x.dtsi +++ b/arch/arm/boot/dts/axp81x.dtsi @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2017 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /* AXP813/818 Integrated Power Management Chip */ -- 2.18.0.321.gffc6fa0e3
[PATCH 24/25] ARM: dts: axp809: Switch to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on axp809.dtsi. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/axp809.dtsi | 39 +-- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/arch/arm/boot/dts/axp809.dtsi b/arch/arm/boot/dts/axp809.dtsi index ab8e5f2d9246..53a902b29d6f 100644 --- a/arch/arm/boot/dts/axp809.dtsi +++ b/arch/arm/boot/dts/axp809.dtsi @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /* -- 2.18.0.321.gffc6fa0e3
[PATCH 21/25] ARM: dts: axp209: Switch to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on axp209.dtsi. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/axp209.dtsi | 39 +-- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi index 0d9ff12bdf28..9e05606cafcf 100644 --- a/arch/arm/boot/dts/axp209.dtsi +++ b/arch/arm/boot/dts/axp209.dtsi @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /* -- 2.18.0.321.gffc6fa0e3
[PATCH 12/25] ARM: dts: sun8i: Switch A23 dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner A23 dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 39 +-- arch/arm/boot/dts/sun8i-a23-evb.dts | 39 +-- arch/arm/boot/dts/sun8i-a23-gt90h-v4.dts | 39 +-- arch/arm/boot/dts/sun8i-a23-inet86dz.dts | 39 +-- .../dts/sun8i-a23-polaroid-mid2407pxe03.dts | 39 +-- .../dts/sun8i-a23-polaroid-mid2809pxe04.dts | 39 +-- arch/arm/boot/dts/sun8i-a23-q8-tablet.dts | 39 +-- arch/arm/boot/dts/sun8i-a23.dtsi | 39 +-- arch/arm/boot/dts/sun8i-q8-common.dtsi| 39 +-- .../dts/sun8i-reference-design-tablet.dtsi| 39 +-- 10 files changed, 10 insertions(+), 380 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index af2fa694a467..03e31e35db39 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2014 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include diff --git a/arch/arm/boot/dts/sun8i-a23-evb.dts b/arch/arm/boot/dts/sun8i-a23-evb.dts index 53fb1be0401a..a287da32a622 100644 --- a/arch/arm/boot/dts/sun8i-a23-evb.dts +++ b/arch/arm/boot/dts/sun8i-a23-evb.dts @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Maxime Ripard * * Maxime Ripard - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - *
[PATCH 20/25] ARM: dts: axp152: Switch to use SPDX identifier
Adopt the SPDX license identifier headers to ease license
compliance management on axp152.dtsi.
While the text specifies "of the GPL or the X11 license"
but the actual license text matches the MIT license as
specified at [0]
[0] https://spdx.org/licenses/MIT.html
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/axp152.dtsi | 39 +--
1 file changed, 1 insertion(+), 38 deletions(-)
diff --git a/arch/arm/boot/dts/axp152.dtsi b/arch/arm/boot/dts/axp152.dtsi
index f90ad6c64a07..4122aaf49e21 100644
--- a/arch/arm/boot/dts/axp152.dtsi
+++ b/arch/arm/boot/dts/axp152.dtsi
@@ -1,45 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2015 Chen-Yu Tsai
*
* Chen-Yu Tsai
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
{
--
2.18.0.321.gffc6fa0e3
[PATCH 18/25] ARM: dts: sun8i: Switch V3s dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner V3s dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- .../boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 39 +-- arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 39 +-- arch/arm/boot/dts/sun8i-v3s.dtsi | 39 +-- 3 files changed, 3 insertions(+), 114 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts index db5cd0b8574b..314e5fbca327 100644 --- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts +++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts @@ -1,43 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2016 Icenowy Zheng - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include "sun8i-v3s-licheepi-zero.dts" diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts index 2e4587d26ce5..c690fade42b3 100644 --- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts @@ -1,43 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2016 Icenowy Zheng - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
[PATCH 10/25] ARM: dts: sun7i: Switch A20 dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner A20 dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- .../boot/dts/sun7i-a20-bananapi-m1-plus.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-bananapro.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-cubietruck.dts| 39 +--- arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-icnova-swac.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-itead-ibox.dts| 39 +--- arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-m3.dts| 39 +--- arch/arm/boot/dts/sun7i-a20-mk808c.dts| 44 +-- .../arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 39 +--- .../arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 39 +--- .../dts/sun7i-a20-olinuxino-lime2-emmc.dts| 41 + .../boot/dts/sun7i-a20-olinuxino-lime2.dts| 39 +--- .../dts/sun7i-a20-olinuxino-micro-emmc.dts| 41 + .../boot/dts/sun7i-a20-olinuxino-micro.dts| 39 +--- arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-orangepi.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 39 +--- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 39 +--- .../arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 39 +--- .../boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 39 +--- arch/arm/boot/dts/sun7i-a20.dtsi | 39 +--- 25 files changed, 27 insertions(+), 957 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts index e2bfe0058830..1b1819e5d9ae 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2016 Luo Yi * * Thanks to the original work by Hans de Goede - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index 4df921632f7a..1b70d993ff0e 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2014 Hans de Goede * * Hans de Goede - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at yo
[PATCH 19/25] ARM: dts: sun9i: Switch A80 dts(i) to use SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance management on Allwinner A80 dts(i) files. While the text specifies "of the GPL or the X11 license" but the actual license text matches the MIT license as specified at [0] [0] https://spdx.org/licenses/MIT.html Signed-off-by: Jagan Teki --- arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 39 + arch/arm/boot/dts/sun9i-a80-optimus.dts | 39 + arch/arm/boot/dts/sun9i-a80.dtsi| 39 + 3 files changed, 3 insertions(+), 114 deletions(-) diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts index 18156ffa3ce9..a9c80fda1c5e 100644 --- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts +++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts @@ -1,46 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2015 Tyler Baker * * Tyler Baker * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 2ed28d9e2787..8179ce00c63f 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -1,45 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright 2014 Chen-Yu Tsai * * Chen-Yu Tsai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURP
