Re: [project-aspen-dev] Re: [PATCH 1/3] clk: hisilicon: add hisi phase clock support

[Jiancheng Xue]

Hi Shawn,

On 2017/11/16 10:31, Shawn Guo wrote:
> On Wed, Oct 18, 2017 at 07:00:27AM -0400, Jiancheng Xue wrote:
>> From: tianshuliang <tianshuli...@hisilicon.com>
>>
>> Add a phase clock type for HiSilicon SoCs,which supports
>> clk_set_phase operation.
> 
> As the pair of phase operation, I don't see why clk_get_phase operation
> is missing.
> 
>>
>> Signed-off-by: tianshuliang <tianshuli...@hisilicon.com>
>> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
>> ---
>>  drivers/clk/hisilicon/Makefile |   2 +-
>>  drivers/clk/hisilicon/clk-hisi-phase.c | 117 
>> +
>>  drivers/clk/hisilicon/clk.c|  45 +
>>  drivers/clk/hisilicon/clk.h|  22 +++
>>  4 files changed, 185 insertions(+), 1 deletion(-)
>>  create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c
>>
>> diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
>> index 1e4c3dd..7189f07 100644
>> --- a/drivers/clk/hisilicon/Makefile
>> +++ b/drivers/clk/hisilicon/Makefile
>> @@ -2,7 +2,7 @@
>>  # Hisilicon Clock specific Makefile
>>  #
>>  
>> -obj-y   += clk.o clkgate-separated.o clkdivider-hi6220.o
>> +obj-y   += clk.o clkgate-separated.o clkdivider-hi6220.o 
>> clk-hisi-phase.o
>>  
>>  obj-$(CONFIG_ARCH_HI3xxx)   += clk-hi3620.o
>>  obj-$(CONFIG_ARCH_HIP04)+= clk-hip04.o
>> diff --git a/drivers/clk/hisilicon/clk-hisi-phase.c 
>> b/drivers/clk/hisilicon/clk-hisi-phase.c
>> new file mode 100644
>> index 000..436f0a1
>> --- /dev/null
>> +++ b/drivers/clk/hisilicon/clk-hisi-phase.c
>> @@ -0,0 +1,117 @@
>> +/*
>> + * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * Simple HiSilicon phase clock implementation.
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include "clk.h"
>> +
>> +struct clk_hisi_phase {
>> +struct clk_hw   hw;
>> +void __iomem*reg;
>> +u32 *phase_values;
>> +u32 *phase_regs;
>> +u8  phase_num;
> 
> I do not think this value-reg table is necessary, as the register value
> maps to phase degree in a way that is easy for programming, i.e. degree
> increases 45 with register value increases one.
> 
We expected that this interface could be more generic. That means it can
be also used in other maps instances.

Regards,
Jiancheng

>> +u32 mask;
>> +u8  shift;
>> +u8  flags;
>> +spinlock_t  *lock;
>> +};
> 
> Have a newline here.
> 
>> +#define to_clk_hisi_phase(_hw) container_of(_hw, struct clk_hisi_phase, hw)
>> +
>> +static u32 hisi_clk_get_phase_reg(struct clk_hisi_phase *phase, int degrees)
>> +{
>> +int i;
>> +
>> +for (i = 0; i < phase->phase_num; i++)
>> +if (phase->phase_values[i] == degrees)
>> +return phase->phase_regs[i];
>> +
>> +return -EINVAL;
>> +}
>> +
>> +static int hisi_clk_set_phase(struct clk_hw *hw, int degrees)
>> +{
>> +struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
>> +u32 val, phase_reg;
>> +unsigned long flags = 0;
>> +
>> +phase_reg = hisi_clk_get_phase_reg(phase, degrees);
>> +if (phase_reg < 0)
>> +return phase_reg;
>> +
>> +if (phase->lock)
>> +spin_lock_irqsave(phase->lock, flags);
>> +else
>> +__acquire(phase->lock);
>> +
>> +val = clk_readl(phase->reg);
>> +val &= ~(phase->mask << phase->shift);
>> +val |= phase_reg << phase->shift;
>> +clk_writel(val, phase->reg);
>> +
>> +if (phase->lock)
>> +spin_unlock_irqrestore(phase->lock, flags);
>> +else
>> +__release(phase->lock);
>> +
>> +return 0;
>> +}
>> +
>> +const struct clk_ops clk_phase_ops = {
>> +.set_phase = hisi_clk_set_phase,
>> +};
>> +
>> +void clk_unregister_hisi_phase(struct clk *clk)
>> +{
>> +struct clk_hisi_phase *phase;
>> +struct clk_hw *hw;
>> +
>> +hw = __clk_g

Re: [project-aspen-dev] Re: [PATCH 1/3] clk: hisilicon: add hisi phase clock support

[Jiancheng Xue]

Hi Shawn,

On 2017/11/16 10:31, Shawn Guo wrote:
> On Wed, Oct 18, 2017 at 07:00:27AM -0400, Jiancheng Xue wrote:
>> From: tianshuliang 
>>
>> Add a phase clock type for HiSilicon SoCs,which supports
>> clk_set_phase operation.
> 
> As the pair of phase operation, I don't see why clk_get_phase operation
> is missing.
> 
>>
>> Signed-off-by: tianshuliang 
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  drivers/clk/hisilicon/Makefile |   2 +-
>>  drivers/clk/hisilicon/clk-hisi-phase.c | 117 
>> +
>>  drivers/clk/hisilicon/clk.c|  45 +
>>  drivers/clk/hisilicon/clk.h|  22 +++
>>  4 files changed, 185 insertions(+), 1 deletion(-)
>>  create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c
>>
>> diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
>> index 1e4c3dd..7189f07 100644
>> --- a/drivers/clk/hisilicon/Makefile
>> +++ b/drivers/clk/hisilicon/Makefile
>> @@ -2,7 +2,7 @@
>>  # Hisilicon Clock specific Makefile
>>  #
>>  
>> -obj-y   += clk.o clkgate-separated.o clkdivider-hi6220.o
>> +obj-y   += clk.o clkgate-separated.o clkdivider-hi6220.o 
>> clk-hisi-phase.o
>>  
>>  obj-$(CONFIG_ARCH_HI3xxx)   += clk-hi3620.o
>>  obj-$(CONFIG_ARCH_HIP04)+= clk-hip04.o
>> diff --git a/drivers/clk/hisilicon/clk-hisi-phase.c 
>> b/drivers/clk/hisilicon/clk-hisi-phase.c
>> new file mode 100644
>> index 000..436f0a1
>> --- /dev/null
>> +++ b/drivers/clk/hisilicon/clk-hisi-phase.c
>> @@ -0,0 +1,117 @@
>> +/*
>> + * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * Simple HiSilicon phase clock implementation.
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include "clk.h"
>> +
>> +struct clk_hisi_phase {
>> +struct clk_hw   hw;
>> +void __iomem*reg;
>> +u32 *phase_values;
>> +u32 *phase_regs;
>> +u8  phase_num;
> 
> I do not think this value-reg table is necessary, as the register value
> maps to phase degree in a way that is easy for programming, i.e. degree
> increases 45 with register value increases one.
> 
We expected that this interface could be more generic. That means it can
be also used in other maps instances.

Regards,
Jiancheng

>> +u32 mask;
>> +u8  shift;
>> +u8  flags;
>> +spinlock_t  *lock;
>> +};
> 
> Have a newline here.
> 
>> +#define to_clk_hisi_phase(_hw) container_of(_hw, struct clk_hisi_phase, hw)
>> +
>> +static u32 hisi_clk_get_phase_reg(struct clk_hisi_phase *phase, int degrees)
>> +{
>> +int i;
>> +
>> +for (i = 0; i < phase->phase_num; i++)
>> +if (phase->phase_values[i] == degrees)
>> +return phase->phase_regs[i];
>> +
>> +return -EINVAL;
>> +}
>> +
>> +static int hisi_clk_set_phase(struct clk_hw *hw, int degrees)
>> +{
>> +struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
>> +u32 val, phase_reg;
>> +unsigned long flags = 0;
>> +
>> +phase_reg = hisi_clk_get_phase_reg(phase, degrees);
>> +if (phase_reg < 0)
>> +return phase_reg;
>> +
>> +if (phase->lock)
>> +spin_lock_irqsave(phase->lock, flags);
>> +else
>> +__acquire(phase->lock);
>> +
>> +val = clk_readl(phase->reg);
>> +val &= ~(phase->mask << phase->shift);
>> +val |= phase_reg << phase->shift;
>> +clk_writel(val, phase->reg);
>> +
>> +if (phase->lock)
>> +spin_unlock_irqrestore(phase->lock, flags);
>> +else
>> +__release(phase->lock);
>> +
>> +return 0;
>> +}
>> +
>> +const struct clk_ops clk_phase_ops = {
>> +.set_phase = hisi_clk_set_phase,
>> +};
>> +
>> +void clk_unregister_hisi_phase(struct clk *clk)
>> +{
>> +struct clk_hisi_phase *phase;
>> +struct clk_hw *hw;
>> +
>> +hw = __clk_get_hw(clk);
>> +if (!hw)
>> +return;
>> +
>> +phase = to_clk

[PATCH v2 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Add support for two remote controllers of hisilicon boards.

ChangeLog:
v2:
Supplement copyright statements for source files.

Younian Wang (2):
  [media] rc/keymaps: add support for RC of hisilicon TV demo boards
  [media] rc/keymaps: add support for RC of hisilicon poplar board

 drivers/media/rc/keymaps/Makefile  |  2 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c  | 69 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 81 ++
 3 files changed, 152 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

-- 
2.7.4

[PATCH v2 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

From: Younian Wang <wangyoun...@hisilicon.com>

This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.

Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/media/rc/keymaps/Makefile  |  1 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 81 ++
 2 files changed, 82 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index af6496d..83ec9c3 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
rc-iodata-bctv7e.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
new file mode 100644
index 000..03bef29
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
@@ -0,0 +1,81 @@
+/*
+ * Keytable for remote controller of HiSilicon tv demo board.
+ *
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+static struct rc_map_table hisi_tv_demo_keymap[] = {
+   { 0x0092, KEY_1},
+   { 0x0093, KEY_2},
+   { 0x00cc, KEY_3},
+   { 0x009f, KEY_4},
+   { 0x008e, KEY_5},
+   { 0x008f, KEY_6},
+   { 0x00c8, KEY_7},
+   { 0x0094, KEY_8},
+   { 0x008a, KEY_9},
+   { 0x008b, KEY_0},
+   { 0x00ce, KEY_ENTER},
+   { 0x00ca, KEY_UP},
+   { 0x0099, KEY_LEFT},
+   { 0x0084, KEY_PAGEUP},
+   { 0x00c1, KEY_RIGHT},
+   { 0x00d2, KEY_DOWN},
+   { 0x0089, KEY_PAGEDOWN},
+   { 0x00d1, KEY_MUTE},
+   { 0x0098, KEY_VOLUMEDOWN},
+   { 0x0090, KEY_VOLUMEUP},
+   { 0x009c, KEY_POWER},
+   { 0x00d6, KEY_STOP},
+   { 0x0097, KEY_MENU},
+   { 0x00cb, KEY_BACK},
+   { 0x00da, KEY_PLAYPAUSE},
+   { 0x0080, KEY_INFO},
+   { 0x00c3, KEY_REWIND},
+   { 0x0087, KEY_HOMEPAGE},
+   { 0x00d0, KEY_FASTFORWARD},
+   { 0x00c4, KEY_SOUND},
+   { 0x0082, BTN_1},
+   { 0x00c7, BTN_2},
+   { 0x0086, KEY_PROGRAM},
+   { 0x00d9, KEY_SUBTITLE},
+   { 0x0085, KEY_ZOOM},
+   { 0x009b, KEY_RED},
+   { 0x009a, KEY_GREEN},
+   { 0x00c0, KEY_YELLOW},
+   { 0x00c2, KEY_BLUE},
+   { 0x009d, KEY_CHANNELDOWN},
+   { 0x00cf, KEY_CHANNELUP},
+};
+
+static struct rc_map_list hisi_tv_demo_map = {
+   .map = {
+   .scan = hisi_tv_demo_keymap,
+   .size = ARRAY_SIZE(hisi_tv_demo_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-tv-demo",
+   }
+};
+
+static int __init init_rc_map_hisi_tv_demo(void)
+{
+   return rc_map_register(_tv_demo_map);
+}
+
+static void __exit exit_rc_map_hisi_tv_demo(void)
+{
+   rc_map_unregister(_tv_demo_map);
+}
+
+module_init(init_rc_map_hisi_tv_demo)
+module_exit(exit_rc_map_hisi_tv_demo)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH v2 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Add support for two remote controllers of hisilicon boards.

ChangeLog:
v2:
Supplement copyright statements for source files.

Younian Wang (2):
  [media] rc/keymaps: add support for RC of hisilicon TV demo boards
  [media] rc/keymaps: add support for RC of hisilicon poplar board

 drivers/media/rc/keymaps/Makefile  |  2 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c  | 69 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 81 ++
 3 files changed, 152 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

-- 
2.7.4

[PATCH v2 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

From: Younian Wang 

This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.

Signed-off-by: Younian Wang 
Signed-off-by: Jiancheng Xue 
---
 drivers/media/rc/keymaps/Makefile  |  1 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 81 ++
 2 files changed, 82 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index af6496d..83ec9c3 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
rc-iodata-bctv7e.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
new file mode 100644
index 000..03bef29
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
@@ -0,0 +1,81 @@
+/*
+ * Keytable for remote controller of HiSilicon tv demo board.
+ *
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+static struct rc_map_table hisi_tv_demo_keymap[] = {
+   { 0x0092, KEY_1},
+   { 0x0093, KEY_2},
+   { 0x00cc, KEY_3},
+   { 0x009f, KEY_4},
+   { 0x008e, KEY_5},
+   { 0x008f, KEY_6},
+   { 0x00c8, KEY_7},
+   { 0x0094, KEY_8},
+   { 0x008a, KEY_9},
+   { 0x008b, KEY_0},
+   { 0x00ce, KEY_ENTER},
+   { 0x00ca, KEY_UP},
+   { 0x0099, KEY_LEFT},
+   { 0x0084, KEY_PAGEUP},
+   { 0x00c1, KEY_RIGHT},
+   { 0x00d2, KEY_DOWN},
+   { 0x0089, KEY_PAGEDOWN},
+   { 0x00d1, KEY_MUTE},
+   { 0x0098, KEY_VOLUMEDOWN},
+   { 0x0090, KEY_VOLUMEUP},
+   { 0x009c, KEY_POWER},
+   { 0x00d6, KEY_STOP},
+   { 0x0097, KEY_MENU},
+   { 0x00cb, KEY_BACK},
+   { 0x00da, KEY_PLAYPAUSE},
+   { 0x0080, KEY_INFO},
+   { 0x00c3, KEY_REWIND},
+   { 0x0087, KEY_HOMEPAGE},
+   { 0x00d0, KEY_FASTFORWARD},
+   { 0x00c4, KEY_SOUND},
+   { 0x0082, BTN_1},
+   { 0x00c7, BTN_2},
+   { 0x0086, KEY_PROGRAM},
+   { 0x00d9, KEY_SUBTITLE},
+   { 0x0085, KEY_ZOOM},
+   { 0x009b, KEY_RED},
+   { 0x009a, KEY_GREEN},
+   { 0x00c0, KEY_YELLOW},
+   { 0x00c2, KEY_BLUE},
+   { 0x009d, KEY_CHANNELDOWN},
+   { 0x00cf, KEY_CHANNELUP},
+};
+
+static struct rc_map_list hisi_tv_demo_map = {
+   .map = {
+   .scan = hisi_tv_demo_keymap,
+   .size = ARRAY_SIZE(hisi_tv_demo_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-tv-demo",
+   }
+};
+
+static int __init init_rc_map_hisi_tv_demo(void)
+{
+   return rc_map_register(_tv_demo_map);
+}
+
+static void __exit exit_rc_map_hisi_tv_demo(void)
+{
+   rc_map_unregister(_tv_demo_map);
+}
+
+module_init(init_rc_map_hisi_tv_demo)
+module_exit(exit_rc_map_hisi_tv_demo)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH v2 2/2] [media] rc/keymaps: add support for RC of hisilicon poplar board

[Jiancheng Xue]

From: Younian Wang <wangyoun...@hisilicon.com>

This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.

Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/media/rc/keymaps/Makefile |  1 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c | 69 +++
 2 files changed, 70 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index 83ec9c3..8daabfc6 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-poplar.o \
rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-poplar.c 
b/drivers/media/rc/keymaps/rc-hisi-poplar.c
new file mode 100644
index 000..5f50800
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-poplar.c
@@ -0,0 +1,69 @@
+/*
+ * Keytable for remote controller of HiSilicon poplar board.
+ *
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+static struct rc_map_table hisi_poplar_keymap[] = {
+   { 0xb292, KEY_1},
+   { 0xb293, KEY_2},
+   { 0xb2cc, KEY_3},
+   { 0xb28e, KEY_4},
+   { 0xb28f, KEY_5},
+   { 0xb2c8, KEY_6},
+   { 0xb28a, KEY_7},
+   { 0xb28b, KEY_8},
+   { 0xb2c4, KEY_9},
+   { 0xb287, KEY_0},
+   { 0xb282, KEY_HOMEPAGE},
+   { 0xb2ca, KEY_UP},
+   { 0xb299, KEY_LEFT},
+   { 0xb2c1, KEY_RIGHT},
+   { 0xb2d2, KEY_DOWN},
+   { 0xb2c5, KEY_DELETE},
+   { 0xb29c, KEY_MUTE},
+   { 0xb281, KEY_VOLUMEDOWN},
+   { 0xb280, KEY_VOLUMEUP},
+   { 0xb2dc, KEY_POWER},
+   { 0xb29a, KEY_MENU},
+   { 0xb28d, KEY_SETUP},
+   { 0xb2c5, KEY_BACK},
+   { 0xb295, KEY_PLAYPAUSE},
+   { 0xb2ce, KEY_ENTER},
+   { 0xb285, KEY_CHANNELUP},
+   { 0xb286, KEY_CHANNELDOWN},
+   { 0xb2da, KEY_NUMERIC_STAR},
+   { 0xb2d0, KEY_NUMERIC_POUND},
+};
+
+static struct rc_map_list hisi_poplar_map = {
+   .map = {
+   .scan = hisi_poplar_keymap,
+   .size = ARRAY_SIZE(hisi_poplar_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-poplar",
+   }
+};
+
+static int __init init_rc_map_hisi_poplar(void)
+{
+   return rc_map_register(_poplar_map);
+}
+
+static void __exit exit_rc_map_hisi_poplar(void)
+{
+   rc_map_unregister(_poplar_map);
+}
+
+module_init(init_rc_map_hisi_poplar)
+module_exit(exit_rc_map_hisi_poplar)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH v2 2/2] [media] rc/keymaps: add support for RC of hisilicon poplar board

[Jiancheng Xue]

From: Younian Wang 

This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.

Signed-off-by: Younian Wang 
Signed-off-by: Jiancheng Xue 
---
 drivers/media/rc/keymaps/Makefile |  1 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c | 69 +++
 2 files changed, 70 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index 83ec9c3..8daabfc6 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-poplar.o \
rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-poplar.c 
b/drivers/media/rc/keymaps/rc-hisi-poplar.c
new file mode 100644
index 000..5f50800
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-poplar.c
@@ -0,0 +1,69 @@
+/*
+ * Keytable for remote controller of HiSilicon poplar board.
+ *
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+
+static struct rc_map_table hisi_poplar_keymap[] = {
+   { 0xb292, KEY_1},
+   { 0xb293, KEY_2},
+   { 0xb2cc, KEY_3},
+   { 0xb28e, KEY_4},
+   { 0xb28f, KEY_5},
+   { 0xb2c8, KEY_6},
+   { 0xb28a, KEY_7},
+   { 0xb28b, KEY_8},
+   { 0xb2c4, KEY_9},
+   { 0xb287, KEY_0},
+   { 0xb282, KEY_HOMEPAGE},
+   { 0xb2ca, KEY_UP},
+   { 0xb299, KEY_LEFT},
+   { 0xb2c1, KEY_RIGHT},
+   { 0xb2d2, KEY_DOWN},
+   { 0xb2c5, KEY_DELETE},
+   { 0xb29c, KEY_MUTE},
+   { 0xb281, KEY_VOLUMEDOWN},
+   { 0xb280, KEY_VOLUMEUP},
+   { 0xb2dc, KEY_POWER},
+   { 0xb29a, KEY_MENU},
+   { 0xb28d, KEY_SETUP},
+   { 0xb2c5, KEY_BACK},
+   { 0xb295, KEY_PLAYPAUSE},
+   { 0xb2ce, KEY_ENTER},
+   { 0xb285, KEY_CHANNELUP},
+   { 0xb286, KEY_CHANNELDOWN},
+   { 0xb2da, KEY_NUMERIC_STAR},
+   { 0xb2d0, KEY_NUMERIC_POUND},
+};
+
+static struct rc_map_list hisi_poplar_map = {
+   .map = {
+   .scan = hisi_poplar_keymap,
+   .size = ARRAY_SIZE(hisi_poplar_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-poplar",
+   }
+};
+
+static int __init init_rc_map_hisi_poplar(void)
+{
+   return rc_map_register(_poplar_map);
+}
+
+static void __exit exit_rc_map_hisi_poplar(void)
+{
+   rc_map_unregister(_poplar_map);
+}
+
+module_init(init_rc_map_hisi_poplar)
+module_exit(exit_rc_map_hisi_poplar)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

Re: [PATCH 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Hi Hans，

On 2017/10/19 15:01, Hans Verkuil wrote:
> On 10/18/2017 12:54 PM, Jiancheng Xue wrote:
>> Add support for two remote controllers of hisilicon boards.
>>
>> Younian Wang (2):
>>   [media] rc/keymaps: add support for RC of hisilicon TV demo boards
>>   [media] rc/keymaps: add support for RC of hisilicon poplar board
>>
>>  drivers/media/rc/keymaps/Makefile  |  2 +
>>  drivers/media/rc/keymaps/rc-hisi-poplar.c  | 58 +
>>  drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 
>> ++
>>  3 files changed, 130 insertions(+)
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>>
> 
> Did you make a mistake? You reposted these two patches, but still without any
> copyright statement...
> 
> I think something went wrong here.
> 
I haven't reposted them so far. This is still the first version. I am waiting
to see if there are any more comments. If not, I can repost them soon.

Thank you.

Regards,
Jiancheng

Re: [PATCH 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Hi Hans，

On 2017/10/19 15:01, Hans Verkuil wrote:
> On 10/18/2017 12:54 PM, Jiancheng Xue wrote:
>> Add support for two remote controllers of hisilicon boards.
>>
>> Younian Wang (2):
>>   [media] rc/keymaps: add support for RC of hisilicon TV demo boards
>>   [media] rc/keymaps: add support for RC of hisilicon poplar board
>>
>>  drivers/media/rc/keymaps/Makefile  |  2 +
>>  drivers/media/rc/keymaps/rc-hisi-poplar.c  | 58 +
>>  drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 
>> ++
>>  3 files changed, 130 insertions(+)
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>>
> 
> Did you make a mistake? You reposted these two patches, but still without any
> copyright statement...
> 
> I think something went wrong here.
> 
I haven't reposted them so far. This is still the first version. I am waiting
to see if there are any more comments. If not, I can repost them soon.

Thank you.

Regards,
Jiancheng

Re: [PATCH 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

Hi,

On 2017/10/18 17:31, Sean Young wrote:
> On Wed, Oct 18, 2017 at 06:54:56AM -0400, Jiancheng Xue wrote:
>> From: Younian Wang <wangyoun...@hisilicon.com>
>>
>> This is a NEC protocol type remote controller distributed with
>> hisilicon TV demo boards.
>>
>> Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
>> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
>> ---
>>  drivers/media/rc/keymaps/Makefile  |  1 +
>>  drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 
>> ++
>>  2 files changed, 71 insertions(+)
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>>
>> diff --git a/drivers/media/rc/keymaps/Makefile 
>> b/drivers/media/rc/keymaps/Makefile
>> index af6496d..83ec9c3 100644
>> --- a/drivers/media/rc/keymaps/Makefile
>> +++ b/drivers/media/rc/keymaps/Makefile
>> @@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
>>  rc-geekbox.o \
>>  rc-genius-tvgo-a11mce.o \
>>  rc-gotview7135.o \
>> +rc-hisi-tv-demo.o \
>>  rc-imon-mce.o \
>>  rc-imon-pad.o \
>>  rc-iodata-bctv7e.o \
>> diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
>> b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>> new file mode 100644
>> index 000..410b17d
>> --- /dev/null
>> +++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>> @@ -0,0 +1,70 @@
>> +#include 
>> +#include 
> 
> Both keymaps are missing a copyright statement at the top of the c files.
> 

Oh. I will add the copyright in next version. Thank you very much.

Regards,
Jiancheng

> Thanks
> Sean
> 
>> +
>> +static struct rc_map_table hisi_tv_demo_keymap[] = {
>> +{ 0x0092, KEY_1},
>> +{ 0x0093, KEY_2},
>> +{ 0x00cc, KEY_3},
>> +{ 0x009f, KEY_4},
>> +{ 0x008e, KEY_5},
>> +{ 0x008f, KEY_6},
>> +{ 0x00c8, KEY_7},
>> +{ 0x0094, KEY_8},
>> +{ 0x008a, KEY_9},
>> +{ 0x008b, KEY_0},
>> +{ 0x00ce, KEY_ENTER},
>> +{ 0x00ca, KEY_UP},
>> +{ 0x0099, KEY_LEFT},
>> +{ 0x0084, KEY_PAGEUP},
>> +{ 0x00c1, KEY_RIGHT},
>> +{ 0x00d2, KEY_DOWN},
>> +{ 0x0089, KEY_PAGEDOWN},
>> +{ 0x00d1, KEY_MUTE},
>> +{ 0x0098, KEY_VOLUMEDOWN},
>> +{ 0x0090, KEY_VOLUMEUP},
>> +{ 0x009c, KEY_POWER},
>> +{ 0x00d6, KEY_STOP},
>> +{ 0x0097, KEY_MENU},
>> +{ 0x00cb, KEY_BACK},
>> +{ 0x00da, KEY_PLAYPAUSE},
>> +{ 0x0080, KEY_INFO},
>> +{ 0x00c3, KEY_REWIND},
>> +{ 0x0087, KEY_HOMEPAGE},
>> +{ 0x00d0, KEY_FASTFORWARD},
>> +{ 0x00c4, KEY_SOUND},
>> +{ 0x0082, BTN_1},
>> +{ 0x00c7, BTN_2},
>> +{ 0x0086, KEY_PROGRAM},
>> +{ 0x00d9, KEY_SUBTITLE},
>> +{ 0x0085, KEY_ZOOM},
>> +{ 0x009b, KEY_RED},
>> +{ 0x009a, KEY_GREEN},
>> +{ 0x00c0, KEY_YELLOW},
>> +{ 0x00c2, KEY_BLUE},
>> +{ 0x009d, KEY_CHANNELDOWN},
>> +{ 0x00cf, KEY_CHANNELUP},
>> +};
>> +
>> +static struct rc_map_list hisi_tv_demo_map = {
>> +.map = {
>> +.scan = hisi_tv_demo_keymap,
>> +.size = ARRAY_SIZE(hisi_tv_demo_keymap),
>> +.rc_proto = RC_PROTO_NEC,
>> +.name = "rc-hisi-demo",
>> +}
>> +};
>> +
>> +static int __init init_rc_map_hisi_tv_demo(void)
>> +{
>> +return rc_map_register(_tv_demo_map);
>> +}
>> +
>> +static void __exit exit_rc_map_hisi_tv_demo(void)
>> +{
>> +rc_map_unregister(_tv_demo_map);
>> +}
>> +
>> +module_init(init_rc_map_hisi_tv_demo)
>> +module_exit(exit_rc_map_hisi_tv_demo)
>> +
>> +MODULE_LICENSE("GPL v2");
>> -- 
>> 2.7.4
> 
> .
> 

Re: [PATCH 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

Hi,

On 2017/10/18 17:31, Sean Young wrote:
> On Wed, Oct 18, 2017 at 06:54:56AM -0400, Jiancheng Xue wrote:
>> From: Younian Wang 
>>
>> This is a NEC protocol type remote controller distributed with
>> hisilicon TV demo boards.
>>
>> Signed-off-by: Younian Wang 
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  drivers/media/rc/keymaps/Makefile  |  1 +
>>  drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 
>> ++
>>  2 files changed, 71 insertions(+)
>>  create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>>
>> diff --git a/drivers/media/rc/keymaps/Makefile 
>> b/drivers/media/rc/keymaps/Makefile
>> index af6496d..83ec9c3 100644
>> --- a/drivers/media/rc/keymaps/Makefile
>> +++ b/drivers/media/rc/keymaps/Makefile
>> @@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
>>  rc-geekbox.o \
>>  rc-genius-tvgo-a11mce.o \
>>  rc-gotview7135.o \
>> +rc-hisi-tv-demo.o \
>>  rc-imon-mce.o \
>>  rc-imon-pad.o \
>>  rc-iodata-bctv7e.o \
>> diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
>> b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>> new file mode 100644
>> index 000..410b17d
>> --- /dev/null
>> +++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
>> @@ -0,0 +1,70 @@
>> +#include 
>> +#include 
> 
> Both keymaps are missing a copyright statement at the top of the c files.
> 

Oh. I will add the copyright in next version. Thank you very much.

Regards,
Jiancheng

> Thanks
> Sean
> 
>> +
>> +static struct rc_map_table hisi_tv_demo_keymap[] = {
>> +{ 0x0092, KEY_1},
>> +{ 0x0093, KEY_2},
>> +{ 0x00cc, KEY_3},
>> +{ 0x009f, KEY_4},
>> +{ 0x008e, KEY_5},
>> +{ 0x008f, KEY_6},
>> +{ 0x00c8, KEY_7},
>> +{ 0x0094, KEY_8},
>> +{ 0x008a, KEY_9},
>> +{ 0x008b, KEY_0},
>> +{ 0x00ce, KEY_ENTER},
>> +{ 0x00ca, KEY_UP},
>> +{ 0x0099, KEY_LEFT},
>> +{ 0x0084, KEY_PAGEUP},
>> +{ 0x00c1, KEY_RIGHT},
>> +{ 0x00d2, KEY_DOWN},
>> +{ 0x0089, KEY_PAGEDOWN},
>> +{ 0x00d1, KEY_MUTE},
>> +{ 0x0098, KEY_VOLUMEDOWN},
>> +{ 0x0090, KEY_VOLUMEUP},
>> +{ 0x009c, KEY_POWER},
>> +{ 0x00d6, KEY_STOP},
>> +{ 0x0097, KEY_MENU},
>> +{ 0x00cb, KEY_BACK},
>> +{ 0x00da, KEY_PLAYPAUSE},
>> +{ 0x0080, KEY_INFO},
>> +{ 0x00c3, KEY_REWIND},
>> +{ 0x0087, KEY_HOMEPAGE},
>> +{ 0x00d0, KEY_FASTFORWARD},
>> +{ 0x00c4, KEY_SOUND},
>> +{ 0x0082, BTN_1},
>> +{ 0x00c7, BTN_2},
>> +{ 0x0086, KEY_PROGRAM},
>> +{ 0x00d9, KEY_SUBTITLE},
>> +{ 0x0085, KEY_ZOOM},
>> +{ 0x009b, KEY_RED},
>> +{ 0x009a, KEY_GREEN},
>> +{ 0x00c0, KEY_YELLOW},
>> +{ 0x00c2, KEY_BLUE},
>> +{ 0x009d, KEY_CHANNELDOWN},
>> +{ 0x00cf, KEY_CHANNELUP},
>> +};
>> +
>> +static struct rc_map_list hisi_tv_demo_map = {
>> +.map = {
>> +.scan = hisi_tv_demo_keymap,
>> +.size = ARRAY_SIZE(hisi_tv_demo_keymap),
>> +.rc_proto = RC_PROTO_NEC,
>> +.name = "rc-hisi-demo",
>> +}
>> +};
>> +
>> +static int __init init_rc_map_hisi_tv_demo(void)
>> +{
>> +return rc_map_register(_tv_demo_map);
>> +}
>> +
>> +static void __exit exit_rc_map_hisi_tv_demo(void)
>> +{
>> +rc_map_unregister(_tv_demo_map);
>> +}
>> +
>> +module_init(init_rc_map_hisi_tv_demo)
>> +module_exit(exit_rc_map_hisi_tv_demo)
>> +
>> +MODULE_LICENSE("GPL v2");
>> -- 
>> 2.7.4
> 
> .
> 

[PATCH 2/3] arm64: dts: hisilicon: add pinctrl nodes for hi3798cv200-poplar board

[Jiancheng Xue]

From: Younian Wang <wangyoun...@hisilicon.com>

Add pinctrl nodes for hi3798cv200-poplar board

Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |   1 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  71 +++
 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi  | 651 +
 3 files changed, 723 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index b914287..6a0b7e9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -11,6 +11,7 @@
 
 #include 
 #include "hi3798cv200.dtsi"
+#include "poplar-pinctrl.dtsi"
 
 / {
model = "HiSilicon Poplar Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 0d11dc7..5a73c68 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,54 @@
#reset-cells = <2>;
};
 
+   pmx0: pinconf@8a21000 {
+   compatible = "pinconf-single";
+   reg = <0x8a21000 0x180>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <7>;
+   pinctrl-single,gpio-range = <
+0  8 2  /* GPIO 0 */
+8  1 0  /* GPIO 1 */
+9  4 2
+13 1 0
+14 1 1
+15 1 0
+16 5 0  /* GPIO 2 */
+21 3 1
+24 4 1  /* GPIO 3 */
+28 2 2
+86 1 1
+87 1 0
+30 4 2  /* GPIO 4 */
+34 3 0
+37 1 2
+38 3 2  /* GPIO 6 */
+41 5 0
+46 8 1  /* GPIO 7 */
+54 8 1  /* GPIO 8 */
+64 7 1  /* GPIO 9 */
+71 1 0
+72 6 1  /* GPIO 10 */
+78 1 0
+79 1 1
+80 6 1  /* GPIO 11 */
+70 2 1
+88 8 0  /* GPIO 12 */
+   >;
+
+   range: gpio-range {
+   #pinctrl-single,gpio-range-cells = <3>;
+   };
+   };
+
+   pmx1: pinconf@844 {
+   compatible = "pinctrl-single";
+   reg = <0x844 4>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <1>;
+   pinctrl-single,bit-per-mux;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -209,6 +257,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = < 0 0 8>;
clocks = < HISTB_APB_CLK>;
clock-names = "apb_pclk";
status = "disabled";
@@ -222,6 +271,13 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = <
+0 8 1
+1 9 4
+5 13 1
+6 14 1
+7 15 1
+   >;
clocks = < HISTB_APB_CLK>;
clock-names = "apb_pclk";
status = "disabled";
@@ -235,6 +291,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = < 0 16 5  5 21 3>;
clocks = < HISTB_APB

[PATCH 2/3] arm64: dts: hisilicon: add pinctrl nodes for hi3798cv200-poplar board

[Jiancheng Xue]

From: Younian Wang 

Add pinctrl nodes for hi3798cv200-poplar board

Signed-off-by: Younian Wang 
Signed-off-by: Jiancheng Xue 
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |   1 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  71 +++
 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi  | 651 +
 3 files changed, 723 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index b914287..6a0b7e9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -11,6 +11,7 @@
 
 #include 
 #include "hi3798cv200.dtsi"
+#include "poplar-pinctrl.dtsi"
 
 / {
model = "HiSilicon Poplar Development Board";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 0d11dc7..5a73c68 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,54 @@
#reset-cells = <2>;
};
 
+   pmx0: pinconf@8a21000 {
+   compatible = "pinconf-single";
+   reg = <0x8a21000 0x180>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <7>;
+   pinctrl-single,gpio-range = <
+0  8 2  /* GPIO 0 */
+8  1 0  /* GPIO 1 */
+9  4 2
+13 1 0
+14 1 1
+15 1 0
+16 5 0  /* GPIO 2 */
+21 3 1
+24 4 1  /* GPIO 3 */
+28 2 2
+86 1 1
+87 1 0
+30 4 2  /* GPIO 4 */
+34 3 0
+37 1 2
+38 3 2  /* GPIO 6 */
+41 5 0
+46 8 1  /* GPIO 7 */
+54 8 1  /* GPIO 8 */
+64 7 1  /* GPIO 9 */
+71 1 0
+72 6 1  /* GPIO 10 */
+78 1 0
+79 1 1
+80 6 1  /* GPIO 11 */
+70 2 1
+88 8 0  /* GPIO 12 */
+   >;
+
+   range: gpio-range {
+   #pinctrl-single,gpio-range-cells = <3>;
+   };
+   };
+
+   pmx1: pinconf@844 {
+   compatible = "pinctrl-single";
+   reg = <0x844 4>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <1>;
+   pinctrl-single,bit-per-mux;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -209,6 +257,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = < 0 0 8>;
clocks = < HISTB_APB_CLK>;
clock-names = "apb_pclk";
status = "disabled";
@@ -222,6 +271,13 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = <
+0 8 1
+1 9 4
+5 13 1
+6 14 1
+7 15 1
+   >;
clocks = < HISTB_APB_CLK>;
clock-names = "apb_pclk";
status = "disabled";
@@ -235,6 +291,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+   gpio-ranges = < 0 16 5  5 21 3>;
clocks = < HISTB_APB_CLK>;
clock-names = "apb_pclk";
status

[PATCH 1/3] arm64: dts: hisilicon: supplement properties of ir node for poplar board

[Jiancheng Xue]

From: Younian Wang 

Supplement properties of ir node for poplar board.

Signed-off-by: Younian Wang 
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..0d11dc7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -405,6 +405,8 @@
reg = <0x8001000 0x1000>;
interrupts = ;
clocks = < HISTB_IR_CLK>;
+   hisilicon,power-syscon = <>;
+   linux,rc-map-name = "rc-hisi-poplar";
status = "disabled";
};
};
-- 
2.7.4

[PATCH 0/3] arm64: dts: add more nodes and properities for hi3798cv200-poplar board

[Jiancheng Xue]

Add more devices nodes and properties for poplar board, involving ir, emmc and 
pinctrl nodes.

Younian Wang (2):
  arm64: dts: hisilicon: supplement properties of ir node for poplar
board
  arm64: dts: hisilicon: add pinctrl nodes for hi3798cv200-poplar board

tianshuliang (1):
  arm64: dts: hisilicon: supplement properties of emmc nodes for
hi3798cv200-poplar board

 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  81 ++-
 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi  | 651 +
 3 files changed, 742 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi

-- 
2.7.4

[PATCH 3/3] arm64: dts: hisilicon: supplement properties of emmc nodes for hi3798cv200-poplar board

[Jiancheng Xue]

From: tianshuliang 

Supplement properties of emmc nodes to support high performance.

Signed-off-by: tianshuliang 
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts | 12 
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi   |  8 +---
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index 6a0b7e9..b890829 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -160,4 +160,16 @@
status = "okay";
label = "LS-UART0";
 };
+
+ {
+   status = "okay";
+   num-slots = <1>;
+   fifo-depth = <256>;
+   clock-frequency = <2>;
+   cap-mmc-highspeed;
+   mmc-ddr-1_8v;
+   mmc-hs200-1_8v;
+   non-removable;
+   bus-width = <8>;
+};
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 5a73c68..df62382 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -241,12 +241,14 @@
};
 
emmc: mmc@983 {
-   compatible = "snps,dw-mshc";
+   compatible = "hisilicon,hi3798cv200-dw-mshc";
reg = <0x983 0x1>;
interrupts = ;
clocks = < HISTB_MMC_CIU_CLK>,
-< HISTB_MMC_BIU_CLK>;
-   clock-names = "ciu", "biu";
+< HISTB_MMC_BIU_CLK>,
+< HISTB_MMC_SAMPLE_CLK>,
+< HISTB_MMC_DRV_CLK>;
+   clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
};
 
gpio0: gpio@8b2 {
-- 
2.7.4

[PATCH 1/3] arm64: dts: hisilicon: supplement properties of ir node for poplar board

[Jiancheng Xue]

From: Younian Wang 

Supplement properties of ir node for poplar board.

Signed-off-by: Younian Wang 
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..0d11dc7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -405,6 +405,8 @@
reg = <0x8001000 0x1000>;
interrupts = ;
clocks = < HISTB_IR_CLK>;
+   hisilicon,power-syscon = <>;
+   linux,rc-map-name = "rc-hisi-poplar";
status = "disabled";
};
};
-- 
2.7.4

[PATCH 0/3] arm64: dts: add more nodes and properities for hi3798cv200-poplar board

[Jiancheng Xue]

Add more devices nodes and properties for poplar board, involving ir, emmc and 
pinctrl nodes.

Younian Wang (2):
  arm64: dts: hisilicon: supplement properties of ir node for poplar
board
  arm64: dts: hisilicon: add pinctrl nodes for hi3798cv200-poplar board

tianshuliang (1):
  arm64: dts: hisilicon: supplement properties of emmc nodes for
hi3798cv200-poplar board

 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  81 ++-
 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi  | 651 +
 3 files changed, 742 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm64/boot/dts/hisilicon/poplar-pinctrl.dtsi

-- 
2.7.4

[PATCH 3/3] arm64: dts: hisilicon: supplement properties of emmc nodes for hi3798cv200-poplar board

[Jiancheng Xue]

From: tianshuliang 

Supplement properties of emmc nodes to support high performance.

Signed-off-by: tianshuliang 
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts | 12 
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi   |  8 +---
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index 6a0b7e9..b890829 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -160,4 +160,16 @@
status = "okay";
label = "LS-UART0";
 };
+
+ {
+   status = "okay";
+   num-slots = <1>;
+   fifo-depth = <256>;
+   clock-frequency = <2>;
+   cap-mmc-highspeed;
+   mmc-ddr-1_8v;
+   mmc-hs200-1_8v;
+   non-removable;
+   bus-width = <8>;
+};
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 5a73c68..df62382 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -241,12 +241,14 @@
};
 
emmc: mmc@983 {
-   compatible = "snps,dw-mshc";
+   compatible = "hisilicon,hi3798cv200-dw-mshc";
reg = <0x983 0x1>;
interrupts = ;
clocks = < HISTB_MMC_CIU_CLK>,
-< HISTB_MMC_BIU_CLK>;
-   clock-names = "ciu", "biu";
+< HISTB_MMC_BIU_CLK>,
+< HISTB_MMC_SAMPLE_CLK>,
+< HISTB_MMC_DRV_CLK>;
+   clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
};
 
gpio0: gpio@8b2 {
-- 
2.7.4

[PATCH 0/2] mmc: add an specific emmc driver for hi3798cv200-poplar board

[Jiancheng Xue]

Add an specific emmc driver for hi3798cv200-poplar board. Previously, it used 
the
generic dw-mmc driver with lower performance.

tianshuliang (2):
  dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc
  mmc: dw_mmc: add support for hi3798cv200 specific extensions of
dw-mshc

 .../bindings/mmc/hi3798cv200-dw-mshc.txt   |  51 ++
 drivers/mmc/host/Kconfig   |   9 +
 drivers/mmc/host/Makefile  |   1 +
 drivers/mmc/host/dw_mmc-hi3798cv200.c  | 191 +
 4 files changed, 252 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
 create mode 100644 drivers/mmc/host/dw_mmc-hi3798cv200.c

-- 
2.7.4

[PATCH 0/2] mmc: add an specific emmc driver for hi3798cv200-poplar board

[Jiancheng Xue]

Add an specific emmc driver for hi3798cv200-poplar board. Previously, it used 
the
generic dw-mmc driver with lower performance.

tianshuliang (2):
  dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc
  mmc: dw_mmc: add support for hi3798cv200 specific extensions of
dw-mshc

 .../bindings/mmc/hi3798cv200-dw-mshc.txt   |  51 ++
 drivers/mmc/host/Kconfig   |   9 +
 drivers/mmc/host/Makefile  |   1 +
 drivers/mmc/host/dw_mmc-hi3798cv200.c  | 191 +
 4 files changed, 252 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
 create mode 100644 drivers/mmc/host/dw_mmc-hi3798cv200.c

-- 
2.7.4

[PATCH 2/2] mmc: dw_mmc: add support for hi3798cv200 specific extensions of dw-mshc

[Jiancheng Xue]

From: tianshuliang <tianshuli...@hisilicon.com>

Hi3798cv200 SoC extends the dw-mshc controller for additional clock
and bus control. Add support for these extensions.

Signed-off-by: tianshuliang <tianshuli...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/mmc/host/Kconfig  |   9 ++
 drivers/mmc/host/Makefile |   1 +
 drivers/mmc/host/dw_mmc-hi3798cv200.c | 191 ++
 3 files changed, 201 insertions(+)
 create mode 100644 drivers/mmc/host/dw_mmc-hi3798cv200.c

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 8c15637..2bf6aa8 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -712,6 +712,15 @@ config MMC_DW_K3
  Synopsys DesignWare Memory Card Interface driver. Select this option
  for platforms based on Hisilicon K3 SoC's.
 
+config MMC_DW_HI3798CV200
+   tristate "Hi3798cv200 specific extensions for Synopsys DW Memory Card 
Interface"
+   depends on MMC_DW
+   select MMC_DW_PLTFM
+   help
+ This selects support for HiSilicon hi3798cv200 SoC specific 
extensions to the
+ Synopsys DesignWare Memory Card Interface driver. Select this option
+ for platforms based on HiSilicon hi3798cv200 SoC's.
+
 config MMC_DW_PCI
tristate "Synopsys Designware MCI support on PCI bus"
depends on MMC_DW && PCI
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 303f5cd..6e015d8 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_MMC_CAVIUM_THUNDERX) += thunderx-mmc.o
 obj-$(CONFIG_MMC_DW)   += dw_mmc.o
 obj-$(CONFIG_MMC_DW_PLTFM) += dw_mmc-pltfm.o
 obj-$(CONFIG_MMC_DW_EXYNOS)+= dw_mmc-exynos.o
+obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o
 obj-$(CONFIG_MMC_DW_K3)+= dw_mmc-k3.o
 obj-$(CONFIG_MMC_DW_PCI)   += dw_mmc-pci.o
 obj-$(CONFIG_MMC_DW_ROCKCHIP)  += dw_mmc-rockchip.o
diff --git a/drivers/mmc/host/dw_mmc-hi3798cv200.c 
b/drivers/mmc/host/dw_mmc-hi3798cv200.c
new file mode 100644
index 000..bd24001
--- /dev/null
+++ b/drivers/mmc/host/dw_mmc-hi3798cv200.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "dw_mmc.h"
+#include "dw_mmc-pltfm.h"
+
+#define ALL_INT_CLR0x1EFFF
+
+#define SDMMC_DDR_REG  0x10c
+#define SDMMC_ENABLE_SH0x110
+#define SDMMC_DDR_HS400BIT(31)
+#define SDMMC_ENABLE_SH_PHASE  BIT(0)
+#define SDMMC_DRV_PS_135   3
+#define SDMMC_DRV_PS_180   4
+
+struct hi3798cv200_priv {
+   struct clk  *sample_clk;
+   struct clk  *drive_clk;
+};
+
+static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios 
*ios)
+{
+   u32 regs;
+   struct hi3798cv200_priv *priv = host->priv;
+   u32 drive_phase[] = {0, 45, 90, 135, 180, 225, 270, 315};
+
+   regs = mci_readl(host, UHS_REG);
+   if (ios->timing == MMC_TIMING_MMC_HS400)
+   regs &= ~(0x1 << 16);
+   mci_writel(host, UHS_REG, regs);
+
+   regs = mci_readl(host, ENABLE_SH);
+   if (ios->timing == MMC_TIMING_MMC_DDR52)
+   regs |= SDMMC_ENABLE_SH_PHASE;
+   else
+   regs &= ~SDMMC_ENABLE_SH_PHASE;
+   mci_writel(host, ENABLE_SH, regs);
+
+   regs = mci_readl(host, DDR_REG);
+   if (ios->timing == MMC_TIMING_MMC_HS400)
+   regs |= SDMMC_DDR_HS400;
+   else
+   regs &= ~SDMMC_DDR_HS400;
+   mci_writel(host, DDR_REG, regs);
+
+   if ((ios->timing == MMC_TIMING_MMC_HS) ||
+   (ios->timing == MMC_TIMING_LEGACY))
+   clk_set_phase(priv->drive_clk, drive_phase[SDMMC_DRV_PS_180]);
+   else if (ios->timing == MMC_TIMING_MMC_HS200)
+   clk_set_phase(priv->drive_clk, drive_phase[SDMMC_DRV_PS_135]);
+}
+
+static int
+dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
+{
+   struct dw_mci *host = slot->host;
+   struct hi3798cv200_priv *priv = host->priv;
+   u32 index, found = 0;
+   u32 sample_phase[] = {0, 45, 90, 135, 180, 225, 270, 315};
+   int err = 0, raise_point = -1, fall_point = -1, prev_err = -1;
+
+   for (index = 0; index < ARRAY_SIZE(sample_phase); index++) {
+   clk_set_phase(priv->sample_clk, sample_phase[index]);
+   mci_writel(host, RINTSTS, ALL_INT_CLR);
+
+   err = mmc_send_

[PATCH 1/2] dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc

[Jiancheng Xue]

From: tianshuliang <tianshuli...@hisilicon.com>

Hisilicon hi3798cv200 SoC extends the dw-mshc controller
for additional clock control. Add device tree bindings for
hi3798cv200-dw-mshc.

Signed-off-by: tianshuliang <tianshuli...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 .../bindings/mmc/hi3798cv200-dw-mshc.txt   | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt

diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
new file mode 100644
index 000..845c32c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
@@ -0,0 +1,51 @@
+* Hisilicon specific extensions to the Synopsys Designware Mobile
+  Storage Host Controller
+
+Read synopsys-dw-mshc.txt for more details
+
+The Synopsys designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be one of the following.
+  - "hisilicon,hi3798cv200-dw-mshc": for controllers with hi3798cv200 specific 
extensions.
+
+Optional Properties:
+* clocks: from common clock binding: if ciu-drive and ciu-sample are
+  specified in clock-names, should contain handles to these clocks.
+
+* clock-names:Apart from the clock-names described in synopsys-dw-mshc.txt
+  two more clocks "ciu-drive" and "ciu-sample" are supported. They are used
+  to control the clock phases, "ciu-sample" is required for tuning high-speed 
modes.
+
+Example:
+
+   /* for Hi3798cv200 */
+
+   /* SoC portion */
+   emmc: mmc@983 {
+   compatible = "hisilicon,hi3798cv200-dw-mshc";
+   reg = <0x983 0x1>;
+   interrupts = ;
+   clocks = < HISTB_MMC_CIU_CLK>,
+< HISTB_MMC_BIU_CLK>,
+< HISTB_MMC_SAMPLE_CLK>;
+   clock-names = "ciu", "biu", "ciu-sample";
+   };
+
+   /* Board portion */
+{
+   status = "okay";
+   num-slots = <1>;
+   fifo-depth = <256>;
+   clock-frequency = <2>;
+   cap-mmc-highspeed;
+   mmc-ddr-1_8v;
+   mmc-hs200-1_8v;
+   non-removable;
+   bus-width = <8>;
+   };
-- 
2.7.4

[PATCH 2/2] mmc: dw_mmc: add support for hi3798cv200 specific extensions of dw-mshc

[Jiancheng Xue]

From: tianshuliang 

Hi3798cv200 SoC extends the dw-mshc controller for additional clock
and bus control. Add support for these extensions.

Signed-off-by: tianshuliang 
Signed-off-by: Jiancheng Xue 
---
 drivers/mmc/host/Kconfig  |   9 ++
 drivers/mmc/host/Makefile |   1 +
 drivers/mmc/host/dw_mmc-hi3798cv200.c | 191 ++
 3 files changed, 201 insertions(+)
 create mode 100644 drivers/mmc/host/dw_mmc-hi3798cv200.c

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 8c15637..2bf6aa8 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -712,6 +712,15 @@ config MMC_DW_K3
  Synopsys DesignWare Memory Card Interface driver. Select this option
  for platforms based on Hisilicon K3 SoC's.
 
+config MMC_DW_HI3798CV200
+   tristate "Hi3798cv200 specific extensions for Synopsys DW Memory Card 
Interface"
+   depends on MMC_DW
+   select MMC_DW_PLTFM
+   help
+ This selects support for HiSilicon hi3798cv200 SoC specific 
extensions to the
+ Synopsys DesignWare Memory Card Interface driver. Select this option
+ for platforms based on HiSilicon hi3798cv200 SoC's.
+
 config MMC_DW_PCI
tristate "Synopsys Designware MCI support on PCI bus"
depends on MMC_DW && PCI
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 303f5cd..6e015d8 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_MMC_CAVIUM_THUNDERX) += thunderx-mmc.o
 obj-$(CONFIG_MMC_DW)   += dw_mmc.o
 obj-$(CONFIG_MMC_DW_PLTFM) += dw_mmc-pltfm.o
 obj-$(CONFIG_MMC_DW_EXYNOS)+= dw_mmc-exynos.o
+obj-$(CONFIG_MMC_DW_HI3798CV200) += dw_mmc-hi3798cv200.o
 obj-$(CONFIG_MMC_DW_K3)+= dw_mmc-k3.o
 obj-$(CONFIG_MMC_DW_PCI)   += dw_mmc-pci.o
 obj-$(CONFIG_MMC_DW_ROCKCHIP)  += dw_mmc-rockchip.o
diff --git a/drivers/mmc/host/dw_mmc-hi3798cv200.c 
b/drivers/mmc/host/dw_mmc-hi3798cv200.c
new file mode 100644
index 000..bd24001
--- /dev/null
+++ b/drivers/mmc/host/dw_mmc-hi3798cv200.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "dw_mmc.h"
+#include "dw_mmc-pltfm.h"
+
+#define ALL_INT_CLR0x1EFFF
+
+#define SDMMC_DDR_REG  0x10c
+#define SDMMC_ENABLE_SH0x110
+#define SDMMC_DDR_HS400BIT(31)
+#define SDMMC_ENABLE_SH_PHASE  BIT(0)
+#define SDMMC_DRV_PS_135   3
+#define SDMMC_DRV_PS_180   4
+
+struct hi3798cv200_priv {
+   struct clk  *sample_clk;
+   struct clk  *drive_clk;
+};
+
+static void dw_mci_hi3798cv200_set_ios(struct dw_mci *host, struct mmc_ios 
*ios)
+{
+   u32 regs;
+   struct hi3798cv200_priv *priv = host->priv;
+   u32 drive_phase[] = {0, 45, 90, 135, 180, 225, 270, 315};
+
+   regs = mci_readl(host, UHS_REG);
+   if (ios->timing == MMC_TIMING_MMC_HS400)
+   regs &= ~(0x1 << 16);
+   mci_writel(host, UHS_REG, regs);
+
+   regs = mci_readl(host, ENABLE_SH);
+   if (ios->timing == MMC_TIMING_MMC_DDR52)
+   regs |= SDMMC_ENABLE_SH_PHASE;
+   else
+   regs &= ~SDMMC_ENABLE_SH_PHASE;
+   mci_writel(host, ENABLE_SH, regs);
+
+   regs = mci_readl(host, DDR_REG);
+   if (ios->timing == MMC_TIMING_MMC_HS400)
+   regs |= SDMMC_DDR_HS400;
+   else
+   regs &= ~SDMMC_DDR_HS400;
+   mci_writel(host, DDR_REG, regs);
+
+   if ((ios->timing == MMC_TIMING_MMC_HS) ||
+   (ios->timing == MMC_TIMING_LEGACY))
+   clk_set_phase(priv->drive_clk, drive_phase[SDMMC_DRV_PS_180]);
+   else if (ios->timing == MMC_TIMING_MMC_HS200)
+   clk_set_phase(priv->drive_clk, drive_phase[SDMMC_DRV_PS_135]);
+}
+
+static int
+dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
+{
+   struct dw_mci *host = slot->host;
+   struct hi3798cv200_priv *priv = host->priv;
+   u32 index, found = 0;
+   u32 sample_phase[] = {0, 45, 90, 135, 180, 225, 270, 315};
+   int err = 0, raise_point = -1, fall_point = -1, prev_err = -1;
+
+   for (index = 0; index < ARRAY_SIZE(sample_phase); index++) {
+   clk_set_phase(priv->sample_clk, sample_phase[index]);
+   mci_writel(host, RINTSTS, ALL_INT_CLR);
+
+   err = mmc_send_tuning(slot->mmc, opcode, NULL);
+   if (!err)
+   

[PATCH 1/2] dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc

[Jiancheng Xue]

From: tianshuliang 

Hisilicon hi3798cv200 SoC extends the dw-mshc controller
for additional clock control. Add device tree bindings for
hi3798cv200-dw-mshc.

Signed-off-by: tianshuliang 
Signed-off-by: Jiancheng Xue 
---
 .../bindings/mmc/hi3798cv200-dw-mshc.txt   | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt

diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
new file mode 100644
index 000..845c32c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
@@ -0,0 +1,51 @@
+* Hisilicon specific extensions to the Synopsys Designware Mobile
+  Storage Host Controller
+
+Read synopsys-dw-mshc.txt for more details
+
+The Synopsys designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be one of the following.
+  - "hisilicon,hi3798cv200-dw-mshc": for controllers with hi3798cv200 specific 
extensions.
+
+Optional Properties:
+* clocks: from common clock binding: if ciu-drive and ciu-sample are
+  specified in clock-names, should contain handles to these clocks.
+
+* clock-names:Apart from the clock-names described in synopsys-dw-mshc.txt
+  two more clocks "ciu-drive" and "ciu-sample" are supported. They are used
+  to control the clock phases, "ciu-sample" is required for tuning high-speed 
modes.
+
+Example:
+
+   /* for Hi3798cv200 */
+
+   /* SoC portion */
+   emmc: mmc@983 {
+   compatible = "hisilicon,hi3798cv200-dw-mshc";
+   reg = <0x983 0x1>;
+   interrupts = ;
+   clocks = < HISTB_MMC_CIU_CLK>,
+< HISTB_MMC_BIU_CLK>,
+< HISTB_MMC_SAMPLE_CLK>;
+   clock-names = "ciu", "biu", "ciu-sample";
+   };
+
+   /* Board portion */
+{
+   status = "okay";
+   num-slots = <1>;
+   fifo-depth = <256>;
+   clock-frequency = <2>;
+   cap-mmc-highspeed;
+   mmc-ddr-1_8v;
+   mmc-hs200-1_8v;
+   non-removable;
+   bus-width = <8>;
+   };
-- 
2.7.4

[PATCH 1/3] clk: hisilicon: add hisi phase clock support

[Jiancheng Xue]

From: tianshuliang <tianshuli...@hisilicon.com>

Add a phase clock type for HiSilicon SoCs,which supports
clk_set_phase operation.

Signed-off-by: tianshuliang <tianshuli...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/clk/hisilicon/Makefile |   2 +-
 drivers/clk/hisilicon/clk-hisi-phase.c | 117 +
 drivers/clk/hisilicon/clk.c|  45 +
 drivers/clk/hisilicon/clk.h|  22 +++
 4 files changed, 185 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c

diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 1e4c3dd..7189f07 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -2,7 +2,7 @@
 # Hisilicon Clock specific Makefile
 #
 
-obj-y  += clk.o clkgate-separated.o clkdivider-hi6220.o
+obj-y  += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
 
 obj-$(CONFIG_ARCH_HI3xxx)  += clk-hi3620.o
 obj-$(CONFIG_ARCH_HIP04)   += clk-hip04.o
diff --git a/drivers/clk/hisilicon/clk-hisi-phase.c 
b/drivers/clk/hisilicon/clk-hisi-phase.c
new file mode 100644
index 000..436f0a1
--- /dev/null
+++ b/drivers/clk/hisilicon/clk-hisi-phase.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Simple HiSilicon phase clock implementation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "clk.h"
+
+struct clk_hisi_phase {
+   struct clk_hw   hw;
+   void __iomem*reg;
+   u32 *phase_values;
+   u32 *phase_regs;
+   u8  phase_num;
+   u32 mask;
+   u8  shift;
+   u8  flags;
+   spinlock_t  *lock;
+};
+#define to_clk_hisi_phase(_hw) container_of(_hw, struct clk_hisi_phase, hw)
+
+static u32 hisi_clk_get_phase_reg(struct clk_hisi_phase *phase, int degrees)
+{
+   int i;
+
+   for (i = 0; i < phase->phase_num; i++)
+   if (phase->phase_values[i] == degrees)
+   return phase->phase_regs[i];
+
+   return -EINVAL;
+}
+
+static int hisi_clk_set_phase(struct clk_hw *hw, int degrees)
+{
+   struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
+   u32 val, phase_reg;
+   unsigned long flags = 0;
+
+   phase_reg = hisi_clk_get_phase_reg(phase, degrees);
+   if (phase_reg < 0)
+   return phase_reg;
+
+   if (phase->lock)
+   spin_lock_irqsave(phase->lock, flags);
+   else
+   __acquire(phase->lock);
+
+   val = clk_readl(phase->reg);
+   val &= ~(phase->mask << phase->shift);
+   val |= phase_reg << phase->shift;
+   clk_writel(val, phase->reg);
+
+   if (phase->lock)
+   spin_unlock_irqrestore(phase->lock, flags);
+   else
+   __release(phase->lock);
+
+   return 0;
+}
+
+const struct clk_ops clk_phase_ops = {
+   .set_phase = hisi_clk_set_phase,
+};
+
+void clk_unregister_hisi_phase(struct clk *clk)
+{
+   struct clk_hisi_phase *phase;
+   struct clk_hw *hw;
+
+   hw = __clk_get_hw(clk);
+   if (!hw)
+   return;
+
+   phase = to_clk_hisi_phase(hw);
+   clk_unregister(clk);
+}
+EXPORT_SYMBOL_GPL(clk_unregister_hisi_phase);
+
+struct clk *clk_register_hisi_phase(struct device *dev,
+   const struct hisi_phase_clock *clks,
+   void __iomem *base, spinlock_t *lock)
+{
+   struct clk_hisi_phase *phase;
+   struct clk *clk;
+   struct clk_init_data init;
+
+   phase = devm_kzalloc(dev, sizeof(struct clk_hisi_phase), GFP_KERNEL);
+   if (!phase)
+   return ERR_PTR(-ENOMEM);
+
+   init.name = clks->name;
+   init.ops = _phase_ops;
+   init.flags = clks->flags | CLK_IS_BASIC;
+   init.parent_names = clks->parent_names ? >parent_names : NULL;
+   init.num_parents = clks->parent_names ? 1 : 0;
+
+   phase->reg = base + clks->offset;
+   phase->shift = clks->shift;
+   phase->mask = BIT(clks->width) - 1;
+   phase->lock = lock;
+   phase->phase_values = clks->phase_values;
+   phase->phase_regs = clks->phase_regs;
+   phase->phase_num = clks->phase_num;
+   phase->hw.init = 
+
+   clk = clk_register(NULL, >hw);
+   return clk;
+}
+EXPORT_SYMBOL_GPL(clk_register_hisi_phase);
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index b73c1df..e3adfad 100644
--- a/drivers/clk/hisilicon/clk.c
+++ b/drivers/clk/hisilicon/clk.c
@@ -197,6 +197,51 @@ int hisi_clk_register_mux(const struct hisi

[PATCH 0/3] add more clock definitions for hi3798cv200-poplar board

[Jiancheng Xue]

Add more clock definitions for hi3798cv200-poplar board.

Younian Wang (1):
  clk: hisilicon: correct ir clock rate for hi3798cv200 SoC

tianshuliang (2):
  clk: hisilicon: add hisi phase clock support
  clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC

 drivers/clk/hisilicon/Makefile  |   2 +-
 drivers/clk/hisilicon/clk-hisi-phase.c  | 117 
 drivers/clk/hisilicon/clk.c |  45 
 drivers/clk/hisilicon/clk.h |  22 ++
 drivers/clk/hisilicon/crg-hi3798cv200.c |  27 +++-
 5 files changed, 210 insertions(+), 3 deletions(-)
 create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c

-- 
2.7.4

[PATCH 1/3] clk: hisilicon: add hisi phase clock support

[Jiancheng Xue]

From: tianshuliang 

Add a phase clock type for HiSilicon SoCs,which supports
clk_set_phase operation.

Signed-off-by: tianshuliang 
Signed-off-by: Jiancheng Xue 
---
 drivers/clk/hisilicon/Makefile |   2 +-
 drivers/clk/hisilicon/clk-hisi-phase.c | 117 +
 drivers/clk/hisilicon/clk.c|  45 +
 drivers/clk/hisilicon/clk.h|  22 +++
 4 files changed, 185 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c

diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 1e4c3dd..7189f07 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -2,7 +2,7 @@
 # Hisilicon Clock specific Makefile
 #
 
-obj-y  += clk.o clkgate-separated.o clkdivider-hi6220.o
+obj-y  += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
 
 obj-$(CONFIG_ARCH_HI3xxx)  += clk-hi3620.o
 obj-$(CONFIG_ARCH_HIP04)   += clk-hip04.o
diff --git a/drivers/clk/hisilicon/clk-hisi-phase.c 
b/drivers/clk/hisilicon/clk-hisi-phase.c
new file mode 100644
index 000..436f0a1
--- /dev/null
+++ b/drivers/clk/hisilicon/clk-hisi-phase.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Simple HiSilicon phase clock implementation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "clk.h"
+
+struct clk_hisi_phase {
+   struct clk_hw   hw;
+   void __iomem*reg;
+   u32 *phase_values;
+   u32 *phase_regs;
+   u8  phase_num;
+   u32 mask;
+   u8  shift;
+   u8  flags;
+   spinlock_t  *lock;
+};
+#define to_clk_hisi_phase(_hw) container_of(_hw, struct clk_hisi_phase, hw)
+
+static u32 hisi_clk_get_phase_reg(struct clk_hisi_phase *phase, int degrees)
+{
+   int i;
+
+   for (i = 0; i < phase->phase_num; i++)
+   if (phase->phase_values[i] == degrees)
+   return phase->phase_regs[i];
+
+   return -EINVAL;
+}
+
+static int hisi_clk_set_phase(struct clk_hw *hw, int degrees)
+{
+   struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
+   u32 val, phase_reg;
+   unsigned long flags = 0;
+
+   phase_reg = hisi_clk_get_phase_reg(phase, degrees);
+   if (phase_reg < 0)
+   return phase_reg;
+
+   if (phase->lock)
+   spin_lock_irqsave(phase->lock, flags);
+   else
+   __acquire(phase->lock);
+
+   val = clk_readl(phase->reg);
+   val &= ~(phase->mask << phase->shift);
+   val |= phase_reg << phase->shift;
+   clk_writel(val, phase->reg);
+
+   if (phase->lock)
+   spin_unlock_irqrestore(phase->lock, flags);
+   else
+   __release(phase->lock);
+
+   return 0;
+}
+
+const struct clk_ops clk_phase_ops = {
+   .set_phase = hisi_clk_set_phase,
+};
+
+void clk_unregister_hisi_phase(struct clk *clk)
+{
+   struct clk_hisi_phase *phase;
+   struct clk_hw *hw;
+
+   hw = __clk_get_hw(clk);
+   if (!hw)
+   return;
+
+   phase = to_clk_hisi_phase(hw);
+   clk_unregister(clk);
+}
+EXPORT_SYMBOL_GPL(clk_unregister_hisi_phase);
+
+struct clk *clk_register_hisi_phase(struct device *dev,
+   const struct hisi_phase_clock *clks,
+   void __iomem *base, spinlock_t *lock)
+{
+   struct clk_hisi_phase *phase;
+   struct clk *clk;
+   struct clk_init_data init;
+
+   phase = devm_kzalloc(dev, sizeof(struct clk_hisi_phase), GFP_KERNEL);
+   if (!phase)
+   return ERR_PTR(-ENOMEM);
+
+   init.name = clks->name;
+   init.ops = _phase_ops;
+   init.flags = clks->flags | CLK_IS_BASIC;
+   init.parent_names = clks->parent_names ? >parent_names : NULL;
+   init.num_parents = clks->parent_names ? 1 : 0;
+
+   phase->reg = base + clks->offset;
+   phase->shift = clks->shift;
+   phase->mask = BIT(clks->width) - 1;
+   phase->lock = lock;
+   phase->phase_values = clks->phase_values;
+   phase->phase_regs = clks->phase_regs;
+   phase->phase_num = clks->phase_num;
+   phase->hw.init = 
+
+   clk = clk_register(NULL, >hw);
+   return clk;
+}
+EXPORT_SYMBOL_GPL(clk_register_hisi_phase);
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index b73c1df..e3adfad 100644
--- a/drivers/clk/hisilicon/clk.c
+++ b/drivers/clk/hisilicon/clk.c
@@ -197,6 +197,51 @@ int hisi_clk_register_mux(const struct hisi_mux_clock 
*clks,
 }
 EXPORT_SYMBOL_GPL(hisi_clk_register_mux);
 
+int hisi_clk_register_phase(struct de

[PATCH 0/3] add more clock definitions for hi3798cv200-poplar board

[Jiancheng Xue]

Add more clock definitions for hi3798cv200-poplar board.

Younian Wang (1):
  clk: hisilicon: correct ir clock rate for hi3798cv200 SoC

tianshuliang (2):
  clk: hisilicon: add hisi phase clock support
  clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC

 drivers/clk/hisilicon/Makefile  |   2 +-
 drivers/clk/hisilicon/clk-hisi-phase.c  | 117 
 drivers/clk/hisilicon/clk.c |  45 
 drivers/clk/hisilicon/clk.h |  22 ++
 drivers/clk/hisilicon/crg-hi3798cv200.c |  27 +++-
 5 files changed, 210 insertions(+), 3 deletions(-)
 create mode 100644 drivers/clk/hisilicon/clk-hisi-phase.c

-- 
2.7.4

[PATCH 3/3] clk: hisilicon: correct ir clock rate for hi3798cv200 SoC

[Jiancheng Xue]

From: Younian Wang 

Correct ir clock rate for hi3798cv200 SoC.

Signed-off-by: Younian Wang 
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index 25d750c..61bd941 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -258,7 +258,7 @@ static const struct hisi_crg_funcs hi3798cv200_crg_funcs = {
 #define HI3798CV200_SYSCTRL_NR_CLKS 16
 
 static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
-   { HISTB_IR_CLK, "clk_ir", "100m",
+   { HISTB_IR_CLK, "clk_ir", "24m",
CLK_SET_RATE_PARENT, 0x48, 4, 0, },
{ HISTB_TIMER01_CLK, "clk_timer01", "24m",
CLK_SET_RATE_PARENT, 0x48, 6, 0, },
-- 
2.7.4

[PATCH 2/3] clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC

[Jiancheng Xue]

From: tianshuliang <tianshuli...@hisilicon.com>

Add emmc sample and emmc drive clock for Hi3798cv200 SoC

Signed-off-by: tianshuliang <tianshuli...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 25 -
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index ed8bb5f..25d750c 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -83,6 +83,18 @@ static struct hisi_mux_clock hi3798cv200_mux_clks[] = {
CLK_SET_RATE_PARENT, 0x188, 10, 2, 0, comphy1_mux_table, },
 };
 
+static u32 mmc_phase_reg[] = {0, 1, 2, 3, 4, 5, 6, 7};
+static u32 mmc_phase_val[] = {0, 45, 90, 135, 180, 225, 270, 315};
+
+static struct hisi_phase_clock hi3798cv200_phase_clks[] = {
+   { HISTB_MMC_SAMPLE_CLK, "mmc_sample", "clk_mmc_ciu",
+   CLK_SET_RATE_PARENT, 0xa0, 12, 3, mmc_phase_val,
+   mmc_phase_reg, ARRAY_SIZE(mmc_phase_reg)},
+   { HISTB_MMC_DRV_CLK, "mmc_drive", "clk_mmc_ciu",
+   CLK_SET_RATE_PARENT, 0xa0, 16, 3, mmc_phase_val,
+   mmc_phase_reg, ARRAY_SIZE(mmc_phase_reg)},
+};
+
 static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
/* UART */
{ HISTB_UART2_CLK, "clk_uart2", "75m",
@@ -179,11 +191,18 @@ static struct hisi_clock_data *hi3798cv200_clk_register(
if (ret)
goto unregister_fixed_rate;
 
+   ret = hisi_clk_register_phase(>dev,
+   hi3798cv200_phase_clks,
+   ARRAY_SIZE(hi3798cv200_phase_clks),
+   clk_data);
+   if (ret)
+   goto unregister_mux;
+
ret = hisi_clk_register_gate(hi3798cv200_gate_clks,
ARRAY_SIZE(hi3798cv200_gate_clks),
clk_data);
if (ret)
-   goto unregister_mux;
+   goto unregister_phase;
 
ret = of_clk_add_provider(pdev->dev.of_node,
of_clk_src_onecell_get, _data->clk_data);
@@ -201,6 +220,10 @@ static struct hisi_clock_data *hi3798cv200_clk_register(
hisi_clk_unregister_mux(hi3798cv200_mux_clks,
ARRAY_SIZE(hi3798cv200_mux_clks),
clk_data);
+unregister_phase:
+   hisi_clk_unregister_phase(hi3798cv200_phase_clks,
+   ARRAY_SIZE(hi3798cv200_phase_clks),
+   clk_data);
 unregister_gate:
hisi_clk_unregister_gate(hi3798cv200_gate_clks,
ARRAY_SIZE(hi3798cv200_gate_clks),
-- 
2.7.4

[PATCH 3/3] clk: hisilicon: correct ir clock rate for hi3798cv200 SoC

[Jiancheng Xue]

From: Younian Wang 

Correct ir clock rate for hi3798cv200 SoC.

Signed-off-by: Younian Wang 
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index 25d750c..61bd941 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -258,7 +258,7 @@ static const struct hisi_crg_funcs hi3798cv200_crg_funcs = {
 #define HI3798CV200_SYSCTRL_NR_CLKS 16
 
 static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
-   { HISTB_IR_CLK, "clk_ir", "100m",
+   { HISTB_IR_CLK, "clk_ir", "24m",
CLK_SET_RATE_PARENT, 0x48, 4, 0, },
{ HISTB_TIMER01_CLK, "clk_timer01", "24m",
CLK_SET_RATE_PARENT, 0x48, 6, 0, },
-- 
2.7.4

[PATCH 2/3] clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC

[Jiancheng Xue]

From: tianshuliang 

Add emmc sample and emmc drive clock for Hi3798cv200 SoC

Signed-off-by: tianshuliang 
Signed-off-by: Jiancheng Xue 
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 25 -
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index ed8bb5f..25d750c 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -83,6 +83,18 @@ static struct hisi_mux_clock hi3798cv200_mux_clks[] = {
CLK_SET_RATE_PARENT, 0x188, 10, 2, 0, comphy1_mux_table, },
 };
 
+static u32 mmc_phase_reg[] = {0, 1, 2, 3, 4, 5, 6, 7};
+static u32 mmc_phase_val[] = {0, 45, 90, 135, 180, 225, 270, 315};
+
+static struct hisi_phase_clock hi3798cv200_phase_clks[] = {
+   { HISTB_MMC_SAMPLE_CLK, "mmc_sample", "clk_mmc_ciu",
+   CLK_SET_RATE_PARENT, 0xa0, 12, 3, mmc_phase_val,
+   mmc_phase_reg, ARRAY_SIZE(mmc_phase_reg)},
+   { HISTB_MMC_DRV_CLK, "mmc_drive", "clk_mmc_ciu",
+   CLK_SET_RATE_PARENT, 0xa0, 16, 3, mmc_phase_val,
+   mmc_phase_reg, ARRAY_SIZE(mmc_phase_reg)},
+};
+
 static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
/* UART */
{ HISTB_UART2_CLK, "clk_uart2", "75m",
@@ -179,11 +191,18 @@ static struct hisi_clock_data *hi3798cv200_clk_register(
if (ret)
goto unregister_fixed_rate;
 
+   ret = hisi_clk_register_phase(>dev,
+   hi3798cv200_phase_clks,
+   ARRAY_SIZE(hi3798cv200_phase_clks),
+   clk_data);
+   if (ret)
+   goto unregister_mux;
+
ret = hisi_clk_register_gate(hi3798cv200_gate_clks,
ARRAY_SIZE(hi3798cv200_gate_clks),
clk_data);
if (ret)
-   goto unregister_mux;
+   goto unregister_phase;
 
ret = of_clk_add_provider(pdev->dev.of_node,
of_clk_src_onecell_get, _data->clk_data);
@@ -201,6 +220,10 @@ static struct hisi_clock_data *hi3798cv200_clk_register(
hisi_clk_unregister_mux(hi3798cv200_mux_clks,
ARRAY_SIZE(hi3798cv200_mux_clks),
clk_data);
+unregister_phase:
+   hisi_clk_unregister_phase(hi3798cv200_phase_clks,
+   ARRAY_SIZE(hi3798cv200_phase_clks),
+   clk_data);
 unregister_gate:
hisi_clk_unregister_gate(hi3798cv200_gate_clks,
ARRAY_SIZE(hi3798cv200_gate_clks),
-- 
2.7.4

[PATCH 2/2] [media] rc/keymaps: add support for RC of hisilicon poplar board

[Jiancheng Xue]

From: Younian Wang <wangyoun...@hisilicon.com>

This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.

Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/media/rc/keymaps/Makefile |  1 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c | 58 +++
 2 files changed, 59 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index 83ec9c3..8daabfc6 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-poplar.o \
rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-poplar.c 
b/drivers/media/rc/keymaps/rc-hisi-poplar.c
new file mode 100644
index 000..730d556
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-poplar.c
@@ -0,0 +1,58 @@
+#include 
+#include 
+
+static struct rc_map_table hisi_poplar_keymap[] = {
+   { 0xb292, KEY_1},
+   { 0xb293, KEY_2},
+   { 0xb2cc, KEY_3},
+   { 0xb28e, KEY_4},
+   { 0xb28f, KEY_5},
+   { 0xb2c8, KEY_6},
+   { 0xb28a, KEY_7},
+   { 0xb28b, KEY_8},
+   { 0xb2c4, KEY_9},
+   { 0xb287, KEY_0},
+   { 0xb282, KEY_HOMEPAGE},
+   { 0xb2ca, KEY_UP},
+   { 0xb299, KEY_LEFT},
+   { 0xb2c1, KEY_RIGHT},
+   { 0xb2d2, KEY_DOWN},
+   { 0xb2c5, KEY_DELETE},
+   { 0xb29c, KEY_MUTE},
+   { 0xb281, KEY_VOLUMEDOWN},
+   { 0xb280, KEY_VOLUMEUP},
+   { 0xb2dc, KEY_POWER},
+   { 0xb29a, KEY_MENU},
+   { 0xb28d, KEY_SETUP},
+   { 0xb2c5, KEY_BACK},
+   { 0xb295, KEY_PLAYPAUSE},
+   { 0xb2ce, KEY_ENTER},
+   { 0xb285, KEY_CHANNELUP},
+   { 0xb286, KEY_CHANNELDOWN},
+   { 0xb2da, KEY_NUMERIC_STAR},
+   { 0xb2d0, KEY_NUMERIC_POUND},
+};
+
+static struct rc_map_list hisi_poplar_map = {
+   .map = {
+   .scan = hisi_poplar_keymap,
+   .size = ARRAY_SIZE(hisi_poplar_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-poplar",
+   }
+};
+
+static int __init init_rc_map_hisi_poplar(void)
+{
+   return rc_map_register(_poplar_map);
+}
+
+static void __exit exit_rc_map_hisi_poplar(void)
+{
+   rc_map_unregister(_poplar_map);
+}
+
+module_init(init_rc_map_hisi_poplar)
+module_exit(exit_rc_map_hisi_poplar)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH 2/2] [media] rc/keymaps: add support for RC of hisilicon poplar board

[Jiancheng Xue]

From: Younian Wang 

This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.

Signed-off-by: Younian Wang 
Signed-off-by: Jiancheng Xue 
---
 drivers/media/rc/keymaps/Makefile |  1 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c | 58 +++
 2 files changed, 59 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index 83ec9c3..8daabfc6 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-poplar.o \
rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-poplar.c 
b/drivers/media/rc/keymaps/rc-hisi-poplar.c
new file mode 100644
index 000..730d556
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-poplar.c
@@ -0,0 +1,58 @@
+#include 
+#include 
+
+static struct rc_map_table hisi_poplar_keymap[] = {
+   { 0xb292, KEY_1},
+   { 0xb293, KEY_2},
+   { 0xb2cc, KEY_3},
+   { 0xb28e, KEY_4},
+   { 0xb28f, KEY_5},
+   { 0xb2c8, KEY_6},
+   { 0xb28a, KEY_7},
+   { 0xb28b, KEY_8},
+   { 0xb2c4, KEY_9},
+   { 0xb287, KEY_0},
+   { 0xb282, KEY_HOMEPAGE},
+   { 0xb2ca, KEY_UP},
+   { 0xb299, KEY_LEFT},
+   { 0xb2c1, KEY_RIGHT},
+   { 0xb2d2, KEY_DOWN},
+   { 0xb2c5, KEY_DELETE},
+   { 0xb29c, KEY_MUTE},
+   { 0xb281, KEY_VOLUMEDOWN},
+   { 0xb280, KEY_VOLUMEUP},
+   { 0xb2dc, KEY_POWER},
+   { 0xb29a, KEY_MENU},
+   { 0xb28d, KEY_SETUP},
+   { 0xb2c5, KEY_BACK},
+   { 0xb295, KEY_PLAYPAUSE},
+   { 0xb2ce, KEY_ENTER},
+   { 0xb285, KEY_CHANNELUP},
+   { 0xb286, KEY_CHANNELDOWN},
+   { 0xb2da, KEY_NUMERIC_STAR},
+   { 0xb2d0, KEY_NUMERIC_POUND},
+};
+
+static struct rc_map_list hisi_poplar_map = {
+   .map = {
+   .scan = hisi_poplar_keymap,
+   .size = ARRAY_SIZE(hisi_poplar_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-poplar",
+   }
+};
+
+static int __init init_rc_map_hisi_poplar(void)
+{
+   return rc_map_register(_poplar_map);
+}
+
+static void __exit exit_rc_map_hisi_poplar(void)
+{
+   rc_map_unregister(_poplar_map);
+}
+
+module_init(init_rc_map_hisi_poplar)
+module_exit(exit_rc_map_hisi_poplar)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Add support for two remote controllers of hisilicon boards.

Younian Wang (2):
  [media] rc/keymaps: add support for RC of hisilicon TV demo boards
  [media] rc/keymaps: add support for RC of hisilicon poplar board

 drivers/media/rc/keymaps/Makefile  |  2 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c  | 58 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 ++
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

-- 
2.7.4

[PATCH 0/2] [media] rc/keymaps: add support for two RCs of hisilicon boards.

[Jiancheng Xue]

Add support for two remote controllers of hisilicon boards.

Younian Wang (2):
  [media] rc/keymaps: add support for RC of hisilicon TV demo boards
  [media] rc/keymaps: add support for RC of hisilicon poplar board

 drivers/media/rc/keymaps/Makefile  |  2 +
 drivers/media/rc/keymaps/rc-hisi-poplar.c  | 58 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 ++
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-poplar.c
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

-- 
2.7.4

[PATCH 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

From: Younian Wang <wangyoun...@hisilicon.com>

This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.

Signed-off-by: Younian Wang <wangyoun...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/media/rc/keymaps/Makefile  |  1 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 ++
 2 files changed, 71 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index af6496d..83ec9c3 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
rc-iodata-bctv7e.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
new file mode 100644
index 000..410b17d
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
@@ -0,0 +1,70 @@
+#include 
+#include 
+
+static struct rc_map_table hisi_tv_demo_keymap[] = {
+   { 0x0092, KEY_1},
+   { 0x0093, KEY_2},
+   { 0x00cc, KEY_3},
+   { 0x009f, KEY_4},
+   { 0x008e, KEY_5},
+   { 0x008f, KEY_6},
+   { 0x00c8, KEY_7},
+   { 0x0094, KEY_8},
+   { 0x008a, KEY_9},
+   { 0x008b, KEY_0},
+   { 0x00ce, KEY_ENTER},
+   { 0x00ca, KEY_UP},
+   { 0x0099, KEY_LEFT},
+   { 0x0084, KEY_PAGEUP},
+   { 0x00c1, KEY_RIGHT},
+   { 0x00d2, KEY_DOWN},
+   { 0x0089, KEY_PAGEDOWN},
+   { 0x00d1, KEY_MUTE},
+   { 0x0098, KEY_VOLUMEDOWN},
+   { 0x0090, KEY_VOLUMEUP},
+   { 0x009c, KEY_POWER},
+   { 0x00d6, KEY_STOP},
+   { 0x0097, KEY_MENU},
+   { 0x00cb, KEY_BACK},
+   { 0x00da, KEY_PLAYPAUSE},
+   { 0x0080, KEY_INFO},
+   { 0x00c3, KEY_REWIND},
+   { 0x0087, KEY_HOMEPAGE},
+   { 0x00d0, KEY_FASTFORWARD},
+   { 0x00c4, KEY_SOUND},
+   { 0x0082, BTN_1},
+   { 0x00c7, BTN_2},
+   { 0x0086, KEY_PROGRAM},
+   { 0x00d9, KEY_SUBTITLE},
+   { 0x0085, KEY_ZOOM},
+   { 0x009b, KEY_RED},
+   { 0x009a, KEY_GREEN},
+   { 0x00c0, KEY_YELLOW},
+   { 0x00c2, KEY_BLUE},
+   { 0x009d, KEY_CHANNELDOWN},
+   { 0x00cf, KEY_CHANNELUP},
+};
+
+static struct rc_map_list hisi_tv_demo_map = {
+   .map = {
+   .scan = hisi_tv_demo_keymap,
+   .size = ARRAY_SIZE(hisi_tv_demo_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-demo",
+   }
+};
+
+static int __init init_rc_map_hisi_tv_demo(void)
+{
+   return rc_map_register(_tv_demo_map);
+}
+
+static void __exit exit_rc_map_hisi_tv_demo(void)
+{
+   rc_map_unregister(_tv_demo_map);
+}
+
+module_init(init_rc_map_hisi_tv_demo)
+module_exit(exit_rc_map_hisi_tv_demo)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH 1/2] [media] rc/keymaps: add support for RC of hisilicon TV demo boards

[Jiancheng Xue]

From: Younian Wang 

This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.

Signed-off-by: Younian Wang 
Signed-off-by: Jiancheng Xue 
---
 drivers/media/rc/keymaps/Makefile  |  1 +
 drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70 ++
 2 files changed, 71 insertions(+)
 create mode 100644 drivers/media/rc/keymaps/rc-hisi-tv-demo.c

diff --git a/drivers/media/rc/keymaps/Makefile 
b/drivers/media/rc/keymaps/Makefile
index af6496d..83ec9c3 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-geekbox.o \
rc-genius-tvgo-a11mce.o \
rc-gotview7135.o \
+   rc-hisi-tv-demo.o \
rc-imon-mce.o \
rc-imon-pad.o \
rc-iodata-bctv7e.o \
diff --git a/drivers/media/rc/keymaps/rc-hisi-tv-demo.c 
b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
new file mode 100644
index 000..410b17d
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-hisi-tv-demo.c
@@ -0,0 +1,70 @@
+#include 
+#include 
+
+static struct rc_map_table hisi_tv_demo_keymap[] = {
+   { 0x0092, KEY_1},
+   { 0x0093, KEY_2},
+   { 0x00cc, KEY_3},
+   { 0x009f, KEY_4},
+   { 0x008e, KEY_5},
+   { 0x008f, KEY_6},
+   { 0x00c8, KEY_7},
+   { 0x0094, KEY_8},
+   { 0x008a, KEY_9},
+   { 0x008b, KEY_0},
+   { 0x00ce, KEY_ENTER},
+   { 0x00ca, KEY_UP},
+   { 0x0099, KEY_LEFT},
+   { 0x0084, KEY_PAGEUP},
+   { 0x00c1, KEY_RIGHT},
+   { 0x00d2, KEY_DOWN},
+   { 0x0089, KEY_PAGEDOWN},
+   { 0x00d1, KEY_MUTE},
+   { 0x0098, KEY_VOLUMEDOWN},
+   { 0x0090, KEY_VOLUMEUP},
+   { 0x009c, KEY_POWER},
+   { 0x00d6, KEY_STOP},
+   { 0x0097, KEY_MENU},
+   { 0x00cb, KEY_BACK},
+   { 0x00da, KEY_PLAYPAUSE},
+   { 0x0080, KEY_INFO},
+   { 0x00c3, KEY_REWIND},
+   { 0x0087, KEY_HOMEPAGE},
+   { 0x00d0, KEY_FASTFORWARD},
+   { 0x00c4, KEY_SOUND},
+   { 0x0082, BTN_1},
+   { 0x00c7, BTN_2},
+   { 0x0086, KEY_PROGRAM},
+   { 0x00d9, KEY_SUBTITLE},
+   { 0x0085, KEY_ZOOM},
+   { 0x009b, KEY_RED},
+   { 0x009a, KEY_GREEN},
+   { 0x00c0, KEY_YELLOW},
+   { 0x00c2, KEY_BLUE},
+   { 0x009d, KEY_CHANNELDOWN},
+   { 0x00cf, KEY_CHANNELUP},
+};
+
+static struct rc_map_list hisi_tv_demo_map = {
+   .map = {
+   .scan = hisi_tv_demo_keymap,
+   .size = ARRAY_SIZE(hisi_tv_demo_keymap),
+   .rc_proto = RC_PROTO_NEC,
+   .name = "rc-hisi-demo",
+   }
+};
+
+static int __init init_rc_map_hisi_tv_demo(void)
+{
+   return rc_map_register(_tv_demo_map);
+}
+
+static void __exit exit_rc_map_hisi_tv_demo(void)
+{
+   rc_map_unregister(_tv_demo_map);
+}
+
+module_init(init_rc_map_hisi_tv_demo)
+module_exit(exit_rc_map_hisi_tv_demo)
+
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH v2 0/4] Enable usb2 function on poplar board

[Jiancheng Xue]

This patchset is mainly used to enable the usb2 function on poplar board,
including usb2 phy drivers, dts nodes and configs.

Jiancheng Xue (3):
  dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
  arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar
board.
  arm64: defconfig: enable some drivers for hi3798cv200-poplar board.

Pengcheng Li (1):
  phy: add inno-usb2-phy driver for hi3798cv200 SoC

 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt |  31 +++
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 ++
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  60 ++
 arch/arm64/configs/defconfig   |   4 +
 drivers/phy/hisilicon/Kconfig  |  11 +-
 drivers/phy/hisilicon/Makefile |   1 +
 drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 236 +
 7 files changed, 355 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
 create mode 100644 drivers/phy/hisilicon/phy-hisi-inno-usb2.c

-- 
1.9.1

[PATCH v2 0/4] Enable usb2 function on poplar board

[Jiancheng Xue]

This patchset is mainly used to enable the usb2 function on poplar board,
including usb2 phy drivers, dts nodes and configs.

Jiancheng Xue (3):
  dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
  arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar
board.
  arm64: defconfig: enable some drivers for hi3798cv200-poplar board.

Pengcheng Li (1):
  phy: add inno-usb2-phy driver for hi3798cv200 SoC

 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt |  31 +++
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 ++
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  60 ++
 arch/arm64/configs/defconfig   |   4 +
 drivers/phy/hisilicon/Kconfig  |  11 +-
 drivers/phy/hisilicon/Makefile |   1 +
 drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 236 +
 7 files changed, 355 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
 create mode 100644 drivers/phy/hisilicon/phy-hisi-inno-usb2.c

-- 
1.9.1

[PATCH v2 3/4] arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar board.

[Jiancheng Xue]

Add usb2 controller and phy nodes for poplar board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Daniel Thompson <daniel.thomp...@linaro.org>
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 60 ++
 2 files changed, 73 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index b914287..4656ba9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -63,6 +63,10 @@
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
#address-cells = <1>;
@@ -146,6 +150,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
label = "LS-SPI0";
@@ -160,3 +168,8 @@
label = "LS-UART0";
 };
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+_phy1 {
+   status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..250b68b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,11 @@
#reset-cells = <2>;
};
 
+   peri_ctrl: system-controller@8a2 {
+   compatible = "syscon";
+   reg = <0x8a2 0x1000>;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -407,5 +412,60 @@
clocks = < HISTB_IR_CLK>;
status = "disabled";
};
+
+   ehci: ehci@0x989 {
+   compatible = "generic-ehci";
+   reg = <0x989 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_PHY_CLK>,
+< HISTB_USB2_UTMI_CLK>;
+   clock-names = "ehci_system", "phy", "utmi";
+   resets = < 0xb8 12>,
+< 0xb8 16>,
+< 0xb8 13>;
+   reset-names = "bus", "phy", "utmi";
+   status = "disabled";
+   };
+
+   ohci: ohci@0x988 {
+   compatible = "generic-ohci";
+   reg = <0x988 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_12M_CLK>,
+< HISTB_USB2_48M_CLK>;
+   clock-names = "ahb_biu", "clk12", "clk48";
+   resets = < 0xb8 12>;
+   reset-names = "bus";
+   status = "disabled";
+   };
+
+   usb2_phy1: usb-phy@1 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   hisilicon,phycon-reg = <0x120>;
+   hisilicon,port-num = <2>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>,
+< 0xbc 8>,
+< 0xbc 9>;
+   reset-names = "power_on", "utmi0", "utmi1";
+   status = "disabled";
+   };
+
+   usb2_phy2: usb-phy@2 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   hisilicon,phycon-reg = <0x124>;
+   hisilicon,port-num = <1>;
+   clocks = < HISTB_USB2_PHY2_REF_CLK>;
+   resets = < 0xbc 6>,
+< 0xbc 10>;
+   reset-names = "power_on", "utmi0";
+   status = "disabled";
+   };
};
 };
-- 
1.9.1

[PATCH v2 3/4] arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar board.

[Jiancheng Xue]

Add usb2 controller and phy nodes for poplar board.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Daniel Thompson 
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 60 ++
 2 files changed, 73 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index b914287..4656ba9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -63,6 +63,10 @@
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
#address-cells = <1>;
@@ -146,6 +150,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
label = "LS-SPI0";
@@ -160,3 +168,8 @@
label = "LS-UART0";
 };
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+_phy1 {
+   status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..250b68b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,11 @@
#reset-cells = <2>;
};
 
+   peri_ctrl: system-controller@8a2 {
+   compatible = "syscon";
+   reg = <0x8a2 0x1000>;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -407,5 +412,60 @@
clocks = < HISTB_IR_CLK>;
status = "disabled";
};
+
+   ehci: ehci@0x989 {
+   compatible = "generic-ehci";
+   reg = <0x989 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_PHY_CLK>,
+< HISTB_USB2_UTMI_CLK>;
+   clock-names = "ehci_system", "phy", "utmi";
+   resets = < 0xb8 12>,
+< 0xb8 16>,
+< 0xb8 13>;
+   reset-names = "bus", "phy", "utmi";
+   status = "disabled";
+   };
+
+   ohci: ohci@0x988 {
+   compatible = "generic-ohci";
+   reg = <0x988 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_12M_CLK>,
+< HISTB_USB2_48M_CLK>;
+   clock-names = "ahb_biu", "clk12", "clk48";
+   resets = < 0xb8 12>;
+   reset-names = "bus";
+   status = "disabled";
+   };
+
+   usb2_phy1: usb-phy@1 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   hisilicon,phycon-reg = <0x120>;
+   hisilicon,port-num = <2>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>,
+< 0xbc 8>,
+< 0xbc 9>;
+   reset-names = "power_on", "utmi0", "utmi1";
+   status = "disabled";
+   };
+
+   usb2_phy2: usb-phy@2 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   hisilicon,phycon-reg = <0x124>;
+   hisilicon,port-num = <1>;
+   clocks = < HISTB_USB2_PHY2_REF_CLK>;
+   resets = < 0xbc 6>,
+< 0xbc 10>;
+   reset-names = "power_on", "utmi0";
+   status = "disabled";
+   };
};
 };
-- 
1.9.1

[PATCH v2 4/4] arm64: defconfig: enable some drivers for hi3798cv200-poplar board.

[Jiancheng Xue]

Enable GMAC,I2C,USB2-PHY for hi3798cv200-poplar board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 arch/arm64/configs/defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6c7d147..93c709d7 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -184,6 +184,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -267,6 +268,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_MESON_SPICC=m
 CONFIG_SPI_MESON_SPIFC=m
@@ -504,7 +506,9 @@ CONFIG_PWM_MESON=m
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_TEGRA=m
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_HISI_INNO_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_SUN4I_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH v2 4/4] arm64: defconfig: enable some drivers for hi3798cv200-poplar board.

[Jiancheng Xue]

Enable GMAC,I2C,USB2-PHY for hi3798cv200-poplar board.

Signed-off-by: Jiancheng Xue 
---
 arch/arm64/configs/defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6c7d147..93c709d7 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -184,6 +184,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -267,6 +268,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_MESON_SPICC=m
 CONFIG_SPI_MESON_SPIFC=m
@@ -504,7 +506,9 @@ CONFIG_PWM_MESON=m
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_TEGRA=m
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_HISI_INNO_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_SUN4I_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH v2 2/4] phy: add inno-usb2-phy driver for hi3798cv200 SoC

[Jiancheng Xue]

From: Pengcheng Li <lpc...@hisilicon.com>

Add inno-usb2-phy driver for hi3798cv200 SoC.

Signed-off-by: Pengcheng Li <lpc...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/phy/hisilicon/Kconfig  |  11 +-
 drivers/phy/hisilicon/Makefile |   1 +
 drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 236 +
 3 files changed, 247 insertions(+), 1 deletion(-)
 create mode 100644 drivers/phy/hisilicon/phy-hisi-inno-usb2.c

diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig
index 6164c4c..6a675c5 100644
--- a/drivers/phy/hisilicon/Kconfig
+++ b/drivers/phy/hisilicon/Kconfig
@@ -8,9 +8,18 @@ config PHY_HI6220_USB
select MFD_SYSCON
help
  Enable this to support the HISILICON HI6220 USB PHY.
-
  To compile this driver as a module, choose M here.
 
+config PHY_HISI_INNO_USB2
+   tristate "HiSilicon INNO USB2 PHY support"
+   depends on (ARCH_HISI) || COMPILE_TEST
+   select GENERIC_PHY
+   select MFD_SYSCON
+   help
+ Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
+ USB 1.5Mb/s, USB 12Mb/s, USB 480Mb/s speeds. It supports one
+ USB host port to accept one USB device.
+
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
diff --git a/drivers/phy/hisilicon/Makefile b/drivers/phy/hisilicon/Makefile
index 541b348..e6c9794 100644
--- a/drivers/phy/hisilicon/Makefile
+++ b/drivers/phy/hisilicon/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_PHY_HI6220_USB)   += phy-hi6220-usb.o
+obj-$(CONFIG_PHY_HISI_INNO_USB2)   += phy-hisi-inno-usb2.o
 obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c 
b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c
new file mode 100644
index 000..7edf4a3
--- /dev/null
+++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c
@@ -0,0 +1,236 @@
+/*
+ * HiSilicon INNO USB2 PHY Driver.
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define INNO_PHY_PORT_NUM  2
+#define REF_CLK_STABLE_TIME100 /* unit:us */
+#define UTMI_CLK_STABLE_TIME   200 /* unit:us */
+#define TEST_CLK_STABLE_TIME   2   /* unit:ms */
+#define PHY_CLK_STABLE_TIME2   /* unit:ms */
+#define UTMI_RST_COMPLETE_TIME 2   /* unit:ms */
+#define TEST_RST_COMPLETE_TIME 100 /* unit:us */
+#define POR_RST_COMPLETE_TIME  300 /* unit:us */
+#define PHY_TEST_DATA  GENMASK(7, 0)
+#define PHY_TEST_ADDR  GENMASK(15, 8)
+#define PHY_TEST_PORT  GENMASK(18, 16)
+#define PHY_TEST_WREN  BIT(21)
+#define PHY_TEST_CLK   BIT(22) /* rising edge active */
+#define PHY_TEST_RST   BIT(23) /* low active */
+#define PHY_CLK_ENABLE BIT(2)
+
+struct hisi_inno_phy_priv {
+   struct regmap *syscon;
+   u32 reg;
+   struct clk *ref_clk;
+   struct reset_control *por_rst;
+   struct reset_control *test_rst;
+   struct reset_control *utmi_rst[INNO_PHY_PORT_NUM];
+   u32 port_num;
+};
+
+static void hisi_inno_phy_write_reg(struct regmap *syscon,
+   u32 reg, u8 port, u32 addr, u32 data)
+{
+   u32 value;
+
+   value = (data & PHY_TEST_DATA)
+   | ((addr << 8) & PHY_TEST_ADDR)
+   | ((port << 16) & PHY_TEST_PORT)
+   | PHY_TEST_WREN | PHY_TEST_RST;
+   regmap_write(syscon, reg, value);
+   value |= PHY_TEST_CLK;
+   regmap_write(syscon, reg, value);
+   value &= ~PHY_TEST_CLK;
+   regmap_write(syscon, reg, value);
+}
+
+static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv)
+{
+   /* The phy clk is controlled by the port0 register 0x06. */
+   hisi_inno_phy_write_reg(priv->syscon,
+   priv->reg, 0, 0x06, PHY_CLK_ENABLE);
+   msleep(PHY_CLK_STABLE_TIME);
+}
+
+static int hisi_inno_phy_init(struct phy *phy)
+{
+   struct hisi_inno_phy_priv *priv = phy_get_drvdata(phy);
+   int ret, i;
+
+   ret = clk_prepare_enable(priv->ref_clk);
+   if (ret)
+   return ret;
+   udelay(

[PATCH v2 2/4] phy: add inno-usb2-phy driver for hi3798cv200 SoC

[Jiancheng Xue]

From: Pengcheng Li 

Add inno-usb2-phy driver for hi3798cv200 SoC.

Signed-off-by: Pengcheng Li 
Signed-off-by: Jiancheng Xue 
---
 drivers/phy/hisilicon/Kconfig  |  11 +-
 drivers/phy/hisilicon/Makefile |   1 +
 drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 236 +
 3 files changed, 247 insertions(+), 1 deletion(-)
 create mode 100644 drivers/phy/hisilicon/phy-hisi-inno-usb2.c

diff --git a/drivers/phy/hisilicon/Kconfig b/drivers/phy/hisilicon/Kconfig
index 6164c4c..6a675c5 100644
--- a/drivers/phy/hisilicon/Kconfig
+++ b/drivers/phy/hisilicon/Kconfig
@@ -8,9 +8,18 @@ config PHY_HI6220_USB
select MFD_SYSCON
help
  Enable this to support the HISILICON HI6220 USB PHY.
-
  To compile this driver as a module, choose M here.
 
+config PHY_HISI_INNO_USB2
+   tristate "HiSilicon INNO USB2 PHY support"
+   depends on (ARCH_HISI) || COMPILE_TEST
+   select GENERIC_PHY
+   select MFD_SYSCON
+   help
+ Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
+ USB 1.5Mb/s, USB 12Mb/s, USB 480Mb/s speeds. It supports one
+ USB host port to accept one USB device.
+
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
diff --git a/drivers/phy/hisilicon/Makefile b/drivers/phy/hisilicon/Makefile
index 541b348..e6c9794 100644
--- a/drivers/phy/hisilicon/Makefile
+++ b/drivers/phy/hisilicon/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_PHY_HI6220_USB)   += phy-hi6220-usb.o
+obj-$(CONFIG_PHY_HISI_INNO_USB2)   += phy-hisi-inno-usb2.o
 obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c 
b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c
new file mode 100644
index 000..7edf4a3
--- /dev/null
+++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c
@@ -0,0 +1,236 @@
+/*
+ * HiSilicon INNO USB2 PHY Driver.
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define INNO_PHY_PORT_NUM  2
+#define REF_CLK_STABLE_TIME100 /* unit:us */
+#define UTMI_CLK_STABLE_TIME   200 /* unit:us */
+#define TEST_CLK_STABLE_TIME   2   /* unit:ms */
+#define PHY_CLK_STABLE_TIME2   /* unit:ms */
+#define UTMI_RST_COMPLETE_TIME 2   /* unit:ms */
+#define TEST_RST_COMPLETE_TIME 100 /* unit:us */
+#define POR_RST_COMPLETE_TIME  300 /* unit:us */
+#define PHY_TEST_DATA  GENMASK(7, 0)
+#define PHY_TEST_ADDR  GENMASK(15, 8)
+#define PHY_TEST_PORT  GENMASK(18, 16)
+#define PHY_TEST_WREN  BIT(21)
+#define PHY_TEST_CLK   BIT(22) /* rising edge active */
+#define PHY_TEST_RST   BIT(23) /* low active */
+#define PHY_CLK_ENABLE BIT(2)
+
+struct hisi_inno_phy_priv {
+   struct regmap *syscon;
+   u32 reg;
+   struct clk *ref_clk;
+   struct reset_control *por_rst;
+   struct reset_control *test_rst;
+   struct reset_control *utmi_rst[INNO_PHY_PORT_NUM];
+   u32 port_num;
+};
+
+static void hisi_inno_phy_write_reg(struct regmap *syscon,
+   u32 reg, u8 port, u32 addr, u32 data)
+{
+   u32 value;
+
+   value = (data & PHY_TEST_DATA)
+   | ((addr << 8) & PHY_TEST_ADDR)
+   | ((port << 16) & PHY_TEST_PORT)
+   | PHY_TEST_WREN | PHY_TEST_RST;
+   regmap_write(syscon, reg, value);
+   value |= PHY_TEST_CLK;
+   regmap_write(syscon, reg, value);
+   value &= ~PHY_TEST_CLK;
+   regmap_write(syscon, reg, value);
+}
+
+static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv)
+{
+   /* The phy clk is controlled by the port0 register 0x06. */
+   hisi_inno_phy_write_reg(priv->syscon,
+   priv->reg, 0, 0x06, PHY_CLK_ENABLE);
+   msleep(PHY_CLK_STABLE_TIME);
+}
+
+static int hisi_inno_phy_init(struct phy *phy)
+{
+   struct hisi_inno_phy_priv *priv = phy_get_drvdata(phy);
+   int ret, i;
+
+   ret = clk_prepare_enable(priv->ref_clk);
+   if (ret)
+   return ret;
+   udelay(REF_CLK_STABLE_TIME);
+
+   if (priv->test_rst) {
+   res

[PATCH v2 1/4] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Add support for hisi-inno-usb2 phy.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 31 ++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index 000..417eeaa
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,31 @@
+HiSilicon INNO USB2 PHY
+---
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy",
+- #phy-cells: Shall be 0.
+- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.
+- hisilicon,phycon-reg: Offset of the phy control register in the syscon.
+- hisilicon,port-num: Number of utmi ports. Range [1,2].
+- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: List of phandle and reset specifier pairs for each reset signal
+in reset-names.
+- reset-names: Shall be "power_on", "utmi0", "utmi1". Thereinto, utmi[n] is
+required only if port[n] exists.
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+usb2_phy: phy {
+compatible = "hisilicon,inno-usb2-phy";
+#phy-cells = <0>;
+hisilicon,peripheral-syscon = <_ctrl>;
+hisilicon,phycon-reg = <0x120>;
+hisilicon,port-num = <2>;
+clocks = < USB2_PHY_UTMI_REF_CLK>;
+resets = < 0xbc 2>,
+ < 0xbc 8>,
+ < 0xbc 9>,
+reset-names = "power_on", "utmi0", "utmi1";
+};
-- 
1.9.1

[PATCH v2 1/4] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Add support for hisi-inno-usb2 phy.

Signed-off-by: Jiancheng Xue 
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 31 ++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index 000..417eeaa
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,31 @@
+HiSilicon INNO USB2 PHY
+---
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy",
+- #phy-cells: Shall be 0.
+- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.
+- hisilicon,phycon-reg: Offset of the phy control register in the syscon.
+- hisilicon,port-num: Number of utmi ports. Range [1,2].
+- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: List of phandle and reset specifier pairs for each reset signal
+in reset-names.
+- reset-names: Shall be "power_on", "utmi0", "utmi1". Thereinto, utmi[n] is
+required only if port[n] exists.
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+usb2_phy: phy {
+compatible = "hisilicon,inno-usb2-phy";
+#phy-cells = <0>;
+hisilicon,peripheral-syscon = <_ctrl>;
+hisilicon,phycon-reg = <0x120>;
+hisilicon,port-num = <2>;
+clocks = < USB2_PHY_UTMI_REF_CLK>;
+resets = < 0xbc 2>,
+ < 0xbc 8>,
+ < 0xbc 9>,
+reset-names = "power_on", "utmi0", "utmi1";
+};
-- 
1.9.1

Re: [PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Hi,

On 2017/6/21 17:00, Jiancheng Xue wrote:
> Add support for hisi-inno-usb2 phy.
> 
> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
> ---
>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 
> ++
>  1 file changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> new file mode 100644
> index 000..21f8208
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> @@ -0,0 +1,36 @@
> +HiSilicon INNO USB2 PHY
> +---
> +Required properties:
> +- compatible: Should be one of the following strings:
> + "hisilicon,inno-usb2-phy",
> + "hisilicon,hi3798cv200-usb2-phy",
> +- #phy-cells: Must be 0
> +- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.

Here a property should be added to supply offsets of phy specific registers
in the above peripheral syscon.  I will modify this in the next version.

---
Regards,
Jiancheng

> +- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
> +- resets: List of phandle and reset specifier pairs for each reset signal in
> +reset-names.
> +- reset-names: Should be "por_rst" and "test_rst". The test_rst only
> +exists in some of SOCs, so it is optional.
> +
> +Phy node can include up to four subnodes. Each subnode represents one port.
> +The required properties of port node are as follows:
> +- clocks: Phandle and clock specifier pair for utmi_clock.
> +- resets: List of phandle and reset specifier pairs for port reset and utmi 
> reset.
> +- reset-names: List of reset signal names. Should be "port_rst" and 
> "utmi_rst"
> +
> +Refer to phy/phy-bindings.txt for the generic PHY binding properties
> +
> +Example:
> +usb_phy: phy {
> +  compatible = "hisilicon,inno_usb2_phy";
> +  #phy-cells = <0>;
> +  hisilicon,peripheral-syscon = <_ctrl>;
> +  clocks = < USB2_REF_CLK>;
> +  resets = < 0xb4 2>;
> +  reset-names = "por_rst";
> +  port0 {
> +  clocks = < USB2_UTMI0_CLK>;
> +  resets = < 0xb4 5>, < 0xb4 1>;
> +  reset-names = "port_rst", "utmi_rst";
> +  };
> +  };
> 

Re: [PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Hi,

On 2017/6/21 17:00, Jiancheng Xue wrote:
> Add support for hisi-inno-usb2 phy.
> 
> Signed-off-by: Jiancheng Xue 
> ---
>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 
> ++
>  1 file changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> new file mode 100644
> index 000..21f8208
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> @@ -0,0 +1,36 @@
> +HiSilicon INNO USB2 PHY
> +---
> +Required properties:
> +- compatible: Should be one of the following strings:
> + "hisilicon,inno-usb2-phy",
> + "hisilicon,hi3798cv200-usb2-phy",
> +- #phy-cells: Must be 0
> +- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.

Here a property should be added to supply offsets of phy specific registers
in the above peripheral syscon.  I will modify this in the next version.

---
Regards,
Jiancheng

> +- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
> +- resets: List of phandle and reset specifier pairs for each reset signal in
> +reset-names.
> +- reset-names: Should be "por_rst" and "test_rst". The test_rst only
> +exists in some of SOCs, so it is optional.
> +
> +Phy node can include up to four subnodes. Each subnode represents one port.
> +The required properties of port node are as follows:
> +- clocks: Phandle and clock specifier pair for utmi_clock.
> +- resets: List of phandle and reset specifier pairs for port reset and utmi 
> reset.
> +- reset-names: List of reset signal names. Should be "port_rst" and 
> "utmi_rst"
> +
> +Refer to phy/phy-bindings.txt for the generic PHY binding properties
> +
> +Example:
> +usb_phy: phy {
> +  compatible = "hisilicon,inno_usb2_phy";
> +  #phy-cells = <0>;
> +  hisilicon,peripheral-syscon = <_ctrl>;
> +  clocks = < USB2_REF_CLK>;
> +  resets = < 0xb4 2>;
> +  reset-names = "por_rst";
> +  port0 {
> +  clocks = < USB2_UTMI0_CLK>;
> +  resets = < 0xb4 5>, < 0xb4 1>;
> +  reset-names = "port_rst", "utmi_rst";
> +  };
> +  };
> 

[PATCH 0/5] enable usb2 function on poplar board.

[Jiancheng Xue]

This patchset is mainly used to enable usb2 function on poplar board.

Jiancheng Xue (4):
  clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
  dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
  arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar
board.
  arm64: defconfig: enable some drivers and configs for
hi3798cv200-poplar board.

Pengcheng Li (1):
  phy: add inno-usb2-phy driver for hi3798cv200 SoC

 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt |  36 +++
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  47 
 arch/arm64/configs/defconfig   |  13 +-
 drivers/clk/hisilicon/crg-hi3798cv200.c|  21 ++
 drivers/phy/Kconfig|  10 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-hisi-inno-usb2.c   | 287 +
 include/dt-bindings/clock/histb-clock.h|   9 +-
 9 files changed, 435 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
 create mode 100644 drivers/phy/phy-hisi-inno-usb2.c

-- 
1.9.1

[PATCH 0/5] enable usb2 function on poplar board.

[Jiancheng Xue]

This patchset is mainly used to enable usb2 function on poplar board.

Jiancheng Xue (4):
  clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
  dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
  arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar
board.
  arm64: defconfig: enable some drivers and configs for
hi3798cv200-poplar board.

Pengcheng Li (1):
  phy: add inno-usb2-phy driver for hi3798cv200 SoC

 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt |  36 +++
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  |  13 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi |  47 
 arch/arm64/configs/defconfig   |  13 +-
 drivers/clk/hisilicon/crg-hi3798cv200.c|  21 ++
 drivers/phy/Kconfig|  10 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-hisi-inno-usb2.c   | 287 +
 include/dt-bindings/clock/histb-clock.h|   9 +-
 9 files changed, 435 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
 create mode 100644 drivers/phy/phy-hisi-inno-usb2.c

-- 
1.9.1

[PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Add support for hisi-inno-usb2 phy.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 ++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index 000..21f8208
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,36 @@
+HiSilicon INNO USB2 PHY
+---
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy",
+- #phy-cells: Must be 0
+- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.
+- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: List of phandle and reset specifier pairs for each reset signal in
+reset-names.
+- reset-names: Should be "por_rst" and "test_rst". The test_rst only
+exists in some of SOCs, so it is optional.
+
+Phy node can include up to four subnodes. Each subnode represents one port.
+The required properties of port node are as follows:
+- clocks: Phandle and clock specifier pair for utmi_clock.
+- resets: List of phandle and reset specifier pairs for port reset and utmi 
reset.
+- reset-names: List of reset signal names. Should be "port_rst" and "utmi_rst"
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+usb_phy: phy {
+compatible = "hisilicon,inno_usb2_phy";
+#phy-cells = <0>;
+hisilicon,peripheral-syscon = <_ctrl>;
+clocks = < USB2_REF_CLK>;
+resets = < 0xb4 2>;
+reset-names = "por_rst";
+port0 {
+clocks = < USB2_UTMI0_CLK>;
+resets = < 0xb4 5>, < 0xb4 1>;
+reset-names = "port_rst", "utmi_rst";
+};
+};
-- 
1.9.1

[PATCH 2/5] dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy

[Jiancheng Xue]

Add support for hisi-inno-usb2 phy.

Signed-off-by: Jiancheng Xue 
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 ++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index 000..21f8208
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,36 @@
+HiSilicon INNO USB2 PHY
+---
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy",
+- #phy-cells: Must be 0
+- hisilicon,peripheral-syscon: Phandle of syscon used to control phy.
+- clocks: Phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: List of phandle and reset specifier pairs for each reset signal in
+reset-names.
+- reset-names: Should be "por_rst" and "test_rst". The test_rst only
+exists in some of SOCs, so it is optional.
+
+Phy node can include up to four subnodes. Each subnode represents one port.
+The required properties of port node are as follows:
+- clocks: Phandle and clock specifier pair for utmi_clock.
+- resets: List of phandle and reset specifier pairs for port reset and utmi 
reset.
+- reset-names: List of reset signal names. Should be "port_rst" and "utmi_rst"
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+usb_phy: phy {
+compatible = "hisilicon,inno_usb2_phy";
+#phy-cells = <0>;
+hisilicon,peripheral-syscon = <_ctrl>;
+clocks = < USB2_REF_CLK>;
+resets = < 0xb4 2>;
+reset-names = "por_rst";
+port0 {
+clocks = < USB2_UTMI0_CLK>;
+resets = < 0xb4 5>, < 0xb4 1>;
+reset-names = "port_rst", "utmi_rst";
+};
+};
-- 
1.9.1

[PATCH 1/5] clk: hisilicon: add usb2 clocks for hi3798cv200 SoC

[Jiancheng Xue]

Add usb2 clocks for hi3798cv200 SoC.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Daniel Thompson <daniel.thomp...@linaro.org>
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 21 +
 include/dt-bindings/clock/histb-clock.h |  9 -
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index fc8b5bc..ed8bb5f 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -44,6 +44,9 @@
 #define HI3798CV200_ETH_BUS0_CLK   78
 #define HI3798CV200_ETH_BUS1_CLK   79
 #define HI3798CV200_COMBPHY1_MUX   80
+#define HI3798CV200_FIXED_12M  81
+#define HI3798CV200_FIXED_48M  82
+#define HI3798CV200_FIXED_60M  83
 
 #define HI3798CV200_CRG_NR_CLKS128
 
@@ -51,9 +54,12 @@
{ HISTB_OSC_CLK, "clk_osc", NULL, 0, 2400, },
{ HISTB_APB_CLK, "clk_apb", NULL, 0, 1, },
{ HISTB_AHB_CLK, "clk_ahb", NULL, 0, 2, },
+   { HI3798CV200_FIXED_12M, "12m", NULL, 0, 1200, },
{ HI3798CV200_FIXED_24M, "24m", NULL, 0, 2400, },
{ HI3798CV200_FIXED_25M, "25m", NULL, 0, 2500, },
+   { HI3798CV200_FIXED_48M, "48m", NULL, 0, 4800, },
{ HI3798CV200_FIXED_50M, "50m", NULL, 0, 5000, },
+   { HI3798CV200_FIXED_60M, "60m", NULL, 0, 6000, },
{ HI3798CV200_FIXED_75M, "75m", NULL, 0, 7500, },
{ HI3798CV200_FIXED_100M, "100m", NULL, 0, 1, },
{ HI3798CV200_FIXED_150M, "150m", NULL, 0, 15000, },
@@ -134,6 +140,21 @@
/* COMBPHY1 */
{ HISTB_COMBPHY1_CLK, "clk_combphy1", "combphy1_mux",
CLK_SET_RATE_PARENT, 0x188, 8, 0, },
+   /* USB2 */
+   { HISTB_USB2_BUS_CLK, "clk_u2_bus", "clk_ahb",
+   CLK_SET_RATE_PARENT, 0xb8, 0, 0, },
+   { HISTB_USB2_PHY_CLK, "clk_u2_phy", "60m",
+   CLK_SET_RATE_PARENT, 0xb8, 4, 0, },
+   { HISTB_USB2_12M_CLK, "clk_u2_12m", "12m",
+   CLK_SET_RATE_PARENT, 0xb8, 2, 0 },
+   { HISTB_USB2_48M_CLK, "clk_u2_48m", "48m",
+   CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
+   { HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
+   CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
+   { HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
+   CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
+   { HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",
+   CLK_SET_RATE_PARENT, 0xbc, 2, 0 },
 };
 
 static struct hisi_clock_data *hi3798cv200_clk_register(
diff --git a/include/dt-bindings/clock/histb-clock.h 
b/include/dt-bindings/clock/histb-clock.h
index 181c0f0..067f5e5 100644
--- a/include/dt-bindings/clock/histb-clock.h
+++ b/include/dt-bindings/clock/histb-clock.h
@@ -53,7 +53,14 @@
 #define HISTB_ETH1_MAC_CLK 31
 #define HISTB_ETH1_MACIF_CLK   32
 #define HISTB_COMBPHY1_CLK 33
-
+#define HISTB_USB2_BUS_CLK 34
+#define HISTB_USB2_PHY_CLK 35
+#define HISTB_USB2_UTMI_CLK36
+#define HISTB_USB2_12M_CLK 37
+#define HISTB_USB2_48M_CLK 38
+#define HISTB_USB2_OTG_UTMI_CLK39
+#define HISTB_USB2_PHY1_REF_CLK40
+#define HISTB_USB2_PHY2_REF_CLK41
 
 /* clocks provided by mcu CRG */
 #define HISTB_MCE_CLK  1
-- 
1.9.1

[PATCH 4/5] arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar board.

[Jiancheng Xue]

Add usb2 controller and phy nodes for poplar board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Daniel Thompson <daniel.thomp...@linaro.org>
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 13 ++
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 47 ++
 2 files changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index 684fa09..40db803 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -64,6 +64,10 @@
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
#address-cells = <1>;
@@ -147,6 +151,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
label = "LS-SPI0";
@@ -161,3 +169,8 @@
label = "LS-UART0";
 };
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+_phy1 {
+   status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..422aeaf 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,11 @@
#reset-cells = <2>;
};
 
+   peri_ctrl: system-controller@8a2 {
+   compatible = "syscon";
+   reg = <0x8a2 0x1000>;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -407,5 +412,47 @@
clocks = < HISTB_IR_CLK>;
status = "disabled";
};
+
+   ehci: ehci@0x989 {
+   compatible = "generic-ehci";
+   reg = <0x989 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_PHY_CLK>;
+   clock-names = "ehci_system", "phy";
+   resets = < 0xb8 12>,
+< 0xb8 16>;
+   reset-names = "bus", "phy";
+   status = "disabled";
+   };
+
+   ohci: ohci@0x988 {
+   compatible = "generic-ohci";
+   reg = <0x988 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_12M_CLK>,
+< HISTB_USB2_48M_CLK>;
+   clock-names = "ahb_biu", "clk12", "clk48";
+   resets = < 0xb8 12>;
+   reset-names = "bus";
+   status = "disabled";
+   };
+
+   usb2_phy1: usb-phy@1 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>;
+   reset-names = "por_rst";
+   status = "disabled";
+
+   usb2_port1: port@1 {
+   clocks = < HISTB_USB2_UTMI_CLK>;
+   resets = < 0xbc 9>, < 0xb8 13>;
+   reset-names = "port_rst", "utmi_rst";
+   };
+   };
};
 };
-- 
1.9.1

[PATCH 1/5] clk: hisilicon: add usb2 clocks for hi3798cv200 SoC

[Jiancheng Xue]

Add usb2 clocks for hi3798cv200 SoC.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Daniel Thompson 
---
 drivers/clk/hisilicon/crg-hi3798cv200.c | 21 +
 include/dt-bindings/clock/histb-clock.h |  9 -
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c 
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index fc8b5bc..ed8bb5f 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -44,6 +44,9 @@
 #define HI3798CV200_ETH_BUS0_CLK   78
 #define HI3798CV200_ETH_BUS1_CLK   79
 #define HI3798CV200_COMBPHY1_MUX   80
+#define HI3798CV200_FIXED_12M  81
+#define HI3798CV200_FIXED_48M  82
+#define HI3798CV200_FIXED_60M  83
 
 #define HI3798CV200_CRG_NR_CLKS128
 
@@ -51,9 +54,12 @@
{ HISTB_OSC_CLK, "clk_osc", NULL, 0, 2400, },
{ HISTB_APB_CLK, "clk_apb", NULL, 0, 1, },
{ HISTB_AHB_CLK, "clk_ahb", NULL, 0, 2, },
+   { HI3798CV200_FIXED_12M, "12m", NULL, 0, 1200, },
{ HI3798CV200_FIXED_24M, "24m", NULL, 0, 2400, },
{ HI3798CV200_FIXED_25M, "25m", NULL, 0, 2500, },
+   { HI3798CV200_FIXED_48M, "48m", NULL, 0, 4800, },
{ HI3798CV200_FIXED_50M, "50m", NULL, 0, 5000, },
+   { HI3798CV200_FIXED_60M, "60m", NULL, 0, 6000, },
{ HI3798CV200_FIXED_75M, "75m", NULL, 0, 7500, },
{ HI3798CV200_FIXED_100M, "100m", NULL, 0, 1, },
{ HI3798CV200_FIXED_150M, "150m", NULL, 0, 15000, },
@@ -134,6 +140,21 @@
/* COMBPHY1 */
{ HISTB_COMBPHY1_CLK, "clk_combphy1", "combphy1_mux",
CLK_SET_RATE_PARENT, 0x188, 8, 0, },
+   /* USB2 */
+   { HISTB_USB2_BUS_CLK, "clk_u2_bus", "clk_ahb",
+   CLK_SET_RATE_PARENT, 0xb8, 0, 0, },
+   { HISTB_USB2_PHY_CLK, "clk_u2_phy", "60m",
+   CLK_SET_RATE_PARENT, 0xb8, 4, 0, },
+   { HISTB_USB2_12M_CLK, "clk_u2_12m", "12m",
+   CLK_SET_RATE_PARENT, 0xb8, 2, 0 },
+   { HISTB_USB2_48M_CLK, "clk_u2_48m", "48m",
+   CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
+   { HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
+   CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
+   { HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
+   CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
+   { HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",
+   CLK_SET_RATE_PARENT, 0xbc, 2, 0 },
 };
 
 static struct hisi_clock_data *hi3798cv200_clk_register(
diff --git a/include/dt-bindings/clock/histb-clock.h 
b/include/dt-bindings/clock/histb-clock.h
index 181c0f0..067f5e5 100644
--- a/include/dt-bindings/clock/histb-clock.h
+++ b/include/dt-bindings/clock/histb-clock.h
@@ -53,7 +53,14 @@
 #define HISTB_ETH1_MAC_CLK 31
 #define HISTB_ETH1_MACIF_CLK   32
 #define HISTB_COMBPHY1_CLK 33
-
+#define HISTB_USB2_BUS_CLK 34
+#define HISTB_USB2_PHY_CLK 35
+#define HISTB_USB2_UTMI_CLK36
+#define HISTB_USB2_12M_CLK 37
+#define HISTB_USB2_48M_CLK 38
+#define HISTB_USB2_OTG_UTMI_CLK39
+#define HISTB_USB2_PHY1_REF_CLK40
+#define HISTB_USB2_PHY2_REF_CLK41
 
 /* clocks provided by mcu CRG */
 #define HISTB_MCE_CLK  1
-- 
1.9.1

[PATCH 4/5] arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar board.

[Jiancheng Xue]

Add usb2 controller and phy nodes for poplar board.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Daniel Thompson 
---
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 13 ++
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 47 ++
 2 files changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
index 684fa09..40db803 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -64,6 +64,10 @@
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
#address-cells = <1>;
@@ -147,6 +151,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
label = "LS-SPI0";
@@ -161,3 +169,8 @@
label = "LS-UART0";
 };
 /* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+_phy1 {
+   status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 75865f8a..422aeaf 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -106,6 +106,11 @@
#reset-cells = <2>;
};
 
+   peri_ctrl: system-controller@8a2 {
+   compatible = "syscon";
+   reg = <0x8a2 0x1000>;
+   };
+
uart0: serial@8b0 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x8b0 0x1000>;
@@ -407,5 +412,47 @@
clocks = < HISTB_IR_CLK>;
status = "disabled";
};
+
+   ehci: ehci@0x989 {
+   compatible = "generic-ehci";
+   reg = <0x989 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_PHY_CLK>;
+   clock-names = "ehci_system", "phy";
+   resets = < 0xb8 12>,
+< 0xb8 16>;
+   reset-names = "bus", "phy";
+   status = "disabled";
+   };
+
+   ohci: ohci@0x988 {
+   compatible = "generic-ohci";
+   reg = <0x988 0x1>;
+   interrupts = ;
+   clocks = < HISTB_USB2_BUS_CLK>,
+< HISTB_USB2_12M_CLK>,
+< HISTB_USB2_48M_CLK>;
+   clock-names = "ahb_biu", "clk12", "clk48";
+   resets = < 0xb8 12>;
+   reset-names = "bus";
+   status = "disabled";
+   };
+
+   usb2_phy1: usb-phy@1 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   #phy-cells = <0>;
+   hisilicon,peripheral-syscon = <_ctrl>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>;
+   reset-names = "por_rst";
+   status = "disabled";
+
+   usb2_port1: port@1 {
+   clocks = < HISTB_USB2_UTMI_CLK>;
+   resets = < 0xbc 9>, < 0xb8 13>;
+   reset-names = "port_rst", "utmi_rst";
+   };
+   };
};
 };
-- 
1.9.1

[PATCH 5/5] arm64: defconfig: enable some drivers and configs for hi3798cv200-poplar board.

[Jiancheng Xue]

Enable GMAC,I2C,IR,USB2-PHY for hi3798cv200-poplar board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 arch/arm64/configs/defconfig | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 97c123e..b45d760 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -31,6 +31,8 @@ CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_CMDLINE_PARTITION=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_ARCH_ALPINE=y
 CONFIG_ARCH_BCM2835=y
@@ -179,6 +181,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -259,6 +262,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_BCM2835=m
 CONFIG_SPI_BCM2835AUX=m
@@ -277,6 +281,7 @@ CONFIG_PINCTRL_MSM8994=y
 CONFIG_PINCTRL_MSM8996=y
 CONFIG_PINCTRL_QDF2XXX=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_PL061=y
 CONFIG_GPIO_RCAR=y
@@ -322,7 +327,7 @@ CONFIG_REGULATOR_QCOM_SMD_RPM=y
 CONFIG_REGULATOR_QCOM_SPMI=y
 CONFIG_REGULATOR_RK808=y
 CONFIG_REGULATOR_S2MPS11=y
-CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
 CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
@@ -359,6 +364,10 @@ CONFIG_BACKLIGHT_GENERIC=m
 CONFIG_BACKLIGHT_LP855X=m
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_HIX5HD2=y
+CONFIG_LIRC=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
@@ -488,7 +497,9 @@ CONFIG_PWM_MESON=m
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_TEGRA=m
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_HISI_INNO_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_SUN4I_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH 5/5] arm64: defconfig: enable some drivers and configs for hi3798cv200-poplar board.

[Jiancheng Xue]

Enable GMAC,I2C,IR,USB2-PHY for hi3798cv200-poplar board.

Signed-off-by: Jiancheng Xue 
---
 arch/arm64/configs/defconfig | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 97c123e..b45d760 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -31,6 +31,8 @@ CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_CMDLINE_PARTITION=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_ARCH_ALPINE=y
 CONFIG_ARCH_BCM2835=y
@@ -179,6 +181,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -259,6 +262,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_BCM2835=m
 CONFIG_SPI_BCM2835AUX=m
@@ -277,6 +281,7 @@ CONFIG_PINCTRL_MSM8994=y
 CONFIG_PINCTRL_MSM8996=y
 CONFIG_PINCTRL_QDF2XXX=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_PL061=y
 CONFIG_GPIO_RCAR=y
@@ -322,7 +327,7 @@ CONFIG_REGULATOR_QCOM_SMD_RPM=y
 CONFIG_REGULATOR_QCOM_SPMI=y
 CONFIG_REGULATOR_RK808=y
 CONFIG_REGULATOR_S2MPS11=y
-CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
 CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
@@ -359,6 +364,10 @@ CONFIG_BACKLIGHT_GENERIC=m
 CONFIG_BACKLIGHT_LP855X=m
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_HIX5HD2=y
+CONFIG_LIRC=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
@@ -488,7 +497,9 @@ CONFIG_PWM_MESON=m
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_SAMSUNG=y
 CONFIG_PWM_TEGRA=m
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_HISI_INNO_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_SUN4I_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH 3/5] phy: add inno-usb2-phy driver for hi3798cv200 SoC

[Jiancheng Xue]

From: Pengcheng Li <lpc...@hisilicon.com>

Add inno-usb2-phy driver for hi3798cv200 SoC.

Signed-off-by: Pengcheng Li <lpc...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 drivers/phy/Kconfig  |  10 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/phy-hisi-inno-usb2.c | 287 +++
 3 files changed, 298 insertions(+)
 create mode 100644 drivers/phy/phy-hisi-inno-usb2.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index afaf7b6..f86b9b7 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -225,6 +225,16 @@ config PHY_EXYNOS5250_SATA
  SATA 3.0 Gb/s, SATA 6.0 Gb/s speeds. It supports one SATA host
  port to accept one SATA device.
 
+config PHY_HISI_INNO_USB2
+   tristate "HiSilicon INNO USB2 PHY support"
+   depends on (ARCH_HISI) || COMPILE_TEST
+   select GENERIC_PHY
+   select MFD_SYSCON
+   help
+ Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
+ USB 1.5Mb/s, USB 12Mb/s, USB 480Mb/s speeds. It supports one
+ USB host port to accept one USB device.
+
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f8047b4..a275547 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
 obj-$(CONFIG_PHY_EXYNOS5250_SATA)  += phy-exynos5250-sata.o
 obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
 obj-$(CONFIG_PHY_HI6220_USB)   += phy-hi6220-usb.o
+obj-$(CONFIG_PHY_HISI_INNO_USB2)   += phy-hisi-inno-usb2.o
 obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
 obj-$(CONFIG_PHY_SUN4I_USB)+= phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SUN9I_USB)+= phy-sun9i-usb.o
diff --git a/drivers/phy/phy-hisi-inno-usb2.c b/drivers/phy/phy-hisi-inno-usb2.c
new file mode 100644
index 000..582c500
--- /dev/null
+++ b/drivers/phy/phy-hisi-inno-usb2.c
@@ -0,0 +1,287 @@
+/*
+ * HiSilicon INNO USB2 PHY Driver.
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#defineMAX_PORTS   4
+#define REF_CLK_STABLE_TIME100 /*unit:us*/
+#define UTMI_CLK_STABLE_TIME   200 /*unit:us*/
+#define UTMI_RST_COMPLETE_TIME 200 /*unit:us*/
+#define PORT_RST_COMPLETE_TIME 2   /*unit:ms*/
+#define TEST_RST_COMPLETE_TIME 100 /*unit:us*/
+#define POR_RST_COMPLETE_TIME  300 /*unit:us*/
+
+
+struct  hisi_inno_phy_port {
+   struct clk *utmi_clk;
+   struct reset_control *port_rst;
+   struct reset_control *utmi_rst;
+};
+
+struct hisi_inno_phy_priv {
+   struct regmap *reg_peri;
+   struct clk *ref_clk;
+   struct reset_control *test_rst;
+   struct reset_control *por_rst;
+   const struct reg_sequence *reg_seq;
+   u32 reg_num;
+   struct  hisi_inno_phy_port *ports;
+   u8  port_num;
+};
+
+#define HI3798CV200_PERI_USB0  0x120
+static const struct reg_sequence hi3798cv200_reg_seq[] = {
+   { HI3798CV200_PERI_USB0, 0x00a00604, },
+   { HI3798CV200_PERI_USB0, 0x00e00604, },
+   { HI3798CV200_PERI_USB0, 0x00a00604, 1000 },
+};
+
+static int hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv)
+{
+   return regmap_multi_reg_write_bypassed(priv->reg_peri,
+   priv->reg_seq, priv->reg_num);
+}
+
+static int hisi_inno_port_init(struct hisi_inno_phy_port *port)
+{
+   int ret;
+
+   reset_control_deassert(port->port_rst);
+   msleep(PORT_RST_COMPLETE_TIME);
+
+   ret = clk_prepare_enable(port->utmi_clk);
+   if (ret)
+   return ret;
+   udelay(UTMI_CLK_STABLE_TIME);
+
+   reset_control_deassert(port->utmi_rst);
+   udelay(UTMI_RST_COMPLETE_TIME);
+
+   return 0;
+}
+
+static int hisi_inno_phy_init(struct phy *phy)
+{
+   struct hisi_inno_phy_priv *priv = phy_get_drvdata(phy);
+   int ret, port;
+
+   ret = clk_prepare_enable(priv->ref_clk);
+   if (ret)
+   

[PATCH 3/5] phy: add inno-usb2-phy driver for hi3798cv200 SoC

[Jiancheng Xue]

From: Pengcheng Li 

Add inno-usb2-phy driver for hi3798cv200 SoC.

Signed-off-by: Pengcheng Li 
Signed-off-by: Jiancheng Xue 
---
 drivers/phy/Kconfig  |  10 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/phy-hisi-inno-usb2.c | 287 +++
 3 files changed, 298 insertions(+)
 create mode 100644 drivers/phy/phy-hisi-inno-usb2.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index afaf7b6..f86b9b7 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -225,6 +225,16 @@ config PHY_EXYNOS5250_SATA
  SATA 3.0 Gb/s, SATA 6.0 Gb/s speeds. It supports one SATA host
  port to accept one SATA device.
 
+config PHY_HISI_INNO_USB2
+   tristate "HiSilicon INNO USB2 PHY support"
+   depends on (ARCH_HISI) || COMPILE_TEST
+   select GENERIC_PHY
+   select MFD_SYSCON
+   help
+ Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
+ USB 1.5Mb/s, USB 12Mb/s, USB 480Mb/s speeds. It supports one
+ USB host port to accept one USB device.
+
 config PHY_HIX5HD2_SATA
tristate "HIX5HD2 SATA PHY Driver"
depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f8047b4..a275547 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
 obj-$(CONFIG_PHY_EXYNOS5250_SATA)  += phy-exynos5250-sata.o
 obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
 obj-$(CONFIG_PHY_HI6220_USB)   += phy-hi6220-usb.o
+obj-$(CONFIG_PHY_HISI_INNO_USB2)   += phy-hisi-inno-usb2.o
 obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
 obj-$(CONFIG_PHY_SUN4I_USB)+= phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SUN9I_USB)+= phy-sun9i-usb.o
diff --git a/drivers/phy/phy-hisi-inno-usb2.c b/drivers/phy/phy-hisi-inno-usb2.c
new file mode 100644
index 000..582c500
--- /dev/null
+++ b/drivers/phy/phy-hisi-inno-usb2.c
@@ -0,0 +1,287 @@
+/*
+ * HiSilicon INNO USB2 PHY Driver.
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#defineMAX_PORTS   4
+#define REF_CLK_STABLE_TIME100 /*unit:us*/
+#define UTMI_CLK_STABLE_TIME   200 /*unit:us*/
+#define UTMI_RST_COMPLETE_TIME 200 /*unit:us*/
+#define PORT_RST_COMPLETE_TIME 2   /*unit:ms*/
+#define TEST_RST_COMPLETE_TIME 100 /*unit:us*/
+#define POR_RST_COMPLETE_TIME  300 /*unit:us*/
+
+
+struct  hisi_inno_phy_port {
+   struct clk *utmi_clk;
+   struct reset_control *port_rst;
+   struct reset_control *utmi_rst;
+};
+
+struct hisi_inno_phy_priv {
+   struct regmap *reg_peri;
+   struct clk *ref_clk;
+   struct reset_control *test_rst;
+   struct reset_control *por_rst;
+   const struct reg_sequence *reg_seq;
+   u32 reg_num;
+   struct  hisi_inno_phy_port *ports;
+   u8  port_num;
+};
+
+#define HI3798CV200_PERI_USB0  0x120
+static const struct reg_sequence hi3798cv200_reg_seq[] = {
+   { HI3798CV200_PERI_USB0, 0x00a00604, },
+   { HI3798CV200_PERI_USB0, 0x00e00604, },
+   { HI3798CV200_PERI_USB0, 0x00a00604, 1000 },
+};
+
+static int hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv)
+{
+   return regmap_multi_reg_write_bypassed(priv->reg_peri,
+   priv->reg_seq, priv->reg_num);
+}
+
+static int hisi_inno_port_init(struct hisi_inno_phy_port *port)
+{
+   int ret;
+
+   reset_control_deassert(port->port_rst);
+   msleep(PORT_RST_COMPLETE_TIME);
+
+   ret = clk_prepare_enable(port->utmi_clk);
+   if (ret)
+   return ret;
+   udelay(UTMI_CLK_STABLE_TIME);
+
+   reset_control_deassert(port->utmi_rst);
+   udelay(UTMI_RST_COMPLETE_TIME);
+
+   return 0;
+}
+
+static int hisi_inno_phy_init(struct phy *phy)
+{
+   struct hisi_inno_phy_priv *priv = phy_get_drvdata(phy);
+   int ret, port;
+
+   ret = clk_prepare_enable(priv->ref_clk);
+   if (ret)
+   return ret;
+   udelay(REF_CLK_STABLE_TIME);
+
+   if (priv->test_rst) {
+   reset_control_deass

[PATCH] arm64: defconfig: enable several drivers for HiSilicon Hi3798CV200 SoC

[Jiancheng Xue]

Enable the following drivers for HiSilicon Hi3798CV200 SoC:
ethernet, i2c and ir.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 arch/arm64/configs/defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index ce07285..40251bd 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -181,6 +181,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -260,6 +261,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_MESON_SPIFC=m
 CONFIG_SPI_BCM2835=m
@@ -360,6 +362,11 @@ CONFIG_BACKLIGHT_GENERIC=m
 CONFIG_BACKLIGHT_LP855X=m
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_HIX5HD2=y
+CONFIG_LIRC=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
@@ -485,6 +492,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_TEGRA=m
 CONFIG_PWM_MESON=m
 CONFIG_COMMON_RESET_HI6220=y
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH] arm64: defconfig: enable several drivers for HiSilicon Hi3798CV200 SoC

[Jiancheng Xue]

Enable the following drivers for HiSilicon Hi3798CV200 SoC:
ethernet, i2c and ir.

Signed-off-by: Jiancheng Xue 
---
 arch/arm64/configs/defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index ce07285..40251bd 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -181,6 +181,7 @@ CONFIG_VIRTIO_NET=y
 CONFIG_AMD_XGBE=y
 CONFIG_NET_XGENE=y
 CONFIG_MACB=y
+CONFIG_HIX5HD2_GMAC=y
 CONFIG_HNS_DSAF=y
 CONFIG_HNS_ENET=y
 CONFIG_E1000E=y
@@ -260,6 +261,7 @@ CONFIG_I2C_TEGRA=y
 CONFIG_I2C_UNIPHIER_F=y
 CONFIG_I2C_RCAR=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_HIX5HD2=y
 CONFIG_SPI=y
 CONFIG_SPI_MESON_SPIFC=m
 CONFIG_SPI_BCM2835=m
@@ -360,6 +362,11 @@ CONFIG_BACKLIGHT_GENERIC=m
 CONFIG_BACKLIGHT_LP855X=m
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_RC_SUPPORT=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_HIX5HD2=y
+CONFIG_LIRC=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
@@ -485,6 +492,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_PWM_TEGRA=m
 CONFIG_PWM_MESON=m
 CONFIG_COMMON_RESET_HI6220=y
+CONFIG_TI_SYSCON_RESET=y
 CONFIG_PHY_RCAR_GEN3_USB2=y
 CONFIG_PHY_HI6220_USB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
1.9.1

[PATCH v3 0/2] add dts files for hi3798cv200-Poplar board

[Jiancheng Xue]

This patch set mainly adds dts files for hi3798cv200-Poplar board.

Jiancheng Xue (2):
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and
Poplar board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 163 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 405 +
 4 files changed, 573 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

-- 
1.9.1

[PATCH v3 0/2] add dts files for hi3798cv200-Poplar board

[Jiancheng Xue]

This patch set mainly adds dts files for hi3798cv200-Poplar board.

Jiancheng Xue (2):
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and
Poplar board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 163 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 405 +
 4 files changed, 573 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

-- 
1.9.1

[PATCH v3 2/2] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
Edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Alex Elder <el...@linaro.org>
Acked-by: Peter Griffin <peter.grif...@linaro.org>
---
Changed Log:
v3:
- Refined the patch according to Andreas's suggestions.
  1. Changed the license.
  2. Added alias for uart2.
  3. Reordered the device nodes. 
v2:
- Fixed issues pointed by Rob Herring.
  1. Moved the led node out of the soc node.
  2. Restrained the ranges property of soc node smaller.
- Refined the patch according to Andreas's suggestions.
- Enabled gmac1 device node instead of gmac0.
- Added a compatible string "syscon" for crg nodes.

 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 163 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 405 +
 3 files changed, 569 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c3a6c19..8960eca 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..fe2f9f1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,163 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * Released under the GPLv2 only.
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   serial2 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";
+   default-state = "off";
+   };
+   };
+};
+
+ {
+   status = "okay";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   phy-handle = <_phy1>;
+   phy-mode = "rgmii";
+   hisilicon,phy-reset-delays-us = <1 1 3>;
+
+   eth_phy1: phy@3 {
+   reg = <3>;
+   };
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-E",  "",
+ "",   "",
+ "",   "LS-GPIO-F",
+ "",   "LS-GPIO-J";
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-H",  "LS-GPIO-I",
+ "LS-GPIO-L",  "LS-GPIO-G",
+ "LS-GPIO-K",  "",
+ "",   "";
+};
+
+ {

[PATCH v3 2/2] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
Edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Alex Elder 
Acked-by: Peter Griffin 
---
Changed Log:
v3:
- Refined the patch according to Andreas's suggestions.
  1. Changed the license.
  2. Added alias for uart2.
  3. Reordered the device nodes. 
v2:
- Fixed issues pointed by Rob Herring.
  1. Moved the led node out of the soc node.
  2. Restrained the ranges property of soc node smaller.
- Refined the patch according to Andreas's suggestions.
- Enabled gmac1 device node instead of gmac0.
- Added a compatible string "syscon" for crg nodes.

 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 163 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 405 +
 3 files changed, 569 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c3a6c19..8960eca 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..fe2f9f1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,163 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * Released under the GPLv2 only.
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   serial2 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";
+   default-state = "off";
+   };
+   };
+};
+
+ {
+   status = "okay";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   phy-handle = <_phy1>;
+   phy-mode = "rgmii";
+   hisilicon,phy-reset-delays-us = <1 1 3>;
+
+   eth_phy1: phy@3 {
+   reg = <3>;
+   };
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-E",  "",
+ "",   "",
+ "",   "LS-GPIO-F",
+ "",   "LS-GPIO-J";
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-H",  "LS-GPIO-I",
+ "LS-GPIO-L",  "LS-GPIO-G",
+ "LS-GPIO-K",  "",
+ "",   "";
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "",   "

[PATCH v3 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Alex Elder <el...@linaro.org>
Acked-by: Peter Griffin <peter.grif...@linaro.org>
Acked-by: Rob Herring <r...@kernel.org>
---
 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f1c1e21..1fd3dd7 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,10 @@ Hi3660 SoC
 Required root node properties:
- compatible = "hisilicon,hi3660";
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
-- 
1.9.1

[PATCH v3 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Alex Elder 
Acked-by: Peter Griffin 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f1c1e21..1fd3dd7 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,10 @@ Hi3660 SoC
 Required root node properties:
- compatible = "hisilicon,hi3660";
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
-- 
1.9.1

Re: [PATCH v2 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Hi Andreas,

On 2017/2/26 9:32, Andreas Färber wrote:
> Am 22.02.2017 um 09:38 schrieb Jiancheng Xue:
>> Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.
>>
>> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
>> ---
>>  Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index f1c1e21..1fd3dd7 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -4,6 +4,10 @@ Hi3660 SoC
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3660";
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> 
> Please remember to CC previous reviewers.
> 
Sorry for that.

> This still looks wrong: Why is this not "hisilicon,poplar" if you choose
> against "tocoding,poplar"? 

I didn't think it was very important thing whether the compatbile string 
contained
a preceding SoC name or not. I just referred to the hikey board and some other
HiSilicon boards. I wanted to keep using the same rule with them.

> Is there a second Poplar board with a different SoC? 

I can't tell about this now.

> Even then it would be redundant with the second
> compatible string.
> 
The second compatilbe string can be removed here. Thanks.

Regards,
Jiancheng

> Regards,
> Andreas
> 
>> +
>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
> 

Re: [PATCH v2 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Hi Andreas,

On 2017/2/26 9:32, Andreas Färber wrote:
> Am 22.02.2017 um 09:38 schrieb Jiancheng Xue:
>> Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.
>>
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index f1c1e21..1fd3dd7 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -4,6 +4,10 @@ Hi3660 SoC
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3660";
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> 
> Please remember to CC previous reviewers.
> 
Sorry for that.

> This still looks wrong: Why is this not "hisilicon,poplar" if you choose
> against "tocoding,poplar"? 

I didn't think it was very important thing whether the compatbile string 
contained
a preceding SoC name or not. I just referred to the hikey board and some other
HiSilicon boards. I wanted to keep using the same rule with them.

> Is there a second Poplar board with a different SoC? 

I can't tell about this now.

> Even then it would be redundant with the second
> compatible string.
> 
The second compatilbe string can be removed here. Thanks.

Regards,
Jiancheng

> Regards,
> Andreas
> 
>> +
>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
> 

[PATCH v2 2/2] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Alex Elder <el...@linaro.org>
---
Changed Log:
v2:
- Fixed issues pointed by Rob Herring.
  1. Moved the led node out of the soc node.
  2. Restrained the ranges property of soc node smaller.
- Refined the patch according to Andreas's suggestions.
- Enabled gmac1 device node instead of gmac0.
- Added a compatible string "syscon" for crg nodes.

 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 171 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 415 +
 3 files changed, 587 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c3a6c19..8960eca 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..967853a
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,171 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";
+   default-state = "off";
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   label = "LS-UART0";
+};
+/* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+ {
+   status = "okay";
+   label = "LS-I2C0";
+};
+
+ {
+   status = "okay";
+   label = "LS-I2C1";
+};
+
+ {
+   status = "okay";
+   label = "LS-SPI0";
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-E",  "",
+ "",   "",
+

[PATCH v2 2/2] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Alex Elder 
---
Changed Log:
v2:
- Fixed issues pointed by Rob Herring.
  1. Moved the led node out of the soc node.
  2. Restrained the ranges property of soc node smaller.
- Refined the patch according to Andreas's suggestions.
- Enabled gmac1 device node instead of gmac0.
- Added a compatible string "syscon" for crg nodes.

 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 171 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 415 +
 3 files changed, 587 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c3a6c19..8960eca 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,5 @@
 dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..967853a
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,171 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";
+   default-state = "off";
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   label = "LS-UART0";
+};
+/* No optional LS-UART1 on Low Speed Expansion Connector. */
+
+ {
+   status = "okay";
+   label = "LS-I2C0";
+};
+
+ {
+   status = "okay";
+   label = "LS-I2C1";
+};
+
+ {
+   status = "okay";
+   label = "LS-SPI0";
+};
+
+ {
+   status = "okay";
+   gpio-line-names = "LS-GPIO-E",  "",
+ "",   "",
+

[PATCH v2 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f1c1e21..1fd3dd7 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,10 @@ Hi3660 SoC
 Required root node properties:
- compatible = "hisilicon,hi3660";
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
-- 
1.9.1

[PATCH v2 1/2] dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board

[Jiancheng Xue]

Add bindings for HiSilicon hi3798cv200 SoC and Poplar Board.

Signed-off-by: Jiancheng Xue 
---
 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f1c1e21..1fd3dd7 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,10 @@ Hi3660 SoC
 Required root node properties:
- compatible = "hisilicon,hi3660";
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
-- 
1.9.1

[PATCH v2 0/2] add dts files for hi3798cv200-Poplar board

[Jiancheng Xue]

This patch set mainly adds dts files for hi3798cv200-Poplar board.

Jiancheng Xue (2):
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and
Poplar board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 171 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 415 +
 4 files changed, 591 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

-- 
1.9.1

[PATCH v2 0/2] add dts files for hi3798cv200-Poplar board

[Jiancheng Xue]

This patch set mainly adds dts files for hi3798cv200-Poplar board.

Jiancheng Xue (2):
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and
Poplar board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 171 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 415 +
 4 files changed, 591 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

-- 
1.9.1

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi Andreas,

On 2017/2/19 7:22, Andreas Färber wrote:
> Hi Jiancheng,
> 
> Am 09.02.2017 um 08:07 schrieb Jiancheng Xue:
>> Add basic dts files for hi3798cv200-poplar board. Poplar is the
>> first development board compliant with the 96Boards Enterprise
>> Edition TV Platform specification. The board features the
>> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
>> processor and high performance Mali T720 GPU.
>>
>> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
>> Reviewed-by: Alex Elder <el...@linaro.org>
> 
> Thanks for this patch! Some comments below. Do you have instructions for
> how to test? In my tries I so far only got resets like for example:
> 
> fastboot# bootm 0x0100 - 0x2000
> ## Booting kernel from Legacy Image at 0100 ...
>Image Name:   linux-next
>Image Type:   AArch64 Linux Kernel Image (uncompressed)
>Data Size:8741376 Bytes = 8.3 MiB
>Load Address: 0200
>Entry Point:  0200
> ## Flattened Device Tree blob at 2000
>Booting using the fdt blob at 0x2000
>Loading Kernel Image from 0x16777280 to 0x33554432 ... OK
> OK
> 
> Starting kernel ...
> 
> 
> *** irq: undefined instruction
> undefined instruction
> pc : [<61d3>]  lr : [<00c661ec>]
> sp : 00bfffb8  ip : 0036 fp : 
> r10:   r9 :  r8 : 
> r7 : 0080  r6 : 005fffc4 r5 : f36e6f75  r4 : 
> r3 : 001e  r2 : 0100 r1 :   r0 : 
> Flags: nzcv  IRQs off  FIQs off  Mode UK12_32
> Resetting CPU ...
> 
> resetting ...
> 
> Does U-Boot need to be updated for this to work?
> 
Yes. The kernel should run with the corresponding U-Boot and Trusted Firmware.
If you were using the Poplar board, I think you can't load the kernel in this 
way now.

>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 7df79a7..7d90bf1 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -1,5 +1,9 @@
>>  Hisilicon Platforms Device Tree Bindings
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
> 
> Shouldn't this rather be "tocoding,poplar", "hisilicon,hi3798cv200"?
> 
Poplar was designed by HiSilicon and manufactured by Tocoding. I am not sure
what should be used here. I will discuss about this with our team. Thank you.

> linux-next.git already has Hi3660 here, so you'll need to rebase.
> 
Thanks for your information. I'll do when I prepare the new version patch.

> Also, theoretically bindings documentation should be in a separate,
> preceding patch.
> 
OK. I will seperate it from this patch.

>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
>> b/arch/arm64/boot/dts/hisilicon/Makefile
>> index c8b8f80..96202fe 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
> 
> Please keep this sorted alphabetically.
> 

You are right. Thank you.

>>  
>>  always  := $(dtb-y)
>>  subdir-y:= $(dts-dirs)
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
>> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> new file mode 100644
>> index 000..4e2b1d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> @@ -0,0 +1,169 @@
>> +/*
>> + * DTS File for HiSilicon Poplar Development Board
>> + *
>> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; with

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi Andreas,

On 2017/2/19 7:22, Andreas Färber wrote:
> Hi Jiancheng,
> 
> Am 09.02.2017 um 08:07 schrieb Jiancheng Xue:
>> Add basic dts files for hi3798cv200-poplar board. Poplar is the
>> first development board compliant with the 96Boards Enterprise
>> Edition TV Platform specification. The board features the
>> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
>> processor and high performance Mali T720 GPU.
>>
>> Signed-off-by: Jiancheng Xue 
>> Reviewed-by: Alex Elder 
> 
> Thanks for this patch! Some comments below. Do you have instructions for
> how to test? In my tries I so far only got resets like for example:
> 
> fastboot# bootm 0x0100 - 0x2000
> ## Booting kernel from Legacy Image at 0100 ...
>Image Name:   linux-next
>Image Type:   AArch64 Linux Kernel Image (uncompressed)
>Data Size:8741376 Bytes = 8.3 MiB
>Load Address: 0200
>Entry Point:  0200
> ## Flattened Device Tree blob at 2000
>Booting using the fdt blob at 0x2000
>Loading Kernel Image from 0x16777280 to 0x33554432 ... OK
> OK
> 
> Starting kernel ...
> 
> 
> *** irq: undefined instruction
> undefined instruction
> pc : [<61d3>]  lr : [<00c661ec>]
> sp : 00bfffb8  ip : 0036 fp : 
> r10:   r9 :  r8 : 
> r7 : 0080  r6 : 005fffc4 r5 : f36e6f75  r4 : 
> r3 : 001e  r2 : 0100 r1 :   r0 : 
> Flags: nzcv  IRQs off  FIQs off  Mode UK12_32
> Resetting CPU ...
> 
> resetting ...
> 
> Does U-Boot need to be updated for this to work?
> 
Yes. The kernel should run with the corresponding U-Boot and Trusted Firmware.
If you were using the Poplar board, I think you can't load the kernel in this 
way now.

>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 7df79a7..7d90bf1 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -1,5 +1,9 @@
>>  Hisilicon Platforms Device Tree Bindings
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
> 
> Shouldn't this rather be "tocoding,poplar", "hisilicon,hi3798cv200"?
> 
Poplar was designed by HiSilicon and manufactured by Tocoding. I am not sure
what should be used here. I will discuss about this with our team. Thank you.

> linux-next.git already has Hi3660 here, so you'll need to rebase.
> 
Thanks for your information. I'll do when I prepare the new version patch.

> Also, theoretically bindings documentation should be in a separate,
> preceding patch.
> 
OK. I will seperate it from this patch.

>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
>> b/arch/arm64/boot/dts/hisilicon/Makefile
>> index c8b8f80..96202fe 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
> 
> Please keep this sorted alphabetically.
> 

You are right. Thank you.

>>  
>>  always  := $(dtb-y)
>>  subdir-y:= $(dts-dirs)
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
>> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> new file mode 100644
>> index 000..4e2b1d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> @@ -0,0 +1,169 @@
>> +/*
>> + * DTS File for HiSilicon Poplar Development Board
>> + *
>> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or 

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi Rob,

On 2017/2/16 7:26, Rob Herring wrote:
> On Thu, Feb 09, 2017 at 03:07:07PM +0800, Jiancheng Xue wrote:
>> Add basic dts files for hi3798cv200-poplar board. Poplar is the
>> first development board compliant with the 96Boards Enterprise
>> Edition TV Platform specification. The board features the
>> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
>> processor and high performance Mali T720 GPU.
>>
>> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
>> Reviewed-by: Alex Elder <el...@linaro.org>
>> ---
>>  .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
>>  arch/arm64/boot/dts/hisilicon/Makefile |   1 +
>>  .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
>>  arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 
>> +
>>  4 files changed, 587 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 7df79a7..7d90bf1 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -1,5 +1,9 @@
>>  Hisilicon Platforms Device Tree Bindings
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
>> b/arch/arm64/boot/dts/hisilicon/Makefile
>> index c8b8f80..96202fe 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
>>  
>>  always  := $(dtb-y)
>>  subdir-y:= $(dts-dirs)
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
>> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> new file mode 100644
>> index 000..4e2b1d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> @@ -0,0 +1,169 @@
>> +/*
>> + * DTS File for HiSilicon Poplar Development Board
>> + *
>> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include 
>> +#include "hi3798cv200.dtsi"
>> +
>> +/ {
>> +model = "HiSilicon Poplar Development Board";
>> +compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
>> +aliases {
>> +serial0 = 
>> +};
>> +
>> +chosen {
>> +stdout-path = "serial0:115200n8";
>> +};
>> +
>> +memory {
> 
> memory@0 unless the base address is variable.
> 

Thanks for your comments. I'll change this in the next version.

>> +device_type = "memory";
>> +reg = <0x0 0x 0x 0x8000>;
>> +};
>> +
>> +soc {
>> +leds {
> 
> These aren't part of the SoC, but the board, so move up a level.
> 
OK.

>> +compatible = "gpio-leds";
>> +
>> +user-led0 {
>> +label = 

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi Rob,

On 2017/2/16 7:26, Rob Herring wrote:
> On Thu, Feb 09, 2017 at 03:07:07PM +0800, Jiancheng Xue wrote:
>> Add basic dts files for hi3798cv200-poplar board. Poplar is the
>> first development board compliant with the 96Boards Enterprise
>> Edition TV Platform specification. The board features the
>> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
>> processor and high performance Mali T720 GPU.
>>
>> Signed-off-by: Jiancheng Xue 
>> Reviewed-by: Alex Elder 
>> ---
>>  .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
>>  arch/arm64/boot/dts/hisilicon/Makefile |   1 +
>>  .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
>>  arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 
>> +
>>  4 files changed, 587 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
>> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 7df79a7..7d90bf1 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -1,5 +1,9 @@
>>  Hisilicon Platforms Device Tree Bindings
>>  
>> +Hi3798cv200 Poplar Board
>> +Required root node properties:
>> +- compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
>>  Hi4511 Board
>>  Required root node properties:
>>  - compatible = "hisilicon,hi3620-hi4511";
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
>> b/arch/arm64/boot/dts/hisilicon/Makefile
>> index c8b8f80..96202fe 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
>>  
>>  always  := $(dtb-y)
>>  subdir-y:= $(dts-dirs)
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
>> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> new file mode 100644
>> index 000..4e2b1d1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>> @@ -0,0 +1,169 @@
>> +/*
>> + * DTS File for HiSilicon Poplar Development Board
>> + *
>> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include 
>> +#include "hi3798cv200.dtsi"
>> +
>> +/ {
>> +model = "HiSilicon Poplar Development Board";
>> +compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
>> +
>> +aliases {
>> +serial0 = 
>> +};
>> +
>> +chosen {
>> +stdout-path = "serial0:115200n8";
>> +};
>> +
>> +memory {
> 
> memory@0 unless the base address is variable.
> 

Thanks for your comments. I'll change this in the next version.

>> +device_type = "memory";
>> +reg = <0x0 0x 0x 0x8000>;
>> +};
>> +
>> +soc {
>> +leds {
> 
> These aren't part of the SoC, but the board, so move up a level.
> 
OK.

>> +compatible = "gpio-leds";
>> +
>> +user-led0 {
>> +label = "USER-LED0";
>> +   

[PATCH v2 0/2] add basic SoC support for HiSilicon Hi3516CV300

[Jiancheng Xue]

Hi3516CV300 is a SoC designed for HD IP camera. It has an integrated ISP and
H.265 video compression encoder. This patch set is mainly used to add basic SoC
support for Hi3516CV300.

Pan Wen (2):
  arm: hisi: add ARCH_MULTI_V5 support
  arm: dts: hisi: add dts files for Hi3516CV300 demo board

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/hi3516cv300-demb.dts |  95 +
 arch/arm/boot/dts/hi3516cv300.dtsi | 362 +
 arch/arm/mach-hisi/Kconfig |  10 +-
 4 files changed, 462 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
 create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi

-- 
1.9.1

[PATCH v2 0/2] add basic SoC support for HiSilicon Hi3516CV300

[Jiancheng Xue]

Hi3516CV300 is a SoC designed for HD IP camera. It has an integrated ISP and
H.265 video compression encoder. This patch set is mainly used to add basic SoC
support for Hi3516CV300.

Pan Wen (2):
  arm: hisi: add ARCH_MULTI_V5 support
  arm: dts: hisi: add dts files for Hi3516CV300 demo board

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/hi3516cv300-demb.dts |  95 +
 arch/arm/boot/dts/hi3516cv300.dtsi | 362 +
 arch/arm/mach-hisi/Kconfig |  10 +-
 4 files changed, 462 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
 create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi

-- 
1.9.1

[PATCH v2 1/2] arm: hisi: add ARCH_MULTI_V5 support

[Jiancheng Xue]

From: Pan Wen 

Add support for some HiSilicon SoCs which depend on ARCH_MULTI_V5.

Signed-off-by: Pan Wen 
---

This patch is same as the first version.

 arch/arm/mach-hisi/Kconfig | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index a3b091a..03d8379 100644
--- a/arch/arm/mach-hisi/Kconfig
+++ b/arch/arm/mach-hisi/Kconfig
@@ -1,12 +1,14 @@
 config ARCH_HISI
bool "Hisilicon SoC Support"
-   depends on ARCH_MULTI_V7
select ARM_AMBA
-   select ARM_GIC
+   select ARM_GIC if ARCH_MULTI_V7
+   select ARM_VIC if ARCH_MULTI_V5
select ARM_TIMER_SP804
select POWER_RESET
select POWER_RESET_HISI
select POWER_SUPPLY
+   select PINCTRL
+   select PINCTRL_SINGLE
 
 if ARCH_HISI
 
@@ -18,8 +20,6 @@ config ARCH_HI3xxx
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
-   select PINCTRL
-   select PINCTRL_SINGLE
help
  Support for Hisilicon Hi36xx SoC family
 
@@ -48,8 +48,6 @@ config ARCH_HIX5HD2
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
-   select PINCTRL
-   select PINCTRL_SINGLE
help
  Support for Hisilicon HIX5HD2 SoC family
 endmenu
-- 
1.9.1

[PATCH v2 1/2] arm: hisi: add ARCH_MULTI_V5 support

[Jiancheng Xue]

From: Pan Wen 

Add support for some HiSilicon SoCs which depend on ARCH_MULTI_V5.

Signed-off-by: Pan Wen 
---

This patch is same as the first version.

 arch/arm/mach-hisi/Kconfig | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index a3b091a..03d8379 100644
--- a/arch/arm/mach-hisi/Kconfig
+++ b/arch/arm/mach-hisi/Kconfig
@@ -1,12 +1,14 @@
 config ARCH_HISI
bool "Hisilicon SoC Support"
-   depends on ARCH_MULTI_V7
select ARM_AMBA
-   select ARM_GIC
+   select ARM_GIC if ARCH_MULTI_V7
+   select ARM_VIC if ARCH_MULTI_V5
select ARM_TIMER_SP804
select POWER_RESET
select POWER_RESET_HISI
select POWER_SUPPLY
+   select PINCTRL
+   select PINCTRL_SINGLE
 
 if ARCH_HISI
 
@@ -18,8 +20,6 @@ config ARCH_HI3xxx
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
-   select PINCTRL
-   select PINCTRL_SINGLE
help
  Support for Hisilicon Hi36xx SoC family
 
@@ -48,8 +48,6 @@ config ARCH_HIX5HD2
select CACHE_L2X0
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
-   select PINCTRL
-   select PINCTRL_SINGLE
help
  Support for Hisilicon HIX5HD2 SoC family
 endmenu
-- 
1.9.1

[PATCH v2 2/2] arm: dts: hisi: add dts files for Hi3516CV300 demo board

[Jiancheng Xue]

From: Pan Wen <wen...@hisilicon.com>

Add dts files for Hi3516CV300 demo board.

Signed-off-by: Pan Wen <wen...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
---
ChangeLog:
1. removed i2c and pwm nodes because the drivers were not merged.
2. removed some unused alias and properties.

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/hi3516cv300-demb.dts |  95 +
 arch/arm/boot/dts/hi3516cv300.dtsi | 362 +
 3 files changed, 458 insertions(+)
 create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
 create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 01d178a..69497ad 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -178,6 +178,7 @@ dtb-$(CONFIG_ARCH_HIP01) += \
 dtb-$(CONFIG_ARCH_HIP04) += \
hip04-d01.dtb
 dtb-$(CONFIG_ARCH_HISI) += \
+   hi3516cv300-demb.dtb \
hi3519-demb.dtb
 dtb-$(CONFIG_ARCH_HIX5HD2) += \
hisi-x5hd2-dkb.dtb
diff --git a/arch/arm/boot/dts/hi3516cv300-demb.dts 
b/arch/arm/boot/dts/hi3516cv300-demb.dts
new file mode 100644
index 000..b0e980b
--- /dev/null
+++ b/arch/arm/boot/dts/hi3516cv300-demb.dts
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+
+/dts-v1/;
+#include "hi3516cv300.dtsi"
+
+/ {
+   model = "Hisilicon Hi3516CV300 DEMO Board";
+   compatible = "hisilicon,hi3516cv300-demb", "hisilicon,hi3516cv300";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x1000>;
+   };
+};
+
+_timer0 {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+_bus1 {
+   status = "okay";
+   num-cs = <2>;
+   cs-gpios = <_chip5 3 0>, <_chip5 4 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pmux>;
+};
+
+ {
+   spi-nor@0 {
+   compatible = "jedec,spi-nor";
+   reg = <0>;
+   spi-max-frequency = <16000>;
+   m25p,fast-read;
+   };
+};
+
+ {
+   phy0: phy@1 {
+   reg = <1>;
+   };
+};
+
+_femac {
+   phy-mode = "rmii";
+   phy-handle = <>;
+   hisilicon,phy-reset-delays-us = <1 1 15>;
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   spi1_pmux: spi1_pmux {
+   pinctrl-single,pins = <
+   0xc4 0x1
+   0xc8 0x1
+   0xcc 0x1
+   0xd0 0x1
+   0xd4 0x1>;
+   };
+};
diff --git a/arch/arm/boot/dts/hi3516cv300.dtsi 
b/arch/arm/boot/dts/hi3516cv300.dtsi
new file mode 100644
index 000..5132cfe
--- /dev/null
+++ b/arch/arm/boot/dts/hi3516cv300.dtsi
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include 
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "arm,arm926ej-s";
+   device_type = "cpu";
+   reg = <0>;
+  

[PATCH v2 2/2] arm: dts: hisi: add dts files for Hi3516CV300 demo board

[Jiancheng Xue]

From: Pan Wen 

Add dts files for Hi3516CV300 demo board.

Signed-off-by: Pan Wen 
Signed-off-by: Jiancheng Xue 
---
ChangeLog:
1. removed i2c and pwm nodes because the drivers were not merged.
2. removed some unused alias and properties.

 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/hi3516cv300-demb.dts |  95 +
 arch/arm/boot/dts/hi3516cv300.dtsi | 362 +
 3 files changed, 458 insertions(+)
 create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
 create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 01d178a..69497ad 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -178,6 +178,7 @@ dtb-$(CONFIG_ARCH_HIP01) += \
 dtb-$(CONFIG_ARCH_HIP04) += \
hip04-d01.dtb
 dtb-$(CONFIG_ARCH_HISI) += \
+   hi3516cv300-demb.dtb \
hi3519-demb.dtb
 dtb-$(CONFIG_ARCH_HIX5HD2) += \
hisi-x5hd2-dkb.dtb
diff --git a/arch/arm/boot/dts/hi3516cv300-demb.dts 
b/arch/arm/boot/dts/hi3516cv300-demb.dts
new file mode 100644
index 000..b0e980b
--- /dev/null
+++ b/arch/arm/boot/dts/hi3516cv300-demb.dts
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+
+/dts-v1/;
+#include "hi3516cv300.dtsi"
+
+/ {
+   model = "Hisilicon Hi3516CV300 DEMO Board";
+   compatible = "hisilicon,hi3516cv300-demb", "hisilicon,hi3516cv300";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x1000>;
+   };
+};
+
+_timer0 {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+_bus1 {
+   status = "okay";
+   num-cs = <2>;
+   cs-gpios = <_chip5 3 0>, <_chip5 4 0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pmux>;
+};
+
+ {
+   spi-nor@0 {
+   compatible = "jedec,spi-nor";
+   reg = <0>;
+   spi-max-frequency = <16000>;
+   m25p,fast-read;
+   };
+};
+
+ {
+   phy0: phy@1 {
+   reg = <1>;
+   };
+};
+
+_femac {
+   phy-mode = "rmii";
+   phy-handle = <>;
+   hisilicon,phy-reset-delays-us = <1 1 15>;
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   spi1_pmux: spi1_pmux {
+   pinctrl-single,pins = <
+   0xc4 0x1
+   0xc8 0x1
+   0xcc 0x1
+   0xd0 0x1
+   0xd4 0x1>;
+   };
+};
diff --git a/arch/arm/boot/dts/hi3516cv300.dtsi 
b/arch/arm/boot/dts/hi3516cv300.dtsi
new file mode 100644
index 000..5132cfe
--- /dev/null
+++ b/arch/arm/boot/dts/hi3516cv300.dtsi
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include 
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   compatible = "arm,arm926ej-s";
+   device_type = "cpu";
+   reg = <0>;
+   };
+   };
+
+   vic: interrupt-controller@1004 {
+   compatibl

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi,

On 2017/2/9 15:07, Jiancheng Xue wrote:
> Add basic dts files for hi3798cv200-poplar board. Poplar is the
> first development board compliant with the 96Boards Enterprise
> Edition TV Platform specification. The board features the
> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
> processor and high performance Mali T720 GPU.
> 
> Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
> Reviewed-by: Alex Elder <el...@linaro.org>
> ---

I found a few issues by myself. I will update a new version after you finish 
the review.

>  .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
>  arch/arm64/boot/dts/hisilicon/Makefile |   1 +
>  .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
>  arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 
> +
>  4 files changed, 587 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
> 
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> index 7df79a7..7d90bf1 100644
> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> @@ -1,5 +1,9 @@
>  Hisilicon Platforms Device Tree Bindings
>  
> +Hi3798cv200 Poplar Board
> +Required root node properties:
> + - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> +
>  Hi4511 Board
>  Required root node properties:
>   - compatible = "hisilicon,hi3620-hi4511";
> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
> b/arch/arm64/boot/dts/hisilicon/Makefile
> index c8b8f80..96202fe 100644
> --- a/arch/arm64/boot/dts/hisilicon/Makefile
> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
>  
>  always   := $(dtb-y)
>  subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
> new file mode 100644
> index 000..4e2b1d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
> @@ -0,0 +1,169 @@
> +/*
> + * DTS File for HiSilicon Poplar Development Board
> + *
> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include "hi3798cv200.dtsi"
> +
> +/ {
> + model = "HiSilicon Poplar Development Board";
> + compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> +
> + aliases {
> + serial0 = 
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x 0x 0x8000>;
> + };
> +
> + soc {
> + leds {
> + compatible = "gpio-leds";
> +
> + user-led0 {
> + label = "USER-LED0";
> + gpios = < 3 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + user-led1 {
> + label = "USER-LED1";
> + gpios = < 1 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "mmc0";
> +

Re: [PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Hi,

On 2017/2/9 15:07, Jiancheng Xue wrote:
> Add basic dts files for hi3798cv200-poplar board. Poplar is the
> first development board compliant with the 96Boards Enterprise
> Edition TV Platform specification. The board features the
> Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
> processor and high performance Mali T720 GPU.
> 
> Signed-off-by: Jiancheng Xue 
> Reviewed-by: Alex Elder 
> ---

I found a few issues by myself. I will update a new version after you finish 
the review.

>  .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
>  arch/arm64/boot/dts/hisilicon/Makefile |   1 +
>  .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
>  arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 
> +
>  4 files changed, 587 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
> 
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> index 7df79a7..7d90bf1 100644
> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
> @@ -1,5 +1,9 @@
>  Hisilicon Platforms Device Tree Bindings
>  
> +Hi3798cv200 Poplar Board
> +Required root node properties:
> + - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> +
>  Hi4511 Board
>  Required root node properties:
>   - compatible = "hisilicon,hi3620-hi4511";
> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
> b/arch/arm64/boot/dts/hisilicon/Makefile
> index c8b8f80..96202fe 100644
> --- a/arch/arm64/boot/dts/hisilicon/Makefile
> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
> +dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
>  
>  always   := $(dtb-y)
>  subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
> b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
> new file mode 100644
> index 000..4e2b1d1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
> @@ -0,0 +1,169 @@
> +/*
> + * DTS File for HiSilicon Poplar Development Board
> + *
> + * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include "hi3798cv200.dtsi"
> +
> +/ {
> + model = "HiSilicon Poplar Development Board";
> + compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
> +
> + aliases {
> + serial0 = 
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x 0x 0x8000>;
> + };
> +
> + soc {
> + leds {
> + compatible = "gpio-leds";
> +
> + user-led0 {
> + label = "USER-LED0";
> + gpios = < 3 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + user-led1 {
> + label = "USER-LED1";
> + gpios = < 1 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };

[PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
Edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Reviewed-by: Alex Elder <el...@linaro.org>
---
 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 +
 4 files changed, 587 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 7df79a7..7d90bf1 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -1,5 +1,9 @@
 Hisilicon Platforms Device Tree Bindings
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c8b8f80..96202fe 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..4e2b1d1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,169 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x 0x8000>;
+   };
+
+   soc {
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";

[PATCH] arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board

[Jiancheng Xue]

Add basic dts files for hi3798cv200-poplar board. Poplar is the
first development board compliant with the 96Boards Enterprise
Edition TV Platform specification. The board features the
Hi3798CV200 with an integrated quad-core 64-bit ARM Cortex A53
processor and high performance Mali T720 GPU.

Signed-off-by: Jiancheng Xue 
Reviewed-by: Alex Elder 
---
 .../bindings/arm/hisilicon/hisilicon.txt   |   4 +
 arch/arm64/boot/dts/hisilicon/Makefile |   1 +
 .../boot/dts/hisilicon/hi3798cv200-poplar.dts  | 169 +
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 413 +
 4 files changed, 587 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt 
b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 7df79a7..7d90bf1 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -1,5 +1,9 @@
 Hisilicon Platforms Device Tree Bindings
 
+Hi3798cv200 Poplar Board
+Required root node properties:
+   - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
 Hi4511 Board
 Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index c8b8f80..96202fe 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi3798cv200-poplar.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
new file mode 100644
index 000..4e2b1d1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
@@ -0,0 +1,169 @@
+/*
+ * DTS File for HiSilicon Poplar Development Board
+ *
+ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+
+#include 
+#include "hi3798cv200.dtsi"
+
+/ {
+   model = "HiSilicon Poplar Development Board";
+   compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x 0x 0x8000>;
+   };
+
+   soc {
+   leds {
+   compatible = "gpio-leds";
+
+   user-led0 {
+   label = "USER-LED0";
+   gpios = < 3 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+
+   user-led1 {
+   label = "USER-LED1";
+   gpios = < 1 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "mmc0";
+   default-state = "off";
+   };
+
+   user-led2 {
+   label = "USER-LED2";
+   gpios = < 2 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "none";
+   default-state = "off";
+   };
+
+   user-led3 {
+   label = "USER-LED3";
+   gpios = < 6 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "cpu0";
+   default-state = &quo

Re: [PATCH 1/3] arm: hisi: add ARCH_MULTI_V5 support

[Jiancheng Xue]

On 2016/12/15 4:06, Marty Plummer wrote:
> On 12/12/2016 01:11 AM, Jiancheng Xue wrote:
>>
>>
>> On 2016/12/9 23:07, Marty Plummer wrote:
>>> On 12/04/2016 08:03 PM, Jiancheng Xue wrote:
>>>> Hi Arnd,
>>>>
>>>> On 2016/10/17 21:48, Arnd Bergmann wrote:
>>>>> On Monday, October 17, 2016 8:07:03 PM CEST Pan Wen wrote:
>>>>>> Add support for some HiSilicon SoCs which depend on ARCH_MULTI_V5.
>>>>>>
>>>>>> Signed-off-by: Pan Wen <wen...@hisilicon.com>
>>>>>>
>>>>>
>>>>> Looks ok. I've added Marty Plummer to Cc, he was recently proposing
>>>>> patches for Hi3520, which I think is closely related to this one.
>>>>> Please try to work together so the patches don't conflict. It should
>>>>> be fairly straightforward since you are basically doing the same
>>>>> change here.
>>>>>
>>>> Marty hasn't give any replies about this thread until now. I reviewed
>>>> the patch for Hi3520. And I think this patch won't conflict with Hi3520.
>>>> Could you help us to ack this patch?
>>>>
>>>> Thanks,
>>>> Jiancheng
>>>>
>>>>
>>> Hello all
>>>
>>> Sorry for my lack of activity, I've just been very busy lately with real
>>> world considerations (well, real world but related to this; I have
>>> another board based on hi3521a I've been tinkering with, trying to get
>>> the manuf. to release gpl source via the sfconfservancy). I've not given
>>> up on the project, however, since devices like this really need updates
>>> in light of the recent botnets targeting devices of this sort as
>>> manpower.
>>
>> Do you have any objections to this patch?  If not, I hope this patch can
>> be merged in 4.10.  Thank you.
>>
>> Regards,
>> Jiancheng
>>
>>
>>
> I have no objections. It looks like it might make my job a bit easier in
> the end. I need to go ahead and rebase my patches anyways and fix up
> earlier concerns raised about them, so go right ahead.
> 
Hi Arnd,

Could this patch be accepted?  Any further comments will be appreciated.

Regards,
Jiancheng

Re: [PATCH 1/3] arm: hisi: add ARCH_MULTI_V5 support

[Jiancheng Xue]

On 2016/12/15 4:06, Marty Plummer wrote:
> On 12/12/2016 01:11 AM, Jiancheng Xue wrote:
>>
>>
>> On 2016/12/9 23:07, Marty Plummer wrote:
>>> On 12/04/2016 08:03 PM, Jiancheng Xue wrote:
>>>> Hi Arnd,
>>>>
>>>> On 2016/10/17 21:48, Arnd Bergmann wrote:
>>>>> On Monday, October 17, 2016 8:07:03 PM CEST Pan Wen wrote:
>>>>>> Add support for some HiSilicon SoCs which depend on ARCH_MULTI_V5.
>>>>>>
>>>>>> Signed-off-by: Pan Wen 
>>>>>>
>>>>>
>>>>> Looks ok. I've added Marty Plummer to Cc, he was recently proposing
>>>>> patches for Hi3520, which I think is closely related to this one.
>>>>> Please try to work together so the patches don't conflict. It should
>>>>> be fairly straightforward since you are basically doing the same
>>>>> change here.
>>>>>
>>>> Marty hasn't give any replies about this thread until now. I reviewed
>>>> the patch for Hi3520. And I think this patch won't conflict with Hi3520.
>>>> Could you help us to ack this patch?
>>>>
>>>> Thanks,
>>>> Jiancheng
>>>>
>>>>
>>> Hello all
>>>
>>> Sorry for my lack of activity, I've just been very busy lately with real
>>> world considerations (well, real world but related to this; I have
>>> another board based on hi3521a I've been tinkering with, trying to get
>>> the manuf. to release gpl source via the sfconfservancy). I've not given
>>> up on the project, however, since devices like this really need updates
>>> in light of the recent botnets targeting devices of this sort as
>>> manpower.
>>
>> Do you have any objections to this patch?  If not, I hope this patch can
>> be merged in 4.10.  Thank you.
>>
>> Regards,
>> Jiancheng
>>
>>
>>
> I have no objections. It looks like it might make my job a bit easier in
> the end. I need to go ahead and rebase my patches anyways and fix up
> earlier concerns raised about them, so go right ahead.
> 
Hi Arnd,

Could this patch be accepted?  Any further comments will be appreciated.

Regards,
Jiancheng

Re: [PATCH] adc: add adc driver for Hisilicon BVT SOCs

[Jiancheng Xue]

On 2016/12/24 9:54, Allen Liu wrote:
> Add ADC driver for the ADC controller found on HiSilicon BVT SOCs, like 
> Hi3516CV300, etc.
> The ADC controller is primarily in charge of detecting voltage.
> 
> Reviewed-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Hi

Sorry. I haven't reviewed this patch. Please remove this line. Thank you!

Regards,
Jiancheng

> Signed-off-by: Allen Liu <liurenzh...@hisilicon.com>
> ---
>  .../devicetree/bindings/iio/adc/hibvt-lsadc.txt|  26 ++
>  drivers/iio/adc/Kconfig|  10 +
>  drivers/iio/adc/Makefile   |   1 +
>  drivers/iio/adc/hibvt_lsadc.c  | 344 
> +
>  4 files changed, 381 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
>  create mode 100644 drivers/iio/adc/hibvt_lsadc.c
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt 
> b/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
> new file mode 100644
> index 000..63de46e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
> @@ -0,0 +1,26 @@
> +Hisilicon BVT Low Speed (LS) A/D Converter bindings
> +
> +Required properties:
> +- compatible: should be "hisilicon,-lsadc"
> +   - "hisilicon,hibvt-lsadc": for hi3516cv300
> +
> +- reg: physical base address of the controller and length of memory mapped
> +   region.
> +- interrupts: The interrupt number to the cpu. The interrupt specifier format
> +  depends on the interrupt controller.
> +- #io-channel-cells: Should be 1, see ../iio-bindings.txt
> +
> +Optional properties:
> +- resets: Must contain an entry for each entry in reset-names if need support
> +   this option. See ../reset/reset.txt for details.
> +- reset-names: Must include the name "saradc-apb".
> +
> +Example:
> + lsadc: hibvt-lsadc@120e {
> + compatible = "hisilicon,hibvt-lsadc";
> + reg = <0x120e 0x1000>;
> + interrupts = <19>;
> + resets = < 0x7c 3>;
> + reset-names = "lsadc-crg";
> + status = "disabled";
> + };
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 99c0514..0443f51 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -225,6 +225,16 @@ config HI8435
> This driver can also be built as a module. If so, the module will be
> called hi8435.
>  
> +config HIBVT_LSADC
> + tristate "HIBVT LSADC driver"
> + depends on ARCH_HISI || COMPILE_TEST
> + help
> +   Say yes here to build support for the LSADC found in SoCs from
> +   hisilicon BVT chip.
> +
> +   To compile this driver as a module, choose M here: the
> +   module will be called hibvt_lsadc.
> +
>  config INA2XX_ADC
>   tristate "Texas Instruments INA2xx Power Monitors IIO driver"
>   depends on I2C && !SENSORS_INA2XX
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 7a40c04..6554d92 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
>  obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
>  obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
>  obj-$(CONFIG_HI8435) += hi8435.o
> +obj-$(CONFIG_HIBVT_LSADC) += hibvt_lsadc.o
>  obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
>  obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
>  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> diff --git a/drivers/iio/adc/hibvt_lsadc.c b/drivers/iio/adc/hibvt_lsadc.c
> new file mode 100644
> index 000..a20afe8
> --- /dev/null
> +++ b/drivers/iio/adc/hibvt_lsadc.c
> @@ -0,0 +1,344 @@
> +/*
> + * Hisilicon BVT Low Speed (LS) A/D Converter
> + * Copyright (C) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#i

Re: [PATCH] adc: add adc driver for Hisilicon BVT SOCs

[Jiancheng Xue]

On 2016/12/24 9:54, Allen Liu wrote:
> Add ADC driver for the ADC controller found on HiSilicon BVT SOCs, like 
> Hi3516CV300, etc.
> The ADC controller is primarily in charge of detecting voltage.
> 
> Reviewed-by: Jiancheng Xue 
Hi

Sorry. I haven't reviewed this patch. Please remove this line. Thank you!

Regards,
Jiancheng

> Signed-off-by: Allen Liu 
> ---
>  .../devicetree/bindings/iio/adc/hibvt-lsadc.txt|  26 ++
>  drivers/iio/adc/Kconfig|  10 +
>  drivers/iio/adc/Makefile   |   1 +
>  drivers/iio/adc/hibvt_lsadc.c  | 344 
> +
>  4 files changed, 381 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
>  create mode 100644 drivers/iio/adc/hibvt_lsadc.c
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt 
> b/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
> new file mode 100644
> index 000..63de46e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/hibvt-lsadc.txt
> @@ -0,0 +1,26 @@
> +Hisilicon BVT Low Speed (LS) A/D Converter bindings
> +
> +Required properties:
> +- compatible: should be "hisilicon,-lsadc"
> +   - "hisilicon,hibvt-lsadc": for hi3516cv300
> +
> +- reg: physical base address of the controller and length of memory mapped
> +   region.
> +- interrupts: The interrupt number to the cpu. The interrupt specifier format
> +  depends on the interrupt controller.
> +- #io-channel-cells: Should be 1, see ../iio-bindings.txt
> +
> +Optional properties:
> +- resets: Must contain an entry for each entry in reset-names if need support
> +   this option. See ../reset/reset.txt for details.
> +- reset-names: Must include the name "saradc-apb".
> +
> +Example:
> + lsadc: hibvt-lsadc@120e {
> + compatible = "hisilicon,hibvt-lsadc";
> + reg = <0x120e 0x1000>;
> + interrupts = <19>;
> + resets = < 0x7c 3>;
> + reset-names = "lsadc-crg";
> + status = "disabled";
> + };
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 99c0514..0443f51 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -225,6 +225,16 @@ config HI8435
> This driver can also be built as a module. If so, the module will be
> called hi8435.
>  
> +config HIBVT_LSADC
> + tristate "HIBVT LSADC driver"
> + depends on ARCH_HISI || COMPILE_TEST
> + help
> +   Say yes here to build support for the LSADC found in SoCs from
> +   hisilicon BVT chip.
> +
> +   To compile this driver as a module, choose M here: the
> +   module will be called hibvt_lsadc.
> +
>  config INA2XX_ADC
>   tristate "Texas Instruments INA2xx Power Monitors IIO driver"
>   depends on I2C && !SENSORS_INA2XX
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 7a40c04..6554d92 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
>  obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
>  obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
>  obj-$(CONFIG_HI8435) += hi8435.o
> +obj-$(CONFIG_HIBVT_LSADC) += hibvt_lsadc.o
>  obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
>  obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
>  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> diff --git a/drivers/iio/adc/hibvt_lsadc.c b/drivers/iio/adc/hibvt_lsadc.c
> new file mode 100644
> index 000..a20afe8
> --- /dev/null
> +++ b/drivers/iio/adc/hibvt_lsadc.c
> @@ -0,0 +1,344 @@
> +/*
> + * Hisilicon BVT Low Speed (LS) A/D Converter
> + * Copyright (C) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* hisilicon bvt adc registers definitio

Re: [PATCH 3/3] dts: hisi: add dts files for Hi3516CV300 demo board

[Jiancheng Xue]

On 2016/10/17 20:07, Pan Wen wrote:
> Add dts files for Hi3516CV300 demo board.
> 
> Signed-off-by: Pan Wen 
> ---

Could you help to review this patch, please?

>  arch/arm/boot/dts/Makefile |   1 +
>  arch/arm/boot/dts/hi3516cv300-demb.dts | 148 
>  arch/arm/boot/dts/hi3516cv300.dtsi | 397 
> +
>  3 files changed, 546 insertions(+)
>  create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
>  create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index befcd26..1f25530 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_HIP01) += \
>  dtb-$(CONFIG_ARCH_HIP04) += \
>   hip04-d01.dtb
>  dtb-$(CONFIG_ARCH_HISI) += \
> + hi3516cv300-demb.dtb \
>   hi3519-demb.dtb
>  dtb-$(CONFIG_ARCH_HIX5HD2) += \
>   hisi-x5hd2-dkb.dtb
> diff --git a/arch/arm/boot/dts/hi3516cv300-demb.dts 
> b/arch/arm/boot/dts/hi3516cv300-demb.dts
> new file mode 100644
> index 000..6a75cd6
> --- /dev/null
> +++ b/arch/arm/boot/dts/hi3516cv300-demb.dts
> @@ -0,0 +1,148 @@
> +/*
> + * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute  it and/or modify it
> + * under  the terms of  the GNU General Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + *
> + */
> +
> +
> +/dts-v1/;
> +#include "hi3516cv300.dtsi"
> +
> +/ {
> + model = "Hisilicon Hi3516CV300 DEMO Board";
> + compatible = "hisilicon,hi3516cv300";
> +
> + aliases {
> + serial0 = 
> + serial1 = 
> + serial2 = 
> + i2c0 = _bus0;
> + i2c1 = _bus1;
> + spi0 = _bus0;
> + spi1 = _bus1;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x8000 0x1000>;
> + };
> +};
> +
> +_timer0 {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> +_bus0 {
> + status = "okay";
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus1 {
> + status = "okay";
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus0{
> + status = "disabled";
> + num-cs = <1>;
> + cs-gpios = <_chip0 6 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus1{
> + status = "okay";
> + num-cs = <2>;
> + cs-gpios = <_chip5 3 0>, <_chip5 4 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> + {
> + spi-nor@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <16000>;
> + m25p,fast-read;
> + };
> +};
> +
> + {
> + phy0: phy@1 {
> + reg = <1>;
> + };
> +};
> +
> +_femac {
> + mac-address = [00 00 00 00 00 00];
> + phy-mode = "rmii";
> + phy-handle = <>;
> + hisilicon,phy-reset-delays-us = <1 1 15>;
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + i2c0_pmux: i2c0_pmux {
> + pinctrl-single,pins = <
> + 0x2c 0x3
> + 0x30 0x3>;
> + };
> +
> + i2c1_pmux: i2c1_pmux {
> + pinctrl-single,pins = <
> + 0x20 0x1
> + 0x24 0x1>;
> + };
> +
> + spi0_pmux: spi0_pmux {
> + pinctrl-single,pins = <
> + 0x28 0x1
> + 0x2c 0x1
> + 0x30 0x1
> + 0x34 0x1>;
> + };
> +
> + spi1_pmux: spi1_pmux {
> + pinctrl-single,pins = <
> + 0xc4 0x1
> + 0xc8 0x1
> + 0xcc 0x1
> + 0xd0 0x1
> + 0xd4 0x1>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/hi3516cv300.dtsi 
> b/arch/arm/boot/dts/hi3516cv300.dtsi
> new file mode 100644
> index 000..1da41ab
> --- /dev/null
> +++ b/arch/arm/boot/dts/hi3516cv300.dtsi
> @@ -0,0 +1,397 @@
> +/*
> + * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you 

Re: [PATCH 3/3] dts: hisi: add dts files for Hi3516CV300 demo board

[Jiancheng Xue]

On 2016/10/17 20:07, Pan Wen wrote:
> Add dts files for Hi3516CV300 demo board.
> 
> Signed-off-by: Pan Wen 
> ---

Could you help to review this patch, please?

>  arch/arm/boot/dts/Makefile |   1 +
>  arch/arm/boot/dts/hi3516cv300-demb.dts | 148 
>  arch/arm/boot/dts/hi3516cv300.dtsi | 397 
> +
>  3 files changed, 546 insertions(+)
>  create mode 100644 arch/arm/boot/dts/hi3516cv300-demb.dts
>  create mode 100644 arch/arm/boot/dts/hi3516cv300.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index befcd26..1f25530 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_HIP01) += \
>  dtb-$(CONFIG_ARCH_HIP04) += \
>   hip04-d01.dtb
>  dtb-$(CONFIG_ARCH_HISI) += \
> + hi3516cv300-demb.dtb \
>   hi3519-demb.dtb
>  dtb-$(CONFIG_ARCH_HIX5HD2) += \
>   hisi-x5hd2-dkb.dtb
> diff --git a/arch/arm/boot/dts/hi3516cv300-demb.dts 
> b/arch/arm/boot/dts/hi3516cv300-demb.dts
> new file mode 100644
> index 000..6a75cd6
> --- /dev/null
> +++ b/arch/arm/boot/dts/hi3516cv300-demb.dts
> @@ -0,0 +1,148 @@
> +/*
> + * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute  it and/or modify it
> + * under  the terms of  the GNU General Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + *
> + */
> +
> +
> +/dts-v1/;
> +#include "hi3516cv300.dtsi"
> +
> +/ {
> + model = "Hisilicon Hi3516CV300 DEMO Board";
> + compatible = "hisilicon,hi3516cv300";
> +
> + aliases {
> + serial0 = 
> + serial1 = 
> + serial2 = 
> + i2c0 = _bus0;
> + i2c1 = _bus1;
> + spi0 = _bus0;
> + spi1 = _bus1;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x8000 0x1000>;
> + };
> +};
> +
> +_timer0 {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> +_bus0 {
> + status = "okay";
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus1 {
> + status = "okay";
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus0{
> + status = "disabled";
> + num-cs = <1>;
> + cs-gpios = <_chip0 6 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> +_bus1{
> + status = "okay";
> + num-cs = <2>;
> + cs-gpios = <_chip5 3 0>, <_chip5 4 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_pmux>;
> +};
> +
> + {
> + spi-nor@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <16000>;
> + m25p,fast-read;
> + };
> +};
> +
> + {
> + phy0: phy@1 {
> + reg = <1>;
> + };
> +};
> +
> +_femac {
> + mac-address = [00 00 00 00 00 00];
> + phy-mode = "rmii";
> + phy-handle = <>;
> + hisilicon,phy-reset-delays-us = <1 1 15>;
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + i2c0_pmux: i2c0_pmux {
> + pinctrl-single,pins = <
> + 0x2c 0x3
> + 0x30 0x3>;
> + };
> +
> + i2c1_pmux: i2c1_pmux {
> + pinctrl-single,pins = <
> + 0x20 0x1
> + 0x24 0x1>;
> + };
> +
> + spi0_pmux: spi0_pmux {
> + pinctrl-single,pins = <
> + 0x28 0x1
> + 0x2c 0x1
> + 0x30 0x1
> + 0x34 0x1>;
> + };
> +
> + spi1_pmux: spi1_pmux {
> + pinctrl-single,pins = <
> + 0xc4 0x1
> + 0xc8 0x1
> + 0xcc 0x1
> + 0xd0 0x1
> + 0xd4 0x1>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/hi3516cv300.dtsi 
> b/arch/arm/boot/dts/hi3516cv300.dtsi
> new file mode 100644
> index 000..1da41ab
> --- /dev/null
> +++ b/arch/arm/boot/dts/hi3516cv300.dtsi
> @@ -0,0 +1,397 @@
> +/*
> + * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute  it