[PATCH v1 2/3] drm/msm/disp/dpu1: add vsync and underrun irqs for INTF_5
INTF_5 is used by EDP panel in SC7280 target. Add vsync
and underrun irqs needed by INTF_5 to dpu irq map.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 72cdaf8..a37928b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -69,10 +69,12 @@
#define DPU_INTR_INTF_1_UNDERRUN BIT(26)
#define DPU_INTR_INTF_2_UNDERRUN BIT(28)
#define DPU_INTR_INTF_3_UNDERRUN BIT(30)
+#define DPU_INTR_INTF_5_UNDERRUN BIT(22)
#define DPU_INTR_INTF_0_VSYNC BIT(25)
#define DPU_INTR_INTF_1_VSYNC BIT(27)
#define DPU_INTR_INTF_2_VSYNC BIT(29)
#define DPU_INTR_INTF_3_VSYNC BIT(31)
+#define DPU_INTR_INTF_5_VSYNC BIT(23)
/**
* Pingpong Secondary interrupt status bit definitions
@@ -308,7 +310,10 @@ static const struct dpu_irq_type dpu_irq_map[] = {
{ DPU_IRQ_TYPE_INTF_VSYNC, INTF_2, DPU_INTR_INTF_2_VSYNC, 0},
{ DPU_IRQ_TYPE_INTF_UNDER_RUN, INTF_3, DPU_INTR_INTF_3_UNDERRUN, 0},
{ DPU_IRQ_TYPE_INTF_VSYNC, INTF_3, DPU_INTR_INTF_3_VSYNC, 0},
- /* irq_idx:32-63 */
+ /* irq_idx:32-33 */
+ { DPU_IRQ_TYPE_INTF_UNDER_RUN, INTF_5, DPU_INTR_INTF_5_UNDERRUN, 0},
+ { DPU_IRQ_TYPE_INTF_VSYNC, INTF_5, DPU_INTR_INTF_5_VSYNC, 0},
+ /* irq_idx:34-63 */
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
--
2.7.4
[PATCH v1 1/3] drm/msm/disp/dpu1: increase the range of interrupts in dpu_irq_map
Currently, each register in the dpu interrupt set is allowed
to have a maximum of 32 interrupts. With the introduction
of INTF_5_VSYNC and INTF_5_UNDERRUN irqs for EDP panel,
the total number of interrupts under INTR_STATUS register
in dpu_irq_map will exceed 32. Increase the range of each
interrupt register to 64 to handle this.
This patch has dependency on the below series:
https://patchwork.kernel.org/project/linux-arm-msm/list/?series=461193
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 755 +++---
1 file changed, 661 insertions(+), 94 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 5c521de..72cdaf8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -308,24 +308,56 @@ static const struct dpu_irq_type dpu_irq_map[] = {
{ DPU_IRQ_TYPE_INTF_VSYNC, INTF_2, DPU_INTR_INTF_2_VSYNC, 0},
{ DPU_IRQ_TYPE_INTF_UNDER_RUN, INTF_3, DPU_INTR_INTF_3_UNDERRUN, 0},
{ DPU_IRQ_TYPE_INTF_VSYNC, INTF_3, DPU_INTR_INTF_3_VSYNC, 0},
-
- /* BEGIN MAP_RANGE: 32-64, INTR2 */
- /* irq_idx: 32-35 */
+ /* irq_idx:32-63 */
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ { DPU_IRQ_TYPE_RESERVED, 0, 0, 0},
+ /* BEGIN MAP_RANGE: 64-95, INTR2 */
+ /* irq_idx: 64-67 */
{ DPU_IRQ_TYPE_PING_PONG_AUTO_REF, PINGPONG_S0,
DPU_INTR_PING_PONG_S0_AUTOREFRESH_DONE, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
- /* irq_idx: 36-39 */
+ /* irq_idx: 68-71 */
{ DPU_IRQ_TYPE_PING_PONG_WR_PTR, PINGPONG_S0,
DPU_INTR_PING_PONG_S0_WR_PTR, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
- /* irq_idx: 40 */
+ /* irq_idx: 72 */
{ DPU_IRQ_TYPE_PING_PONG_RD_PTR, PINGPONG_S0,
DPU_INTR_PING_PONG_S0_RD_PTR, 1},
- /* irq_idx: 41-45 */
+ /* irq_idx: 73-77 */
{ DPU_IRQ_TYPE_CTL_START, CTL_0,
DPU_INTR_CTL_0_START, 1},
{ DPU_IRQ_TYPE_CTL_START, CTL_1,
@@ -336,10 +368,10 @@ static const struct dpu_irq_type dpu_irq_map[] = {
DPU_INTR_CTL_3_START, 1},
{ DPU_IRQ_TYPE_CTL_START, CTL_4,
DPU_INTR_CTL_4_START, 1},
- /* irq_idx: 46-47 */
+ /* irq_idx: 78-79 */
{ DPU_IRQ_TYPE_CWB_OVERFLOW, CWB_2, DPU_INTR_CWB_2_OVERFLOW, 1},
{ DPU_IRQ_TYPE_CWB_OVERFLOW, CWB_3, DPU_INTR_CWB_3_OVERFLOW, 1},
- /* irq_idx: 48-51 */
+ /* irq_idx: 80-83 */
{ DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_0,
DPU_INTR_PING_PONG_0_TEAR_DETECTED, 1},
{ DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_1,
@@ -348,13 +380,13 @@ static const struct dpu_irq_type dpu_irq_map[] = {
DPU_INTR_PING_PONG_2_TEAR_DETECTED, 1},
{ DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_3,
DPU_INTR_PING_PONG_3_TEAR_DETECTED, 1},
- /* irq_idx: 52-55 */
+ /* irq_idx: 84-87 */
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
{ DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK, PINGPONG_S0,
DPU_INTR_PING_PONG_S0_TEAR_DETECTED, 1},
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 1},
- /* irq_idx: 56-59 */
+ /* irq_idx: 88-91 */
{ DPU_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_0,
DPU_INTR_PING_PONG_0_TE_DETECTED, 1},
{ DPU_IRQ_TYPE_PING_PONG_TE_CHECK, PINGPONG_1
[PATCH v1 0/3] Add irq support to accommodate SC7280 target
The changes in this series adds all the irq related changes which are needed to support EDP interface coming on sc7280 target. Changes in this series: - Currently each interrupt register has a range of 32 indexes only. But with the introduction of VSYNC and UNDERRUN irq for INTF_5, the number of irqs under INTR_STATUS will exceed this value. Increase the range of each interrupt register to 64 indexes to handle this. - Changes are added to enable the vsync and underrun irqs for INTF_5 which is required for edp panel. - Some irqs which are applicable for sdm845 target are obsolete for sc7180 and sc7280 targets. Support is added to skip all the obsolete irqs based on the target. Krishna Manikandan (3): drm/msm/disp/dpu1: increase the range of interrupts in dpu_irq_map drm/msm/disp/dpu1: add vsync and underrun irqs for INTF_5 drm/msm/disp/dpu1: add flags to indicate obsolete irqs drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 9 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 773 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 5 +- 5 files changed, 692 insertions(+), 101 deletions(-) -- 2.7.4
[PATCH v1 3/3] drm/msm/disp/dpu1: add flags to indicate obsolete irqs
Some irqs which are applicable for sdm845 target are no
longer applicable for sc7180 and sc7280 targets. Add a
flag to indicate the irqs which are obsolete for a
particular target so that these irqs are skipped while
checking for matching irq lookup index.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 9 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 13 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 5 -
5 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index 84ea09d..cdec3fb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -58,8 +58,8 @@ int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms,
if (!dpu_kms->hw_intr || !dpu_kms->hw_intr->ops.irq_idx_lookup)
return -EINVAL;
- return dpu_kms->hw_intr->ops.irq_idx_lookup(intr_type,
- instance_idx);
+ return dpu_kms->hw_intr->ops.irq_idx_lookup(dpu_kms->hw_intr,
+ intr_type, instance_idx);
}
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index ec27e6a..d4c381f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -56,6 +56,13 @@
#define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN)
+#define INTR_SC7180_MASK \
+ (BIT(DPU_IRQ_TYPE_PING_PONG_RD_PTR) |\
+ BIT(DPU_IRQ_TYPE_PING_PONG_WR_PTR) |\
+ BIT(DPU_IRQ_TYPE_PING_PONG_AUTO_REF) |\
+ BIT(DPU_IRQ_TYPE_PING_PONG_TEAR_CHECK) |\
+ BIT(DPU_IRQ_TYPE_PING_PONG_TE_CHECK))
+
#define DEFAULT_PIXEL_RAM_SIZE (50 * 1024)
#define DEFAULT_DPU_LINE_WIDTH 2048
#define DEFAULT_DPU_OUTPUT_LINE_WIDTH 2560
@@ -1077,6 +1084,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.dma_cfg = sdm845_regdma,
.perf = sc7180_perf_data,
.mdss_irqs = 0x3f,
+ .obsolete_irq = INTR_SC7180_MASK,
};
}
@@ -1166,6 +1174,7 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.vbif = sdm845_vbif,
.perf = sc7280_perf_data,
.mdss_irqs = 0x1c07,
+ .obsolete_irq = INTR_SC7180_MASK,
};
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 0cf7210..4dfd8a2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -723,6 +723,7 @@ struct dpu_perf_cfg {
* @cursor_formats Supported formats for cursor pipe
* @vig_formatsSupported formats for vig pipe
* @mdss_irqs: Bitmap with the irqs supported by the target
+ * @obsolete_irq: Irq types that are obsolete for a particular target
*/
struct dpu_mdss_cfg {
u32 hwversion;
@@ -769,6 +770,7 @@ struct dpu_mdss_cfg {
const struct dpu_format_extended *vig_formats;
unsigned long mdss_irqs;
+ unsigned long obsolete_irq;
};
struct dpu_mdss_hw_cfg_handler {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index a37928b..9c4d6b0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -1327,14 +1327,15 @@ static const struct dpu_irq_type dpu_irq_map[] = {
{ DPU_IRQ_TYPE_RESERVED, 0, 0, 12},
};
-static int dpu_hw_intr_irqidx_lookup(enum dpu_intr_type intr_type,
- u32 instance_idx)
+static int dpu_hw_intr_irqidx_lookup(struct dpu_hw_intr *intr,
+ enum dpu_intr_type intr_type, u32 instance_idx)
{
int i;
for (i = 0; i < ARRAY_SIZE(dpu_irq_map); i++) {
if (intr_type == dpu_irq_map[i].intr_type &&
- instance_idx == dpu_irq_map[i].instance_idx)
+ instance_idx == dpu_irq_map[i].instance_idx &&
+ !(intr->obsolete_irq & BIT(dpu_irq_map[i].intr_type)))
return i;
}
@@ -1386,7 +1387,9 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
(irq_idx < end_idx) && irq_status;
irq_idx++)
if ((irq_status & dpu_irq_map[irq_idx].irq_mask) &&
- (dpu_irq_map[irq_idx].reg_idx == reg_idx)) {
+ (dpu_irq_map[irq_idx].reg_idx == reg_idx) &&
+ !(intr-&
[PATCH v1 3/4] drm/msm/disp/dpu1: add support to program fetch active in ctl path
A new register called CTL_FETCH_ACTIVE is introduced in
SC7280 family which is used to inform the HW about
the pipes which are active in the current ctl path.
This change adds support to program this register
based on the active pipes in the current composition.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 27 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 3 +++
3 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 9607a76..4d2f7d7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -130,7 +130,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc
*crtc,
uint32_t stage_idx, lm_idx;
int zpos_cnt[DPU_STAGE_MAX + 1] = { 0 };
bool bg_alpha_enable = false;
+ DECLARE_BITMAP(fetch_active, SSPP_MAX);
+ memset(fetch_active, 0, sizeof(fetch_active));
drm_atomic_crtc_for_each_plane(plane, crtc) {
state = plane->state;
if (!state)
@@ -140,7 +142,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc
*crtc,
fb = state->fb;
dpu_plane_get_ctl_flush(plane, ctl, _mask);
-
+ set_bit(dpu_plane_pipe(plane), fetch_active);
DPU_DEBUG("crtc %d stage:%d - plane %d sspp %d fb %d\n",
crtc->base.id,
pstate->stage,
@@ -180,6 +182,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc
*crtc,
}
}
+ if (ctl->ops.set_active_pipes)
+ ctl->ops.set_active_pipes(ctl, fetch_active);
+
_dpu_crtc_program_lm_output_roi(crtc);
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 8981cfa..3cf489b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -27,6 +27,7 @@
#define CTL_MERGE_3D_FLUSH0x100
#define CTL_INTF_FLUSH0x110
#define CTL_INTF_MASTER 0x134
+#define CTL_FETCH_PIPE_ACTIVE 0x0FC
#define CTL_MIXER_BORDER_OUTBIT(24)
#define CTL_FLUSH_MASK_CTL BIT(17)
@@ -34,6 +35,11 @@
#define DPU_REG_RESET_TIMEOUT_US2000
#define MERGE_3D_IDX 23
#define INTF_IDX 31
+#define CTL_INVALID_BIT 0x
+
+static const u32 fetch_tbl[SSPP_MAX] = {CTL_INVALID_BIT, 16, 17, 18, 19,
+ CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, 0,
+ 1, 2, 3, CTL_INVALID_BIT, CTL_INVALID_BIT};
static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
const struct dpu_mdss_cfg *m,
@@ -344,6 +350,8 @@ static void dpu_hw_ctl_clear_all_blendstages(struct
dpu_hw_ctl *ctx)
DPU_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0);
DPU_REG_WRITE(c, CTL_LAYER_EXT3(LM_0 + i), 0);
}
+
+ DPU_REG_WRITE(c, CTL_FETCH_PIPE_ACTIVE, 0);
}
static void dpu_hw_ctl_setup_blendstage(struct dpu_hw_ctl *ctx,
@@ -529,6 +537,23 @@ static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx,
DPU_REG_WRITE(c, CTL_TOP, intf_cfg);
}
+static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx,
+ unsigned long *fetch_active)
+{
+ int i;
+ u32 val = 0;
+
+ if (fetch_active) {
+ for (i = 0; i < SSPP_MAX; i++) {
+ if (test_bit(i, fetch_active) &&
+ fetch_tbl[i] != CTL_INVALID_BIT)
+ val |= BIT(fetch_tbl[i]);
+ }
+ }
+
+ DPU_REG_WRITE(>hw, CTL_FETCH_PIPE_ACTIVE, val);
+}
+
static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
unsigned long cap)
{
@@ -558,6 +583,8 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
ops->get_bitmask_sspp = dpu_hw_ctl_get_bitmask_sspp;
ops->get_bitmask_mixer = dpu_hw_ctl_get_bitmask_mixer;
ops->get_bitmask_dspp = dpu_hw_ctl_get_bitmask_dspp;
+ if (cap & BIT(DPU_CTL_FETCH_ACTIVE))
+ ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;
};
static struct dpu_hw_blk_ops dpu_hw_ops;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
index e93a42a..806c171 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
@@ -167,6 +167,9 @@ struct dpu_hw_ctl_ops {
*/
void (*setup_blendstage)(struct dpu_hw_ctl *ctx,
enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg);
+
+ void (*set_active_pipes)(struct dpu_hw_ctl *ctx,
+ unsigned long *fetch_active);
};
/**
--
2.7.4
[PATCH v1 1/4] drm/msm/disp/dpu1: add support for display for SC7280 target
Add required display hw catalog changes for SC7280 target.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 176 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 6 +-
drivers/gpu/drm/msm/msm_drv.c | 4 +-
5 files changed, 177 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 189f353..ec27e6a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -43,6 +43,9 @@
#define PINGPONG_SDM845_SPLIT_MASK \
(PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2))
+#define CTL_SC7280_MASK \
+ (BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_FETCH_ACTIVE))
+
#define MERGE_3D_SM8150_MASK (0)
#define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC)
@@ -51,6 +54,8 @@
#define INTF_SC7180_MASK BIT(DPU_INTF_INPUT_CTRL) | BIT(DPU_INTF_TE)
+#define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN)
+
#define DEFAULT_PIXEL_RAM_SIZE (50 * 1024)
#define DEFAULT_DPU_LINE_WIDTH 2048
#define DEFAULT_DPU_OUTPUT_LINE_WIDTH 2560
@@ -199,6 +204,18 @@ static const struct dpu_caps sm8250_dpu_caps = {
.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
};
+static const struct dpu_caps sc7280_dpu_caps = {
+ .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
+ .max_mixer_blendstages = 0x7,
+ .qseed_type = DPU_SSPP_SCALER_QSEED4,
+ .smart_dma_rev = DPU_SSPP_SMART_DMA_V2,
+ .ubwc_version = DPU_HW_UBWC_VER_30,
+ .has_dim_layer = true,
+ .has_idle_pc = true,
+ .max_linewidth = 2400,
+ .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
+};
+
static const struct dpu_mdp_cfg sdm845_mdp[] = {
{
.name = "top_0", .id = MDP_TOP,
@@ -268,6 +285,22 @@ static const struct dpu_mdp_cfg sm8250_mdp[] = {
},
};
+static const struct dpu_mdp_cfg sc7280_mdp[] = {
+ {
+ .name = "top_0", .id = MDP_TOP,
+ .base = 0x0, .len = 0x2014,
+ .highest_bank_bit = 0x1,
+ .clk_ctrls[DPU_CLK_CTRL_VIG0] = {
+ .reg_off = 0x2AC, .bit_off = 0},
+ .clk_ctrls[DPU_CLK_CTRL_DMA0] = {
+ .reg_off = 0x2AC, .bit_off = 8},
+ .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = {
+ .reg_off = 0x2B4, .bit_off = 8},
+ .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = {
+ .reg_off = 0x2C4, .bit_off = 8},
+ },
+};
+
/*
* CTL sub blocks config
*/
@@ -350,6 +383,29 @@ static const struct dpu_ctl_cfg sm8150_ctl[] = {
},
};
+static const struct dpu_ctl_cfg sc7280_ctl[] = {
+ {
+ .name = "ctl_0", .id = CTL_0,
+ .base = 0x15000, .len = 0x1E8,
+ .features = CTL_SC7280_MASK
+ },
+ {
+ .name = "ctl_1", .id = CTL_1,
+ .base = 0x16000, .len = 0x1E8,
+ .features = CTL_SC7280_MASK
+ },
+ {
+ .name = "ctl_2", .id = CTL_2,
+ .base = 0x17000, .len = 0x1E8,
+ .features = CTL_SC7280_MASK
+ },
+ {
+ .name = "ctl_3", .id = CTL_3,
+ .base = 0x18000, .len = 0x1E8,
+ .features = CTL_SC7280_MASK
+ },
+};
+
/*
* SSPP sub blocks config
*/
@@ -475,6 +531,17 @@ static const struct dpu_sspp_cfg sm8250_sspp[] = {
sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
};
+static const struct dpu_sspp_cfg sc7280_sspp[] = {
+ SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK,
+ sc7180_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
+ SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK,
+ sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
+ SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_CURSOR_SDM845_MASK,
+ sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
+ SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK,
+ sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
+};
+
/*
* MIXER sub blocks config
*/
@@ -550,6 +617,15 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
_lm_sblk, PINGPONG_5, LM_4, 0),
};
+static const struct dpu_lm_cfg sc7280_lm[] = {
+ LM_BLK("lm_0", LM_0, 0x44000, MIXER_SC7180_MASK,
+ _lm_sblk, PINGPONG_0, 0, 0),
+ LM_BLK("lm_2", LM_2, 0x46000, MIXER_SC7180_MASK,
+ _lm_s
[PATCH v1 2/4] drm/msm/disp/dpu1: add intf offsets for SC7280 target
Interface block offsets are different for SC7280 family
when compared to existing targets. These offset values
are used to access the interface irq registers. This
change adds proper interface offsets for SC7280 target.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 5c521de..c289b7e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -25,6 +25,9 @@
#define MDP_AD4_INTR_EN_OFF0x41c
#define MDP_AD4_INTR_CLEAR_OFF 0x424
#define MDP_AD4_INTR_STATUS_OFF0x420
+#define MDP_INTF_0_OFF_REV_7xxx 0x34000
+#define MDP_INTF_1_OFF_REV_7xxx 0x35000
+#define MDP_INTF_5_OFF_REV_7xxx 0x39000
/**
* WB interrupt status bit definitions
@@ -242,7 +245,22 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
MDP_AD4_1_OFF + MDP_AD4_INTR_CLEAR_OFF,
MDP_AD4_1_OFF + MDP_AD4_INTR_EN_OFF,
MDP_AD4_1_OFF + MDP_AD4_INTR_STATUS_OFF,
- }
+ },
+ {
+ MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_CLEAR,
+ MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_EN,
+ MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_STATUS
+ },
+ {
+ MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_CLEAR,
+ MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_EN,
+ MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_STATUS
+ },
+ {
+ MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_CLEAR,
+ MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_EN,
+ MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_STATUS
+ },
};
/*
--
2.7.4
[PATCH v1 4/4] drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target
The reset value of INTF_CONFIG2 register is changed
for SC7280 family. Changes are added to program
this register correctly based on the target.
DATA_HCTL_EN in INTF_CONFIG2 register allows data
to be transferred at a different rate than video
timing. When this is set, the number of data per
line follows DISPLAY_DATA_HCTL register value.
This change adds support to program these
registers for sc7280 target.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 6f0f545..899f28d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -31,6 +31,8 @@
#define INTF_TEST_CTL 0x054
#define INTF_TP_COLOR0 0x058
#define INTF_TP_COLOR1 0x05C
+#define INTF_CONFIG20x060
+#define INTF_DISPLAY_DATA_HCTL 0x064
#define INTF_FRAME_LINE_COUNT_EN0x0A8
#define INTF_FRAME_COUNT0x0AC
#define INTF_LINE_COUNT 0x0B0
@@ -93,7 +95,7 @@ static void dpu_hw_intf_setup_timing_engine(struct
dpu_hw_intf *ctx,
u32 active_hctl, display_hctl, hsync_ctl;
u32 polarity_ctl, den_polarity, hsync_polarity, vsync_polarity;
u32 panel_format;
- u32 intf_cfg;
+ u32 intf_cfg, intf_cfg2 = 0, display_data_hctl = 0;
/* read interface_cfg */
intf_cfg = DPU_REG_READ(c, INTF_CONFIG);
@@ -178,6 +180,13 @@ static void dpu_hw_intf_setup_timing_engine(struct
dpu_hw_intf *ctx,
(COLOR_8BIT << 4) |
(0x21 << 8));
+ if (ctx->cap->features & BIT(DPU_DATA_HCTL_EN)) {
+ intf_cfg2 |= BIT(4);
+ display_data_hctl = display_hctl;
+ DPU_REG_WRITE(c, INTF_CONFIG2, intf_cfg2);
+ DPU_REG_WRITE(c, INTF_DISPLAY_DATA_HCTL, display_data_hctl);
+ }
+
DPU_REG_WRITE(c, INTF_HSYNC_CTL, hsync_ctl);
DPU_REG_WRITE(c, INTF_VSYNC_PERIOD_F0, vsync_period * hsync_period);
DPU_REG_WRITE(c, INTF_VSYNC_PULSE_WIDTH_F0,
--
2.7.4
[PATCH v1 0/4] Add display support for SC7280 target
The changes in this series adds all the required support for display driver for SC7280 target. In addition to the basic catalog changes, changes are added to accommodate new registers for SC7280 target. SC7280 target comes under next generation targets. The register differences in SC7280 when compared to SC7180 are mentioned below: - SC7280 uses UBWC3.0 and changes are added to program the ubwc static registers properly - Pingpong dither block offset value has changed for SC7280 family. Separate sub block is defined for sc7280 pingpong block and changes are added to handle this. - Interface offsets are different for SC7280 family. These offset values are used to access the interface irq registers. Changes are added to handle this based on the target. - A new register called CTL_FETCH_PIPE_ACTIVE is introduced in SC7280 family, which tells the HW about the active pipes in the CTL path. Changes are added to program this register based on the active pipes in the current composition. - Changes are added to program INTF_CONFIG2 properly since the reset value of this register has changed in SC7280 family and we need to explicitly program it with correct values to avoid wrong interface configuration. - INTF_5 is added to intf configuration to support EDP. Krishna Manikandan (4): drm/msm/disp/dpu1: add support for display for SC7280 target drm/msm/disp/dpu1: add intf offsets for SC7280 target drm/msm/disp/dpu1: add support to program fetch active in ctl path drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 176 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 8 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c| 27 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h| 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 20 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 11 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 6 +- drivers/gpu/drm/msm/msm_drv.c | 4 +- 10 files changed, 242 insertions(+), 24 deletions(-) -- 2.7.4
[PATCH v15 1/4] dt-bindings: msm: disp: add yaml schemas for DPU bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for DPU device tree bindings. Signed-off-by: Krishna Manikandan Changes in v2: - Changed dpu to DPU (Sam Ravnborg) - Fixed indentation issues (Sam Ravnborg) - Added empty line between different properties (Sam Ravnborg) - Replaced reference txt files with their corresponding yaml files (Sam Ravnborg) - Modified the file to use "|" only when it is necessary (Sam Ravnborg) Changes in v3: - Corrected the license used (Rob Herring) - Added maxItems for properties (Rob Herring) - Dropped generic descriptions (Rob Herring) - Added ranges property (Rob Herring) - Corrected the indendation (Rob Herring) - Added additionalProperties (Rob Herring) - Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring) - Corrected description for pinctrl-names (Rob Herring) - Corrected the examples used in yaml file (Rob Herring) - Delete dsi.txt and dpu.txt (Rob Herring) Changes in v4: - Move schema up by one level (Rob Herring) - Add patternProperties for mdp node (Rob Herring) - Corrected description of some properties (Rob Herring) Changes in v5: - Correct the indentation (Rob Herring) - Remove unnecessary description from properties (Rob Herring) - Correct the number of interconnect entries (Rob Herring) - Add interconnect names for sc7180 (Rob Herring) - Add description for ports (Rob Herring) - Remove common properties (Rob Herring) - Add unevalutatedProperties (Rob Herring) - Reference existing dsi controller yaml in the common dsi controller file (Rob Herring) - Correct the description of clock names to include only the clocks that are required (Rob Herring) - Remove properties which are already covered under the common binding (Rob Herring) - Add dsi phy supply nodes which are required for sc7180 and sdm845 targets (Rob Herring) - Add type ref for syscon-sfpb (Rob Herring) Changes in v6: - Fixed errors during dt_binding_check (Rob Herring) - Add maxItems for phys and phys-names (Rob Herring) - Use unevaluatedProperties wherever required (Rob Herring) - Removed interrupt controller from required properties for dsi controller (Rob Herring) - Add constraints for dsi-phy reg-names based on the compatible phy version (Rob Herring) - Add constraints for dsi-phy supply nodes based on the compatible phy version (Rob Herring) Changes in v7: - Add default value for qcom,mdss-mdp-transfer-time-us (Rob Herring) - Modify the schema for data-lanes (Rob Herring) - Split the phy schema into separate schemas based on the phy version (Rob Herring) Changes in v8: - Resolve merge conflicts with latest dsi.txt file - Include dp yaml change also in the same series Changes in v9: - Combine target specific dsi controller yaml files to a single yaml file (Rob Herring) - Combine target specific dsi phy yaml files into a single yaml file (Rob Herring) - Use unevaluatedProperties and additionalProperties wherever required - Remove duplicate properties from common yaml files Changes in v10: - Split the patch into separate patches for DPU, DSI and PHY (Stephen Boyd) - Drop unnecessary fullstop (Stephen Boyd) - Add newline whereever required (Stephen Boyd) - Add description for clock used (Stephen Boyd) - Modify the description for interconnect entries (Stephen Boyd) - Drop assigned clock entries as it a generic property (Stephen Boyd) - Correct the definition for interrupts (Stephen Boyd) - Drop clock names from required properties (Stephen Boyd) - Drop labels for display nodes from example (Stephen Boyd) - Drop flags from interrupts entries (Stephen Boyd) Changes in v11: - Drop maxItems for clocks (Stephen Boyd) Changes in v12: - Add description for register property (Stephen Boyd) - Add maxItems for interrupts (Stephen Boyd) - Add description for iommus property (Stephen Boyd) - Add description for interconnects (Stephen Boyd) - Change display node name to display_controller (Stephen Boyd) Changes in v13: - Add maxItems for reg property (Stephen Boyd) - Add ranges property in example (Stephen Boyd) - Modify description for iommus property (Stephen Boyd) - Add Dp bindings for ports in the same patch (Stephen Boyd) - Remove soc from examples and change address and size cells accordingly (Stephen Boyd) - Add reference for ports Changes in v14: - Modify title for SC7180 and SDM845 yaml files (Stephen Boyd) - Add required list for display-controller node (Stephen Boyd) - Rename mdss node name to display-subsytem (Stephen Boyd) --- .../bindings/display/msm/dpu-sc7180.yaml
[PATCH v15 3/4] dt-bindings: msm: dsi: add yaml schemas for DSI PHY bindings
Add YAML schema for the device tree bindings for DSI PHY.
Signed-off-by: Krishna Manikandan
Changes in v1:
- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
- Remove qcom,dsi-phy-regulator-ldo-mode (Stephen Boyd)
- Add clock cells properly (Stephen Boyd)
- Remove unnecessary decription from clock names (Stephen Boyd)
- Add pin names for the supply entries for 10nm phy which is
used in sc7180 and sdm845 (Stephen Boyd)
- Remove unused header files from examples (Stephen Boyd)
- Drop labels for display nodes and correct node name (Stephen Boyd)
Changes in v2:
- Drop maxItems for clock (Stephen Boyd)
- Add vdds supply pin information for sdm845 (Stephen Boyd)
- Add examples for 14nm, 20nm and 28nm phy yaml files (Stephen Boyd)
- Keep child nodes directly under soc node (Stephen Boyd)
Changes in v3:
- Use a separate yaml file to describe the common properties
for all the dsi phy versions (Stephen Boyd)
- Remove soc from examples (Stephen Boyd)
- Add description for register property
Changes in v4:
- Modify the title for all the phy versions (Stephen Boyd)
- Drop description for all the phy versions (Stephen Boyd)
- Modify the description for register property (Stephen Boyd)
Changes in v5:
- Remove unused properties from common dsi phy file
- Add clock-cells and phy-cells to required property
list (Stephen Boyd)
---
.../bindings/display/msm/dsi-phy-10nm.yaml | 68 +
.../bindings/display/msm/dsi-phy-14nm.yaml | 66
.../bindings/display/msm/dsi-phy-20nm.yaml | 71 ++
.../bindings/display/msm/dsi-phy-28nm.yaml | 68 +
.../bindings/display/msm/dsi-phy-common.yaml | 40
5 files changed, 313 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
new file mode 100644
index 000..4a26bef
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DSI 10nm PHY
+
+maintainers:
+ - Krishna Manikandan
+
+allOf:
+ - $ref: dsi-phy-common.yaml#
+
+properties:
+ compatible:
+oneOf:
+ - const: qcom,dsi-phy-10nm
+ - const: qcom,dsi-phy-10nm-8998
+
+ reg:
+items:
+ - description: dsi phy register set
+ - description: dsi phy lane register set
+ - description: dsi pll register set
+
+ reg-names:
+items:
+ - const: dsi_phy
+ - const: dsi_phy_lane
+ - const: dsi_pll
+
+ vdds-supply:
+description: |
+ Connected to DSI0_MIPI_DSI_PLL_VDDA0P9 pin for sc7180 target and
+ connected to VDDA_MIPI_DSI_0_PLL_0P9 pin for sdm845 target
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - vdds-supply
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include
+ #include
+
+ dsi-phy@ae94400 {
+ compatible = "qcom,dsi-phy-10nm";
+ reg = <0x0ae94400 0x200>,
+ <0x0ae94600 0x280>,
+ <0x0ae94a00 0x1e0>;
+ reg-names = "dsi_phy",
+ "dsi_phy_lane",
+ "dsi_pll";
+
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ vdds-supply = <_mipi_dsi0_pll>;
+ clocks = < DISP_CC_MDSS_AHB_CLK>,
+ < RPMH_CXO_CLK>;
+ clock-names = "iface", "ref";
+ };
+...
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
new file mode 100644
index 000..72a00cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DSI 14nm PHY
+
+maintainers:
+ - Krishna Manikandan
+
+allOf:
+ - $ref: dsi-phy-common.yaml#
+
+properties:
+ compatible:
+oneOf:
+ - const: qcom,dsi-phy-14nm
+ - const: qcom,dsi-phy-14nm-660
+
+ reg:
+items:
+ - description: dsi phy register s
[PATCH v15 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Add YAML schema for the device tree bindings for DSI Signed-off-by: Krishna Manikandan Changes in v1: - Separate dsi controller bindings to a separate patch (Stephen Boyd) - Merge dsi-common-controller.yaml and dsi-controller-main.yaml to a single file (Stephen Boyd) - Drop supply entries and definitions from properties (Stephen Boyd) - Modify phy-names property for dsi controller (Stephen Boyd) - Remove boolean from description (Stephen Boyd) - Drop pinctrl properties as they are standard entries (Stephen Boyd) - Modify the description for ports property and keep the reference to the generic binding where this is defined (Stephen Boyd) - Add description to clock names (Stephen Boyd) - Correct the indendation (Stephen Boyd) - Drop the label for display dt nodes and correct the node name (Stephen Boyd) Changes in v2: - Drop maxItems for clock (Stephen Boyd) - Drop qcom,mdss-mdp-transfer-time-us as it is not used in upstream dt file (Stephen Boyd) - Keep child node directly under soc node (Stephen Boyd) - Drop qcom,sync-dual-dsi as it is not used in upstream dt Changes in v3: - Add description for register property (Stephen Boyd) Changes in v4: - Add maxItems for phys property (Stephen Boyd) - Add maxItems for reg property (Stephen Boyd) - Add reference for data-lanes property (Stephen Boyd) - Remove soc from example (Stephen Boyd) Changes in v5: - Modify title and description (Stephen Boyd) - Add required properties for ports node (Stephen Boyd) - Add data-lanes in the example (Stephen Boyd) - Drop qcom,master-dsi property (Stephen Boyd) Changes in v6: - Add required properties for port@0, port@1 and corresponding endpoints (Stephen Boyd) - Add address-cells and size-cells for ports (Stephen Boyd) - Use additionalProperties instead of unevaluatedProperties (Stephen Boyd) --- .../bindings/display/msm/dsi-controller-main.yaml | 213 ++ .../devicetree/bindings/display/msm/dsi.txt| 249 - 2 files changed, 213 insertions(+), 249 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file mode 100644 index 000..7858524 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -0,0 +1,213 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display DSI controller + +maintainers: + - Krishna Manikandan + +allOf: + - $ref: "../dsi-controller.yaml#" + +properties: + compatible: +items: + - const: qcom,mdss-dsi-ctrl + + reg: +maxItems: 1 + + reg-names: +const: dsi_ctrl + + interrupts: +maxItems: 1 + + clocks: +items: + - description: Display byte clock + - description: Display byte interface clock + - description: Display pixel clock + - description: Display escape clock + - description: Display AHB clock + - description: Display AXI clock + + clock-names: +items: + - const: byte + - const: byte_intf + - const: pixel + - const: core + - const: iface + - const: bus + + phys: +maxItems: 1 + + phy-names: +const: dsi + + "#address-cells": true + + "#size-cells": true + + syscon-sfpb: +description: A phandle to mmss_sfpb syscon node (only for DSIv2). +$ref: "/schemas/types.yaml#/definitions/phandle" + + qcom,dual-dsi-mode: +type: boolean +description: | + Indicates if the DSI controller is driving a panel which needs + 2 DSI links. + + ports: +$ref: "/schemas/graph.yaml#/properties/port" +type: object +description: | + Contains DSI controller input and output ports as children, each + containing one endpoint subnode. + +properties: + port@0: +type: object +description: | + Input endpoints of the controller. + +properties: + reg: +const: 0 + + endpoint: +type: object +properties: + remote-endpoint: +description: | + For port@1, set to phandle of the connected panel/bridge's + input endpoint. For port@0, set to the MDP interface output. + + data-lanes: +$ref: "/schemas/media/video-interfaces.yaml#" +description: | + This describes how the physical DSI data lanes are mapped + to t
[PATCH v15 4/4] dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by: Chandan Uddaraju
Signed-off-by: Vara Reddy
Signed-off-by: Tanmay Shah
Signed-off-by: Kuogee Hsieh
Signed-off-by: Krishna Manikandan
Changes in V2:
-Provide details about sel-gpio
Changes in V4:
-Provide details about max dp lanes
-Change the commit text
Changes in V5:
-moved dp.txt to yaml file
Changes in v6:
- Squash all AUX LUT properties into one pattern Property
- Make aux-cfg[0-9]-settings properties optional
- Remove PLL/PHY bindings from DP controller dts
- Add DP clocks description
- Remove _clk suffix from clock names
- Rename pixel clock to stream_pixel
- Remove redundant bindings (GPIO, PHY, HDCP clock, etc..)
- Fix indentation
- Add Display Port as interface of DPU in DPU bindings
and add port mapping accordingly.
Chages in v7:
- Add dp-controller.yaml file common between multiple SOC
- Rename dp-sc7180.yaml to dp-controller-sc7180.yaml
- change compatible string and add SOC name to it.
- Remove Root clock generator for pixel clock
- Add assigned-clocks and assigned-clock-parents bindings
- Remove redundant properties, descriptions and blank lines
- Add DP port in DPU bindings
- Update depends-on tag in commit message and rebase change accordingly
Changes in v8:
- Add MDSS AHB clock in bindings
Changes in v9:
- Remove redundant reg-name property
- Change assigned-clocks and assigned-clocks-parents counts to 2
- Use IRQ flags in example dts
Changes in v10:
- Change title of this patch as it does not contain PLL bindings anymore
- Remove redundant properties
- Remove use of IRQ flag
- Fix ports property
Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer list
Changes in v12:
- remove soc node from examples (Stephen Boyd)
- split dpu-sc7180.yaml changes to separate patch (Stephen Boyd)
Changes in v13:
- add assigned-clocks
- add assigned-clock-parents
---
.../bindings/display/msm/dp-controller.yaml| 162 +
1 file changed, 162 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
new file mode 100644
index 000..3a02c6c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MSM Display Port Controller
+
+maintainers:
+ - Kuogee Hsieh
+
+description: |
+ Device tree bindings for DisplayPort host controller for MSM targets
+ that are compatible with VESA DisplayPort interface specification.
+
+properties:
+ compatible:
+enum:
+ - qcom,sc7180-dp
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+items:
+ - description: AHB clock to enable register access
+ - description: Display Port AUX clock
+ - description: Display Port Link clock
+ - description: Link interface clock between DP and PHY
+ - description: Display Port Pixel clock
+
+ clock-names:
+items:
+ - const: core_iface
+ - const: core_aux
+ - const: ctrl_link
+ - const: ctrl_link_iface
+ - const: stream_pixel
+
+ assigned-clocks:
+items:
+ - description: link clock source
+ - description: pixel clock source
+
+ assigned-clock-parents:
+items:
+ - description: phy 0 parent
+ - description: phy 1 parent
+
+ phys:
+maxItems: 1
+
+ phy-names:
+items:
+ - const: dp
+
+ operating-points-v2:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+
+ "#sound-dai-cells":
+const: 0
+
+ ports:
+type: object
+description: |
+ A ports node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ port@0:
+type: object
+description: Input endpoint of the controller
+
+ port@1:
+type: object
+description: Output endpoint of the controller
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - phys
+ - phy-names
+ - "#sound-dai-cells"
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+
+displayport-controller@ae9 {
+compatible = "qcom,sc7180-dp";
+reg = <0xae9 0x1400>;
[v3] drm/msm: Fix race condition in msm driver with async layer updates
When there are back to back commits with async cursor update,
there is a case where second commit can program the DPU hw
blocks while first didn't complete flushing config to HW.
Synchronize the compositions such that second commit waits
until first commit flushes the composition.
This change also introduces per crtc commit lock, such that
commits on different crtcs are not blocked by each other.
Changes in v2:
- Use an array of mutexes in kms to handle commit
lock per crtc. (Rob Clark)
Changes in v3:
- Add wrapper functions to handle lock and unlock of
commit_lock for each crtc. (Rob Clark)
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/msm_atomic.c | 37 -
drivers/gpu/drm/msm/msm_kms.h| 6 --
2 files changed, 28 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 561bfa4..575e9af 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -55,16 +55,32 @@ static void vblank_put(struct msm_kms *kms, unsigned
crtc_mask)
}
}
+static void lock_crtcs(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ struct drm_crtc *crtc;
+
+ for_each_crtc_mask(kms->dev, crtc, crtc_mask)
+ mutex_lock(>commit_lock[drm_crtc_index(crtc)]);
+}
+
+static void unlock_crtcs(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ struct drm_crtc *crtc;
+
+ for_each_crtc_mask(kms->dev, crtc, crtc_mask)
+ mutex_unlock(>commit_lock[drm_crtc_index(crtc)]);
+}
+
static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)
{
unsigned crtc_mask = BIT(crtc_idx);
trace_msm_atomic_async_commit_start(crtc_mask);
- mutex_lock(>commit_lock);
+ lock_crtcs(kms, crtc_mask);
if (!(kms->pending_crtc_mask & crtc_mask)) {
- mutex_unlock(>commit_lock);
+ unlock_crtcs(kms, crtc_mask);
goto out;
}
@@ -79,7 +95,6 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int
crtc_idx)
*/
trace_msm_atomic_flush_commit(crtc_mask);
kms->funcs->flush_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
/*
* Wait for flush to complete:
@@ -90,9 +105,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int
crtc_idx)
vblank_put(kms, crtc_mask);
- mutex_lock(>commit_lock);
kms->funcs->complete_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
+ unlock_crtcs(kms, crtc_mask);
kms->funcs->disable_commit(kms);
out:
@@ -189,12 +203,11 @@ void msm_atomic_commit_tail(struct drm_atomic_state
*state)
* Ensure any previous (potentially async) commit has
* completed:
*/
+ lock_crtcs(kms, crtc_mask);
trace_msm_atomic_wait_flush_start(crtc_mask);
kms->funcs->wait_flush(kms, crtc_mask);
trace_msm_atomic_wait_flush_finish(crtc_mask);
- mutex_lock(>commit_lock);
-
/*
* Now that there is no in-progress flush, prepare the
* current update:
@@ -232,8 +245,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
}
kms->funcs->disable_commit(kms);
- mutex_unlock(>commit_lock);
-
+ unlock_crtcs(kms, crtc_mask);
/*
* At this point, from drm core's perspective, we
* are done with the atomic update, so we can just
@@ -260,8 +272,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
*/
trace_msm_atomic_flush_commit(crtc_mask);
kms->funcs->flush_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
-
+ unlock_crtcs(kms, crtc_mask);
/*
* Wait for flush to complete:
*/
@@ -271,9 +282,9 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
vblank_put(kms, crtc_mask);
- mutex_lock(>commit_lock);
+ lock_crtcs(kms, crtc_mask);
kms->funcs->complete_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
+ unlock_crtcs(kms, crtc_mask);
kms->funcs->disable_commit(kms);
drm_atomic_helper_commit_hw_done(state);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 1cbef6b..2049847 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -155,7 +155,7 @@ struct msm_kms {
* For async commit, where ->flush_commit() and later happens
* from the crtc's pending_timer close to end of the frame:
*/
- struct mutex commit_lock;
+ struct mutex commit_lock[MAX_CRTCS];
unsigned pending_crtc_mask;
struct msm_pending_timer pending_timers[MAX_CRTCS];
};
@@ -165,7 +165,9 @@ static in
[v2] drm/msm: Fix race condition in msm driver with async layer updates
When there are back to back commits with async cursor update,
there is a case where second commit can program the DPU hw
blocks while first didn't complete flushing config to HW.
Synchronize the compositions such that second commit waits
until first commit flushes the composition.
This change also introduces per crtc commit lock, such that
commits on different crtcs are not blocked by each other.
Changes in v2:
- Use an array of mutexes in kms to handle commit
lock per crtc. (Rob Clark)
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/msm_atomic.c | 32 +++-
drivers/gpu/drm/msm/msm_kms.h| 6 --
2 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 561bfa4..f9bd472 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -61,10 +61,10 @@ static void msm_atomic_async_commit(struct msm_kms *kms,
int crtc_idx)
trace_msm_atomic_async_commit_start(crtc_mask);
- mutex_lock(>commit_lock);
+ mutex_lock(>commit_lock[crtc_idx]);
if (!(kms->pending_crtc_mask & crtc_mask)) {
- mutex_unlock(>commit_lock);
+ mutex_unlock(>commit_lock[crtc_idx]);
goto out;
}
@@ -79,7 +79,6 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int
crtc_idx)
*/
trace_msm_atomic_flush_commit(crtc_mask);
kms->funcs->flush_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
/*
* Wait for flush to complete:
@@ -90,9 +89,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int
crtc_idx)
vblank_put(kms, crtc_mask);
- mutex_lock(>commit_lock);
kms->funcs->complete_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
+ mutex_unlock(>commit_lock[crtc_idx]);
kms->funcs->disable_commit(kms);
out:
@@ -171,6 +169,16 @@ static unsigned get_crtc_mask(struct drm_atomic_state
*state)
return mask;
}
+static int get_crtc_id(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ struct drm_crtc *crtc;
+
+ for_each_crtc_mask(kms->dev, crtc, crtc_mask)
+ return drm_crtc_index(crtc);
+
+ return 0;
+}
+
void msm_atomic_commit_tail(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@@ -180,6 +188,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
unsigned crtc_mask = get_crtc_mask(state);
bool async = kms->funcs->vsync_time &&
can_do_async(state, _crtc);
+ int crtc_idx = get_crtc_id(kms, crtc_mask);
trace_msm_atomic_commit_tail_start(async, crtc_mask);
@@ -189,12 +198,11 @@ void msm_atomic_commit_tail(struct drm_atomic_state
*state)
* Ensure any previous (potentially async) commit has
* completed:
*/
+ mutex_lock(>commit_lock[crtc_idx]);
trace_msm_atomic_wait_flush_start(crtc_mask);
kms->funcs->wait_flush(kms, crtc_mask);
trace_msm_atomic_wait_flush_finish(crtc_mask);
- mutex_lock(>commit_lock);
-
/*
* Now that there is no in-progress flush, prepare the
* current update:
@@ -232,8 +240,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
}
kms->funcs->disable_commit(kms);
- mutex_unlock(>commit_lock);
-
+ mutex_unlock(>commit_lock[crtc_idx]);
/*
* At this point, from drm core's perspective, we
* are done with the atomic update, so we can just
@@ -260,8 +267,7 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
*/
trace_msm_atomic_flush_commit(crtc_mask);
kms->funcs->flush_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
-
+ mutex_unlock(>commit_lock[crtc_idx]);
/*
* Wait for flush to complete:
*/
@@ -271,9 +277,9 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
vblank_put(kms, crtc_mask);
- mutex_lock(>commit_lock);
+ mutex_lock(>commit_lock[crtc_idx]);
kms->funcs->complete_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
+ mutex_unlock(>commit_lock[crtc_idx]);
kms->funcs->disable_commit(kms);
drm_atomic_helper_commit_hw_done(state);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 1cbef6b..2049847 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -155,7 +155,7 @@ struct msm_kms {
* For async commit, where ->flush_commit() and later happens
* from the crtc's pending_timer close to end of the frame:
*/
- struct mutex commit_lock;
+
[v1] drm/msm: Fix race condition in msm driver with async layer updates
When there are back to back commits with async cursor update,
there is a case where second commit can program the DPU hw
blocks while first didn't complete flushing config to HW.
Synchronize the compositions such that second commit waits
until first commit flushes the composition.
This change also introduces per crtc commit lock, such that
commits on different crtcs are not blocked by each other.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 26
drivers/gpu/drm/msm/msm_atomic.c | 35 ++--
drivers/gpu/drm/msm/msm_kms.h| 5 +
5 files changed, 57 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index c2729f7..9024719 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1383,6 +1383,7 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev,
struct drm_plane *plane,
/* initialize event handling */
spin_lock_init(_crtc->event_lock);
+ mutex_init(_crtc->commit_lock);
DPU_DEBUG("%s: successfully initialized crtc\n", dpu_crtc->name);
return crtc;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index cec3474..1eeb73d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -169,6 +169,7 @@ struct dpu_crtc {
/* for handling internal event thread */
spinlock_t event_lock;
+ struct mutex commit_lock;
struct dpu_core_perf_params cur_perf;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index c0a4d4e..f99ae7a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -445,6 +445,30 @@ static void dpu_kms_wait_flush(struct msm_kms *kms,
unsigned crtc_mask)
dpu_kms_wait_for_commit_done(kms, crtc);
}
+static void dpu_kms_commit_lock(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+ struct drm_crtc *crtc;
+ struct dpu_crtc *dpu_crtc;
+
+ for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) {
+ dpu_crtc = to_dpu_crtc(crtc);
+ mutex_lock(_crtc->commit_lock);
+ }
+}
+
+static void dpu_kms_commit_unlock(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+ struct drm_crtc *crtc;
+ struct dpu_crtc *dpu_crtc;
+
+ for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) {
+ dpu_crtc = to_dpu_crtc(crtc);
+ mutex_unlock(_crtc->commit_lock);
+ }
+}
+
static int _dpu_kms_initialize_dsi(struct drm_device *dev,
struct msm_drm_private *priv,
struct dpu_kms *dpu_kms)
@@ -738,6 +762,8 @@ static const struct msm_kms_funcs kms_funcs = {
#ifdef CONFIG_DEBUG_FS
.debugfs_init= dpu_kms_debugfs_init,
#endif
+ .commit_lock = dpu_kms_commit_lock,
+ .commit_unlock = dpu_kms_commit_unlock,
};
static void _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 561bfa4..d33253f 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -55,16 +55,32 @@ static void vblank_put(struct msm_kms *kms, unsigned
crtc_mask)
}
}
+static void msm_commit_lock(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ if (kms->funcs->commit_lock)
+ kms->funcs->commit_lock(kms, crtc_mask);
+ else
+ mutex_lock(>commit_lock);
+}
+
+static void msm_commit_unlock(struct msm_kms *kms, unsigned int crtc_mask)
+{
+ if (kms->funcs->commit_unlock)
+ kms->funcs->commit_unlock(kms, crtc_mask);
+ else
+ mutex_unlock(>commit_lock);
+}
+
static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)
{
unsigned crtc_mask = BIT(crtc_idx);
trace_msm_atomic_async_commit_start(crtc_mask);
- mutex_lock(>commit_lock);
+ msm_commit_lock(kms, crtc_mask);
if (!(kms->pending_crtc_mask & crtc_mask)) {
- mutex_unlock(>commit_lock);
+ msm_commit_unlock(kms, crtc_mask);
goto out;
}
@@ -79,7 +95,6 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int
crtc_idx)
*/
trace_msm_atomic_flush_commit(crtc_mask);
kms->funcs->flush_commit(kms, crtc_mask);
- mutex_unlock(>commit_lock);
/*
* Wait for flush to complete:
@@ -90,9 +105,8 @@ static void m
[PATCH 2/2] dt-bindings: msm/dp: add bindings of DP/DP-PLL driver for Snapdragon
From: Chandan Uddaraju
Add bindings for Snapdragon DisplayPort controller driver.
Changes in V2:
Provide details about sel-gpio
Changes in V4:
Provide details about max dp lanes
Change the commit text
Changes in V5:
moved dp.txt to yaml file
Changes in v6:
- Squash all AUX LUT properties into one pattern Property
- Make aux-cfg[0-9]-settings properties optional
- Remove PLL/PHY bindings from DP controller dts
- Add DP clocks description
- Remove _clk suffix from clock names
- Rename pixel clock to stream_pixel
- Remove redundant bindings (GPIO, PHY, HDCP clock, etc..)
- Fix indentation
- Add Display Port as interface of DPU in DPU bindings
and add port mapping accordingly.
Chages in v7:
- Add dp-controller.yaml file common between multiple SOC
- Rename dp-sc7180.yaml to dp-controller-sc7180.yaml
- change compatible string and add SOC name to it.
- Remove Root clock generator for pixel clock
- Add assigned-clocks and assigned-clock-parents bindings
- Remove redundant properties, descriptions and blank lines
- Add DP port in DPU bindings
- Update depends-on tag in commit message and rebase change accordingly
Changes in v8:
- Add MDSS AHB clock in bindings
Changes in v9:
- Remove redundant reg-name property
- Change assigned-clocks and assigned-clocks-parents counts to 2
- Use IRQ flags in example dts
Signed-off-by: Chandan Uddaraju
Signed-off-by: Vara Reddy
Signed-off-by: Tanmay Shah
---
.../bindings/display/msm/dp-controller-sc7180.yaml | 141 +
.../bindings/display/msm/dp-controller.yaml| 59 +
.../bindings/display/msm/dpu-sc7180.yaml | 10 ++
3 files changed, 210 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller-sc7180.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller.yaml
diff --git
a/Documentation/devicetree/bindings/display/msm/dp-controller-sc7180.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller-sc7180.yaml
new file mode 100644
index 000..83a9e39
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller-sc7180.yaml
@@ -0,0 +1,141 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dp-controller-sc7180.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MSM SC7180 Display Port Controller.
+
+maintainers:
+ - Chandan Uddaraju
+ - Vara Reddy
+ - Tanmay Shah
+
+description: |
+ Device tree bindings for DP host controller for MSM SC7180 target
+ that are compatible with VESA Display Port interface specification.
+
+allOf:
+ - $ref: dp-controller.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - qcom,sc7180-dp
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 5
+
+ clock-names:
+items:
+ - const: core_iface
+ - const: core_aux
+ - const: ctrl_link
+ - const: ctrl_link_iface
+ - const: stream_pixel
+
+ "#clock-cells":
+const: 1
+
+ assigned-clocks:
+maxItems: 2
+ assigned-clock-parents:
+maxItems: 2
+
+ data-lanes:
+$ref: "/schemas/types.yaml#/definitions/uint32-array"
+minItems: 1
+maxItems: 4
+
+ vdda-1p2-supply:
+description: phandle to vdda 1.2V regulator node.
+
+ vdda-0p9-supply:
+description: phandle to vdda 0.9V regulator node.
+
+ ports:
+type: object
+properties:
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+ port@0:
+type: object
+ port@1:
+type: object
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - assigned-clocks
+ - assigned-clock-parents
+ - vdda-1p2-supply
+ - vdda-0p9-supply
+ - data-lanes
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+msm_dp: displayport-controller@ae9{
+compatible = "qcom,sc7180-dp";
+reg = <0 0xae9 0 0x1400>;
+
+interrupt-parent = <>;
+interrupts = <12 IRQ_TYPE_NONE>;
+
+clocks = < DISP_CC_MDSS_AHB_CLK>,
+ < DISP_CC_MDSS_DP_AUX_CLK>,
+ < DISP_CC_MDSS_DP_LINK_CLK>,
+ < DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+ < DISP_CC_MDSS_DP_PIXEL_CLK>;
+clock-names = "core_iface", "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface", "stream_pixel";
+#clock-cells = <1>;
+
+assigned-clocks = < DISP_CC_MDSS_DP_LINK_CLK_SRC>,
+ < DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+assigned-clock-parents = <_phy 0>, <_phy 1>;
+
+vdda-1p2-supply = <_l3c_1p2>;
+vdda-0p9-supply = <_l4a_0p8>;
+
+data-lanes = <0 1>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+dp_in: endpoint {
+
[PATCH 1/2] dt-bindings: msm: disp: add yaml schemas for DPU and DSI bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for the device tree bindings for the same. Signed-off-by: Krishna Manikandan Changes in v2: - Changed dpu to DPU (Sam Ravnborg) - Fixed indentation issues (Sam Ravnborg) - Added empty line between different properties (Sam Ravnborg) - Replaced reference txt files with their corresponding yaml files (Sam Ravnborg) - Modified the file to use "|" only when it is necessary (Sam Ravnborg) Changes in v3: - Corrected the license used (Rob Herring) - Added maxItems for properties (Rob Herring) - Dropped generic descriptions (Rob Herring) - Added ranges property (Rob Herring) - Corrected the indendation (Rob Herring) - Added additionalProperties (Rob Herring) - Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring) - Corrected description for pinctrl-names (Rob Herring) - Corrected the examples used in yaml file (Rob Herring) - Delete dsi.txt and dpu.txt (Rob Herring) Changes in v4: - Move schema up by one level (Rob Herring) - Add patternProperties for mdp node (Rob Herring) - Corrected description of some properties (Rob Herring) Changes in v5: - Correct the indentation (Rob Herring) - Remove unnecessary description from properties (Rob Herring) - Correct the number of interconnect entries (Rob Herring) - Add interconnect names for sc7180 (Rob Herring) - Add description for ports (Rob Herring) - Remove common properties (Rob Herring) - Add unevalutatedProperties (Rob Herring) - Reference existing dsi controller yaml in the common dsi controller file (Rob Herring) - Correct the description of clock names to include only the clocks that are required (Rob Herring) - Remove properties which are already covered under the common binding (Rob Herring) - Add dsi phy supply nodes which are required for sc7180 and sdm845 targets (Rob Herring) - Add type ref for syscon-sfpb (Rob Herring) Changes in v6: - Fixed errors during dt_binding_check (Rob Herring) - Add maxItems for phys and phys-names (Rob Herring) - Use unevaluatedProperties wherever required (Rob Herring) - Removed interrupt controller from required properties for dsi controller (Rob Herring) - Add constraints for dsi-phy reg-names based on the compatible phy version (Rob Herring) - Add constraints for dsi-phy supply nodes based on the compatible phy version (Rob Herring) Changes in v7: - Add default value for qcom,mdss-mdp-transfer-time-us (Rob Herring) - Modify the schema for data-lanes (Rob Herring) - Split the phy schema into separate schemas based on the phy version (Rob Herring) Changes in v8: - Resolve merge conflicts with latest dsi.txt file - Include dp yaml change also in the same series --- .../bindings/display/msm/dpu-sc7180.yaml | 236 +++ .../bindings/display/msm/dpu-sdm845.yaml | 216 ++ .../devicetree/bindings/display/msm/dpu.txt| 141 .../display/msm/dsi-common-controller.yaml | 249 + .../display/msm/dsi-controller-sc7180.yaml | 120 ++ .../display/msm/dsi-controller-sdm845.yaml | 120 ++ .../bindings/display/msm/dsi-phy-10nm.yaml | 62 + .../bindings/display/msm/dsi-phy-14nm.yaml | 62 + .../bindings/display/msm/dsi-phy-20nm.yaml | 66 ++ .../bindings/display/msm/dsi-phy-28nm.yaml | 62 + .../bindings/display/msm/dsi-phy-sc7180.yaml | 80 +++ .../bindings/display/msm/dsi-phy-sdm845.yaml | 82 +++ .../devicetree/bindings/display/msm/dsi.txt| 247 13 files changed, 1355 insertions(+), 388 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-common-controller.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-s
[v7] dt-bindings: msm: disp: add yaml schemas for DPU and DSI bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for the device tree bindings for the same. Signed-off-by: Krishna Manikandan Changes in v2: - Changed dpu to DPU (Sam Ravnborg) - Fixed indentation issues (Sam Ravnborg) - Added empty line between different properties (Sam Ravnborg) - Replaced reference txt files with their corresponding yaml files (Sam Ravnborg) - Modified the file to use "|" only when it is necessary (Sam Ravnborg) Changes in v3: - Corrected the license used (Rob Herring) - Added maxItems for properties (Rob Herring) - Dropped generic descriptions (Rob Herring) - Added ranges property (Rob Herring) - Corrected the indendation (Rob Herring) - Added additionalProperties (Rob Herring) - Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring) - Corrected description for pinctrl-names (Rob Herring) - Corrected the examples used in yaml file (Rob Herring) - Delete dsi.txt and dpu.txt (Rob Herring) Changes in v4: - Move schema up by one level (Rob Herring) - Add patternProperties for mdp node (Rob Herring) - Corrected description of some properties (Rob Herring) Changes in v5: - Correct the indentation (Rob Herring) - Remove unnecessary description from properties (Rob Herring) - Correct the number of interconnect entries (Rob Herring) - Add interconnect names for sc7180 (Rob Herring) - Add description for ports (Rob Herring) - Remove common properties (Rob Herring) - Add unevalutatedProperties (Rob Herring) - Reference existing dsi controller yaml in the common dsi controller file (Rob Herring) - Correct the description of clock names to include only the clocks that are required (Rob Herring) - Remove properties which are already covered under the common binding (Rob Herring) - Add dsi phy supply nodes which are required for sc7180 and sdm845 targets (Rob Herring) - Add type ref for syscon-sfpb (Rob Herring) Changes in v6: - Fixed errors during dt_binding_check (Rob Herring) - Add maxItems for phys and phys-names (Rob Herring) - Use unevaluatedProperties wherever required (Rob Herring) - Removed interrupt controller from required properties for dsi controller (Rob Herring) - Add constraints for dsi-phy reg-names based on the compatible phy version (Rob Herring) - Add constraints for dsi-phy supply nodes based on the compatible phy version (Rob Herring) Changes in v7: - Add default value for qcom,mdss-mdp-transfer-time-us (Rob Herring) - Modify the schema for data-lanes (Rob Herring) - Split the phy schema into separate schemas based on the phy version (Rob Herring) --- .../bindings/display/msm/dpu-sc7180.yaml | 236 +++ .../bindings/display/msm/dpu-sdm845.yaml | 216 ++ .../devicetree/bindings/display/msm/dpu.txt| 141 .../display/msm/dsi-common-controller.yaml | 249 + .../display/msm/dsi-controller-sc7180.yaml | 120 ++ .../display/msm/dsi-controller-sdm845.yaml | 120 ++ .../bindings/display/msm/dsi-phy-10nm.yaml | 62 + .../bindings/display/msm/dsi-phy-14nm.yaml | 61 + .../bindings/display/msm/dsi-phy-20nm.yaml | 66 ++ .../bindings/display/msm/dsi-phy-28nm.yaml | 62 + .../bindings/display/msm/dsi-phy-sc7180.yaml | 80 +++ .../bindings/display/msm/dsi-phy-sdm845.yaml | 82 +++ .../devicetree/bindings/display/msm/dsi.txt| 246 13 files changed, 1354 insertions(+), 387 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-common-controller.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt diff --git a/Documentation/devicetree/bindin
[v6] dt-bindings: msm: disp: add yaml schemas for DPU and DSI bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for the device tree bindings for the same. Signed-off-by: Krishna Manikandan Changes in v2: - Changed dpu to DPU (Sam Ravnborg) - Fixed indentation issues (Sam Ravnborg) - Added empty line between different properties (Sam Ravnborg) - Replaced reference txt files with their corresponding yaml files (Sam Ravnborg) - Modified the file to use "|" only when it is necessary (Sam Ravnborg) Changes in v3: - Corrected the license used (Rob Herring) - Added maxItems for properties (Rob Herring) - Dropped generic descriptions (Rob Herring) - Added ranges property (Rob Herring) - Corrected the indendation (Rob Herring) - Added additionalProperties (Rob Herring) - Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring) - Corrected description for pinctrl-names (Rob Herring) - Corrected the examples used in yaml file (Rob Herring) - Delete dsi.txt and dpu.txt (Rob Herring) Changes in v4: - Move schema up by one level (Rob Herring) - Add patternProperties for mdp node (Rob Herring) - Corrected description of some properties (Rob Herring) Changes in v5: - Correct the indentation (Rob Herring) - Remove unnecessary description from properties (Rob Herring) - Correct the number of interconnect entries (Rob Herring) - Add interconnect names for sc7180 (Rob Herring) - Add description for ports (Rob Herring) - Remove common properties (Rob Herring) - Add unevalutatedProperties (Rob Herring) - Reference existing dsi controller yaml in the common dsi controller file (Rob Herring) - Correct the description of clock names to include only the clocks that are required (Rob Herring) - Remove properties which are already covered under the common binding (Rob Herring) - Add dsi phy supply nodes which are required for sc7180 and sdm845 targets (Rob Herring) - Add type ref for syscon-sfpb (Rob Herring) Changes in v6: - Fixed errors during dt_binding_check (Rob Herring) - Add maxItems for phys and phys-names (Rob Herring) - Use unevaluatedProperties wherever required (Rob Herring) - Removed interrupt controller from required properties for dsi controller (Rob Herring) - Add constraints for dsi-phy reg-names based on the compatible phy version (Rob Herring) - Add constraints for dsi-phy supply nodes based on the compatible phy version (Rob Herring) --- .../bindings/display/msm/dpu-sc7180.yaml | 236 .../bindings/display/msm/dpu-sdm845.yaml | 216 ++ .../devicetree/bindings/display/msm/dpu.txt| 141 .../display/msm/dsi-common-controller.yaml | 180 +++ .../display/msm/dsi-controller-sc7180.yaml | 120 ++ .../display/msm/dsi-controller-sdm845.yaml | 120 ++ .../bindings/display/msm/dsi-phy-sc7180.yaml | 80 +++ .../bindings/display/msm/dsi-phy-sdm845.yaml | 82 +++ .../devicetree/bindings/display/msm/dsi-phy.yaml | 126 +++ .../devicetree/bindings/display/msm/dsi.txt| 246 - 10 files changed, 1160 insertions(+), 387 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-common-controller.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml new file mode 100644 index 000..df70393 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -0,0 +1,236 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DPU dt properties. + +maintainers: + - Krishna Manikandan + +description: | + Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates + sub-blocks like DPU display controller, DSI and DP
[v5] dt-bindings: msm: disp: add yaml schemas for DPU and DSI bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema
for the device tree bindings for the same.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Changed dpu to DPU (Sam Ravnborg)
- Fixed indentation issues (Sam Ravnborg)
- Added empty line between different properties (Sam Ravnborg)
- Replaced reference txt files with their corresponding
yaml files (Sam Ravnborg)
- Modified the file to use "|" only when it is
necessary (Sam Ravnborg)
Changes in v3:
- Corrected the license used (Rob Herring)
- Added maxItems for properties (Rob Herring)
- Dropped generic descriptions (Rob Herring)
- Added ranges property (Rob Herring)
- Corrected the indendation (Rob Herring)
- Added additionalProperties (Rob Herring)
- Split dsi file into two, one for dsi controller
and another one for dsi phy per target (Rob Herring)
- Corrected description for pinctrl-names (Rob Herring)
- Corrected the examples used in yaml file (Rob Herring)
- Delete dsi.txt and dpu.txt (Rob Herring)
Changes in v4:
- Move schema up by one level (Rob Herring)
- Add patternProperties for mdp node (Rob Herring)
- Corrected description of some properties (Rob Herring)
Changes in v5:
- Correct the indentation (Rob Herring)
- Remove unnecessary description from properties (Rob Herring)
- Correct the number of interconnect entries (Rob Herring)
- Add interconnect names for sc7180 (Rob Herring)
- Add description for ports (Rob Herring)
- Remove common properties (Rob Herring)
- Add unevalutatedProperties (Rob Herring)
- Reference existing dsi controller yaml in the common
dsi controller file (Rob Herring)
- Correct the description of clock names to include only the
clocks that are required (Rob Herring)
- Remove properties which are already covered under the common
binding (Rob Herring)
- Add dsi phy supply nodes which are required for sc7180 and
sdm845 targets (Rob Herring)
- Add type ref for syscon-sfpb (Rob Herring)
---
.../bindings/display/dsi-controller.yaml | 4 +-
.../bindings/display/msm/dpu-sc7180.yaml | 230 +++
.../bindings/display/msm/dpu-sdm845.yaml | 210 ++
.../devicetree/bindings/display/msm/dpu.txt| 141
.../display/msm/dsi-common-controller.yaml | 178 +++
.../display/msm/dsi-controller-sc7180.yaml | 115 ++
.../display/msm/dsi-controller-sdm845.yaml | 115 ++
.../bindings/display/msm/dsi-phy-sc7180.yaml | 79 +++
.../bindings/display/msm/dsi-phy-sdm845.yaml | 81 +++
.../devicetree/bindings/display/msm/dsi-phy.yaml | 79 +++
.../devicetree/bindings/display/msm/dsi.txt| 246 -
11 files changed, 1089 insertions(+), 389 deletions(-)
create mode 100644
Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-common-controller.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-controller-sc7180.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-controller-sdm845.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-sc7180.yaml
create mode 100644
Documentation/devicetree/bindings/display/msm/dsi-phy-sdm845.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy.yaml
delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt
diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml
b/Documentation/devicetree/bindings/display/dsi-controller.yaml
index fd986c3..85b71b1 100644
--- a/Documentation/devicetree/bindings/display/dsi-controller.yaml
+++ b/Documentation/devicetree/bindings/display/dsi-controller.yaml
@@ -28,7 +28,7 @@ description: |
properties:
$nodename:
-pattern: "^dsi-controller(@.*)?$"
+pattern: "^dsi(@.*)?$"
"#address-cells":
const: 1
@@ -76,7 +76,7 @@ patternProperties:
examples:
- |
#include
-dsi-controller@a0351000 {
+dsi@a0351000 {
reg = <0xa0351000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
new file mode 100644
index 000..3afa85c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -0,0 +1,230 @
Re: [PATCH v6] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Tue, Jun 23, 2020 at 07:07:11AM -0700, Guenter Roeck wrote:
> On Mon, Jun 22, 2020 at 09:07:27PM +0530, Manikandan Elumalai wrote:
> > The adm1278 temp attribute need it for openbmc platform .
> > This feature not enabled by default, so PMON_CONFIG needs to enable it.
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Manikandan Elumalai
>
> Applied.
Thanks Guenter.
>
> Thanks,
> Guenter
>
> > ---
> > v5 -> v6:
> > add Reported-by in commit log
> > align commit and change log as per guidelines.
> > v4 -> v5:
> > align commit and change log.
> > v3 -> v4:
> > kernel test robot CI warning
> > v2 -> v3:
> > fix invalid signed-off.
> > removed checkpath warnings.
> > write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
> > v1 -> v2:
> > add Signed-off-by.
> > removed ADM1278_TEMP1_EN check.
> >
> > drivers/hwmon/pmbus/adm1275.c | 12 +---
> > 1 file changed, 5 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> > index 5caa37fb..d4e1925 100644
> > --- a/drivers/hwmon/pmbus/adm1275.c
> > +++ b/drivers/hwmon/pmbus/adm1275.c
> > @@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
> > tindex = 3;
> >
> > info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> >
> > - /* Enable VOUT if not enabled (it is disabled by default) */
> > - if (!(config & ADM1278_VOUT_EN)) {
> > - config |= ADM1278_VOUT_EN;
> > + /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
> > + if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
> > (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
> > + config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
> > ret = i2c_smbus_write_byte_data(client,
> > ADM1275_PMON_CONFIG,
> > config);
> > @@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
> > }
> > }
> >
> > - if (config & ADM1278_TEMP1_EN)
> > - info->func[0] |=
> > - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> > if (config & ADM1278_VIN_EN)
> > info->func[0] |= PMBUS_HAVE_VIN;
> > break;
[PATCH v6] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
Reported-by: kernel test robot
Signed-off-by: Manikandan Elumalai
---
v5 -> v6:
add Reported-by in commit log
align commit and change log as per guidelines.
v4 -> v5:
align commit and change log.
v3 -> v4:
kernel test robot CI warning
v2 -> v3:
fix invalid signed-off.
removed checkpath warnings.
write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
v1 -> v2:
add Signed-off-by.
removed ADM1278_TEMP1_EN check.
drivers/hwmon/pmbus/adm1275.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..d4e1925 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
- if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
+ if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
(ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
Re: Linux-aspeed Digest, Vol 37, Issue 25
On Sat, Jun 20, 2020 at 04:41:13AM +1000, linux-aspeed-requ...@lists.ozlabs.org
wrote:
> Send Linux-aspeed mailing list submissions to
> linux-asp...@lists.ozlabs.org
>
> To subscribe or unsubscribe via the World Wide Web, visit
> https://lists.ozlabs.org/listinfo/linux-aspeed
> or, via email, send a message with subject or body 'help' to
> linux-aspeed-requ...@lists.ozlabs.org
>
> You can reach the person managing the list at
> linux-aspeed-ow...@lists.ozlabs.org
>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of Linux-aspeed digest..."
>
>
> Today's Topics:
>
>1. [PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
> (Manikandan Elumalai)
>2. Re: [PATCH v4] hwmon:(adm1275) Enable adm1278
> ADM1278_TEMP1_EN (Guenter Roeck)
>3. [PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
> (Manikandan Elumalai)
>4. Re: [PATCH v4] hwmon:(adm1275) Enable adm1278
> ADM1278_TEMP1_EN (Milton Miller II)
>5. Re: [PATCH v4] hwmon:(adm1275) Enable adm1278
> ADM1278_TEMP1_EN (Guenter Roeck)
>
>
> ------
>
> Message: 1
> Date: Fri, 19 Jun 2020 20:18:53 +0530
> From: Manikandan Elumalai
> To: Guenter Roeck , Jean Delvare
> , linux-hw...@vger.kernel.org,
> linux-kernel@vger.kernel.org
> Cc: saipsdas...@fb.com, patric...@fb.com, vijaykhe...@fb.com,
> linux-asp...@lists.ozlabs.org, open...@lists.ozlabs.org,
> manikanda...@hcl.com
> Subject: [PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
> Message-ID: <20200619144853.GA18271@cnn>
> Content-Type: text/plain; charset=us-ascii
>
> The adm1278 temp attribute need it for openbmc platform .
> This feature not enabled by default, so PMON_CONFIG needs to enable it.
>
> v4:
> ---
> Reported-by: kernel test robot
> v3:
>
> fix invalid signed-off.
> removed checkpath warnings.
> write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
> v2:
>
> add Signed-off-by.
> removed ADM1278_TEMP1_EN check.
>
> Signed-off-by: Manikandan Elumalai
> ---
> drivers/hwmon/pmbus/adm1275.c | 12 +---
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> index 5caa37fb..d4e1925 100644
> --- a/drivers/hwmon/pmbus/adm1275.c
> +++ b/drivers/hwmon/pmbus/adm1275.c
> @@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
> tindex = 3;
>
> info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
>
> - /* Enable VOUT if not enabled (it is disabled by default) */
> - if (!(config & ADM1278_VOUT_EN)) {
> - config |= ADM1278_VOUT_EN;
> + /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
> + if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
> (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
> + config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
> ret = i2c_smbus_write_byte_data(client,
> ADM1275_PMON_CONFIG,
> config);
> @@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
> }
> }
>
> - if (config & ADM1278_TEMP1_EN)
> - info->func[0] |=
> - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> if (config & ADM1278_VIN_EN)
> info->func[0] |= PMBUS_HAVE_VIN;
> break;
> --
> 2.7.4
>
>
>
> --
>
> Message: 2
> Date: Fri, 19 Jun 2020 08:38:32 -0700
> From: Guenter Roeck
> To: Manikandan Elumalai
> Cc: Jean Delvare , linux-hw...@vger.kernel.org,
> linux-kernel@vger.kernel.org, saipsdas...@fb.com, patric...@fb.com,
> vijaykhe...@fb.com, linux-asp...@lists.ozlabs.org,
> open...@lists.ozlabs.org, manikanda...@hcl.com
> Subject: Re: [PATCH v4] hwmon:(adm1275) Enable adm1278
> ADM1278_TEMP1_EN
> Message-ID: <20200619153832.ga57...@roeck-us.net>
> Content-Type: text/plain; charset=us-ascii
>
> On Fri, Jun 19, 2020 at 08:18:53PM +0530, Manikandan Elumalai wrote:
> > The adm1278 temp attribute
[PATCH v5] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
Signed-off-by: Manikandan Elumalai
---
---v5 -align commit and change log.
---v4 -Reported-by: kernel test robot
---v3 -fix invalid signed-off.
--- -removed checkpath warnings.
--- -write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line
operation.
---v2 -add Signed-off-by.
--- -removed ADM1278_TEMP1_EN check.
---
---
drivers/hwmon/pmbus/adm1275.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..d4e1925 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
- if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
+ if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
(ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
[PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
Signed-off-by: Manikandan Elumalai
---
---v4 -Reported-by: kernel test robot
---v3 -fix invalid signed-off.
--- -removed checkpath warnings.
--- -write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line
operation.
---v2 -add Signed-off-by.
--- -removed ADM1278_TEMP1_EN check.
---
---
drivers/hwmon/pmbus/adm1275.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..d4e1925 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
- if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
+ if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
(ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
[PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
v4:
---
Reported-by: kernel test robot
v3:
fix invalid signed-off.
removed checkpath warnings.
write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
v2:
add Signed-off-by.
removed ADM1278_TEMP1_EN check.
Signed-off-by: Manikandan Elumalai
---
drivers/hwmon/pmbus/adm1275.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..d4e1925 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
- if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
+ if ((config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) !=
(ADM1278_VOUT_EN | ADM1278_TEMP1_EN)) {
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
[v2] drm/msm/dpu: request for display color blocks based on hw catalog entry
From: Kalyan Thota
Request for color processing blocks only if they are
available in the display hw catalog and they are
sufficient in number for the selection.
Changes in v2:
- Include Fixes tag in commit message (Rob Clark)
- Adding the Tested by tag as there are no code
changes in v2
Fixes: e47616df008b ("drm/msm/dpu: add support for color processing blocks in
dpu driver")
Signed-off-by: Kalyan Thota
Tested-by: John Stultz
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 63976dc..9f8de77 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -521,7 +521,7 @@ static struct msm_display_topology dpu_encoder_get_topology(
struct dpu_kms *dpu_kms,
struct drm_display_mode *mode)
{
- struct msm_display_topology topology;
+ struct msm_display_topology topology = {0};
int i, intf_count = 0;
for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
@@ -537,7 +537,8 @@ static struct msm_display_topology dpu_encoder_get_topology(
* 1 LM, 1 INTF
* 2 LM, 1 INTF (stream merge to support high resolution interfaces)
*
-* Adding color blocks only to primary interface
+* Adding color blocks only to primary interface if available in
+* sufficient number
*/
if (intf_count == 2)
topology.num_lm = 2;
@@ -546,8 +547,11 @@ static struct msm_display_topology
dpu_encoder_get_topology(
else
topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1;
- if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI)
- topology.num_dspp = topology.num_lm;
+ if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
+ if (dpu_kms->catalog->dspp &&
+ (dpu_kms->catalog->dspp_count >= topology.num_lm))
+ topology.num_dspp = topology.num_lm;
+ }
topology.num_enc = 0;
topology.num_intf = intf_count;
--
1.9.1
[v1] drm/msm/dpu: request for display color blocks based on hw catalog entry
From: Kalyan Thota
Request for color processing blocks only if they are
available in the display hw catalog and they are
sufficient in number for the selection.
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 63976dc..9f8de77 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -521,7 +521,7 @@ static struct msm_display_topology dpu_encoder_get_topology(
struct dpu_kms *dpu_kms,
struct drm_display_mode *mode)
{
- struct msm_display_topology topology;
+ struct msm_display_topology topology = {0};
int i, intf_count = 0;
for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
@@ -537,7 +537,8 @@ static struct msm_display_topology dpu_encoder_get_topology(
* 1 LM, 1 INTF
* 2 LM, 1 INTF (stream merge to support high resolution interfaces)
*
-* Adding color blocks only to primary interface
+* Adding color blocks only to primary interface if available in
+* sufficient number
*/
if (intf_count == 2)
topology.num_lm = 2;
@@ -546,8 +547,11 @@ static struct msm_display_topology
dpu_encoder_get_topology(
else
topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1;
- if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI)
- topology.num_dspp = topology.num_lm;
+ if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
+ if (dpu_kms->catalog->dspp &&
+ (dpu_kms->catalog->dspp_count >= topology.num_lm))
+ topology.num_dspp = topology.num_lm;
+ }
topology.num_enc = 0;
topology.num_intf = intf_count;
--
1.9.1
Re: [PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Wed, Jun 10, 2020 at 06:28:33AM -0700, Guenter Roeck wrote:
> On Wed, Jun 10, 2020 at 01:56:11PM +0530, Manikandan Elumalai wrote:
> > The adm1278 temp attribute need it for openbmc platform .
> > This feature not enabled by default, so PMON_CONFIG needs to enable it.
> >
> > v4:
> > Reported-by: kernel test robot
> > ---
> > changes in conditional check to enable vout & temp1 by default.
> > v3:
> >
> > fix invalid signed-off.
> > removed checkpath warnings.
> > write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
> > v2:
> >
> > add Signed-off-by.
> > removed ADM1278_TEMP1_EN check.
> >
> > Signed-off-by: Manikandan Elumalai
>
> Applied (and I fixed the problem reported by 0-day, so no need to resend).
> Thank you Guenter.
> Thanks,
> Guenter
>
> > ---
> > drivers/hwmon/pmbus/adm1275.c | 12 +---
> > 1 file changed, 5 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> > index 5caa37fb..d4e1925 100644
> > --- a/drivers/hwmon/pmbus/adm1275.c
> > +++ b/drivers/hwmon/pmbus/adm1275.c
> > @@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
> > tindex = 3;
> >
> > info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> >
> > - /* Enable VOUT if not enabled (it is disabled by default) */
> > - if (!(config & ADM1278_VOUT_EN)) {
> > - config |= ADM1278_VOUT_EN;
> > + /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
> > + if (config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN) !=
> > ADM1278_VOUT_EN | ADM1278_TEMP1_EN) {
> > + config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
> > ret = i2c_smbus_write_byte_data(client,
> > ADM1275_PMON_CONFIG,
> > config);
> > @@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
> > }
> > }
> >
> > - if (config & ADM1278_TEMP1_EN)
> > - info->func[0] |=
> > - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> > if (config & ADM1278_VIN_EN)
> > info->func[0] |= PMBUS_HAVE_VIN;
> > break;
[PATCH v4] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
v4:
---
changes in conditional check to enable vout & temp1 by default.
v3:
fix invalid signed-off.
removed checkpath warnings.
write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
v2:
add Signed-off-by.
removed ADM1278_TEMP1_EN check.
Signed-off-by: Manikandan Elumalai
---
drivers/hwmon/pmbus/adm1275.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..d4e1925 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
- if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
+ if (config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN) !=
ADM1278_VOUT_EN | ADM1278_TEMP1_EN) {
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
Re: [PATCH v3] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Mon, Jun 08, 2020 at 06:49:45AM -0700, Guenter Roeck wrote:
> On 6/8/20 3:43 AM, Manikandan Elumalai wrote:
> > The adm1278 temp attribute need it for openbmc platform .
> > This feature not enabled by default, so PMON_CONFIG needs to enable it.
> >
> > v3:
> >
> > fix invalid signed-off.
> > removed checkpath warnings.
> > write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
> >
> > v2:
> >
> > add Signed-off-by.
> > removed ADM1278_TEMP1_EN check.
> >
> > Signed-off-by: Manikandan Elumalai
> > ---
> > drivers/hwmon/pmbus/adm1275.c | 10 --
> > 1 file changed, 4 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> > index 5caa37fb..4782e31 100644
> > --- a/drivers/hwmon/pmbus/adm1275.c
> > +++ b/drivers/hwmon/pmbus/adm1275.c
> > @@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
> > tindex = 3;
> >
> > info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> >
> > - /* Enable VOUT if not enabled (it is disabled by default) */
> > + /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
> > if (!(config & ADM1278_VOUT_EN)) {
>
> This if statement needs to be
> if (config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN) !=
> ADM1278_VOUT_EN | ADM1278_TEMP1_EN)
>
Hi Guenter,
The below warning shown by checkpatch after changes,
WARNING: line over 80 characters
#38: FILE: drivers/hwmon/pmbus/adm1275.c:672:
+ if (config & (ADM1278_VOUT_EN | ADM1278_TEMP1_EN) !=
ADM1278_VOUT_EN | ADM1278_TEMP1_EN) {
total: 0 errors, 1 warnings, 24 lines checked
I didn't see any if() condition made as two line in the driver .
Is this acceptable warning ?
Thanks
Mani.E
> > - config |= ADM1278_VOUT_EN;
> > + config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
> > ret = i2c_smbus_write_byte_data(client,
> > ADM1275_PMON_CONFIG,
> > config);
> > @@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
> > }
> > }
> >
> > - if (config & ADM1278_TEMP1_EN)
> > - info->func[0] |=
> > - PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> > if (config & ADM1278_VIN_EN)
> > info->func[0] |= PMBUS_HAVE_VIN;
> > break;
> >
>
[PATCH v3] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temp attribute need it for openbmc platform .
This feature not enabled by default, so PMON_CONFIG needs to enable it.
v3:
fix invalid signed-off.
removed checkpath warnings.
write ADM1278_TEMP1_EN and ADM1278_VOUT_EN conf in single line operation.
v2:
add Signed-off-by.
removed ADM1278_TEMP1_EN check.
Signed-off-by: Manikandan Elumalai
---
drivers/hwmon/pmbus/adm1275.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..4782e31 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,12 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
- /* Enable VOUT if not enabled (it is disabled by default) */
+ /* Enable VOUT & TEMP1 if not enabled (disabled by default) */
if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ config |= ADM1278_VOUT_EN | ADM1278_TEMP1_EN;
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -681,9 +682,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
Re: [PATCH v2] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Fri, Jun 05, 2020 at 11:04:51AM -0700, Guenter Roeck wrote:
> On Fri, Jun 05, 2020 at 10:18:21PM +0530, Manikandan wrote:
> > On Fri, May 29, 2020 at 10:30:16AM -0700, Guenter Roeck wrote:
> > > On 5/29/20 5:46 AM, Manikandan Elumalai wrote:
> > > > The adm1278 temperature sysfs attribute need it for one of the openbmc
> > > > platform .
> > > > This functionality is not enabled by default, so PMON_CONFIG needs to
> > > > be modified in order to enable it.
> > > >
> > > > Signed-off-by : Manikandan Elumalai
> > >
> > > This is not valid.
> > >
> > > >
> > > > v2:
> > > >- Add Signed-off-by.
> > > >- Removed ADM1278_TEMP1_EN check.
> > >
> > > checkpatch reports:
> > >
> > > > ---WARNING: Possible unwrapped commit description (prefer a maximum 75
> > > > chars per line)
> > > #14:
> > > The adm1278 temperature sysfs attribute need it for one of the openbmc
> > > platform .
> > >
> > > CHECK: Alignment should match open parenthesis
> > > #45: FILE: drivers/hwmon/pmbus/adm1275.c:679:
> > > + ret = i2c_smbus_write_byte_data(client,
> > > + ADM1275_PMON_CONFIG,
> > >
> > > WARNING: suspect code indent for conditional statements (16, 16)
> > > #47: FILE: drivers/hwmon/pmbus/adm1275.c:681:
> > > + if (ret < 0) {
> > > + dev_err(>dev,
> > >
> > > ERROR: Missing Signed-off-by: line(s)
> > >
> > > total: 1 errors, 2 warnings, 1 checks, 33 lines checked
> > >
> > > Please follow published guidelines when submitting patches.
> > >
> > > > drivers/hwmon/pmbus/adm1275.c | 21 +
> > > > 1 file changed, 17 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/hwmon/pmbus/adm1275.c
> > > > b/drivers/hwmon/pmbus/adm1275.c
> > > > index 5caa37fb..ab5fceb 100644
> > > > --- a/drivers/hwmon/pmbus/adm1275.c
> > > > +++ b/drivers/hwmon/pmbus/adm1275.c
> > > > @@ -666,7 +666,23 @@ static int adm1275_probe(struct i2c_client *client,
> > > > tindex = 3;
> > > >
> > > > info->func[0] |= PMBUS_HAVE_PIN |
> > > > PMBUS_HAVE_STATUS_INPUT |
> > > > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > > > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > > > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> > > > +
> > > > + config = i2c_smbus_read_byte_data(client,
> > > > ADM1275_PMON_CONFIG);
> > > > + if (config < 0)
> > > > + return config;
> > > > +
> > > > + /* Enable TEMP1 by default */
> > > > + config |= ADM1278_TEMP1_EN;
> > > > + ret = i2c_smbus_write_byte_data(client,
> > > > + ADM1275_PMON_CONFIG,
> > > > + config);
> > > > + if (ret < 0) {
> > > > + dev_err(>dev,
> > > > + "Failed to enable temperature config\n");
> > > > + return -ENODEV;
> > > > + }
> > >
> > > This can be handled in a single operation, together with ADM1278_VOUT_EN
> > > below. There is no need for two separate write operations.
> > >
> > Thanks for review Guenter, Patrick and Vijay.
> > Sorry for delay response.
> > I have made changes to write ADM1278_VOUT_EN and ADM1278_TEMP1_EN
> > in single
> > operation and tested in platfrom .
> > The changes given for quick look and will help if any misunderstand.
> >
> > --- a/drivers/hwmon/pmbus/adm1275.c
> > +++ b/drivers/hwmon/pmbus/adm1275.c
> > @@ -666,11 +666,11 @@ static int adm1275_probe(struct i2c_client
> > *client,
> > tindex = 3;
> >
> > info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> >
>
Re: [PATCH v2] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Fri, May 29, 2020 at 10:30:16AM -0700, Guenter Roeck wrote:
> On 5/29/20 5:46 AM, Manikandan Elumalai wrote:
> > The adm1278 temperature sysfs attribute need it for one of the openbmc
> > platform .
> > This functionality is not enabled by default, so PMON_CONFIG needs to be
> > modified in order to enable it.
> >
> > Signed-off-by : Manikandan Elumalai
>
> This is not valid.
>
> >
> > v2:
> >- Add Signed-off-by.
> >- Removed ADM1278_TEMP1_EN check.
>
> checkpatch reports:
>
> > ---WARNING: Possible unwrapped commit description (prefer a maximum 75
> > chars per line)
> #14:
> The adm1278 temperature sysfs attribute need it for one of the openbmc
> platform .
>
> CHECK: Alignment should match open parenthesis
> #45: FILE: drivers/hwmon/pmbus/adm1275.c:679:
> + ret = i2c_smbus_write_byte_data(client,
> + ADM1275_PMON_CONFIG,
>
> WARNING: suspect code indent for conditional statements (16, 16)
> #47: FILE: drivers/hwmon/pmbus/adm1275.c:681:
> + if (ret < 0) {
> + dev_err(>dev,
>
> ERROR: Missing Signed-off-by: line(s)
>
> total: 1 errors, 2 warnings, 1 checks, 33 lines checked
>
> Please follow published guidelines when submitting patches.
>
> > drivers/hwmon/pmbus/adm1275.c | 21 +
> > 1 file changed, 17 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> > index 5caa37fb..ab5fceb 100644
> > --- a/drivers/hwmon/pmbus/adm1275.c
> > +++ b/drivers/hwmon/pmbus/adm1275.c
> > @@ -666,7 +666,23 @@ static int adm1275_probe(struct i2c_client *client,
> > tindex = 3;
> >
> > info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
> > - PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
> > + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
> > + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> > +
> > + config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
> > + if (config < 0)
> > + return config;
> > +
> > + /* Enable TEMP1 by default */
> > + config |= ADM1278_TEMP1_EN;
> > + ret = i2c_smbus_write_byte_data(client,
> > + ADM1275_PMON_CONFIG,
> > + config);
> > + if (ret < 0) {
> > + dev_err(>dev,
> > + "Failed to enable temperature config\n");
> > + return -ENODEV;
> > + }
>
> This can be handled in a single operation, together with ADM1278_VOUT_EN
> below. There is no need for two separate write operations.
>
Thanks for review Guenter, Patrick and Vijay.
Sorry for delay response.
I have made changes to write ADM1278_VOUT_EN and ADM1278_TEMP1_EN in
single
operation and tested in platfrom .
The changes given for quick look and will help if any misunderstand.
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,11 +666,11 @@ static int adm1275_probe(struct i2c_client
*client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
/* Enable VOUT if not enabled (it is disabled by default) */
if (!(config & ADM1278_VOUT_EN)) {
- config |= ADM1278_VOUT_EN;
+ config |= (ADM1278_VOUT_EN | ADM1278_TEMP1_EN);
ret = i2c_smbus_write_byte_data(client,
ADM1275_PMON_CONFIG,
config);
@@ -680,10 +680,6 @@ static int adm1275_probe(struct i2c_client *client,
return -ENODEV;
}
}
-
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP |
PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
> Guenter
>
> >
> > /* Enable VOUT if not enabled (it is disabled by default) */
> >
[v2] drm/msm: add shutdown support for display platform_driver
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
This change will turn off the timing engine so
that no display transactions are requested
while mmu translations are getting disabled
during reboot sequence.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Remove NULL check from msm_pdev_shutdown (Stephen Boyd)
- Change commit text to reflect when this issue
was uncovered (Sai Prakash Ranjan)
---
drivers/gpu/drm/msm/msm_drv.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index e4b750b..94e3963 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1322,6 +1322,13 @@ static int msm_pdev_remove(struct platform_device *pdev)
return 0;
}
+static void msm_pdev_shutdown(struct platform_device *pdev)
+{
+ struct drm_device *drm = platform_get_drvdata(pdev);
+
+ drm_atomic_helper_shutdown(drm);
+}
+
static const struct of_device_id dt_match[] = {
{ .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
{ .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
@@ -1334,6 +1341,7 @@ static int msm_pdev_remove(struct platform_device *pdev)
static struct platform_driver msm_platform_driver = {
.probe = msm_pdev_probe,
.remove = msm_pdev_remove,
+ .shutdown = msm_pdev_shutdown,
.driver = {
.name = "msm",
.of_match_table = dt_match,
--
1.9.1
[PATCH v2] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temperature sysfs attribute need it for one of the openbmc platform
.
This functionality is not enabled by default, so PMON_CONFIG needs to be
modified in order to enable it.
Signed-off-by : Manikandan Elumalai
v2:
- Add Signed-off-by.
- Removed ADM1278_TEMP1_EN check.
---
drivers/hwmon/pmbus/adm1275.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..ab5fceb 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -666,7 +666,23 @@ static int adm1275_probe(struct i2c_client *client,
tindex = 3;
info->func[0] |= PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT |
- PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT;
+ PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+ PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
+
+ config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
+ if (config < 0)
+ return config;
+
+ /* Enable TEMP1 by default */
+ config |= ADM1278_TEMP1_EN;
+ ret = i2c_smbus_write_byte_data(client,
+ ADM1275_PMON_CONFIG,
+ config);
+ if (ret < 0) {
+ dev_err(>dev,
+ "Failed to enable temperature config\n");
+ return -ENODEV;
+ }
/* Enable VOUT if not enabled (it is disabled by default) */
if (!(config & ADM1278_VOUT_EN)) {
@@ -681,9 +697,6 @@ static int adm1275_probe(struct i2c_client *client,
}
}
- if (config & ADM1278_TEMP1_EN)
- info->func[0] |=
- PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
if (config & ADM1278_VIN_EN)
info->func[0] |= PMBUS_HAVE_VIN;
break;
--
2.7.4
Re: [PATCH] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
On Thu, May 28, 2020 at 05:34:22PM +, Vijay Khemka wrote:
>
>
> On 5/28/20, 7:15 AM, "Manikandan Elumalai"
> wrote:
>
>
> The adm1278 temperature sysfs attribute need it for one of the our
> openbmc platform .
> This functionality is not enabled by default, so PMON_CONFIG needs to be
> modified in order to enable it.
>
> There is no Signed-off-by.
>
> ---
> drivers/hwmon/pmbus/adm1275.c | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
> index 5caa37fb..47b293d 100644
> --- a/drivers/hwmon/pmbus/adm1275.c
> +++ b/drivers/hwmon/pmbus/adm1275.c
> @@ -681,6 +681,21 @@ static int adm1275_probe(struct i2c_client *client,
> }
> }
>
> + config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
> + if (config < 0)
> + return config;
> +
> + /* Enable TEMP1 by defult */
> + config |= ADM1278_TEMP1_EN;
> + ret = i2c_smbus_write_byte_data(client,
> + ADM1275_PMON_CONFIG,
> + config);
> + if (ret < 0) {
> + dev_err(>dev,
> + "Failed to enable temperature config\n");
> + return -ENODEV;
> + }
> +
> if (config & ADM1278_TEMP1_EN)
>
> This check becomes irrelevant as you are enabling it above then rather than
> enabling it just remove this check.
Thanks for review Vijay. I will submit changes in v2.
>
> info->func[0] |=
> PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
> --
> 2.7.4
>
>
>
[PATCH] hwmon:(adm1275) Enable adm1278 ADM1278_TEMP1_EN
The adm1278 temperature sysfs attribute need it for one of the our openbmc
platform .
This functionality is not enabled by default, so PMON_CONFIG needs to be
modified in order to enable it.
---
drivers/hwmon/pmbus/adm1275.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c
index 5caa37fb..47b293d 100644
--- a/drivers/hwmon/pmbus/adm1275.c
+++ b/drivers/hwmon/pmbus/adm1275.c
@@ -681,6 +681,21 @@ static int adm1275_probe(struct i2c_client *client,
}
}
+ config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);
+ if (config < 0)
+ return config;
+
+ /* Enable TEMP1 by defult */
+ config |= ADM1278_TEMP1_EN;
+ ret = i2c_smbus_write_byte_data(client,
+ ADM1275_PMON_CONFIG,
+ config);
+ if (ret < 0) {
+ dev_err(>dev,
+ "Failed to enable temperature config\n");
+ return -ENODEV;
+ }
+
if (config & ADM1278_TEMP1_EN)
info->func[0] |=
PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP;
--
2.7.4
[v1] drm/msm: add shutdown support for display platform_driver
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/msm_drv.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index e4b750b..7a8953f 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1322,6 +1322,18 @@ static int msm_pdev_remove(struct platform_device *pdev)
return 0;
}
+static void msm_pdev_shutdown(struct platform_device *pdev)
+{
+ struct drm_device *drm = platform_get_drvdata(pdev);
+
+ if (!drm) {
+ DRM_ERROR("Invalid drm device node\n");
+ return;
+ }
+
+ drm_atomic_helper_shutdown(drm);
+}
+
static const struct of_device_id dt_match[] = {
{ .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
{ .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
@@ -1334,6 +1346,7 @@ static int msm_pdev_remove(struct platform_device *pdev)
static struct platform_driver msm_platform_driver = {
.probe = msm_pdev_probe,
.remove = msm_pdev_remove,
+ .shutdown = msm_pdev_shutdown,
.driver = {
.name = "msm",
.of_match_table = dt_match,
--
1.9.1
[v1] drm/msm/dpu: allow initialization of encoder locks during encoder init
In the current implementation, mutex initialization for encoder mutex locks are done during encoder setup. This can lead to scenarios where the lock is used before it is initialized. Move mutex_init to dpu_encoder_init to avoid this. Signed-off-by: Krishna Manikandan --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index f8ac3bf..21730a5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2145,7 +2145,6 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, dpu_enc = to_dpu_encoder_virt(enc); - mutex_init(_enc->enc_lock); ret = dpu_encoder_setup_display(dpu_enc, dpu_kms, disp_info); if (ret) goto fail; @@ -2160,7 +2159,6 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, 0); - mutex_init(_enc->rc_lock); INIT_DELAYED_WORK(_enc->delayed_off_work, dpu_encoder_off_work); dpu_enc->idle_timeout = IDLE_TIMEOUT; @@ -2205,6 +2203,8 @@ struct drm_encoder *dpu_encoder_init(struct drm_device *dev, spin_lock_init(_enc->enc_spinlock); dpu_enc->enabled = false; + mutex_init(_enc->enc_lock); + mutex_init(_enc->rc_lock); return _enc->base; } -- 1.9.1
[v4] dt-bindings: msm: disp: add yaml schemas for DPU and DSI bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for the device tree bindings for the same. Signed-off-by: Krishna Manikandan Changes in v2: - Changed dpu to DPU (Sam Ravnborg) - Fixed indentation issues (Sam Ravnborg) - Added empty line between different properties (Sam Ravnborg) - Replaced reference txt files with their corresponding yaml files (Sam Ravnborg) - Modified the file to use "|" only when it is necessary (Sam Ravnborg) Changes in v3: - Corrected the license used (Rob Herring) - Added maxItems for properties (Rob Herring) - Dropped generic descriptions (Rob Herring) - Added ranges property (Rob Herring) - Corrected the indendation (Rob Herring) - Added additionalProperties (Rob Herring) - Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring) - Corrected description for pinctrl-names (Rob Herring) - Corrected the examples used in yaml file (Rob Herring) - Delete dsi.txt and dpu.txt (Rob Herring) Changes in v4: - Move schema up by one level (Rob Herring) - Add patternProperties for mdp node (Rob Herring) - Corrected description of some properties (Rob Herring) --- .../bindings/display/msm/dpu-sc7180.yaml | 243 .../bindings/display/msm/dpu-sdm845.yaml | 220 ++ .../devicetree/bindings/display/msm/dpu.txt| 141 .../display/msm/dsi-controller-sc7180.yaml | 123 +++ .../display/msm/dsi-controller-sdm845.yaml | 120 ++ .../bindings/display/msm/dsi-controller.yaml | 151 + .../bindings/display/msm/dsi-phy-sc7180.yaml | 75 +++ .../bindings/display/msm/dsi-phy-sdm845.yaml | 76 +++ .../devicetree/bindings/display/msm/dsi-phy.yaml | 82 +++ .../devicetree/bindings/display/msm/dsi.txt| 246 - 10 files changed, 1090 insertions(+), 387 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-sdm845.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml new file mode 100644 index 000..b5607f9 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -0,0 +1,243 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DPU dt properties. + +maintainers: + - Krishna Manikandan + +description: | + Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree + bindings of MDSS and DPU are mentioned for SC7180 target. + +properties: + compatible: +items: + - const: qcom,sc7180-mdss + reg: +maxItems: 1 + + reg-names: +const: mdss + + power-domains: +maxItems: 1 + + clocks: +maxItems: 3 + + clock-names: +description: | + Device clock names in the same order as mentioned in clocks property. + The required clocks are mentioned below. +items: + - const: iface + - const: ahb + - const: core + + interrupts: +maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": +const: 1 + + iommus: +maxItems: 1 + + "#address-cells": +const: 2 + + "#size-cells": +const: 2 + + ranges: true + + interconnects: +description: | + Interconnect path specifier for MDSS according to + Documentation/devicetree/bindings/interconnect/interconnect.txt. + An entry should contain 2 paths corresponding to 2 AXI ports representing + source and destination ports. +maxItems: 1 + + interconnect-names: +description: | + MDSS will have 2 port names to differentiate between the + 2 interconnect paths defined with interconnect specifie
[v1] drm/msm/dpu: update bandwidth threshold check
Maximum allowed bandwidth has no dependency on the type
of panel used. Hence, cleanup the code to use max_bw_high
as the threshold value for bandwidth checks.
Update the maximum allowed bandwidth as 6.8Gbps for
SC7180 target.
Signed-off-by: Krishna Manikandan
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
2 files changed, 3 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 11f2beb..7c230f7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -36,22 +36,6 @@ static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc
*crtc)
return to_dpu_kms(priv->kms);
}
-static bool _dpu_core_video_mode_intf_connected(struct drm_crtc *crtc)
-{
- struct drm_crtc *tmp_crtc;
-
- drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if ((dpu_crtc_get_intf_mode(tmp_crtc) == INTF_MODE_VIDEO) &&
- tmp_crtc->enabled) {
- DPU_DEBUG("video interface connected crtc:%d\n",
- tmp_crtc->base.id);
- return true;
- }
- }
-
- return false;
-}
-
static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
struct drm_crtc *crtc,
struct drm_crtc_state *state,
@@ -94,7 +78,6 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
u32 bw, threshold;
u64 bw_sum_of_intfs = 0;
enum dpu_crtc_client_type curr_client_type;
- bool is_video_mode;
struct dpu_crtc_state *dpu_cstate;
struct drm_crtc *tmp_crtc;
struct dpu_kms *kms;
@@ -144,11 +127,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000);
DPU_DEBUG("calculated bandwidth=%uk\n", bw);
- is_video_mode = dpu_crtc_get_intf_mode(crtc) == INTF_MODE_VIDEO;
- threshold = (is_video_mode ||
- _dpu_core_video_mode_intf_connected(crtc)) ?
- kms->catalog->perf.max_bw_low :
- kms->catalog->perf.max_bw_high;
+ threshold = kms->catalog->perf.max_bw_high;
DPU_DEBUG("final threshold bw limit = %d\n", threshold);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index c567917..6ad7472 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -515,8 +515,8 @@
};
static const struct dpu_perf_cfg sc7180_perf_data = {
- .max_bw_low = 390,
- .max_bw_high = 550,
+ .max_bw_low = 680,
+ .max_bw_high = 680,
.min_core_ib = 240,
.min_llcc_ib = 80,
.min_dram_ib = 80,
--
1.9.1
