Re: [PATCH v2] selftest: txtimestamp: fix net ns entry logic

2020-07-22 Thread Paolo Pisati
On Tue, Jul 21, 2020 at 6:26 PM Willem de Bruijn
 wrote:
>
> Fixes: cda261f421ba ("selftests: add txtimestamp kselftest")
>
> Acked-by: Willem de Bruijn 

Besides, is it just me or this test fails frequently? I've been
running it on 5.4.x, 5.7.x and 5.8-rcX and it often fails:

...
USR: 1595405084 s 947366 us (seq=0, len=0)
SND: 1595405084 s 948686 us (seq=9, len=10)  (USR +1319 us)
ERROR: 6542 us expected between 6000 and 6500
ACK: 1595405084 s 953908 us (seq=9, len=10)  (USR +6541 us)
USR: 1595405084 s 997979 us (seq=0, len=0)
SND: 1595405084 s 999101 us (seq=19, len=10)  (USR +1121 us)
ACK: 1595405085 s 4438 us (seq=19, len=10)  (USR +6458 us)
USR: 1595405085 s 49317 us (seq=0, len=0)
SND: 1595405085 s 50680 us (seq=29, len=10)  (USR +1363 us)
ERROR: 6661 us expected between 6000 and 6500
ACK: 1595405085 s 55978 us (seq=29, len=10)  (USR +6661 us)
USR: 1595405085 s 101049 us (seq=0, len=0)
SND: 1595405085 s 102342 us (seq=39, len=10)  (USR +1293 us)
ERROR: 6578 us expected between 6000 and 6500
ACK: 1595405085 s 107627 us (seq=39, len=10)  (USR +6577 us)
USR-SND: count=4, avg=1274 us, min=1121 us, max=1363 us
USR-ACK: count=4, avg=6559 us, min=6458 us, max=6661 us


In particular, "run_test_v4v6 ${args}   # tcp" is the most
susceptible to failures (though i've seen the udp variant fail too).
-- 
bye,
p.


[PATCH v2] selftest: txtimestamp: fix net ns entry logic

2020-07-21 Thread Paolo Pisati
According to 'man 8 ip-netns', if `ip netns identify` returns an empty string,
there's no net namespace associated with current PID: fix the net ns entrance
logic.

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/net/txtimestamp.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/net/txtimestamp.sh 
b/tools/testing/selftests/net/txtimestamp.sh
index eea6f5193693..31637769f59f 100755
--- a/tools/testing/selftests/net/txtimestamp.sh
+++ b/tools/testing/selftests/net/txtimestamp.sh
@@ -75,7 +75,7 @@ main() {
fi
 }
 
-if [[ "$(ip netns identify)" == "root" ]]; then
+if [[ -z "$(ip netns identify)" ]]; then
./in_netns.sh $0 $@
 else
main $@
-- 
2.27.0



[PATCH] selftests: txtimestamp: tear down setup() 'tc' and 'ip' env on EXIT

2020-07-21 Thread Paolo Pisati
Add a cleanup() path upon exit, making it possible to run the test twice in a
row:

$ sudo bash -x ./txtimestamp.sh
+ set -e
++ ip netns identify
+ [[ '' == \r\o\o\t ]]
+ main
+ [[ 0 -eq 0 ]]
+ run_test_all
+ setup
+ tc qdisc add dev lo root netem delay 1ms
Error: Exclusivity flag on, cannot modify.

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/net/txtimestamp.sh | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/tools/testing/selftests/net/txtimestamp.sh 
b/tools/testing/selftests/net/txtimestamp.sh
index eea6f5193693..77f29cabff87 100755
--- a/tools/testing/selftests/net/txtimestamp.sh
+++ b/tools/testing/selftests/net/txtimestamp.sh
@@ -23,6 +23,14 @@ setup() {
action mirred egress redirect dev ifb_netem0
 }
 
+cleanup() {
+   tc filter del dev lo parent :
+   tc qdisc del dev lo handle : ingress
+   tc qdisc del dev ifb_netem0 root
+   ip link del ifb_netem0
+   tc qdisc del dev lo root
+}
+
 run_test_v4v6() {
# SND will be delayed 1000us
# ACK will be delayed 6000us: 1 + 2 ms round-trip
@@ -75,6 +83,8 @@ main() {
fi
 }
 
+trap cleanup EXIT
+
 if [[ "$(ip netns identify)" == "root" ]]; then
./in_netns.sh $0 $@
 else
-- 
2.27.0



[PATCH v2] selftests: net: ip_defrag: modprobe missing nf_defrag_ipv6 support

2020-07-16 Thread Paolo Pisati
Fix ip_defrag.sh when CONFIG_NF_DEFRAG_IPV6=m:

$ sudo ./ip_defrag.sh
+ set -e
+ mktemp -u XX
+ readonly NETNS=ns-rGlXcw
+ trap cleanup EXIT
+ setup
+ ip netns add ns-rGlXcw
+ ip -netns ns-rGlXcw link set lo up
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_high_thresh=900
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_low_thresh=700
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_time=1
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_high_thresh=900
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_low_thresh=700
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_time=1
+ ip netns exec ns-rGlXcw sysctl -w 
net.netfilter.nf_conntrack_frag6_high_thresh=900
+ cleanup
+ ip netns del ns-rGlXcw

$ ls -la /proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh
ls: cannot access '/proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh': No 
such file or directory

$ sudo modprobe nf_defrag_ipv6
$ ls -la /proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh
-rw-r--r-- 1 root root 0 Jul 14 12:34 
/proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/net/ip_defrag.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/testing/selftests/net/ip_defrag.sh 
b/tools/testing/selftests/net/ip_defrag.sh
index 15d3489ecd9c..ceb7ad4dbd94 100755
--- a/tools/testing/selftests/net/ip_defrag.sh
+++ b/tools/testing/selftests/net/ip_defrag.sh
@@ -6,6 +6,8 @@
 set +x
 set -e
 
+modprobe -q nf_defrag_ipv6
+
 readonly NETNS="ns-$(mktemp -u XX)"
 
 setup() {
-- 
2.25.1



Re: [PATCH] selftests: net: ip_defrag: modprobe missing nf_defrag_ipv6 support

2020-07-16 Thread Paolo Pisati
On Thu, Jul 16, 2020 at 5:38 PM Jakub Kicinski  wrote:
>
> I don't think modprobe fails when code is built in.
>
> $ sudo modprobe pstore
> $ echo $?
> 0
> $ grep CONFIG_PSTORE= /boot/config-5.7.8-200.fc32.x86_64
> CONFIG_PSTORE=y
> $ lsmod | grep pstore
> $

Ah, i didn't know - i'll send a V2 then.
-- 
bye,
p.


Re: [PATCH] selftests: net: ip_defrag: modprobe missing nf_defrag_ipv6 support

2020-07-16 Thread Paolo Pisati
On Thu, Jul 16, 2020 at 3:01 AM Jakub Kicinski  wrote:
>
> Any reason you add this command before set -e ?
>
> It seems we want the script to fail if module can't be loaded.

Cause if CONFIG_NF_DEFRAG_IPV6=y, the script would unnecessarily fail.

-- 
bye,
p.


[PATCH] selftests: fib_nexthop_multiprefix: fix cleanup() netns deletion

2020-07-14 Thread Paolo Pisati
During setup():
...
for ns in h0 r1 h1 h2 h3
do
create_ns ${ns}
done
...

while in cleanup():
...
for n in h1 r1 h2 h3 h4
do
ip netns del ${n} 2>/dev/null
done
...

and after removing the stderr redirection in cleanup():

$ sudo ./fib_nexthop_multiprefix.sh
...
TEST: IPv4: host 0 to host 3, mtu 1400  [ OK ]
TEST: IPv6: host 0 to host 3, mtu 1400  [ OK ]
Cannot remove namespace file "/run/netns/h4": No such file or directory
$ echo $?
1

and a non-zero return code, make kselftests fail (even if the test
itself is fine):

...
not ok 34 selftests: net: fib_nexthop_multiprefix.sh # exit=1
...

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/net/fib_nexthop_multiprefix.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/net/fib_nexthop_multiprefix.sh 
b/tools/testing/selftests/net/fib_nexthop_multiprefix.sh
index 9dc35a16e415..51df5e305855 100755
--- a/tools/testing/selftests/net/fib_nexthop_multiprefix.sh
+++ b/tools/testing/selftests/net/fib_nexthop_multiprefix.sh
@@ -144,7 +144,7 @@ setup()
 
 cleanup()
 {
-   for n in h1 r1 h2 h3 h4
+   for n in h0 r1 h1 h2 h3
do
ip netns del ${n} 2>/dev/null
done
-- 
2.25.1



[PATCH] selftests: net: ip_defrag: modprobe missing nf_defrag_ipv6 support

2020-07-14 Thread Paolo Pisati
Fix ip_defrag.sh when CONFIG_NF_DEFRAG_IPV6=m:

$ sudo ./ip_defrag.sh
+ set -e
+ mktemp -u XX
+ readonly NETNS=ns-rGlXcw
+ trap cleanup EXIT
+ setup
+ ip netns add ns-rGlXcw
+ ip -netns ns-rGlXcw link set lo up
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_high_thresh=900
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_low_thresh=700
+ ip netns exec ns-rGlXcw sysctl -w net.ipv4.ipfrag_time=1
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_high_thresh=900
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_low_thresh=700
+ ip netns exec ns-rGlXcw sysctl -w net.ipv6.ip6frag_time=1
+ ip netns exec ns-rGlXcw sysctl -w 
net.netfilter.nf_conntrack_frag6_high_thresh=900
+ cleanup
+ ip netns del ns-rGlXcw

$ ls -la /proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh
ls: cannot access '/proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh': No 
such file or directory

$ sudo modprobe nf_defrag_ipv6
$ ls -la /proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh
-rw-r--r-- 1 root root 0 Jul 14 12:34 
/proc/sys/net/netfilter/nf_conntrack_frag6_high_thresh

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/net/ip_defrag.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/testing/selftests/net/ip_defrag.sh 
b/tools/testing/selftests/net/ip_defrag.sh
index 15d3489ecd9c..6919afe47e0a 100755
--- a/tools/testing/selftests/net/ip_defrag.sh
+++ b/tools/testing/selftests/net/ip_defrag.sh
@@ -3,6 +3,8 @@
 #
 # Run a couple of IP defragmentation tests.
 
+modprobe -q nf_defrag_ipv6
+
 set +x
 set -e
 
-- 
2.25.1



Re: msm8996: sdhci-msm: apq8096-db820c sdhci fails to init - "Timeout waiting for hardware interrupt."

2019-10-11 Thread Paolo Pisati
On Fri, Oct 11, 2019 at 02:47:05PM +0200, Loic Poulain wrote:
> > No dice, same exact problem.
> >
> > But the patch is present downstream[1]:
> >
> > commit c26727f853308dc4a6645dad09e9565429f8604f
> > Author: Loic Poulain 
> > Date:   Wed Dec 12 17:51:48 2018 +0100
> >
> > arm64: dts: apq8096-db820c: Increase load on l21 for SDCARD
> >
> > In the same way as for msm8974-hammerhead, l21 load, used for SDCARD
> > VMMC, needs to be increased in order to prevent any voltage drop issues
> > (due to limited current) happening with some SDCARDS or during specific
> > operations (e.g. write).
> >
> > Fixes: 660a9763c6a9 (arm64: dts: qcom: db820c: Add pm8994 regulator node)
> > Signed-off-by: Loic Poulain 
> >
> >
> > so it's probably worth carrying it.
> 
> I've sent it to LKML, but it has never landed (and I've never followed-up).

I see - btw, do you have a recent kernel where the mmc works on the db820c?
-- 
bye,
p.


Re: msm8996: sdhci-msm: apq8096-db820c sdhci fails to init - "Timeout waiting for hardware interrupt."

2019-10-11 Thread Paolo Pisati
On Fri, Oct 11, 2019 at 02:01:30AM -0400, Brian Masney wrote:
> I encountered that same error working on the Nexus 5 support upstream.
> Here's the fix:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=03864e57770a9541e7ff3990bacf2d9a2fffcd5d

No dice, same exact problem.

But the patch is present downstream[1]:

commit c26727f853308dc4a6645dad09e9565429f8604f
Author: Loic Poulain 
Date:   Wed Dec 12 17:51:48 2018 +0100

arm64: dts: apq8096-db820c: Increase load on l21 for SDCARD

In the same way as for msm8974-hammerhead, l21 load, used for SDCARD
VMMC, needs to be increased in order to prevent any voltage drop issues
(due to limited current) happening with some SDCARDS or during specific
operations (e.g. write).

Fixes: 660a9763c6a9 (arm64: dts: qcom: db820c: Add pm8994 regulator node)
Signed-off-by: Loic Poulain 


so it's probably worth carrying it.

1:
https://git.linaro.org/landing-teams/working/qualcomm/kernel.git/commit/arch/arm64/boot/dts/qcom?h=release/qcomlt-4.14=e6415afc1aef2ac9361437ff583ba1be5a932b78
-- 
bye,
p.


Re: msm8996: sdhci-msm: apq8096-db820c sdhci fails to init - "Timeout waiting for hardware interrupt."

2019-10-10 Thread Paolo Pisati
On Thu, Oct 10, 2019 at 4:36 PM Jeffrey Hugo  wrote:
>
> I'm using sdhci-msm on msm8998, so its not completely broken upstream.
>
> What speed card are you trying to use?

Sandisk SDHC 4 - i forgot to mention that the sd slot / card works
fine when using the qcomlt-4.14 branch[1], so it's definitely not an
hardware issue.

1: http://git.linaro.org/landing-teams/working/qualcomm/kernel.git


msm8996: sdhci-msm: apq8096-db820c sdhci fails to init - "Timeout waiting for hardware interrupt."

2019-10-10 Thread Paolo Pisati
Sdhci consistenlty fails to initialize (and thus work) on my apq8096-db820c.

The issue is present since v5.0[*] mainline up to latest v5.4-rc2, using 
defconfig and:

CONFIG_SCSI_UFS_QCOM=y
CONFIG_PHY_QCOM_QMP=y
CONFIG_PHY_QCOM_UFS=y
CONFIG_ATL1C=y

but can be 100% reproduced with a clean defconfig too.

During boot, when it's time to mount the sdcard, mmc0 spits out a lot of:

...
[   13.683059] mmc0: Timeout waiting for hardware interrupt.
[   13.683095] mmc0: sdhci:  SDHCI REGISTER DUMP ===
[   13.687441] mmc0: sdhci: Sys addr:  0x | Version:  0x4902
[   13.693861] mmc0: sdhci: Blk size:  0x4200 | Blk cnt:  0x
[   13.700285] mmc0: sdhci: Argument:  0x00012444 | Trn mode: 0x0033
[   13.706707] mmc0: sdhci: Present:   0x01680206 | Host ctl: 0x001f
[   13.713131] mmc0: sdhci: Power: 0x0001 | Blk gap:  0x
[   13.719555] mmc0: sdhci: Wake-up:   0x | Clock:0x0007
[   13.725979] mmc0: sdhci: Timeout:   0x000a | Int stat: 0x
[   13.732403] mmc0: sdhci: Int enab:  0x03ff900b | Sig enab: 0x03ff100b
[   13.738824] mmc0: sdhci: ACmd stat: 0x | Slot int: 0x
[   13.745249] mmc0: sdhci: Caps:  0x322dc8b2 | Caps_1:   0x8007
[   13.751673] mmc0: sdhci: Cmd:   0x123a | Max curr: 0x
[   13.758097] mmc0: sdhci: Resp[0]:   0x0900 | Resp[1]:  0x5b59
[   13.764519] mmc0: sdhci: Resp[2]:   0x76b27f80 | Resp[3]:  0x0a404012
[   13.770944] mmc0: sdhci: Host ctl2: 0x
[   13.777365] mmc0: sdhci: ADMA Err:  0x | ADMA Ptr: 0x0001588be200
[   13.781708] mmc0: sdhci: 
[   13.888927] mmc0: Reset 0x4 never completed.
...
[   14.004327] mmc0: Controller never released inhibit bit(s).

in between several sdhci register dumps.

Has anyone seen that before? Is sdhci-msm support broken upstream or am i 
missing
something config-wise? 

Full boot logs here: https://pastebin.ubuntu.com/p/BtRrgnjV7J/

*: nothing earlier then v5.0 boots on this board, so i couldn't test it.
-- 
bye,
p.


[PATCH 2/2] bpf, selftest: fix checksum value for test #13

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/bpf/verifier/array_access.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/bpf/verifier/array_access.c 
b/tools/testing/selftests/bpf/verifier/array_access.c
index bcb83196e459..4698f560d756 100644
--- a/tools/testing/selftests/bpf/verifier/array_access.c
+++ b/tools/testing/selftests/bpf/verifier/array_access.c
@@ -255,7 +255,7 @@
.prog_type = BPF_PROG_TYPE_SCHED_CLS,
.fixup_map_array_ro = { 3 },
.result = ACCEPT,
-   .retval = -29,
+   .retval = 28,
 },
 {
"invalid write map access into a read-only array 1",
-- 
2.17.1



[PATCH 0/2] [RESEND] Fold checksum at the end of bpf_csum_diff and fix

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

After applying patch 0001, all checksum implementations i could test (x86-64, 
arm64 and
arm), now agree on the return value.

Patch 0002 fix the expected return value for test #13: i did the calculation 
manually,
and it correspond.

Unfortunately, after applying patch 0001, other test cases now fail in
test_verifier:

$ sudo ./tools/testing/selftests/bpf/test_verifier
...
#417/p helper access to variable memory: size = 0 allowed on NULL 
(ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
#419/p helper access to variable memory: size = 0 allowed on != NULL stack 
pointer (ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
#423/p helper access to variable memory: size possible = 0 allowed on != NULL 
packet pointer (ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
...
Summary: 1500 PASSED, 0 SKIPPED, 3 FAILED

And there are probably other fallouts in other selftests - someone familiar
should take a look before applying these patches.

Paolo Pisati (2):
  bpf: bpf_csum_diff: fold the checksum before returning the
value
  bpf, selftest: fix checksum value for test #13

 net/core/filter.c   | 2 +-
 tools/testing/selftests/bpf/verifier/array_access.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
2.17.1



[PATCH 1/2] bpf: bpf_csum_diff: fold the checksum before returning the value

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

With this change, bpf_csum_diff behave homogeneously among different
checksum calculation code / csum_partial() (tested on x86-64, arm64 and
arm).

Signed-off-by: Paolo Pisati 
---
 net/core/filter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/core/filter.c b/net/core/filter.c
index f615e42cf4ef..8db7f58f1ea1 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -1990,7 +1990,7 @@ BPF_CALL_5(bpf_csum_diff, __be32 *, from, u32, from_size,
for (i = 0; i <   to_size / sizeof(__be32); i++, j++)
sp->diff[j] = to[i];
 
-   return csum_partial(sp->diff, diff_size, seed);
+   return csum_fold(csum_partial(sp->diff, diff_size, seed));
 }
 
 static const struct bpf_func_proto bpf_csum_diff_proto = {
-- 
2.17.1



[PATCH 0/2] Fold checksum at the end of bpf_csum_diff and fix

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

After applying patch 0001, all checksum implementations i could test (x86-64, 
arm64 and
arm), now agree on the return value.

Patch 0002 fix the expected return value for test #13: i did the calculation 
manually,
and it correspond.

Unfortunately, after applying patch 0001, other test cases now fail in
test_verifier:

$ sudo ./tools/testing/selftests/bpf/test_verifier
...
#417/p helper access to variable memory: size = 0 allowed on NULL 
(ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
#419/p helper access to variable memory: size = 0 allowed on != NULL stack 
pointer (ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
#423/p helper access to variable memory: size possible = 0 allowed on != NULL 
packet pointer (ARG_PTR_TO_MEM_OR_NULL) FAIL retval 65535 != 0 
...
Summary: 1500 PASSED, 0 SKIPPED, 3 FAILED

And there are probably other fallouts in other selftests - someone familiar
should take a look before applying these patches.

Paolo Pisati (2):
  bpf: bpf_csum_diff: fold the checksum before returning the
value
  bpf, selftest: fix checksum value for test #13

 net/core/filter.c   | 2 +-
 tools/testing/selftests/bpf/verifier/array_access.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
2.17.1



[PATCH 2/2] bpf, selftest: fix checksum value for test #13

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

Signed-off-by: Paolo Pisati 
---
 tools/testing/selftests/bpf/verifier/array_access.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/bpf/verifier/array_access.c 
b/tools/testing/selftests/bpf/verifier/array_access.c
index bcb83196e459..4698f560d756 100644
--- a/tools/testing/selftests/bpf/verifier/array_access.c
+++ b/tools/testing/selftests/bpf/verifier/array_access.c
@@ -255,7 +255,7 @@
.prog_type = BPF_PROG_TYPE_SCHED_CLS,
.fixup_map_array_ro = { 3 },
.result = ACCEPT,
-   .retval = -29,
+   .retval = 28,
 },
 {
"invalid write map access into a read-only array 1",
-- 
2.17.1



[PATCH 1/2] bpf: bpf_csum_diff: fold the checksum before returning the value

2019-07-11 Thread Paolo Pisati
From: Paolo Pisati 

With this change, bpf_csum_diff behave homogeneously among different
checksum calculation code / csum_partial() (tested on x86-64, arm64 and
arm).

Signed-off-by: Paolo Pisati 
---
 net/core/filter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/core/filter.c b/net/core/filter.c
index f615e42cf4ef..8db7f58f1ea1 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -1990,7 +1990,7 @@ BPF_CALL_5(bpf_csum_diff, __be32 *, from, u32, from_size,
for (i = 0; i <   to_size / sizeof(__be32); i++, j++)
sp->diff[j] = to[i];
 
-   return csum_partial(sp->diff, diff_size, seed);
+   return csum_fold(csum_partial(sp->diff, diff_size, seed));
 }
 
 static const struct bpf_func_proto bpf_csum_diff_proto = {
-- 
2.17.1



Re: msm8996: qcom-qmp: apq8096-db820c fails to boot, reset back to fastboot and locks up

2019-06-13 Thread Paolo Pisati
On Wed, Jun 12, 2019 at 06:20:48PM +0200, Niklas Cassel wrote:
> 
> Can you still reproduce the reboot?

--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -447,12 +447,12 @@
};
 
pcie@608000 {
-   status = "okay";
+   status = "disabled";
perst-gpio = < 130 GPIO_ACTIVE_LOW>;
};
 
pcie@61 {
-   status = "okay";
+   status = "disabled";
perst-gpio = < 114 GPIO_ACTIVE_LOW>;
};
};

disabling the two other pci controllers (and leaving your previous patch
applied), made the issue more frequent: i was never able to boot to user space
three times in a row without experiencing a crash, previously it was more
sporadic.

On the other hand, now i can reproduce the issue more easily this way.
-- 
bye,
p.


Re: msm8996: qcom-qmp: apq8096-db820c fails to boot, reset back to fastboot and locks up

2019-06-12 Thread Paolo Pisati
On Wed, Jun 12, 2019 at 03:17:35PM +0200, Niklas Cassel wrote:
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
> > b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > index cd91b4179b10..22352e3b0ec5 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > @@ -1490,7 +1490,7 @@ static int qcom_qmp_phy_enable(struct phy *phy)
> >  
> > ret = qcom_qmp_phy_com_init(qphy);
> > if (ret)
> > -   return ret;
> > +   goto err_lane_rst;
> >  
> > if (cfg->has_lane_rst) {
> > ret = reset_control_deassert(qphy->lane_rst);

Hi Niklas,
unfortunately, it didn't help - i added a printk, to highlight when it failed:

--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1489,8 +1489,10 @@ static int qcom_qmp_phy_enable(struct phy *phy)
}
 
ret = qcom_qmp_phy_com_init(qphy);
-   if (ret)
-   return ret;
+   if (ret) {
+   dev_err(qmp->dev, "qphy initialization failed\n");
+   goto err_lane_rst;
+   }
 
if (cfg->has_lane_rst) {
ret = reset_control_deassert(qphy->lane_rst);

After several reboots i was able to trigger the phy init failure again:

...
[2.223999] qcom-qmp-phy 34000.phy: Registered Qcom-QMP phy
[2.224956] qcom-qmp-phy 741.phy: Registered Qcom-QMP phy
[2.228798] ufs_qcom_phy_qmp_14nm 627000.phy: invalid resource
[2.237271] qcom-qmp-phy 34000.phy: phy common block init timed-out
[2.240315] qcom-qmp-phy 34000.phy: qphy initialization failed
...

these are the last lines printed, before rebooting in fastboot and
locking up there (as before[*]).

So, as far as i understand there are two distinct problems:

1) sometimes, qcom-qmp-phy fails to initialize

2) and when that happens, the failure is fatal and it led to a reboot & lockup
in fastboot

1: https://pastebin.ubuntu.com/p/rtjVrD3yzk/
-- 
bye,
p.


msm8996: qcom-qmp: apq8096-db820c fails to boot, reset back to fastboot and locks up

2019-06-10 Thread Paolo Pisati
>From time to time, my apq8096-db820c fails to boot to userspace, reset back to
fastboot and locks up: to easily reproduce the issue, i'm boot looping using a
cron job with a 1 min reboot entry on the board while leaving a "while 1; do
fastboot boot boot.img; done" on the host pc.

The issue is present in mainline up to 5.2-rc4, using defconfig and:

CONFIG_SCSI_UFS_QCOM=y
CONFIG_PHY_QCOM_QMP=y
CONFIG_PHY_QCOM_UFS=y

but was present in previous releases too (e.g. 4.14., 4.19, etc qcom-lt or
mainline), where it's even easier to reproduce (e.g. takes way less reboots to
trigger it).

These are the last lines printed out:
...
[7.407209] qcom-qmp-phy 34000.phy: Registered Qcom-QMP phy
[7.448058] qcom-qmp-phy 741.phy: Registered Qcom-QMP phy
[7.461859] ufs_qcom_phy_qmp_14nm 627000.phy: invalid resource
[7.535434] qcom-qmp-phy 34000.phy: phy common block init timed-out
[7.538596] phy phy-34000.phy.0: phy init failed --> -110
[7.550891] qcom-pcie: probe of 60.pcie failed with error -110
[7.619008] qcom-pcie 608000.pcie: 608000.pcie supply vddpe-3v3 not found,
using dummy regulator

Log Type: B - Since Boot(Power On Reset),  D - Delta,  S - Statistic
S - QC_IMAGE_VERSION_STRING=BOOT.XF.1.0-00301
S - IMAGE_VARIANT_STRING=M8996LAB
S - OEM_IMAGE_VERSION_STRING=crm-ubuntu68
S - Boot Interface: UFS
S - Secure Boot: Off
...

Full boot here: https://pastebin.ubuntu.com/p/rtjVrD3yzk/

Any idea what is going on? Am i doing something wrong?
-- 
bye,
p.


Re: [PATCH] [stable, netdev 4.4+] lan78xx: make sure RX_ADDRL & RX_ADDRH regs are always up to date

2018-11-09 Thread Paolo Pisati
On Thu, Nov 08, 2018 at 10:49:04AM -0500, Sasha Levin wrote:
> 
> Can you confirm it actually works on 4.4?

Yes, built and tested on 4.4.y:

Tested-by: Paolo Pisati 
-- 
bye,
p.


Re: [PATCH] [stable, netdev 4.4+] lan78xx: make sure RX_ADDRL & RX_ADDRH regs are always up to date

2018-11-09 Thread Paolo Pisati
On Thu, Nov 08, 2018 at 10:49:04AM -0500, Sasha Levin wrote:
> 
> Can you confirm it actually works on 4.4?

Yes, built and tested on 4.4.y:

Tested-by: Paolo Pisati 
-- 
bye,
p.


Re: 4.19-rcX: WARN_ON() arch/arm64/kernel/setup.c:271 reserve_memblock_reserved_regions

2018-10-09 Thread Paolo Pisati
On Mon, Oct 08, 2018 at 05:03:27PM +0100, James Morse wrote:

> But! DT's that have this reserved-but-not-memory are already out there, so we
> should work around this in the kernel.

Ack, thanks for the explanation.
-- 
bye,
p.


Re: 4.19-rcX: WARN_ON() arch/arm64/kernel/setup.c:271 reserve_memblock_reserved_regions

2018-10-09 Thread Paolo Pisati
On Mon, Oct 08, 2018 at 05:03:27PM +0100, James Morse wrote:

> But! DT's that have this reserved-but-not-memory are already out there, so we
> should work around this in the kernel.

Ack, thanks for the explanation.
-- 
bye,
p.


4.19-rcX: WARN_ON() arch/arm64/kernel/setup.c:271 reserve_memblock_reserved_regions

2018-10-08 Thread Paolo Pisati
This on my dragonboard 410c:

...
[0.170657] WARNING: CPU: 2 PID: 1 at arch/arm64/kernel/setup.c:271 
reserve_memblock_reserved_regions+0xd4/0x150
[0.170666] Modules linked in:
[0.170680] CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc7-dirty #3
[0.170687] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
[0.170696] pstate: 2005 (nzCv daif -PAN -UAO)
[0.170707] pc : reserve_memblock_reserved_regions+0xd4/0x150
[0.170718] lr : reserve_memblock_reserved_regions+0xcc/0x150
[0.170725] sp : 08033d30
[0.170731] x29: 08033d30 x28: 09048050
[0.170744] x27: 09048078 x26: 08f871b0
[0.170755] x25:  x24: 00488020
[0.170767] x23: bfff x22: 08f3ca28
[0.170778] x21: 08e61840 x20: 090e9000
[0.170789] x19: 80003a218e00 x18: 
[0.170800] x17:  x16: 
[0.170811] x15:  x14: 0400
[0.170822] x13:  x12: 0028
[0.170833] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f
[0.170844] x9 :  x8 : 80003a218e80
[0.170855] x7 :  x6 : 80003d9ffc70
[0.170866] x5 :  x4 : bfff
[0.170877] x3 : bff0 x2 : 
[0.170888] x1 : 89ff x0 : 
[0.170899] Call trace:
[0.170910]  reserve_memblock_reserved_regions+0xd4/0x150
[0.170921]  do_one_initcall+0x58/0x170
[0.170931]  kernel_init_freeable+0x1a4/0x264
[0.170942]  kernel_init+0x10/0x108
[0.170952]  ret_from_fork+0x10/0x18
[0.170962] ---[ end trace c7ce9242331f7319 ]---
[0.170974] name: reserved res: [mem 0xbff0-0xbfff flags 0x200]
...

that memory region corresponds to the ramoops node:

reserved-memory {
ramoops@bff0{
compatible = "ramoops";
reg = <0x0 0xbff0 0x0 0x10>;

record-size = <0x2>;
console-size = <0x2>;
ftrace-size = <0x2>;
};
};

According to the comment in reserve_memblock_reserved_regions():

   /*
 * We expected memblock_reserve() regions to conflict with
 * memory created by request_standard_resources().
 */

and the reserved-memory region evades this condition, but i'm not entirely sure 
how to
properly fix this - any idea?
-- 
bye,
p.


4.19-rcX: WARN_ON() arch/arm64/kernel/setup.c:271 reserve_memblock_reserved_regions

2018-10-08 Thread Paolo Pisati
This on my dragonboard 410c:

...
[0.170657] WARNING: CPU: 2 PID: 1 at arch/arm64/kernel/setup.c:271 
reserve_memblock_reserved_regions+0xd4/0x150
[0.170666] Modules linked in:
[0.170680] CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc7-dirty #3
[0.170687] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
[0.170696] pstate: 2005 (nzCv daif -PAN -UAO)
[0.170707] pc : reserve_memblock_reserved_regions+0xd4/0x150
[0.170718] lr : reserve_memblock_reserved_regions+0xcc/0x150
[0.170725] sp : 08033d30
[0.170731] x29: 08033d30 x28: 09048050
[0.170744] x27: 09048078 x26: 08f871b0
[0.170755] x25:  x24: 00488020
[0.170767] x23: bfff x22: 08f3ca28
[0.170778] x21: 08e61840 x20: 090e9000
[0.170789] x19: 80003a218e00 x18: 
[0.170800] x17:  x16: 
[0.170811] x15:  x14: 0400
[0.170822] x13:  x12: 0028
[0.170833] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f
[0.170844] x9 :  x8 : 80003a218e80
[0.170855] x7 :  x6 : 80003d9ffc70
[0.170866] x5 :  x4 : bfff
[0.170877] x3 : bff0 x2 : 
[0.170888] x1 : 89ff x0 : 
[0.170899] Call trace:
[0.170910]  reserve_memblock_reserved_regions+0xd4/0x150
[0.170921]  do_one_initcall+0x58/0x170
[0.170931]  kernel_init_freeable+0x1a4/0x264
[0.170942]  kernel_init+0x10/0x108
[0.170952]  ret_from_fork+0x10/0x18
[0.170962] ---[ end trace c7ce9242331f7319 ]---
[0.170974] name: reserved res: [mem 0xbff0-0xbfff flags 0x200]
...

that memory region corresponds to the ramoops node:

reserved-memory {
ramoops@bff0{
compatible = "ramoops";
reg = <0x0 0xbff0 0x0 0x10>;

record-size = <0x2>;
console-size = <0x2>;
ftrace-size = <0x2>;
};
};

According to the comment in reserve_memblock_reserved_regions():

   /*
 * We expected memblock_reserve() regions to conflict with
 * memory created by request_standard_resources().
 */

and the reserved-memory region evades this condition, but i'm not entirely sure 
how to
properly fix this - any idea?
-- 
bye,
p.


[PATCH] ARM: tango: register pm ops only if running on tango hw

2018-08-22 Thread Paolo Pisati
In a multiplatform kernel, avoid invoking hardware specific pm ops,
when running on a different SOC.

Signed-off-by: Paolo Pisati 
---
 arch/arm/mach-tango/pm.c| 5 +
 arch/arm/mach-tango/setup.c | 7 +++
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-tango/pm.c b/arch/arm/mach-tango/pm.c
index 028e50c..ea8fe20 100644
--- a/arch/arm/mach-tango/pm.c
+++ b/arch/arm/mach-tango/pm.c
@@ -24,10 +24,7 @@ static const struct platform_suspend_ops tango_pm_ops = {
.valid = suspend_valid_only_mem,
 };
 
-static int __init tango_pm_init(void)
+void __init tango_pm_init(void)
 {
suspend_set_ops(_pm_ops);
-   return 0;
 }
-
-late_initcall(tango_pm_init);
diff --git a/arch/arm/mach-tango/setup.c b/arch/arm/mach-tango/setup.c
index 677dd7b..56a1c0c 100644
--- a/arch/arm/mach-tango/setup.c
+++ b/arch/arm/mach-tango/setup.c
@@ -11,8 +11,15 @@ static void tango_l2c_write(unsigned long val, unsigned int 
reg)
 
 static const char *const tango_dt_compat[] = { "sigma,tango4", NULL };
 
+#ifdef CONFIG_PM_SLEEP
+extern void tango_pm_init(void);
+#else
+static inline void tango_pm_init(void) {}
+#endif
+
 DT_MACHINE_START(TANGO_DT, "Sigma Tango DT")
.dt_compat  = tango_dt_compat,
+   .init_machine   = tango_pm_init,
.l2c_aux_mask   = ~0,
.l2c_write_sec  = tango_l2c_write,
 MACHINE_END
-- 
2.7.4



[PATCH] ARM: tango: register pm ops only if running on tango hw

2018-08-22 Thread Paolo Pisati
In a multiplatform kernel, avoid invoking hardware specific pm ops,
when running on a different SOC.

Signed-off-by: Paolo Pisati 
---
 arch/arm/mach-tango/pm.c| 5 +
 arch/arm/mach-tango/setup.c | 7 +++
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-tango/pm.c b/arch/arm/mach-tango/pm.c
index 028e50c..ea8fe20 100644
--- a/arch/arm/mach-tango/pm.c
+++ b/arch/arm/mach-tango/pm.c
@@ -24,10 +24,7 @@ static const struct platform_suspend_ops tango_pm_ops = {
.valid = suspend_valid_only_mem,
 };
 
-static int __init tango_pm_init(void)
+void __init tango_pm_init(void)
 {
suspend_set_ops(_pm_ops);
-   return 0;
 }
-
-late_initcall(tango_pm_init);
diff --git a/arch/arm/mach-tango/setup.c b/arch/arm/mach-tango/setup.c
index 677dd7b..56a1c0c 100644
--- a/arch/arm/mach-tango/setup.c
+++ b/arch/arm/mach-tango/setup.c
@@ -11,8 +11,15 @@ static void tango_l2c_write(unsigned long val, unsigned int 
reg)
 
 static const char *const tango_dt_compat[] = { "sigma,tango4", NULL };
 
+#ifdef CONFIG_PM_SLEEP
+extern void tango_pm_init(void);
+#else
+static inline void tango_pm_init(void) {}
+#endif
+
 DT_MACHINE_START(TANGO_DT, "Sigma Tango DT")
.dt_compat  = tango_dt_compat,
+   .init_machine   = tango_pm_init,
.l2c_aux_mask   = ~0,
.l2c_write_sec  = tango_l2c_write,
 MACHINE_END
-- 
2.7.4



Re: [PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-05 Thread Paolo Pisati
On Thu, Apr 05, 2018 at 10:12:05AM -0500, Alan Tull wrote:
> On Tue, Apr 3, 2018 at 2:02 PM, Paolo Pisati <p.pis...@gmail.com> wrote:
> 
> Hi Paolo,
> 
> Looks good, except that I have to fix up the calls to
> fpga_mgr_register/unregister since my API changes didn't go in.  I've
> fixed those up and pushed to a branch on my kernel org git repo to let
> the robots do some testing.  I'll post (v11 with those fixes) after
> that is cleared.

Awesome Alan, thank you.
-- 
bye,
p.


Re: [PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-05 Thread Paolo Pisati
On Thu, Apr 05, 2018 at 10:12:05AM -0500, Alan Tull wrote:
> On Tue, Apr 3, 2018 at 2:02 PM, Paolo Pisati  wrote:
> 
> Hi Paolo,
> 
> Looks good, except that I have to fix up the calls to
> fpga_mgr_register/unregister since my API changes didn't go in.  I've
> fixed those up and pushed to a branch on my kernel org git repo to let
> the robots do some testing.  I'll post (v11 with those fixes) after
> that is cleared.

Awesome Alan, thank you.
-- 
bye,
p.


[PATCH v10 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-04-03 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Moritz Fischer <m...@kernel.org>
Acked-by: Alan Tull <at...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH v10 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-04-03 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
Acked-by: Moritz Fischer 
Acked-by: Alan Tull 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-03 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 413 +
 3 files changed, 421 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index f47ef84..53d3f55 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -70,6 +70,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
 config FPGA_MGR_TS73XX
tristate "Technologic Systems TS-73xx SBC FPGA Manager"
depends on ARCH_EP93XX && MACH_TS72XX
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 3cb276a..f9803da 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..3482d48
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,413 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ *
+ * Copyright (C) 2018 Paolo Pisati <p.pis...@gmail.com>
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY_USEC 5
+#define MACHXO2_HIGH_DELAY_USEC200
+#define MACHXO2_REFRESH_USEC   4800
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#define ECRC   3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL6 /* overflow error */
+#define ESDMEOF7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT: return "Abort ERR";
+   case EOVERFL:   return "Overflow ERR";
+   case ESDMEOF:   return "SDM EOF";
+   }
+
+   return "Default switch case";
+

[PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-03 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 413 +
 3 files changed, 421 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index f47ef84..53d3f55 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -70,6 +70,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
 config FPGA_MGR_TS73XX
tristate "Technologic Systems TS-73xx SBC FPGA Manager"
depends on ARCH_EP93XX && MACH_TS72XX
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 3cb276a..f9803da 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..3482d48
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,413 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ *
+ * Copyright (C) 2018 Paolo Pisati 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY_USEC 5
+#define MACHXO2_HIGH_DELAY_USEC200
+#define MACHXO2_REFRESH_USEC   4800
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#define ECRC   3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL6 /* overflow error */
+#define ESDMEOF7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT: return "Abort ERR";
+   case EOVERFL:   return "Overflow ERR";
+   case ESDMEOF:   return "SDM EOF";
+   }
+
+   return "Default switch case";
+}
+#endif
+
+static void dump_status_reg(unsigned 

[PATCH v10 0/2] fpga: Lattice MachXO2 Slave SPI FPGA Manager support

2018-04-03 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v9:
* implemented machxo2_spi_state()

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 413 +
 4 files changed, 450 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH v10 0/2] fpga: Lattice MachXO2 Slave SPI FPGA Manager support

2018-04-03 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v9:
* implemented machxo2_spi_state()

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 413 +
 4 files changed, 450 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



Re: [PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-02 Thread Paolo Pisati
On Mon, Apr 02, 2018 at 10:39:04AM -0500, Alan Tull wrote:
> On Mon, Apr 2, 2018 at 10:13 AM, Paolo Pisati <p.pis...@gmail.com> wrote:
> 
> Hi Paolo,
> 
> Thanks for making the changes I asked for.  Except... is there a
> reason to not get state in machxo2_spi_state?

I love your attention for the details... :D
(i missed that).
-- 
bye,
p.


Re: [PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-02 Thread Paolo Pisati
On Mon, Apr 02, 2018 at 10:39:04AM -0500, Alan Tull wrote:
> On Mon, Apr 2, 2018 at 10:13 AM, Paolo Pisati  wrote:
> 
> Hi Paolo,
> 
> Thanks for making the changes I asked for.  Except... is there a
> reason to not get state in machxo2_spi_state?

I love your attention for the details... :D
(i missed that).
-- 
bye,
p.


[PATCH v9 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-04-02 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Moritz Fischer <m...@kernel.org>
Acked-by: Alan Tull <at...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH v9 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-04-02 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
Acked-by: Moritz Fischer 
Acked-by: Alan Tull 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-02 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 3 files changed, 413 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index f47ef84..53d3f55 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -70,6 +70,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
 config FPGA_MGR_TS73XX
tristate "Technologic Systems TS-73xx SBC FPGA Manager"
depends on ARCH_EP93XX && MACH_TS72XX
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 3cb276a..f9803da 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..783aaf2
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ *
+ * Copyright (C) 2018 Paolo Pisati <p.pis...@gmail.com>
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY_USEC 5
+#define MACHXO2_HIGH_DELAY_USEC200
+#define MACHXO2_REFRESH_USEC   4800
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#define ECRC   3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL6 /* overflow error */
+#define ESDMEOF7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT: return "Abort ERR";
+   case EOVERFL:   return "Overflow ERR";
+   case ESDMEOF:   return "SDM EOF";
+   }
+
+   return "Default switch case";
+

[PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-04-02 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 3 files changed, 413 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index f47ef84..53d3f55 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -70,6 +70,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
 config FPGA_MGR_TS73XX
tristate "Technologic Systems TS-73xx SBC FPGA Manager"
depends on ARCH_EP93XX && MACH_TS72XX
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 3cb276a..f9803da 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..783aaf2
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ *
+ * Copyright (C) 2018 Paolo Pisati 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY_USEC 5
+#define MACHXO2_HIGH_DELAY_USEC200
+#define MACHXO2_REFRESH_USEC   4800
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#define ECRC   3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL6 /* overflow error */
+#define ESDMEOF7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT: return "Abort ERR";
+   case EOVERFL:   return "Overflow ERR";
+   case ESDMEOF:   return "SDM EOF";
+   }
+
+   return "Default switch case";
+}
+#endif
+
+static void dump_status_reg(unsigned 

[PATCH v9 0/2] fpga: Lattice MachXO2 Slave SPI FPGA Manager support

2018-04-02 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v8:
* style fixes pointed out by Alan
* rebase on the new fpga_mgr_register() API

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 4 files changed, 442 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH v9 0/2] fpga: Lattice MachXO2 Slave SPI FPGA Manager support

2018-04-02 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v8:
* style fixes pointed out by Alan
* rebase on the new fpga_mgr_register() API

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 4 files changed, 442 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-29 Thread Paolo Pisati
On Wed, Mar 28, 2018 at 03:03:42PM -0500, Alan Tull wrote:
> On Wed, Mar 28, 2018 at 11:26 AM, Alan Tull <at...@kernel.org> wrote:
> > On Fri, Mar 23, 2018 at 7:27 AM, Paolo Pisati <p.pis...@gmail.com> wrote:
> >
> > Hi Paolo,
> 
> One more thing.  The api for registering a FPGA manager is changing.
> It won't be hard to adapt.  I've pushed a branch that includes the
> patches that add this change.  Please rebase on top of that branch so
> your patch can go in on top of that.
> 
> My git repo is at:
> git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
> 
> The branch name is
> for-review-next-20180327-drvdata-v3

Ok, i'll fix all the issues you raised in the previous email, rebase on
this branch and resend.
-- 
bye,
p.


Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-29 Thread Paolo Pisati
On Wed, Mar 28, 2018 at 03:03:42PM -0500, Alan Tull wrote:
> On Wed, Mar 28, 2018 at 11:26 AM, Alan Tull  wrote:
> > On Fri, Mar 23, 2018 at 7:27 AM, Paolo Pisati  wrote:
> >
> > Hi Paolo,
> 
> One more thing.  The api for registering a FPGA manager is changing.
> It won't be hard to adapt.  I've pushed a branch that includes the
> patches that add this change.  Please rebase on top of that branch so
> your patch can go in on top of that.
> 
> My git repo is at:
> git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
> 
> The branch name is
> for-review-next-20180327-drvdata-v3

Ok, i'll fix all the issues you raised in the previous email, rebase on
this branch and resend.
-- 
bye,
p.


[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-23 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Moritz Fischer <m...@kernel.org>
Acked-by: Alan Tull <at...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+a 'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-23 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
Acked-by: Moritz Fischer 
Acked-by: Alan Tull 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+a 'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH 0/2 v8] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-23 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v7:
* misc style fixes, among which:
  * static const u8 cmd[]
  * #ifdef DEBUG ... #endif reorder
  * introduction of get_err_string()
  * direct returns to reduce line count
  * indentation


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 388 +
 4 files changed, 426 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-23 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 388 +
 3 files changed, 397 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..6a5c5c7
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,388 @@
+// SPDX-License-Identifier: GPL-2.0
+// Lattice MachXO2 Slave SPI Driver
+//
+// Manage Lattice FPGA firmware that is loaded over SPI using
+// the slave serial configuration interface.
+//
+// Copyright (C) 2018 Paolo Pisati <p.pis...@gmail.com>
+
+//#define DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT:

[PATCH 0/2 v8] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-23 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v7:
* misc style fixes, among which:
  * static const u8 cmd[]
  * #ifdef DEBUG ... #endif reorder
  * introduction of get_err_string()
  * direct returns to reduce line count
  * indentation


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 388 +
 4 files changed, 426 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-23 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 388 +
 3 files changed, 397 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..6a5c5c7
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,388 @@
+// SPDX-License-Identifier: GPL-2.0
+// Lattice MachXO2 Slave SPI Driver
+//
+// Manage Lattice FPGA firmware that is loaded over SPI using
+// the slave serial configuration interface.
+//
+// Copyright (C) 2018 Paolo Pisati 
+
+//#define DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   static const u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+   switch (err) {
+   case ENOERR:return "No Error";
+   case EID:   return "ID ERR";
+   case ECMD:  return "CMD ERR";
+   case ECRC:  return "CRC ERR";
+   case EPREAM:return "Preamble ERR";
+   case EABRT: return "Abort ERR&quo

Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-22 Thread Paolo Pisati
On Wed, Mar 21, 2018 at 11:04:52AM -0700, Joe Perches wrote:
> 
> static const u8 cmd[]
> here and everywhere else as all the tx_buf assignments 
> of cmd are to const void *

Ok
 
> Instead of multiple declarations of dump_status_reg
> it's frequently nicer to use a style like
> 
> static void debug_func(args...)
> {
> #ifdef DEBUG
>   [code...]
> #endif
> }
> 
> so if function arguments ever need to be changed
> it's only required to be changed in one spot and
> not multiply compilation tested with and without
> the DEBUG definition

Ok
 
> It's frequently nicer to use a static function
> for these enum -> string conversions like:
> 
> static const char *get_err_string(unsigned long err)
> {
>   switch (err) {
>   case ENOERR:return "No Error";
>   case EID:   return "ID ERR";
>   case ECMD:  return "CMD ERR";
>   [...]
>   }
>   return "default switch case";
> }

Ok - checkpatch complained when i put the "case ...: return ...;" on the same
line as you did here, that is why i ended up with the ugly "case...: $string;
break" all on different lines
 
> > +   pr_debug("machxo2 status: 0x%08lX - done=%d, cfgena=%d, busy=%d, 
> > fail=%d, devver=%d, err=%s\n",
> > +  *status, test_bit(DONE, status), test_bit(ENAB, status),
> > +  test_bit(BUSY, status), test_bit(FAIL, status),
> > +  test_bit(DVER, status), ferr);
> 
> So instead of ferr, this could use
>   get_err_string(*status)
> 
> And please try to keep a consistent alignment for
> indentation of multiple line statements

I tried, but then checkpatch complained again about the indentation of the 
above block
and i literally had to guess...

Anyhow, thanks, i'll send a v8 with all these style fixes.
-- 
bye,
p.


Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-22 Thread Paolo Pisati
On Wed, Mar 21, 2018 at 11:04:52AM -0700, Joe Perches wrote:
> 
> static const u8 cmd[]
> here and everywhere else as all the tx_buf assignments 
> of cmd are to const void *

Ok
 
> Instead of multiple declarations of dump_status_reg
> it's frequently nicer to use a style like
> 
> static void debug_func(args...)
> {
> #ifdef DEBUG
>   [code...]
> #endif
> }
> 
> so if function arguments ever need to be changed
> it's only required to be changed in one spot and
> not multiply compilation tested with and without
> the DEBUG definition

Ok
 
> It's frequently nicer to use a static function
> for these enum -> string conversions like:
> 
> static const char *get_err_string(unsigned long err)
> {
>   switch (err) {
>   case ENOERR:return "No Error";
>   case EID:   return "ID ERR";
>   case ECMD:  return "CMD ERR";
>   [...]
>   }
>   return "default switch case";
> }

Ok - checkpatch complained when i put the "case ...: return ...;" on the same
line as you did here, that is why i ended up with the ugly "case...: $string;
break" all on different lines
 
> > +   pr_debug("machxo2 status: 0x%08lX - done=%d, cfgena=%d, busy=%d, 
> > fail=%d, devver=%d, err=%s\n",
> > +  *status, test_bit(DONE, status), test_bit(ENAB, status),
> > +  test_bit(BUSY, status), test_bit(FAIL, status),
> > +  test_bit(DVER, status), ferr);
> 
> So instead of ferr, this could use
>   get_err_string(*status)
> 
> And please try to keep a consistent alignment for
> indentation of multiple line statements

I tried, but then checkpatch complained again about the indentation of the 
above block
and i literally had to guess...

Anyhow, thanks, i'll send a v8 with all these style fixes.
-- 
bye,
p.


[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-21 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 3 files changed, 414 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..9508608
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: GPL-2.0
+// Lattice MachXO2 Slave SPI Driver
+//
+// Manage Lattice FPGA firmware that is loaded over SPI using
+// the slave serial configuration interface.
+//
+// Copyright (C) 2018 Paolo Pisati <p.pis...@gmail.com>
+
+//#define DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef DEBUG
+static void dump_status_reg(unsigned long *status)
+{
+   char *ferr;
+
+   switch (get_err(status)) {
+   case ENOERR:
+   ferr = "No Error";
+   break;
+   case EID:
+   ferr = "ID ERR";
+   break;
+   case ECMD:
+   ferr = "CMD ERR";
+   break;
+   case ECRC:
+   

[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-21 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 3 files changed, 414 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..9508608
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: GPL-2.0
+// Lattice MachXO2 Slave SPI Driver
+//
+// Manage Lattice FPGA firmware that is loaded over SPI using
+// the slave serial configuration interface.
+//
+// Copyright (C) 2018 Paolo Pisati 
+
+//#define DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef DEBUG
+static void dump_status_reg(unsigned long *status)
+{
+   char *ferr;
+
+   switch (get_err(status)) {
+   case ENOERR:
+   ferr = "No Error";
+   break;
+   case EID:
+   ferr = "ID ERR";
+   break;
+   case ECMD:
+   ferr = "CMD ERR";
+   break;
+   case ECRC:
+   ferr = "CRC ERR";
+ 

[PATCH 0/2 v7] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-21 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v6:
* added the SPDX boilerplate
* switched to pr_debug() and renamed MACHXO2_DEBUG to DEBUG


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 4 files changed, 443 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-21 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Moritz Fischer <m...@kernel.org>
Acked-by: Alan Tull <at...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+a 'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH 0/2 v7] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-21 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v6:
* added the SPDX boilerplate
* switched to pr_debug() and renamed MACHXO2_DEBUG to DEBUG


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 405 +
 4 files changed, 443 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-21 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
Acked-by: Moritz Fischer 
Acked-by: Alan Tull 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+a 'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-19 Thread Paolo Pisati
On Fri, Mar 16, 2018 at 09:26:54AM -0700, Moritz Fischer wrote:
> >
> > +static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
> > +{
> > +   return FPGA_MGR_STATE_UNKNOWN;
> > +}
> 
> To understand this correctly: Further up you have a way to determine the
> state you're in, but then you only use that for debug printout, while
> here where you should provide the status you say FPGA_MGR_STATE_UNKNOWN?
> 
> Am I missing something here?

This is more of a generic function ('What's the state of the FPGA now?') while
dump_status_reg() is invoked after a specific SPI command is sent to the FPGA to
keep track of the status of the chip and check that it adhere to the state
machine.

I'll send a v7.
-- 
bye,
p.


Re: [PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-19 Thread Paolo Pisati
On Fri, Mar 16, 2018 at 09:26:54AM -0700, Moritz Fischer wrote:
> >
> > +static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
> > +{
> > +   return FPGA_MGR_STATE_UNKNOWN;
> > +}
> 
> To understand this correctly: Further up you have a way to determine the
> state you're in, but then you only use that for debug printout, while
> here where you should provide the status you say FPGA_MGR_STATE_UNKNOWN?
> 
> Am I missing something here?

This is more of a generic function ('What's the state of the FPGA now?') while
dump_status_reg() is invoked after a specific SPI command is sent to the FPGA to
keep track of the status of the chip and check that it adhere to the state
machine.

I'll send a v7.
-- 
bye,
p.


[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-16 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 410 +
 3 files changed, 419 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..3c7fc3e
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,410 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2018 Paolo Pisati <p.pis...@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+//#define MACHXO2_DEBUG
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef MACHXO2_DEBUG
+static void dump_status_reg(unsigned long *status)
+{
+   char *ferr;
+
+   switch (get_err(status)) {
+   case ENOERR:
+   ferr = "No Error";
+   bre

[PATCH 0/2 v6] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-16 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v5:
* fixed all the endianess issues
* introduced a cleanup() path invoked in case of flash failure
* moved back machxo2_write() to use a spi_sync() transaction per line write
  (in v5 i queued all the spi_write()s and executed a single spi_sync() at the
  end, but that, sometimes, resulted in the REFRESH command to fail with a
  CMD_ERR, depending on the SPI bus speed)


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 410 +
 4 files changed, 448 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2018-03-16 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 410 +
 3 files changed, 419 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index ad5448f..65ccbc5 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -38,6 +38,14 @@ config FPGA_MGR_ALTERA_PS_SPI
  FPGA manager driver support for Altera Arria/Cyclone/Stratix
  using the passive serial interface over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index f98dcf1..38abb08 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)  += altera-cvp.o
 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)   += altera-ps-spi.o
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..3c7fc3e
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,410 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2018 Paolo Pisati 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+//#define MACHXO2_DEBUG
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE  {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+#define MACHXO2_MAX_BUSY_LOOP  128
+#define MACHXO2_MAX_REFRESH_LOOP   16
+
+#define MACHXO2_PAGE_SIZE  16
+#define MACHXO2_BUF_SIZE   (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY   12
+#define DONE   8
+#define DVER   27
+#define ENAB   9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL   13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD   2
+#defineECRC3
+#define EPREAM 4 /* preamble error */
+#define EABRT  5 /* abort error */
+#define EOVERFL 6 /* overflow error */
+#define ESDMEOF 7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+   return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u8 cmd[] = LSC_READ_STATUS;
+   int ret;
+
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = cmd;
+   tx.len = sizeof(cmd);
+   rx.rx_buf = status;
+   rx.len = 4;
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+
+   *status = be32_to_cpu(*status);
+   return 0;
+}
+
+#ifdef MACHXO2_DEBUG
+static void dump_status_reg(unsigned long *status)
+{
+   char *ferr;
+
+   switch (get_err(status)) {
+   case ENOERR:
+   ferr = "No Error";
+   break;
+   case EID:
+   ferr = "ID E

[PATCH 0/2 v6] Lattice MachXO2 Slave SPI FPGA Manager support

2018-03-16 Thread Paolo Pisati
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.

Tested on a raspberry pi3, beaglebone black (little endian mode) and imx6
hummingboard (big endian mode) + bugblat's pif2 fpga hat (machxo2 7000HC) or
tinyfpga A1/A2 (machxo2 256HC / 1200HC), in SPI slave mode with varying bus
speed.

Changes since v5:
* fixed all the endianess issues
* introduced a cleanup() path invoked in case of flash failure
* moved back machxo2_write() to use a spi_sync() transaction per line write
  (in v5 i queued all the spi_write()s and executed a single spi_sync() at the
  end, but that, sometimes, resulted in the REFRESH command to fail with a
  CMD_ERR, depending on the SPI bus speed)


Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   8 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 410 +
 4 files changed, 448 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-16 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2018-03-16 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..a8c362e
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <800>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-06 Thread Paolo Pisati
On Wed, Dec 6, 2017 at 11:36 AM, Masahiro Yamada
 wrote:
> Just one question to Paolo:
>
>   If some change like firmware removal happens in the future,
>   patching for snapcraft is necessary?
> (i.e. users are required to upgrade snapcraft from --edge ?)
>
> I guess the answer is yes, because "plugin: kernel" needs to know
> the kernel-build system internal.

Well, in this case, i had to fix the 'kernel-with-firmware' option to
skip the 'firmware_install' step since
we took it by default - let's say that in the future the
'modules_install' target is removed or change name,
then i'll have to patch snapcraft.

Wrt updating from -edge, i told you to take it from there because snap
packages land there more often and more quickly
compared to the canonicaldeb  archive, so from a developer perspective
it's easier to iterate over it, but sooner
or later (e.g. once snapcraft 2.36.1 reaches the snap -stable
channel), it will be copied to the deb archive too -
IOW, you would get using apt-get only too.
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-06 Thread Paolo Pisati
On Wed, Dec 6, 2017 at 11:36 AM, Masahiro Yamada
 wrote:
> Just one question to Paolo:
>
>   If some change like firmware removal happens in the future,
>   patching for snapcraft is necessary?
> (i.e. users are required to upgrade snapcraft from --edge ?)
>
> I guess the answer is yes, because "plugin: kernel" needs to know
> the kernel-build system internal.

Well, in this case, i had to fix the 'kernel-with-firmware' option to
skip the 'firmware_install' step since
we took it by default - let's say that in the future the
'modules_install' target is removed or change name,
then i'll have to patch snapcraft.

Wrt updating from -edge, i told you to take it from there because snap
packages land there more often and more quickly
compared to the canonicaldeb  archive, so from a developer perspective
it's easier to iterate over it, but sooner
or later (e.g. once snapcraft 2.36.1 reaches the snap -stable
channel), it will be copied to the deb archive too -
IOW, you would get using apt-get only too.
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-05 Thread Paolo Pisati
On Fri, Dec 1, 2017 at 12:15 AM, Jim Davis  wrote:
>
> If I run /snap/bin/snapcraft --version now on that Ubuntu 16.04 VM I
> am getting 2.36+git2.ae61453.

Yep, the edge channel follows the bleeding edge:

$ snap info snapcraft
...
channels:
  stable:2.35(794) 53MB classic
  candidate: ↑
  beta:  2.36.1  (876) 53MB classic
  edge:  2.36.1+git6.3524514 (895) 53MB classic

you better switch to beta (and then stable when 2.36.1 gets promoted there):

$ snap refresh --beta snapcraft

> I noticed that if I tried to make snap-pkg with the O=/some/dir option
> the tar step failed but the rest of the build continued, and seems to
> have finished successfully.  Should the snap-pkg target stop after a
> tar failure?

That is weird, how did you do that?

My experience with the O=... option (that mimicks the other rpm-pkg
and deb-pkg targets) is that, you first create the dir, copy there the
.config and it builds fine:

~/linux $ mke defconfig
...
~/linux $ mkdir /tmp/foobar
~/linux $ mv .config /tmp/foobar
~/linux $ git clean -ffdx
~/linux $ make O=/tmp/foobar snap-pkg
...
Snapped kernel_4.14.0+_amd64.snap
~/linux $ ls -la /tmp/foobar/snap/
-rw-r--r-- 1 flag flag 14114816 dic  5 12:41 kernel_4.14.0+_amd64.snap
drwxrwxr-x 3 flag flag 4096 dic  5 12:38 parts
drwxrwxr-x 4 flag flag 4096 dic  5 12:41 prime
drwxrwxr-x 3 flag flag 4096 dic  5 12:38 snap
-rw-rw-r-- 1 flag flag  274 dic  5 12:38 snapcraft.yaml
drwxrwxr-x 3 flag flag 4096 dic  5 12:41 stage




-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-05 Thread Paolo Pisati
On Fri, Dec 1, 2017 at 12:15 AM, Jim Davis  wrote:
>
> If I run /snap/bin/snapcraft --version now on that Ubuntu 16.04 VM I
> am getting 2.36+git2.ae61453.

Yep, the edge channel follows the bleeding edge:

$ snap info snapcraft
...
channels:
  stable:2.35(794) 53MB classic
  candidate: ↑
  beta:  2.36.1  (876) 53MB classic
  edge:  2.36.1+git6.3524514 (895) 53MB classic

you better switch to beta (and then stable when 2.36.1 gets promoted there):

$ snap refresh --beta snapcraft

> I noticed that if I tried to make snap-pkg with the O=/some/dir option
> the tar step failed but the rest of the build continued, and seems to
> have finished successfully.  Should the snap-pkg target stop after a
> tar failure?

That is weird, how did you do that?

My experience with the O=... option (that mimicks the other rpm-pkg
and deb-pkg targets) is that, you first create the dir, copy there the
.config and it builds fine:

~/linux $ mke defconfig
...
~/linux $ mkdir /tmp/foobar
~/linux $ mv .config /tmp/foobar
~/linux $ git clean -ffdx
~/linux $ make O=/tmp/foobar snap-pkg
...
Snapped kernel_4.14.0+_amd64.snap
~/linux $ ls -la /tmp/foobar/snap/
-rw-r--r-- 1 flag flag 14114816 dic  5 12:41 kernel_4.14.0+_amd64.snap
drwxrwxr-x 3 flag flag 4096 dic  5 12:38 parts
drwxrwxr-x 4 flag flag 4096 dic  5 12:41 prime
drwxrwxr-x 3 flag flag 4096 dic  5 12:38 snap
-rw-rw-r-- 1 flag flag  274 dic  5 12:38 snapcraft.yaml
drwxrwxr-x 3 flag flag 4096 dic  5 12:41 stage




-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-05 Thread Paolo Pisati
On Fri, Dec 1, 2017 at 1:03 PM, Riku Voipio  wrote:
>
> Since you are already patching snapcraft for this, why not embed the
> whole support in snapcraft? Eg something like snapcraft --kernel
> /path/to/kernel
>
> The key advantage you'll get is being able to support old kernel versions too.

There's a lot more you can do inside a snapcraft.yaml (bundle external
files, override .config options, run pre or post scripts, etc) but by
embedding everything inside the kernel/kbuild plugins
you would loose all these options, and people would loose visibility
of these opportunities.

Besides, snapcraft requires a snapcraft.yaml by design, and i can't
remove that (such a change would never be accepted).
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-12-05 Thread Paolo Pisati
On Fri, Dec 1, 2017 at 1:03 PM, Riku Voipio  wrote:
>
> Since you are already patching snapcraft for this, why not embed the
> whole support in snapcraft? Eg something like snapcraft --kernel
> /path/to/kernel
>
> The key advantage you'll get is being able to support old kernel versions too.

There's a lot more you can do inside a snapcraft.yaml (bundle external
files, override .config options, run pre or post scripts, etc) but by
embedding everything inside the kernel/kbuild plugins
you would loose all these options, and people would loose visibility
of these opportunities.

Besides, snapcraft requires a snapcraft.yaml by design, and i can't
remove that (such a change would never be accepted).
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-29 Thread Paolo Pisati
On Wed, Nov 29, 2017 at 8:33 AM, Masahiro Yamada
 wrote:
>
> Worked for me too,
> after updating snapcraft.
>
>
> Is it really impossible to check the snapcraft version?
> What is the minimum version?   2.35 ?

The minimum version is 2.35+ - what is about to become 2.36 anytime soon now.
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-29 Thread Paolo Pisati
On Wed, Nov 29, 2017 at 8:33 AM, Masahiro Yamada
 wrote:
>
> Worked for me too,
> after updating snapcraft.
>
>
> Is it really impossible to check the snapcraft version?
> What is the minimum version?   2.35 ?

The minimum version is 2.35+ - what is about to become 2.36 anytime soon now.
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-29 Thread Paolo Pisati
Weird, are you sure you are checking the snap version?

$ /snap/bin/snapcraft --version
snapcraft, version 2.35+git26.0474d85

$ snap info snapcraft
name:  snapcraft
summary:   easily create snaps
publisher: canonical
contact:   snappy-canonical-storeacco...@canonical.com
description: |
  Snapcraft aims to make upstream developers' lives easier and as such is not a
  single toolset, but instead is a collection of tools that enable the natural
  workflow of an upstream to be extended with a simple release step into Snappy
  enabled system.
snap-id: vMTKRaLjnOJQetI78HjntT37VuoyssFE
commands:
  - snapcraft
tracking:edge
installed:   2.35+git26.0474d85 (864) 53MB classic
refreshed:   2017-11-29 09:54:04 +0100 CET
channels:
  stable:2.35   (794) 53MB classic
  candidate: ↑
  beta:  ↑
  edge:  2.35+git26.0474d85 (864) 53MB classic

On Tue, Nov 28, 2017 at 8:35 PM, Jim Davis <jim.ep...@gmail.com> wrote:
> On Tue, Nov 28, 2017 at 10:14 AM, Paolo Pisati
> <paolo.pis...@canonical.com> wrote:
>> On Mon, Nov 27, 2017 at 7:33 PM, Jim Davis <jim.ep...@gmail.com> wrote:
>>>
>>> With this patch applied to the 4.14 kernel source, and running make
>>> snap-pkg on a Ubuntu 16.04 VM with the latest 16.04 kernel config
>>> file, I ran into
>>>
>>> Traceback (most recent call last):
>>>   File "/usr/lib/python3.5/shutil.py", line 538, in move
>>> os.rename(src, real_dst)
>>> FileNotFoundError: [Errno 2] No such file or directory:
>>> '/home/jim/linux/snap/parts/kernel/install/lib/firmware' ->
>>> '/home/jim/linux/snap/parts/kernel/install/firmware'
>>>
>>> What did I miss?
>>
>> You need a recent version of snapcraft, i landed a fix for that last week.
>>
>> $ snap install --classic --edge snapcraft
>>
>> or refresh it, in case you already installed via snaps:
>>
>> $ snap refresh --edge snapcraft
>>
>> and then 'make snap-pkg' again.
>> Beware of $PATH in case you have the snap and deb version installed.
>
> Ok, after updating and setting ~/snapcraft/bin/snapcraft ahead of
> /usr/bin in my $PATH, the build completed.   Oddly both
> /usr/bin/snapcraft --version and ~/snapcraft/bin/snapcraft --version
> return 2.34, though the build failed with /usr/bin/snapcraft.
>
> --
> Jim



-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-29 Thread Paolo Pisati
Weird, are you sure you are checking the snap version?

$ /snap/bin/snapcraft --version
snapcraft, version 2.35+git26.0474d85

$ snap info snapcraft
name:  snapcraft
summary:   easily create snaps
publisher: canonical
contact:   snappy-canonical-storeacco...@canonical.com
description: |
  Snapcraft aims to make upstream developers' lives easier and as such is not a
  single toolset, but instead is a collection of tools that enable the natural
  workflow of an upstream to be extended with a simple release step into Snappy
  enabled system.
snap-id: vMTKRaLjnOJQetI78HjntT37VuoyssFE
commands:
  - snapcraft
tracking:edge
installed:   2.35+git26.0474d85 (864) 53MB classic
refreshed:   2017-11-29 09:54:04 +0100 CET
channels:
  stable:2.35   (794) 53MB classic
  candidate: ↑
  beta:  ↑
  edge:  2.35+git26.0474d85 (864) 53MB classic

On Tue, Nov 28, 2017 at 8:35 PM, Jim Davis  wrote:
> On Tue, Nov 28, 2017 at 10:14 AM, Paolo Pisati
>  wrote:
>> On Mon, Nov 27, 2017 at 7:33 PM, Jim Davis  wrote:
>>>
>>> With this patch applied to the 4.14 kernel source, and running make
>>> snap-pkg on a Ubuntu 16.04 VM with the latest 16.04 kernel config
>>> file, I ran into
>>>
>>> Traceback (most recent call last):
>>>   File "/usr/lib/python3.5/shutil.py", line 538, in move
>>> os.rename(src, real_dst)
>>> FileNotFoundError: [Errno 2] No such file or directory:
>>> '/home/jim/linux/snap/parts/kernel/install/lib/firmware' ->
>>> '/home/jim/linux/snap/parts/kernel/install/firmware'
>>>
>>> What did I miss?
>>
>> You need a recent version of snapcraft, i landed a fix for that last week.
>>
>> $ snap install --classic --edge snapcraft
>>
>> or refresh it, in case you already installed via snaps:
>>
>> $ snap refresh --edge snapcraft
>>
>> and then 'make snap-pkg' again.
>> Beware of $PATH in case you have the snap and deb version installed.
>
> Ok, after updating and setting ~/snapcraft/bin/snapcraft ahead of
> /usr/bin in my $PATH, the build completed.   Oddly both
> /usr/bin/snapcraft --version and ~/snapcraft/bin/snapcraft --version
> return 2.34, though the build failed with /usr/bin/snapcraft.
>
> --
> Jim



-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-28 Thread Paolo Pisati
On Mon, Nov 27, 2017 at 7:33 PM, Jim Davis  wrote:
>
> With this patch applied to the 4.14 kernel source, and running make
> snap-pkg on a Ubuntu 16.04 VM with the latest 16.04 kernel config
> file, I ran into
>
> Traceback (most recent call last):
>   File "/usr/lib/python3.5/shutil.py", line 538, in move
> os.rename(src, real_dst)
> FileNotFoundError: [Errno 2] No such file or directory:
> '/home/jim/linux/snap/parts/kernel/install/lib/firmware' ->
> '/home/jim/linux/snap/parts/kernel/install/firmware'
>
> What did I miss?

You need a recent version of snapcraft, i landed a fix for that last week.

$ snap install --classic --edge snapcraft

or refresh it, in case you already installed via snaps:

$ snap refresh --edge snapcraft

and then 'make snap-pkg' again.
Beware of $PATH in case you have the snap and deb version installed.
-- 
bye,
p.


Re: [PATCH v3] scripts/package: snap-pkg target

2017-11-28 Thread Paolo Pisati
On Mon, Nov 27, 2017 at 7:33 PM, Jim Davis  wrote:
>
> With this patch applied to the 4.14 kernel source, and running make
> snap-pkg on a Ubuntu 16.04 VM with the latest 16.04 kernel config
> file, I ran into
>
> Traceback (most recent call last):
>   File "/usr/lib/python3.5/shutil.py", line 538, in move
> os.rename(src, real_dst)
> FileNotFoundError: [Errno 2] No such file or directory:
> '/home/jim/linux/snap/parts/kernel/install/lib/firmware' ->
> '/home/jim/linux/snap/parts/kernel/install/firmware'
>
> What did I miss?

You need a recent version of snapcraft, i landed a fix for that last week.

$ snap install --classic --edge snapcraft

or refresh it, in case you already installed via snaps:

$ snap refresh --edge snapcraft

and then 'make snap-pkg' again.
Beware of $PATH in case you have the snap and deb version installed.
-- 
bye,
p.


[PATCH v3] scripts/package: snap-pkg target

2017-11-27 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and its subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati <paolo.pis...@canonical.com>
---
Changes since v2:
 - use a tarball to instead of cloning the src tree via git
 - set 'kernel-with-firmware: false' to accomodate for
   'firmware_install' removal

Changes since v1:
 - slightly improve the messaging
---
 .gitignore |  5 +
 scripts/package/Makefile   | 16 
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 35 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index f6050b8..705e099 100644
--- a/.gitignore
+++ b/.gitignore
@@ -66,6 +66,11 @@ modules.builtin
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 9ed96aef..5996300 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -95,6 +95,21 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   $(MAKE) clean
+   $(call cmd,src_tar,$(KERNELPATH))
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(KERNELPATH).tar.gz)@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -139,6 +154,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package (will connect to external hosts)'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..626d278e
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: tar
+kernel-with-firmware: false
-- 
2.7.4



[PATCH v3] scripts/package: snap-pkg target

2017-11-27 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and its subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati 
---
Changes since v2:
 - use a tarball to instead of cloning the src tree via git
 - set 'kernel-with-firmware: false' to accomodate for
   'firmware_install' removal

Changes since v1:
 - slightly improve the messaging
---
 .gitignore |  5 +
 scripts/package/Makefile   | 16 
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 35 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index f6050b8..705e099 100644
--- a/.gitignore
+++ b/.gitignore
@@ -66,6 +66,11 @@ modules.builtin
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 9ed96aef..5996300 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -95,6 +95,21 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   $(MAKE) clean
+   $(call cmd,src_tar,$(KERNELPATH))
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(KERNELPATH).tar.gz)@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -139,6 +154,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package (will connect to external hosts)'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..626d278e
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: tar
+kernel-with-firmware: false
-- 
2.7.4



Re: [PATCH v2] scripts/package: snap-pkg target

2017-11-27 Thread Paolo Pisati
On Wed, Sep 20, 2017 at 11:28 AM, Masahiro Yamada
 wrote:
>> @@ -0,0 +1,14 @@
>> +name: kernel
>> +version: KERNELRELEASE
>> +summary: Linux kernel
>> +description: The upstream Linux kernel
>> +grade: stable
>> +confinement: strict
>> +type: kernel
>> +
>> +parts:
>> +  kernel:
>> +plugin: kernel
>> +source: SRCTREE
>> +source-type: git
>> +kconfigfile: SRCTREE/.config
>
>
> Other targets such as rpm-pkg and deb-pkg
> work without relying on git.
>
> However, snap-pkg every time does "git clone", so
> changes added to the source tree, but not committed yet,
> are not reflected to the package.
>
> Is it possible to work with a tarball,
> like other targets do?

Thanks for your feedback Yamada-san.

Yes, switching to a tarball is doable and i'll send a v3 with that change.
-- 
bye,
p.


Re: [PATCH v2] scripts/package: snap-pkg target

2017-11-27 Thread Paolo Pisati
On Wed, Sep 20, 2017 at 11:28 AM, Masahiro Yamada
 wrote:
>> @@ -0,0 +1,14 @@
>> +name: kernel
>> +version: KERNELRELEASE
>> +summary: Linux kernel
>> +description: The upstream Linux kernel
>> +grade: stable
>> +confinement: strict
>> +type: kernel
>> +
>> +parts:
>> +  kernel:
>> +plugin: kernel
>> +source: SRCTREE
>> +source-type: git
>> +kconfigfile: SRCTREE/.config
>
>
> Other targets such as rpm-pkg and deb-pkg
> work without relying on git.
>
> However, snap-pkg every time does "git clone", so
> changes added to the source tree, but not committed yet,
> are not reflected to the package.
>
> Is it possible to work with a tarball,
> like other targets do?

Thanks for your feedback Yamada-san.

Yes, switching to a tarball is doable and i'll send a v3 with that change.
-- 
bye,
p.


[PATCH v2] scripts/package: snap-pkg target

2017-09-12 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and its subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati <paolo.pis...@canonical.com>
---
Changes since v1:
 - slightly improve the messaging
---
 .gitignore |  5 +
 scripts/package/Makefile   | 14 ++
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 33 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index 0c39aa2..638c492 100644
--- a/.gitignore
+++ b/.gitignore
@@ -59,6 +59,11 @@ Module.symvers
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 71b4a8a..cfa1b2d 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -99,6 +99,19 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(srctree))@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -143,6 +156,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package (will connect to external hosts)'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..2e7ffc8
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: git
+kconfigfile: SRCTREE/.config
-- 
2.7.4



[PATCH v2] scripts/package: snap-pkg target

2017-09-12 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and its subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati 
---
Changes since v1:
 - slightly improve the messaging
---
 .gitignore |  5 +
 scripts/package/Makefile   | 14 ++
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 33 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index 0c39aa2..638c492 100644
--- a/.gitignore
+++ b/.gitignore
@@ -59,6 +59,11 @@ Module.symvers
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 71b4a8a..cfa1b2d 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -99,6 +99,19 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(srctree))@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -143,6 +156,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package (will connect to external hosts)'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..2e7ffc8
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: git
+kconfigfile: SRCTREE/.config
-- 
2.7.4



Re: [PATCH] scripts/package: snap-pkg target

2017-09-08 Thread Paolo Pisati
Apologise for the late reply.

On Wed, Jul 19, 2017 at 2:02 AM, Jim Davis  wrote:
>
> Once I fed the snap into ubuntu-image, after hunting down a plausible
> model file, I did get an image file that booted under qemu.  I guess
> if you're in the know about snap (and I don't include myself in that
> august company) you'd know that the snap-pkg target won't directly
> give you something you can boot, but the "make help" output looks so
> similar to the other conventional build targets that the some might
> miss that point.

Well, snap-pkg gives you a kernel that you can use in an ubuntu-core
image (either when building an entire image from scratch, or you can
install it in a preinstalled system), much like deb-pkg or rpm-pkg
targets give you a kernel that you can use in a deb / rpm based
system, i don't see any semantics difference here.

> The snap-informed would also know that the snap-pkg target would
> download stuff from the internet as part of the build process, but
> that's unusual enough in kernel building that another recent build
> target, linkcheckdocs, included "(will connect to external hosts)" as
> part of its "make help" output.  That probably would be a good idea
> for the snap-pkg target too.

Ack.

> Running snap-pkg twice in a row seems to have rebuilt the entire
> kernel source, unlike the other more conventional build targets.

The deb-pkg and rpm-pkg targets rebuild from scratch too if invoked in a row.
-- 
bye,
p.


Re: [PATCH] scripts/package: snap-pkg target

2017-09-08 Thread Paolo Pisati
Apologise for the late reply.

On Wed, Jul 19, 2017 at 2:02 AM, Jim Davis  wrote:
>
> Once I fed the snap into ubuntu-image, after hunting down a plausible
> model file, I did get an image file that booted under qemu.  I guess
> if you're in the know about snap (and I don't include myself in that
> august company) you'd know that the snap-pkg target won't directly
> give you something you can boot, but the "make help" output looks so
> similar to the other conventional build targets that the some might
> miss that point.

Well, snap-pkg gives you a kernel that you can use in an ubuntu-core
image (either when building an entire image from scratch, or you can
install it in a preinstalled system), much like deb-pkg or rpm-pkg
targets give you a kernel that you can use in a deb / rpm based
system, i don't see any semantics difference here.

> The snap-informed would also know that the snap-pkg target would
> download stuff from the internet as part of the build process, but
> that's unusual enough in kernel building that another recent build
> target, linkcheckdocs, included "(will connect to external hosts)" as
> part of its "make help" output.  That probably would be a good idea
> for the snap-pkg target too.

Ack.

> Running snap-pkg twice in a row seems to have rebuilt the entire
> kernel source, unlike the other more conventional build targets.

The deb-pkg and rpm-pkg targets rebuild from scratch too if invoked in a row.
-- 
bye,
p.


Re: [PATCH] scripts/package: snap-pkg target

2017-07-11 Thread Paolo Pisati
On Mon, Jul 10, 2017 at 6:46 PM, Jim Davis  wrote:
>>
>> For more information on snap packages: https://snapcraft.io/docs/
>
> Is this something a user could do with the existing deb target, and
> then running deb2snap?

No, the kernel snap is a special case, it requires communication with
the store (e.g. to download the core snap) and some extra steps,
therefore you should use snapcraft and abstract from these details.
-- 
bye,
p.


Re: [PATCH] scripts/package: snap-pkg target

2017-07-11 Thread Paolo Pisati
On Mon, Jul 10, 2017 at 6:46 PM, Jim Davis  wrote:
>>
>> For more information on snap packages: https://snapcraft.io/docs/
>
> Is this something a user could do with the existing deb target, and
> then running deb2snap?

No, the kernel snap is a special case, it requires communication with
the store (e.g. to download the core snap) and some extra steps,
therefore you should use snapcraft and abstract from these details.
-- 
bye,
p.


[PATCH] scripts/package: snap-pkg target

2017-07-10 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and it's subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati <paolo.pis...@canonical.com>
---
 .gitignore |  5 +
 scripts/package/Makefile   | 14 ++
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 33 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index 0c39aa2..638c492 100644
--- a/.gitignore
+++ b/.gitignore
@@ -59,6 +59,11 @@ Module.symvers
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 71b4a8a..a7ea67c 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -99,6 +99,19 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(srctree))@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -143,6 +156,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..2e7ffc8
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: git
+kconfigfile: SRCTREE/.config
-- 
2.7.4



[PATCH] scripts/package: snap-pkg target

2017-07-10 Thread Paolo Pisati
Following in footsteps of other targets like 'deb-pkg, 'rpm-pkg' and 'tar-pkg',
this patch adds a 'snap-pkg' target for the creation of a Linux kernel snap
package using the kbuild infrastructure.

A snap, in its general form, is a self contained, sandboxed, universal package
and it is intended to work across multiple distributions and/or devices. A snap
package is distributed as a single compressed squashfs filesystem.

A kernel snap is a snap package carrying the Linux kernel, kernel modules,
accessory files (DTBs, System.map, etc) and a manifesto file.  The purpose of a
kernel snap is to carry the Linux kernel during the creation of a system image,
eg. Ubuntu Core, and it's subsequent upgrades.

For more information on snap packages: https://snapcraft.io/docs/

Signed-off-by: Paolo Pisati 
---
 .gitignore |  5 +
 scripts/package/Makefile   | 14 ++
 scripts/package/snapcraft.template | 14 ++
 3 files changed, 33 insertions(+)
 create mode 100644 scripts/package/snapcraft.template

diff --git a/.gitignore b/.gitignore
index 0c39aa2..638c492 100644
--- a/.gitignore
+++ b/.gitignore
@@ -59,6 +59,11 @@ Module.symvers
 /debian/
 
 #
+# Snap directory (make snap-pkg)
+#
+/snap/
+
+#
 # tar directory (make tar*-pkg)
 #
 /tar-install/
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 71b4a8a..a7ea67c 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -99,6 +99,19 @@ bindeb-pkg: FORCE
 
 clean-dirs += $(objtree)/debian/
 
+# snap-pkg
+# ---
+snap-pkg: FORCE
+   rm -rf $(objtree)/snap
+   mkdir $(objtree)/snap
+   sed "s@KERNELRELEASE@$(KERNELRELEASE)@; \
+   s@SRCTREE@$(shell realpath $(srctree))@" \
+   $(srctree)/scripts/package/snapcraft.template > \
+   $(objtree)/snap/snapcraft.yaml
+   cd $(objtree)/snap && \
+   snapcraft --target-arch=$(UTS_MACHINE)
+
+clean-dirs += $(objtree)/snap/
 
 # tarball targets
 # ---
@@ -143,6 +156,7 @@ help: FORCE
@echo '  binrpm-pkg  - Build only the binary kernel RPM package'
@echo '  deb-pkg - Build both source and binary deb kernel 
packages'
@echo '  bindeb-pkg  - Build only the binary kernel deb package'
+   @echo '  snap-pkg- Build only the binary kernel snap 
package'
@echo '  tar-pkg - Build the kernel as an uncompressed 
tarball'
@echo '  targz-pkg   - Build the kernel as a gzip compressed 
tarball'
@echo '  tarbz2-pkg  - Build the kernel as a bzip2 compressed 
tarball'
diff --git a/scripts/package/snapcraft.template 
b/scripts/package/snapcraft.template
new file mode 100644
index 000..2e7ffc8
--- /dev/null
+++ b/scripts/package/snapcraft.template
@@ -0,0 +1,14 @@
+name: kernel
+version: KERNELRELEASE
+summary: Linux kernel
+description: The upstream Linux kernel
+grade: stable
+confinement: strict
+type: kernel
+
+parts:
+  kernel:
+plugin: kernel
+source: SRCTREE
+source-type: git
+kconfigfile: SRCTREE/.config
-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2017-07-06 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..c3ef26bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <6000>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

2017-07-06 Thread Paolo Pisati
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.

Signed-off-by: Paolo Pisati 
Acked-by: Rob Herring 
---
 .../bindings/fpga/lattice-machxo2-spi.txt  | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt

diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt 
b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 000..c3ef26bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+   fpga-region0 {
+   compatible = "fpga-region";
+   fpga-mgr = <_mgr_spi>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+
+   spi1: spi@2000 {
+...
+
+   fpga_mgr_spi: fpga-mgr@0 {
+   compatible = "lattice,machxo2-slave-spi";
+   spi-max-frequency = <6000>;
+   reg = <0>;
+   };
+   };
-- 
2.7.4



[PATCH v5 0/2] Lattice MachXO2 Slave SPI FPGA Manager support

2017-07-06 Thread Paolo Pisati
Hi all, 



this series adds support for the Lattice MachXO2 FPGA chip, programmed  

over Slave SPI. 



Tested on my raspberry pi3 + bugblat's pif2 fpga hat.   



Changes from v1:

* fixed all the warnings pointed out by 'checkpatch --strict' and   

  Alan Tull 



Changes from v2:

* convert to BIT() macro and spi_message_init() / trans.delay_usecs 



Changes from v3;
  
* loop unroll machxo2_write() and collate writes in a single spi_sync()

Changes from v4:

* rebased on 3.12

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 298 +
 4 files changed, 335 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH v5 0/2] Lattice MachXO2 Slave SPI FPGA Manager support

2017-07-06 Thread Paolo Pisati
Hi all, 



this series adds support for the Lattice MachXO2 FPGA chip, programmed  

over Slave SPI. 



Tested on my raspberry pi3 + bugblat's pif2 fpga hat.   



Changes from v1:

* fixed all the warnings pointed out by 'checkpatch --strict' and   

  Alan Tull 



Changes from v2:

* convert to BIT() macro and spi_message_init() / trans.delay_usecs 



Changes from v3;
  
* loop unroll machxo2_write() and collate writes in a single spi_sync()

Changes from v4:

* rebased on 3.12

Paolo Pisati (2):
  dt: bindings: fpga: add lattice machxo2 slave spi binding description
  fpga: lattice machxo2: Add Lattice MachXO2 support

 .../bindings/fpga/lattice-machxo2-spi.txt  |  29 ++
 drivers/fpga/Kconfig   |   7 +
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 298 +
 4 files changed, 335 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
 create mode 100644 drivers/fpga/machxo2-spi.c

-- 
2.7.4



[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2017-07-06 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   7 ++
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 298 +
 3 files changed, 306 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 161ba9d..addda68 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -26,6 +26,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+FPGA manager driver support for Lattice MachXO2 configuration
+over slave SPI interface.
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 2a4f021..cc10e9d 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_FPGA)  += fpga-mgr.o
 
 # FPGA Manager Drivers
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..69e02a6
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,298 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2017 Paolo Pisati <p.pis...@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+
+#define ISC_DISABLE0x0026
+#define ISC_ENABLE 0x08c6
+#define ISC_ERASE  0x040e
+#define ISC_NOOP   0x
+#define ISC_PROGRAMDONE0x005e
+#define LSC_CHECKBUSY  0x00f0
+#define LSC_INITADDRESS0x0046
+#define LSC_PROGINCRNV 0x0170
+#define LSC_REFRESH0x0079
+
+#define BUSYFLAG   BIT(7)
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+
+#define MACHXO2_OP_SIZEsizeof(u32)
+#define MACHXO2_PAGE_SIZE  16
+
+static int wait_until_not_busy(struct spi_device *spi)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u32 checkbusy = LSC_CHECKBUSY;
+   u8 busy;
+   int ret;
+
+   do {
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = 
+   tx.len = MACHXO2_OP_SIZE;
+   rx.rx_buf = 
+   rx.len = sizeof(busy);
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+   } while (busy & BUSYFLAG);
+
+   return 0;
+}
+
+static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
+{
+   return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static int machxo2_write_init(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
+ const char *buf, size_t count)
+{
+   struct spi_device *spi = mgr->priv;
+   struct spi_message msg;
+   struct spi_transfer tx[5];
+   u32 disable = ISC_DISABLE;
+   u32 bypass = ISC_NOOP;
+   u32 enable = ISC_ENABLE;
+   u32 erase = ISC_ERASE;
+   u32 initaddr = LSC_INITADDRESS;
+   int ret;
+
+   if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+   dev_err(>dev,
+   "Partial reconfiguration is not supported\n");
+   return -ENOTSUPP;
+   }
+
+   memset(tx, 0, sizeof(tx));
+   spi_message_init();
+   tx[0].tx_buf = 
+   tx[0].len = MACHXO2_OP_SIZE - 1;
+   spi_message_add_tail([0], );
+
+   tx[1].tx_buf = 
+   tx[1].len = MACHXO2_OP_SIZE;
+   spi_message_add_tail([1], );
+   r

[PATCH 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2017-07-06 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati 
---
 drivers/fpga/Kconfig   |   7 ++
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 298 +
 3 files changed, 306 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 161ba9d..addda68 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -26,6 +26,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+FPGA manager driver support for Lattice MachXO2 configuration
+over slave SPI interface.
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 2a4f021..cc10e9d 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_FPGA)  += fpga-mgr.o
 
 # FPGA Manager Drivers
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..69e02a6
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,298 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2017 Paolo Pisati 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+
+#define ISC_DISABLE0x0026
+#define ISC_ENABLE 0x08c6
+#define ISC_ERASE  0x040e
+#define ISC_NOOP   0x
+#define ISC_PROGRAMDONE0x005e
+#define LSC_CHECKBUSY  0x00f0
+#define LSC_INITADDRESS0x0046
+#define LSC_PROGINCRNV 0x0170
+#define LSC_REFRESH0x0079
+
+#define BUSYFLAG   BIT(7)
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+
+#define MACHXO2_OP_SIZEsizeof(u32)
+#define MACHXO2_PAGE_SIZE  16
+
+static int wait_until_not_busy(struct spi_device *spi)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u32 checkbusy = LSC_CHECKBUSY;
+   u8 busy;
+   int ret;
+
+   do {
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = 
+   tx.len = MACHXO2_OP_SIZE;
+   rx.rx_buf = 
+   rx.len = sizeof(busy);
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+   } while (busy & BUSYFLAG);
+
+   return 0;
+}
+
+static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
+{
+   return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static int machxo2_write_init(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
+ const char *buf, size_t count)
+{
+   struct spi_device *spi = mgr->priv;
+   struct spi_message msg;
+   struct spi_transfer tx[5];
+   u32 disable = ISC_DISABLE;
+   u32 bypass = ISC_NOOP;
+   u32 enable = ISC_ENABLE;
+   u32 erase = ISC_ERASE;
+   u32 initaddr = LSC_INITADDRESS;
+   int ret;
+
+   if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+   dev_err(>dev,
+   "Partial reconfiguration is not supported\n");
+   return -ENOTSUPP;
+   }
+
+   memset(tx, 0, sizeof(tx));
+   spi_message_init();
+   tx[0].tx_buf = 
+   tx[0].len = MACHXO2_OP_SIZE - 1;
+   spi_message_add_tail([0], );
+
+   tx[1].tx_buf = 
+   tx[1].len = MACHXO2_OP_SIZE;
+   spi_message_add_tail([1], );
+   ret = spi_sync(spi, );
+   if

[PATCH v4 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

2017-06-26 Thread Paolo Pisati
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.

Signed-off-by: Paolo Pisati <p.pis...@gmail.com>
---
 drivers/fpga/Kconfig   |   7 ++
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/machxo2-spi.c | 298 +
 3 files changed, 306 insertions(+)
 create mode 100644 drivers/fpga/machxo2-spi.c

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index c81cb7d..cce135b 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -26,6 +26,13 @@ config FPGA_MGR_ICE40_SPI
help
  FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
 
+config FPGA_MGR_MACHXO2_SPI
+   tristate "Lattice MachXO2 SPI"
+   depends on SPI
+   help
+FPGA manager driver support for Lattice MachXO2 configuration
+over slave SPI interface.
+
 config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index c6f5d74..cdab1fe 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_FPGA)  += fpga-mgr.o
 
 # FPGA Manager Drivers
 obj-$(CONFIG_FPGA_MGR_ICE40_SPI)   += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
 obj-$(CONFIG_FPGA_MGR_TS73XX)  += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..69e02a6
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,298 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2017 Paolo Pisati <p.pis...@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+
+#define ISC_DISABLE0x0026
+#define ISC_ENABLE 0x08c6
+#define ISC_ERASE  0x040e
+#define ISC_NOOP   0x
+#define ISC_PROGRAMDONE0x005e
+#define LSC_CHECKBUSY  0x00f0
+#define LSC_INITADDRESS0x0046
+#define LSC_PROGINCRNV 0x0170
+#define LSC_REFRESH0x0079
+
+#define BUSYFLAG   BIT(7)
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED  6600
+
+#define MACHXO2_LOW_DELAY  5   /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+#define MACHXO2_REFRESH4800/* us */
+
+#define MACHXO2_OP_SIZEsizeof(u32)
+#define MACHXO2_PAGE_SIZE  16
+
+static int wait_until_not_busy(struct spi_device *spi)
+{
+   struct spi_message msg;
+   struct spi_transfer rx, tx;
+   u32 checkbusy = LSC_CHECKBUSY;
+   u8 busy;
+   int ret;
+
+   do {
+   memset(, 0, sizeof(rx));
+   memset(, 0, sizeof(tx));
+   tx.tx_buf = 
+   tx.len = MACHXO2_OP_SIZE;
+   rx.rx_buf = 
+   rx.len = sizeof(busy);
+   spi_message_init();
+   spi_message_add_tail(, );
+   spi_message_add_tail(, );
+   ret = spi_sync(spi, );
+   if (ret)
+   return ret;
+   } while (busy & BUSYFLAG);
+
+   return 0;
+}
+
+static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
+{
+   return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static int machxo2_write_init(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
+ const char *buf, size_t count)
+{
+   struct spi_device *spi = mgr->priv;
+   struct spi_message msg;
+   struct spi_transfer tx[5];
+   u32 disable = ISC_DISABLE;
+   u32 bypass = ISC_NOOP;
+   u32 enable = ISC_ENABLE;
+   u32 erase = ISC_ERASE;
+   u32 initaddr = LSC_INITADDRESS;
+   int ret;
+
+   if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+   dev_err(>dev,
+   "Partial reconfiguration is not supported\n");
+   return -ENOTSUPP;
+   }
+
+   memset(tx, 0, sizeof(tx));
+   spi_message_init();
+   tx[0].tx_buf = 
+   tx[0].len = MACHXO2_OP_SIZE - 1;
+   spi_message_add_tail([0], );
+
+   tx[1].tx_buf = 
+   tx[1].len = MACHXO2_OP_SIZE;
+   spi_message_add_tail([1], );
+   r

  1   2   3   >