[PATCH 1/1] ASoC: sirf: usp: Add bitclock inversion support
Signed-off-by: Rongjun Ying
---
sound/soc/sirf/sirf-usp.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 3a73037..186dc7f 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -100,6 +100,16 @@ static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai
*dai,
return -EINVAL;
}
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ usp->daifmt_format |= (fmt & SND_SOC_DAIFMT_INV_MASK);
+ break;
+ default:
+ return -EINVAL;
+ }
+
return 0;
}
@@ -177,7 +187,7 @@ static int sirf_usp_pcm_hw_params(struct snd_pcm_substream
*substream,
shifter_len = data_len;
- switch (usp->daifmt_format) {
+ switch (usp->daifmt_format & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
USP_I2S_SYNC_CHG, USP_I2S_SYNC_CHG);
@@ -193,6 +203,18 @@ static int sirf_usp_pcm_hw_params(struct snd_pcm_substream
*substream,
return -EINVAL;
}
+ switch (usp->daifmt_format & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ regmap_update_bits(usp->regmap, USP_MODE1,
+ USP_RXD_ACT_EDGE_FALLING | USP_TXD_ACT_EDGE_FALLING,
+ USP_RXD_ACT_EDGE_FALLING);
+ break;
+ default:
+ return -EINVAL;
+ }
+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
regmap_update_bits(usp->regmap, USP_TX_FRAME_CTRL,
USP_TXC_DATA_LEN_MASK | USP_TXC_FRAME_LEN_MASK
--
2.0.4
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] ASoC: sirf: usp: Add bitclock inversion support
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
sound/soc/sirf/sirf-usp.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 3a73037..186dc7f 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -100,6 +100,16 @@ static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai
*dai,
return -EINVAL;
}
+ switch (fmt SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ usp-daifmt_format |= (fmt SND_SOC_DAIFMT_INV_MASK);
+ break;
+ default:
+ return -EINVAL;
+ }
+
return 0;
}
@@ -177,7 +187,7 @@ static int sirf_usp_pcm_hw_params(struct snd_pcm_substream
*substream,
shifter_len = data_len;
- switch (usp-daifmt_format) {
+ switch (usp-daifmt_format SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
regmap_update_bits(usp-regmap, USP_RX_FRAME_CTRL,
USP_I2S_SYNC_CHG, USP_I2S_SYNC_CHG);
@@ -193,6 +203,18 @@ static int sirf_usp_pcm_hw_params(struct snd_pcm_substream
*substream,
return -EINVAL;
}
+ switch (usp-daifmt_format SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ regmap_update_bits(usp-regmap, USP_MODE1,
+ USP_RXD_ACT_EDGE_FALLING | USP_TXD_ACT_EDGE_FALLING,
+ USP_RXD_ACT_EDGE_FALLING);
+ break;
+ default:
+ return -EINVAL;
+ }
+
if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK)
regmap_update_bits(usp-regmap, USP_TX_FRAME_CTRL,
USP_TXC_DATA_LEN_MASK | USP_TXC_FRAME_LEN_MASK
--
2.0.4
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] ASoC: sirf-usp: Fixed a bug for playback and capture work at the same time
1. The startup function invoked when the playback and capture.
If start playback when capturing, the registers are re-initinitialised.
That cause the playback fail. So move the startup code into runtime resume.
2. Modified: If non RUNTIME_PM support, the probe need enable clock and
initinitialise registers.
3. Refine code.
Signed-off-by: Rongjun Ying
---
sound/soc/sirf/sirf-usp.c | 54 +++
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 9693bc2..3a73037 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -103,11 +103,8 @@ static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai
*dai,
return 0;
}
-static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
+static void sirf_usp_i2s_init(struct sirf_usp *usp)
{
- struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
-
/* Configure RISC mode */
regmap_update_bits(usp->regmap, USP_RISC_DSP_MODE,
USP_RISC_DSP_SEL, ~USP_RISC_DSP_SEL);
@@ -119,19 +116,16 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream
*substream,
regmap_write(usp->regmap, USP_TX_DMA_IO_LEN, 0);
regmap_write(usp->regmap, USP_RX_DMA_IO_LEN, 0);
- regmap_write(usp->regmap, USP_RX_FRAME_CTRL, USP_SINGLE_SYNC_MODE);
-
- regmap_write(usp->regmap, USP_TX_FRAME_CTRL, USP_TXC_SLAVE_CLK_SAMPLE);
-
/* Configure Mode2 register */
regmap_write(usp->regmap, USP_MODE2, (1 << USP_RXD_DELAY_LEN_OFFSET) |
- (0 << USP_TXD_DELAY_LEN_OFFSET));
+ (0 << USP_TXD_DELAY_LEN_OFFSET) |
+ USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
/* Configure Mode1 register */
regmap_write(usp->regmap, USP_MODE1,
USP_SYNC_MODE | USP_EN | USP_TXD_ACT_EDGE_FALLING |
USP_RFS_ACT_LEVEL_LOGIC1 | USP_TFS_ACT_LEVEL_LOGIC1 |
- USP_TX_UFLOW_REPEAT_ZERO);
+ USP_TX_UFLOW_REPEAT_ZERO | USP_CLOCK_MODE_SLAVE);
/* Configure RX DMA IO Control register */
regmap_write(usp->regmap, USP_RX_DMA_IO_CTRL, 0);
@@ -155,8 +149,6 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream
*substream,
/* Congiure TX FIFO Level Check register */
regmap_write(usp->regmap, USP_TX_FIFO_LEVEL_CHK,
TX_FIFO_SC(0x1B) | TX_FIFO_LC(0x0E) | TX_FIFO_HC(0x04));
-
- return 0;
}
static int sirf_usp_pcm_hw_params(struct snd_pcm_substream *substream,
@@ -204,23 +196,19 @@ static int sirf_usp_pcm_hw_params(struct
snd_pcm_substream *substream,
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
regmap_update_bits(usp->regmap, USP_TX_FRAME_CTRL,
USP_TXC_DATA_LEN_MASK | USP_TXC_FRAME_LEN_MASK
- | USP_TXC_SHIFTER_LEN_MASK,
+ | USP_TXC_SHIFTER_LEN_MASK | USP_TXC_SLAVE_CLK_SAMPLE,
((data_len - 1) << USP_TXC_DATA_LEN_OFFSET)
| ((frame_len - 1) << USP_TXC_FRAME_LEN_OFFSET)
- | ((shifter_len - 1) << USP_TXC_SHIFTER_LEN_OFFSET));
+ | ((shifter_len - 1) << USP_TXC_SHIFTER_LEN_OFFSET)
+ | USP_TXC_SLAVE_CLK_SAMPLE);
else
regmap_update_bits(usp->regmap, USP_RX_FRAME_CTRL,
USP_RXC_DATA_LEN_MASK | USP_RXC_FRAME_LEN_MASK
- | USP_RXC_SHIFTER_LEN_MASK,
+ | USP_RXC_SHIFTER_LEN_MASK | USP_SINGLE_SYNC_MODE,
((data_len - 1) << USP_RXC_DATA_LEN_OFFSET)
| ((frame_len - 1) << USP_RXC_FRAME_LEN_OFFSET)
- | ((shifter_len - 1) << USP_RXC_SHIFTER_LEN_OFFSET));
-
- regmap_update_bits(usp->regmap, USP_MODE1,
- USP_CLOCK_MODE_SLAVE, USP_CLOCK_MODE_SLAVE);
- regmap_update_bits(usp->regmap, USP_MODE2,
- USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE,
- USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
+ | ((shifter_len - 1) << USP_RXC_SHIFTER_LEN_OFFSET)
+ | USP_SINGLE_SYNC_MODE);
return 0;
}
@@ -253,7 +241,6 @@ static int sirf_usp_pcm_trigger(struct snd_pcm_substream
*substream, int cmd,
}
static const struct snd_soc_dai_ops sirf_usp_pcm_dai_ops = {
- .startup = sirf_usp_i2s_startup,
.trigger = sirf_usp_pcm_trigger,
.set_fmt = sirf_usp_pcm_set_dai_fmt,
.hw_params = sirf_usp_pcm_hw_params,
@@ -282,7 +269,6 @@ static struct snd_soc_dai_driver sirf_usp_pcm_dai = {
.ops = _usp_pcm_dai_ops,
};
-#ifdef CONFIG_PM
static int sirf_usp_pcm_runtime_suspend(struct device *dev)
{
stru
[PATCH 1/1] ASoC: sirf-usp: Fixed a bug for playback and capture work at the same time
1. The startup function invoked when the playback and capture.
If start playback when capturing, the registers are re-initinitialised.
That cause the playback fail. So move the startup code into runtime resume.
2. Modified: If non RUNTIME_PM support, the probe need enable clock and
initinitialise registers.
3. Refine code.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
sound/soc/sirf/sirf-usp.c | 54 +++
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 9693bc2..3a73037 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -103,11 +103,8 @@ static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai
*dai,
return 0;
}
-static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
+static void sirf_usp_i2s_init(struct sirf_usp *usp)
{
- struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
-
/* Configure RISC mode */
regmap_update_bits(usp-regmap, USP_RISC_DSP_MODE,
USP_RISC_DSP_SEL, ~USP_RISC_DSP_SEL);
@@ -119,19 +116,16 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream
*substream,
regmap_write(usp-regmap, USP_TX_DMA_IO_LEN, 0);
regmap_write(usp-regmap, USP_RX_DMA_IO_LEN, 0);
- regmap_write(usp-regmap, USP_RX_FRAME_CTRL, USP_SINGLE_SYNC_MODE);
-
- regmap_write(usp-regmap, USP_TX_FRAME_CTRL, USP_TXC_SLAVE_CLK_SAMPLE);
-
/* Configure Mode2 register */
regmap_write(usp-regmap, USP_MODE2, (1 USP_RXD_DELAY_LEN_OFFSET) |
- (0 USP_TXD_DELAY_LEN_OFFSET));
+ (0 USP_TXD_DELAY_LEN_OFFSET) |
+ USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
/* Configure Mode1 register */
regmap_write(usp-regmap, USP_MODE1,
USP_SYNC_MODE | USP_EN | USP_TXD_ACT_EDGE_FALLING |
USP_RFS_ACT_LEVEL_LOGIC1 | USP_TFS_ACT_LEVEL_LOGIC1 |
- USP_TX_UFLOW_REPEAT_ZERO);
+ USP_TX_UFLOW_REPEAT_ZERO | USP_CLOCK_MODE_SLAVE);
/* Configure RX DMA IO Control register */
regmap_write(usp-regmap, USP_RX_DMA_IO_CTRL, 0);
@@ -155,8 +149,6 @@ static int sirf_usp_i2s_startup(struct snd_pcm_substream
*substream,
/* Congiure TX FIFO Level Check register */
regmap_write(usp-regmap, USP_TX_FIFO_LEVEL_CHK,
TX_FIFO_SC(0x1B) | TX_FIFO_LC(0x0E) | TX_FIFO_HC(0x04));
-
- return 0;
}
static int sirf_usp_pcm_hw_params(struct snd_pcm_substream *substream,
@@ -204,23 +196,19 @@ static int sirf_usp_pcm_hw_params(struct
snd_pcm_substream *substream,
if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK)
regmap_update_bits(usp-regmap, USP_TX_FRAME_CTRL,
USP_TXC_DATA_LEN_MASK | USP_TXC_FRAME_LEN_MASK
- | USP_TXC_SHIFTER_LEN_MASK,
+ | USP_TXC_SHIFTER_LEN_MASK | USP_TXC_SLAVE_CLK_SAMPLE,
((data_len - 1) USP_TXC_DATA_LEN_OFFSET)
| ((frame_len - 1) USP_TXC_FRAME_LEN_OFFSET)
- | ((shifter_len - 1) USP_TXC_SHIFTER_LEN_OFFSET));
+ | ((shifter_len - 1) USP_TXC_SHIFTER_LEN_OFFSET)
+ | USP_TXC_SLAVE_CLK_SAMPLE);
else
regmap_update_bits(usp-regmap, USP_RX_FRAME_CTRL,
USP_RXC_DATA_LEN_MASK | USP_RXC_FRAME_LEN_MASK
- | USP_RXC_SHIFTER_LEN_MASK,
+ | USP_RXC_SHIFTER_LEN_MASK | USP_SINGLE_SYNC_MODE,
((data_len - 1) USP_RXC_DATA_LEN_OFFSET)
| ((frame_len - 1) USP_RXC_FRAME_LEN_OFFSET)
- | ((shifter_len - 1) USP_RXC_SHIFTER_LEN_OFFSET));
-
- regmap_update_bits(usp-regmap, USP_MODE1,
- USP_CLOCK_MODE_SLAVE, USP_CLOCK_MODE_SLAVE);
- regmap_update_bits(usp-regmap, USP_MODE2,
- USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE,
- USP_TFS_CLK_SLAVE_MODE | USP_RFS_CLK_SLAVE_MODE);
+ | ((shifter_len - 1) USP_RXC_SHIFTER_LEN_OFFSET)
+ | USP_SINGLE_SYNC_MODE);
return 0;
}
@@ -253,7 +241,6 @@ static int sirf_usp_pcm_trigger(struct snd_pcm_substream
*substream, int cmd,
}
static const struct snd_soc_dai_ops sirf_usp_pcm_dai_ops = {
- .startup = sirf_usp_i2s_startup,
.trigger = sirf_usp_pcm_trigger,
.set_fmt = sirf_usp_pcm_set_dai_fmt,
.hw_params = sirf_usp_pcm_hw_params,
@@ -282,7 +269,6 @@ static struct snd_soc_dai_driver sirf_usp_pcm_dai = {
.ops = sirf_usp_pcm_dai_ops,
};
-#ifdef CONFIG_PM
static int sirf_usp_pcm_runtime_suspend(struct device *dev)
{
struct sirf_usp *usp = dev_get_drvdata(dev);
@@ -293,9 +279,15 @@ static int sirf_usp_pcm_runtime_suspend(struct device *dev
[PATCH v2 2/2] ASoC: sirf: Add device tree binding for the USP audio device
Signed-off-by: Rongjun Ying
---
.../devicetree/bindings/sound/sirf-usp.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt
diff --git a/Documentation/devicetree/bindings/sound/sirf-usp.txt
b/Documentation/devicetree/bindings/sound/sirf-usp.txt
new file mode 100644
index 000..02f85b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/sirf-usp.txt
@@ -0,0 +1,27 @@
+* SiRF SoC USP module
+
+Required properties:
+- compatible: "sirf,prima2-usp-pcm"
+- reg: Base address and size entries:
+- dmas: List of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: Identifier string for each DMA request line in the dmas property.
+ These strings correspond 1:1 with the ordered pairs in dmas.
+
+ One of the DMA channels will be responsible for transmission (should be
+ named "tx") and one for reception (should be named "rx").
+
+- clocks: USP controller clock source
+- pinctrl-names: Must contain a "default" entry.
+- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
+
+Example:
+usp0: usp@b008 {
+ compatible = "sirf,prima2-usp-pcm";
+ reg = <0xb008 0x1>;
+ clocks = < 28>;
+ dmas = < 1>, < 2>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <_only_utfs_pins_a>;
+};
+
--
1.9.3
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] ASoC: sirf: Add audio usp interface driver
This patch adds ASoC support for SiRF SoCs USP interface.
Features include:
1. Only support slave mode.
2. Support I2S and DSP_A mode.
3. Support S16_LE, S24_LE and S24_3LE formats.
4. Support stereo and mono mode.
5. The biggest Support is 192Khz sample rate.
Signed-off-by: Rongjun Ying
---
-v2:
1. Remove extra variable
2. Use the switch statement instead of if/else
3. Fixed some indentation
sound/soc/sirf/Kconfig| 6 +
sound/soc/sirf/Makefile | 2 +
sound/soc/sirf/sirf-usp.c | 415 ++
sound/soc/sirf/sirf-usp.h | 293
4 files changed, 716 insertions(+)
create mode 100644 sound/soc/sirf/sirf-usp.c
create mode 100644 sound/soc/sirf/sirf-usp.h
diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig
index 89e8942..840058d 100644
--- a/sound/soc/sirf/Kconfig
+++ b/sound/soc/sirf/Kconfig
@@ -12,3 +12,9 @@ config SND_SOC_SIRF_AUDIO
config SND_SOC_SIRF_AUDIO_PORT
select REGMAP_MMIO
tristate
+
+config SND_SOC_SIRF_USP
+ tristate "SoC Audio (I2S protocol) for SiRF SoC USP interface"
+ depends on SND_SOC_SIRF
+ select REGMAP_MMIO
+ tristate
diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile
index 913b932..dd917f2 100644
--- a/sound/soc/sirf/Makefile
+++ b/sound/soc/sirf/Makefile
@@ -1,5 +1,7 @@
snd-soc-sirf-audio-objs := sirf-audio.o
snd-soc-sirf-audio-port-objs := sirf-audio-port.o
+snd-soc-sirf-usp-objs := sirf-usp.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o
+obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
new file mode 100644
index 000..bdf6aae
--- /dev/null
+++ b/sound/soc/sirf/sirf-usp.c
@@ -0,0 +1,415 @@
+/*
+ * SiRF USP in I2S/DSP mode
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "sirf-usp.h"
+
+struct sirf_usp {
+ struct regmap *regmap;
+ struct clk *clk;
+ u32 mode1_reg;
+ u32 mode2_reg;
+ int daifmt_format;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+};
+
+static void sirf_usp_tx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_RESET, USP_TX_FIFO_RESET);
+ regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
+
+ regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_START, USP_TX_FIFO_START);
+
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, USP_TX_ENA);
+}
+
+static void sirf_usp_tx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, ~USP_TX_ENA);
+ /* FIFO stop */
+ regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
+}
+
+static void sirf_usp_rx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_RESET, USP_RX_FIFO_RESET);
+ regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
+
+ regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_START, USP_RX_FIFO_START);
+
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, USP_RX_ENA);
+}
+
+static void sirf_usp_rx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, ~USP_RX_ENA);
+ /* FIFO stop */
+ regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
+}
+
+static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+ snd_soc_dai_init_dma_data(dai, >playback_dma_data,
+ >capture_dma_data);
+ return 0;
+}
+
+static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai,
+ unsigned int fmt)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ break;
+ default:
+ dev_err(dai->dev, "Only CBM and CFM supported\n");
+ return -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ case SND_SOC_DAIFMT_DSP_A:
+ usp->daifmt_format = (fmt & SND_SOC_DAIFMT_FORMAT_MASK);
+ break;
+ default:
+ dev_err(dai->dev, "Only I2S and DSP_A format supported\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int sirf_usp_i2s_startup(struct
[PATCH v2 0/2] ASoC: add CSR SiRFSoC audio USP interface driver
This patchset adds the SiRF USP controller driver, this driver uses the USP as I2S or DSP_A mode interface. Rongjun Ying (2): ASoC: sirf: Add audio usp interface driver ASoC: sirf: Add device tree binding for the USP audio device .../devicetree/bindings/sound/sirf-usp.txt | 27 ++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile| 2 + sound/soc/sirf/sirf-usp.c | 415 + sound/soc/sirf/sirf-usp.h | 293 +++ 5 files changed, 743 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h -- 1.9.3 Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/2] ASoC: add CSR SiRFSoC audio USP interface driver
This patchset adds the SiRF USP controller driver, this driver uses the USP as I2S or DSP_A mode interface. Rongjun Ying (2): ASoC: sirf: Add audio usp interface driver ASoC: sirf: Add device tree binding for the USP audio device .../devicetree/bindings/sound/sirf-usp.txt | 27 ++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile| 2 + sound/soc/sirf/sirf-usp.c | 415 + sound/soc/sirf/sirf-usp.h | 293 +++ 5 files changed, 743 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h -- 1.9.3 Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] ASoC: sirf: Add audio usp interface driver
This patch adds ASoC support for SiRF SoCs USP interface.
Features include:
1. Only support slave mode.
2. Support I2S and DSP_A mode.
3. Support S16_LE, S24_LE and S24_3LE formats.
4. Support stereo and mono mode.
5. The biggest Support is 192Khz sample rate.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
-v2:
1. Remove extra variable
2. Use the switch statement instead of if/else
3. Fixed some indentation
sound/soc/sirf/Kconfig| 6 +
sound/soc/sirf/Makefile | 2 +
sound/soc/sirf/sirf-usp.c | 415 ++
sound/soc/sirf/sirf-usp.h | 293
4 files changed, 716 insertions(+)
create mode 100644 sound/soc/sirf/sirf-usp.c
create mode 100644 sound/soc/sirf/sirf-usp.h
diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig
index 89e8942..840058d 100644
--- a/sound/soc/sirf/Kconfig
+++ b/sound/soc/sirf/Kconfig
@@ -12,3 +12,9 @@ config SND_SOC_SIRF_AUDIO
config SND_SOC_SIRF_AUDIO_PORT
select REGMAP_MMIO
tristate
+
+config SND_SOC_SIRF_USP
+ tristate SoC Audio (I2S protocol) for SiRF SoC USP interface
+ depends on SND_SOC_SIRF
+ select REGMAP_MMIO
+ tristate
diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile
index 913b932..dd917f2 100644
--- a/sound/soc/sirf/Makefile
+++ b/sound/soc/sirf/Makefile
@@ -1,5 +1,7 @@
snd-soc-sirf-audio-objs := sirf-audio.o
snd-soc-sirf-audio-port-objs := sirf-audio-port.o
+snd-soc-sirf-usp-objs := sirf-usp.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o
+obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
new file mode 100644
index 000..bdf6aae
--- /dev/null
+++ b/sound/soc/sirf/sirf-usp.c
@@ -0,0 +1,415 @@
+/*
+ * SiRF USP in I2S/DSP mode
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include linux/module.h
+#include linux/io.h
+#include linux/of.h
+#include linux/clk.h
+#include linux/pm_runtime.h
+#include sound/soc.h
+#include sound/pcm_params.h
+#include sound/dmaengine_pcm.h
+
+#include sirf-usp.h
+
+struct sirf_usp {
+ struct regmap *regmap;
+ struct clk *clk;
+ u32 mode1_reg;
+ u32 mode2_reg;
+ int daifmt_format;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+};
+
+static void sirf_usp_tx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_RESET, USP_TX_FIFO_RESET);
+ regmap_write(usp-regmap, USP_TX_FIFO_OP, 0);
+
+ regmap_update_bits(usp-regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_START, USP_TX_FIFO_START);
+
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, USP_TX_ENA);
+}
+
+static void sirf_usp_tx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, ~USP_TX_ENA);
+ /* FIFO stop */
+ regmap_write(usp-regmap, USP_TX_FIFO_OP, 0);
+}
+
+static void sirf_usp_rx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_RESET, USP_RX_FIFO_RESET);
+ regmap_write(usp-regmap, USP_RX_FIFO_OP, 0);
+
+ regmap_update_bits(usp-regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_START, USP_RX_FIFO_START);
+
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, USP_RX_ENA);
+}
+
+static void sirf_usp_rx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, ~USP_RX_ENA);
+ /* FIFO stop */
+ regmap_write(usp-regmap, USP_RX_FIFO_OP, 0);
+}
+
+static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+ snd_soc_dai_init_dma_data(dai, usp-playback_dma_data,
+ usp-capture_dma_data);
+ return 0;
+}
+
+static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai,
+ unsigned int fmt)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+
+ /* set master/slave audio interface */
+ switch (fmt SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ break;
+ default:
+ dev_err(dai-dev, Only CBM and CFM supported\n);
+ return -EINVAL;
+ }
+
+ switch (fmt SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ case SND_SOC_DAIFMT_DSP_A:
+ usp-daifmt_format = (fmt SND_SOC_DAIFMT_FORMAT_MASK);
+ break;
+ default:
+ dev_err(dai-dev, Only I2S and DSP_A format supported\n);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int sirf_usp_i2s_startup(struct
[PATCH v2 2/2] ASoC: sirf: Add device tree binding for the USP audio device
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
.../devicetree/bindings/sound/sirf-usp.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt
diff --git a/Documentation/devicetree/bindings/sound/sirf-usp.txt
b/Documentation/devicetree/bindings/sound/sirf-usp.txt
new file mode 100644
index 000..02f85b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/sirf-usp.txt
@@ -0,0 +1,27 @@
+* SiRF SoC USP module
+
+Required properties:
+- compatible: sirf,prima2-usp-pcm
+- reg: Base address and size entries:
+- dmas: List of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: Identifier string for each DMA request line in the dmas property.
+ These strings correspond 1:1 with the ordered pairs in dmas.
+
+ One of the DMA channels will be responsible for transmission (should be
+ named tx) and one for reception (should be named rx).
+
+- clocks: USP controller clock source
+- pinctrl-names: Must contain a default entry.
+- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
+
+Example:
+usp0: usp@b008 {
+ compatible = sirf,prima2-usp-pcm;
+ reg = 0xb008 0x1;
+ clocks = clks 28;
+ dmas = dmac1 1, dmac1 2;
+ dma-names = rx, tx;
+ pinctrl-names = default;
+ pinctrl-0 = usp0_only_utfs_pins_a;
+};
+
--
1.9.3
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ASoC: sirf: Add audio usp interface driver
This patch adds ASoC support for SiRF SoCs USP interface.
Features include:
1. Only support slave mode.
2. Support I2S and DSP_A mode.
3. Support S16_LE, S24_LE and S24_3LE formats.
4. Support stereo and mono mode.
5. The biggest Support is 192Khz sample rate.
Signed-off-by: Rongjun Ying
---
sound/soc/sirf/Kconfig| 6 +
sound/soc/sirf/Makefile | 2 +
sound/soc/sirf/sirf-usp.c | 409 ++
sound/soc/sirf/sirf-usp.h | 293 +
4 files changed, 710 insertions(+)
create mode 100644 sound/soc/sirf/sirf-usp.c
create mode 100644 sound/soc/sirf/sirf-usp.h
diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig
index 89e8942..840058d 100644
--- a/sound/soc/sirf/Kconfig
+++ b/sound/soc/sirf/Kconfig
@@ -12,3 +12,9 @@ config SND_SOC_SIRF_AUDIO
config SND_SOC_SIRF_AUDIO_PORT
select REGMAP_MMIO
tristate
+
+config SND_SOC_SIRF_USP
+ tristate "SoC Audio (I2S protocol) for SiRF SoC USP interface"
+ depends on SND_SOC_SIRF
+ select REGMAP_MMIO
+ tristate
diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile
index 913b932..dd917f2 100644
--- a/sound/soc/sirf/Makefile
+++ b/sound/soc/sirf/Makefile
@@ -1,5 +1,7 @@
snd-soc-sirf-audio-objs := sirf-audio.o
snd-soc-sirf-audio-port-objs := sirf-audio-port.o
+snd-soc-sirf-usp-objs := sirf-usp.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o
+obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
new file mode 100644
index 000..fe2a2f9
--- /dev/null
+++ b/sound/soc/sirf/sirf-usp.c
@@ -0,0 +1,409 @@
+/*
+ * SiRF USP in I2S/DSP mode
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "sirf-usp.h"
+
+struct sirf_usp {
+ struct regmap *regmap;
+ struct clk *clk;
+ u32 mode1_reg;
+ u32 mode2_reg;
+ int daifmt_format;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+};
+
+static void sirf_usp_tx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_RESET, USP_TX_FIFO_RESET);
+ regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
+
+ regmap_update_bits(usp->regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_START, USP_TX_FIFO_START);
+
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, USP_TX_ENA);
+}
+
+static void sirf_usp_tx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, ~USP_TX_ENA);
+ /* FIFO stop */
+ regmap_write(usp->regmap, USP_TX_FIFO_OP, 0);
+}
+
+static void sirf_usp_rx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_RESET, USP_RX_FIFO_RESET);
+ regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
+
+ regmap_update_bits(usp->regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_START, USP_RX_FIFO_START);
+
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, USP_RX_ENA);
+}
+
+static void sirf_usp_rx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, ~USP_RX_ENA);
+ /* FIFO stop */
+ regmap_write(usp->regmap, USP_RX_FIFO_OP, 0);
+}
+
+static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+ snd_soc_dai_init_dma_data(dai, >playback_dma_data,
+ >capture_dma_data);
+ return 0;
+}
+
+static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai,
+ unsigned int fmt)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ break;
+ default:
+ dev_err(dai->dev, "Only CBM and CFM supported\n");
+ return -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ case SND_SOC_DAIFMT_DSP_A:
+ usp->daifmt_format = (fmt & SND_SOC_DAIFMT_FORMAT_MASK);
+ break;
+ default:
+ dev_err(dai->dev, "Only I2S and DSP_A format supported\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvd
[PATCH 0/2] ASoC: add CSR SiRFSoC audio USP interface driver
This patchset adds the SiRF USP controller driver, this driver uses the USP as I2S or DSP_A mode interface. Rongjun Ying (2): ASoC: sirf: Add audio usp interface driver ASoC: sirf: Add device tree binding for the USP audio device .../devicetree/bindings/sound/sirf-usp.txt | 27 ++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile| 2 + sound/soc/sirf/sirf-usp.c | 409 + sound/soc/sirf/sirf-usp.h | 293 +++ 5 files changed, 737 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h -- 1.9.3 Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] ASoC: sirf: Add device tree binding for the USP audio device
Signed-off-by: Rongjun Ying
---
.../devicetree/bindings/sound/sirf-usp.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt
diff --git a/Documentation/devicetree/bindings/sound/sirf-usp.txt
b/Documentation/devicetree/bindings/sound/sirf-usp.txt
new file mode 100644
index 000..02f85b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/sirf-usp.txt
@@ -0,0 +1,27 @@
+* SiRF SoC USP module
+
+Required properties:
+- compatible: "sirf,prima2-usp-pcm"
+- reg: Base address and size entries:
+- dmas: List of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: Identifier string for each DMA request line in the dmas property.
+ These strings correspond 1:1 with the ordered pairs in dmas.
+
+ One of the DMA channels will be responsible for transmission (should be
+ named "tx") and one for reception (should be named "rx").
+
+- clocks: USP controller clock source
+- pinctrl-names: Must contain a "default" entry.
+- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
+
+Example:
+usp0: usp@b008 {
+ compatible = "sirf,prima2-usp-pcm";
+ reg = <0xb008 0x1>;
+ clocks = < 28>;
+ dmas = < 1>, < 2>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <_only_utfs_pins_a>;
+};
+
--
1.9.3
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] ASoC: sirf: Add device tree binding for the USP audio device
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
.../devicetree/bindings/sound/sirf-usp.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt
diff --git a/Documentation/devicetree/bindings/sound/sirf-usp.txt
b/Documentation/devicetree/bindings/sound/sirf-usp.txt
new file mode 100644
index 000..02f85b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/sirf-usp.txt
@@ -0,0 +1,27 @@
+* SiRF SoC USP module
+
+Required properties:
+- compatible: sirf,prima2-usp-pcm
+- reg: Base address and size entries:
+- dmas: List of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: Identifier string for each DMA request line in the dmas property.
+ These strings correspond 1:1 with the ordered pairs in dmas.
+
+ One of the DMA channels will be responsible for transmission (should be
+ named tx) and one for reception (should be named rx).
+
+- clocks: USP controller clock source
+- pinctrl-names: Must contain a default entry.
+- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
+
+Example:
+usp0: usp@b008 {
+ compatible = sirf,prima2-usp-pcm;
+ reg = 0xb008 0x1;
+ clocks = clks 28;
+ dmas = dmac1 1, dmac1 2;
+ dma-names = rx, tx;
+ pinctrl-names = default;
+ pinctrl-0 = usp0_only_utfs_pins_a;
+};
+
--
1.9.3
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/2] ASoC: add CSR SiRFSoC audio USP interface driver
This patchset adds the SiRF USP controller driver, this driver uses the USP as I2S or DSP_A mode interface. Rongjun Ying (2): ASoC: sirf: Add audio usp interface driver ASoC: sirf: Add device tree binding for the USP audio device .../devicetree/bindings/sound/sirf-usp.txt | 27 ++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile| 2 + sound/soc/sirf/sirf-usp.c | 409 + sound/soc/sirf/sirf-usp.h | 293 +++ 5 files changed, 737 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h -- 1.9.3 Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ASoC: sirf: Add audio usp interface driver
This patch adds ASoC support for SiRF SoCs USP interface.
Features include:
1. Only support slave mode.
2. Support I2S and DSP_A mode.
3. Support S16_LE, S24_LE and S24_3LE formats.
4. Support stereo and mono mode.
5. The biggest Support is 192Khz sample rate.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
sound/soc/sirf/Kconfig| 6 +
sound/soc/sirf/Makefile | 2 +
sound/soc/sirf/sirf-usp.c | 409 ++
sound/soc/sirf/sirf-usp.h | 293 +
4 files changed, 710 insertions(+)
create mode 100644 sound/soc/sirf/sirf-usp.c
create mode 100644 sound/soc/sirf/sirf-usp.h
diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig
index 89e8942..840058d 100644
--- a/sound/soc/sirf/Kconfig
+++ b/sound/soc/sirf/Kconfig
@@ -12,3 +12,9 @@ config SND_SOC_SIRF_AUDIO
config SND_SOC_SIRF_AUDIO_PORT
select REGMAP_MMIO
tristate
+
+config SND_SOC_SIRF_USP
+ tristate SoC Audio (I2S protocol) for SiRF SoC USP interface
+ depends on SND_SOC_SIRF
+ select REGMAP_MMIO
+ tristate
diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile
index 913b932..dd917f2 100644
--- a/sound/soc/sirf/Makefile
+++ b/sound/soc/sirf/Makefile
@@ -1,5 +1,7 @@
snd-soc-sirf-audio-objs := sirf-audio.o
snd-soc-sirf-audio-port-objs := sirf-audio-port.o
+snd-soc-sirf-usp-objs := sirf-usp.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o
+obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o
diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
new file mode 100644
index 000..fe2a2f9
--- /dev/null
+++ b/sound/soc/sirf/sirf-usp.c
@@ -0,0 +1,409 @@
+/*
+ * SiRF USP in I2S/DSP mode
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+#include linux/module.h
+#include linux/io.h
+#include linux/of.h
+#include linux/clk.h
+#include linux/pm_runtime.h
+#include sound/soc.h
+#include sound/pcm_params.h
+#include sound/dmaengine_pcm.h
+
+#include sirf-usp.h
+
+struct sirf_usp {
+ struct regmap *regmap;
+ struct clk *clk;
+ u32 mode1_reg;
+ u32 mode2_reg;
+ int daifmt_format;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+};
+
+static void sirf_usp_tx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_RESET, USP_TX_FIFO_RESET);
+ regmap_write(usp-regmap, USP_TX_FIFO_OP, 0);
+
+ regmap_update_bits(usp-regmap, USP_TX_FIFO_OP,
+ USP_TX_FIFO_START, USP_TX_FIFO_START);
+
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, USP_TX_ENA);
+}
+
+static void sirf_usp_tx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_TX_ENA, ~USP_TX_ENA);
+ /* FIFO stop */
+ regmap_write(usp-regmap, USP_TX_FIFO_OP, 0);
+}
+
+static void sirf_usp_rx_enable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_RESET, USP_RX_FIFO_RESET);
+ regmap_write(usp-regmap, USP_RX_FIFO_OP, 0);
+
+ regmap_update_bits(usp-regmap, USP_RX_FIFO_OP,
+ USP_RX_FIFO_START, USP_RX_FIFO_START);
+
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, USP_RX_ENA);
+}
+
+static void sirf_usp_rx_disable(struct sirf_usp *usp)
+{
+ regmap_update_bits(usp-regmap, USP_TX_RX_ENABLE,
+ USP_RX_ENA, ~USP_RX_ENA);
+ /* FIFO stop */
+ regmap_write(usp-regmap, USP_RX_FIFO_OP, 0);
+}
+
+static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+ snd_soc_dai_init_dma_data(dai, usp-playback_dma_data,
+ usp-capture_dma_data);
+ return 0;
+}
+
+static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai,
+ unsigned int fmt)
+{
+ struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai);
+
+ /* set master/slave audio interface */
+ switch (fmt SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ break;
+ default:
+ dev_err(dai-dev, Only CBM and CFM supported\n);
+ return -EINVAL;
+ }
+
+ switch (fmt SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ case SND_SOC_DAIFMT_DSP_A:
+ usp-daifmt_format = (fmt SND_SOC_DAIFMT_FORMAT_MASK);
+ break;
+ default:
+ dev_err(dai-dev, Only I2S and DSP_A format supported\n);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int sirf_usp_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct sirf_usp *usp
RE: [PATCH v3] extcon: gpio: Add power resume support
> -Original Message-
> From: Chanwoo Choi [mailto:cw00.c...@samsung.com]
> Sent: Tuesday, January 07, 2014 2:09 PM
> To: RongJun Ying
> Cc: MyungJoo Ham; Barry Song; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org; DL-SHA-WorkGroupLinux; Rongjun Ying
> Subject: Re: [PATCH v3] extcon: gpio: Add power resume support
>
> Hi RongJun,
>
> On 01/07/2014 01:56 PM, RongJun Ying wrote:
> > From: Rongjun Ying
> >
> > When system on the suspend state, Some SoC can't get gpio interrupt.
> > After system resume, need send extcon uevent to userspace.
> >
> > Signed-off-by: Rongjun Ying
> > Reviewed-by: Barry Song
> > ---
> > -v3:
> > 'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's
> proposal.
> >
> > drivers/extcon/extcon-gpio.c | 20
> > include/linux/extcon/extcon-gpio.h |1 +
> > 2 files changed, 21 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/extcon/extcon-gpio.c
> > b/drivers/extcon/extcon-gpio.c index 7e0dff5..fde52c1 100644
> > --- a/drivers/extcon/extcon-gpio.c
> > +++ b/drivers/extcon/extcon-gpio.c
> > @@ -40,6 +40,7 @@ struct gpio_extcon_data {
> > int irq;
> > struct delayed_work work;
> > unsigned long debounce_jiffies;
> > + bool check_on_resume;
> > };
> >
> > static void gpio_extcon_work(struct work_struct *work) @@ -103,6
> > +104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
> > extcon_data->gpio_active_low = pdata->gpio_active_low;
> > extcon_data->state_on = pdata->state_on;
> > extcon_data->state_off = pdata->state_off;
> > + extcon_data->check_on_resume = pdata->check_on_resume;
> > if (pdata->state_on && pdata->state_off)
> > extcon_data->edev.print_state = extcon_gpio_print_state;
> > if (pdata->debounce) {
> > @@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct
> platform_device *pdev)
> > return 0;
> > }
> >
> > +#ifdef CONFIG_PM_SLEEP
> > +static int gpio_extcon_resume(struct device *dev) {
> > + struct gpio_extcon_data *extcon_data;
> > +
> > + extcon_data = dev_get_drvdata(dev);
> > + if (extcon_data->check_on_resume)
> > + queue_delayed_work(system_power_efficient_wq,
> > + _data->work, extcon_data->debounce_jiffies);
> > + return 0;
> > +}
> > +#endif
> > +
> > +static const struct dev_pm_ops gpio_extcon_pm_ops = {
> > + SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume)
>
> If CONFIG_PM_SLEEP is undefined, gpio_extcon_pm_ops cannot find
> gpio_extcon_resume function.
> You should define dummy function for gpio_extcon_resume function.
>
>
In the include/Linux/pm.h
If CONFIG_PM_SLEEP is undefined, the SET_SYSTEM_SLEEP_PM_OPS macro is bypassed.
#ifdef CONFIG_PM_SLEEP
#define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \
.suspend = suspend_fn, \
.resume = resume_fn, \
.freeze = suspend_fn, \
.thaw = resume_fn, \
.poweroff = suspend_fn, \
.restore = resume_fn,
#else
#define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn)
#endif
>
>
> To report this email as spam click
> https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ==
> UfkIuR0P8QH1DW7C+lVo3569nqreWejYcysfmF8UmgH1OQ== .
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v3] extcon: gpio: Add power resume support
> -Original Message-
> From: Chanwoo Choi [mailto:cw00.c...@samsung.com]
> Sent: Tuesday, January 07, 2014 2:07 PM
> To: RongJun Ying
> Cc: MyungJoo Ham; Barry Song; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org; DL-SHA-WorkGroupLinux; Rongjun Ying
> Subject: Re: [PATCH v3] extcon: gpio: Add power resume support
>
> This patch has conflict as following:
> You have to implement extcon patch based mainline extcon-next branch.
>
> Applying: extcon: gpio: Add power resume support
> error: patch failed: drivers/extcon/extcon-gpio.c:103
> error: drivers/extcon/extcon-gpio.c: patch does not apply Patch failed
> at 0001 extcon: gpio: Add power resume support The copy of the patch
> that failed is found in:
>/home/cwchoi00/kernel/git.kernel/extcon/.git/rebase-apply/patch
> When you have resolved this problem, run "git am --resolved".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
>
> This time, I will manually apply this patch on extcon branch.
>
> Thanks,
> Chanwoo Choi
>
Thank you.
RongJun Ying
> On 01/07/2014 01:56 PM, RongJun Ying wrote:
> > From: Rongjun Ying
> >
> > When system on the suspend state, Some SoC can't get gpio interrupt.
> > After system resume, need send extcon uevent to userspace.
> >
> > Signed-off-by: Rongjun Ying
> > Reviewed-by: Barry Song
> > ---
> > -v3:
> > 'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's
> proposal.
> >
> > drivers/extcon/extcon-gpio.c | 20
> > include/linux/extcon/extcon-gpio.h |1 +
> > 2 files changed, 21 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/extcon/extcon-gpio.c
> > b/drivers/extcon/extcon-gpio.c index 7e0dff5..fde52c1 100644
> > --- a/drivers/extcon/extcon-gpio.c
> > +++ b/drivers/extcon/extcon-gpio.c
> > @@ -40,6 +40,7 @@ struct gpio_extcon_data {
> > int irq;
> > struct delayed_work work;
> > unsigned long debounce_jiffies;
> > + bool check_on_resume;
> > };
> >
> > static void gpio_extcon_work(struct work_struct *work) @@ -103,6
> > +104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
> > extcon_data->gpio_active_low = pdata->gpio_active_low;
> > extcon_data->state_on = pdata->state_on;
> > extcon_data->state_off = pdata->state_off;
> > + extcon_data->check_on_resume = pdata->check_on_resume;
> > if (pdata->state_on && pdata->state_off)
> > extcon_data->edev.print_state = extcon_gpio_print_state;
> > if (pdata->debounce) {
> > @@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct
> platform_device *pdev)
> > return 0;
> > }
> >
> > +#ifdef CONFIG_PM_SLEEP
> > +static int gpio_extcon_resume(struct device *dev) {
> > + struct gpio_extcon_data *extcon_data;
> > +
> > + extcon_data = dev_get_drvdata(dev);
> > + if (extcon_data->check_on_resume)
> > + queue_delayed_work(system_power_efficient_wq,
> > + _data->work, extcon_data->debounce_jiffies);
> > + return 0;
> > +}
> > +#endif
> > +
> > +static const struct dev_pm_ops gpio_extcon_pm_ops = {
> > + SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume) };
> > +
> > static struct platform_driver gpio_extcon_driver = {
> > .probe = gpio_extcon_probe,
> > .remove = gpio_extcon_remove,
> > .driver = {
> > .name = "extcon-gpio",
> > .owner = THIS_MODULE,
> > + .pm = _extcon_pm_ops,
> > },
> > };
> >
> > diff --git a/include/linux/extcon/extcon-gpio.h
> > b/include/linux/extcon/extcon-gpio.h
> > index 4195810..c7f0c3e 100644
> > --- a/include/linux/extcon/extcon-gpio.h
> > +++ b/include/linux/extcon/extcon-gpio.h
> > @@ -51,6 +51,7 @@ struct gpio_extcon_platform_data {
> > /* if NULL, "0" or "1" will be printed */
> > const char *state_on;
> > const char *state_off;
> > + bool check_on_resume;
> > };
> >
> > #endif /* __EXTCON_GPIO_H__ */
> > --
> > 1.7.5.4
> >
> >
>
>
>
> To report this email as spam click
> https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ==
> BhEym36W00netVd8YYrcUQrAnqreWejYcysfmF8UmgH1OQ== .
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, register
RE: [PATCH v3] extcon: gpio: Add power resume support
-Original Message-
From: Chanwoo Choi [mailto:cw00.c...@samsung.com]
Sent: Tuesday, January 07, 2014 2:07 PM
To: RongJun Ying
Cc: MyungJoo Ham; Barry Song; linux-arm-ker...@lists.infradead.org;
linux-kernel@vger.kernel.org; DL-SHA-WorkGroupLinux; Rongjun Ying
Subject: Re: [PATCH v3] extcon: gpio: Add power resume support
This patch has conflict as following:
You have to implement extcon patch based mainline extcon-next branch.
Applying: extcon: gpio: Add power resume support
error: patch failed: drivers/extcon/extcon-gpio.c:103
error: drivers/extcon/extcon-gpio.c: patch does not apply Patch failed
at 0001 extcon: gpio: Add power resume support The copy of the patch
that failed is found in:
/home/cwchoi00/kernel/git.kernel/extcon/.git/rebase-apply/patch
When you have resolved this problem, run git am --resolved.
If you prefer to skip this patch, run git am --skip instead.
To restore the original branch and stop patching, run git am --abort.
This time, I will manually apply this patch on extcon branch.
Thanks,
Chanwoo Choi
Thank you.
RongJun Ying
On 01/07/2014 01:56 PM, RongJun Ying wrote:
From: Rongjun Ying rongjun.y...@csr.com
When system on the suspend state, Some SoC can't get gpio interrupt.
After system resume, need send extcon uevent to userspace.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
Reviewed-by: Barry Song baohua.s...@csr.com
---
-v3:
'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's
proposal.
drivers/extcon/extcon-gpio.c | 20
include/linux/extcon/extcon-gpio.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/extcon/extcon-gpio.c
b/drivers/extcon/extcon-gpio.c index 7e0dff5..fde52c1 100644
--- a/drivers/extcon/extcon-gpio.c
+++ b/drivers/extcon/extcon-gpio.c
@@ -40,6 +40,7 @@ struct gpio_extcon_data {
int irq;
struct delayed_work work;
unsigned long debounce_jiffies;
+ bool check_on_resume;
};
static void gpio_extcon_work(struct work_struct *work) @@ -103,6
+104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
extcon_data-gpio_active_low = pdata-gpio_active_low;
extcon_data-state_on = pdata-state_on;
extcon_data-state_off = pdata-state_off;
+ extcon_data-check_on_resume = pdata-check_on_resume;
if (pdata-state_on pdata-state_off)
extcon_data-edev.print_state = extcon_gpio_print_state;
if (pdata-debounce) {
@@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct
platform_device *pdev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int gpio_extcon_resume(struct device *dev) {
+ struct gpio_extcon_data *extcon_data;
+
+ extcon_data = dev_get_drvdata(dev);
+ if (extcon_data-check_on_resume)
+ queue_delayed_work(system_power_efficient_wq,
+ extcon_data-work, extcon_data-debounce_jiffies);
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops gpio_extcon_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume) };
+
static struct platform_driver gpio_extcon_driver = {
.probe = gpio_extcon_probe,
.remove = gpio_extcon_remove,
.driver = {
.name = extcon-gpio,
.owner = THIS_MODULE,
+ .pm = gpio_extcon_pm_ops,
},
};
diff --git a/include/linux/extcon/extcon-gpio.h
b/include/linux/extcon/extcon-gpio.h
index 4195810..c7f0c3e 100644
--- a/include/linux/extcon/extcon-gpio.h
+++ b/include/linux/extcon/extcon-gpio.h
@@ -51,6 +51,7 @@ struct gpio_extcon_platform_data {
/* if NULL, 0 or 1 will be printed */
const char *state_on;
const char *state_off;
+ bool check_on_resume;
};
#endif /* __EXTCON_GPIO_H__ */
--
1.7.5.4
To report this email as spam click
https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ==
BhEym36W00netVd8YYrcUQrAnqreWejYcysfmF8UmgH1OQ== .
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v3] extcon: gpio: Add power resume support
-Original Message-
From: Chanwoo Choi [mailto:cw00.c...@samsung.com]
Sent: Tuesday, January 07, 2014 2:09 PM
To: RongJun Ying
Cc: MyungJoo Ham; Barry Song; linux-arm-ker...@lists.infradead.org;
linux-kernel@vger.kernel.org; DL-SHA-WorkGroupLinux; Rongjun Ying
Subject: Re: [PATCH v3] extcon: gpio: Add power resume support
Hi RongJun,
On 01/07/2014 01:56 PM, RongJun Ying wrote:
From: Rongjun Ying rongjun.y...@csr.com
When system on the suspend state, Some SoC can't get gpio interrupt.
After system resume, need send extcon uevent to userspace.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
Reviewed-by: Barry Song baohua.s...@csr.com
---
-v3:
'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's
proposal.
drivers/extcon/extcon-gpio.c | 20
include/linux/extcon/extcon-gpio.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/extcon/extcon-gpio.c
b/drivers/extcon/extcon-gpio.c index 7e0dff5..fde52c1 100644
--- a/drivers/extcon/extcon-gpio.c
+++ b/drivers/extcon/extcon-gpio.c
@@ -40,6 +40,7 @@ struct gpio_extcon_data {
int irq;
struct delayed_work work;
unsigned long debounce_jiffies;
+ bool check_on_resume;
};
static void gpio_extcon_work(struct work_struct *work) @@ -103,6
+104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
extcon_data-gpio_active_low = pdata-gpio_active_low;
extcon_data-state_on = pdata-state_on;
extcon_data-state_off = pdata-state_off;
+ extcon_data-check_on_resume = pdata-check_on_resume;
if (pdata-state_on pdata-state_off)
extcon_data-edev.print_state = extcon_gpio_print_state;
if (pdata-debounce) {
@@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct
platform_device *pdev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int gpio_extcon_resume(struct device *dev) {
+ struct gpio_extcon_data *extcon_data;
+
+ extcon_data = dev_get_drvdata(dev);
+ if (extcon_data-check_on_resume)
+ queue_delayed_work(system_power_efficient_wq,
+ extcon_data-work, extcon_data-debounce_jiffies);
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops gpio_extcon_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume)
If CONFIG_PM_SLEEP is undefined, gpio_extcon_pm_ops cannot find
gpio_extcon_resume function.
You should define dummy function for gpio_extcon_resume function.
In the include/Linux/pm.h
If CONFIG_PM_SLEEP is undefined, the SET_SYSTEM_SLEEP_PM_OPS macro is bypassed.
#ifdef CONFIG_PM_SLEEP
#define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn) \
.suspend = suspend_fn, \
.resume = resume_fn, \
.freeze = suspend_fn, \
.thaw = resume_fn, \
.poweroff = suspend_fn, \
.restore = resume_fn,
#else
#define SET_SYSTEM_SLEEP_PM_OPS(suspend_fn, resume_fn)
#endif
To report this email as spam click
https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ==
UfkIuR0P8QH1DW7C+lVo3569nqreWejYcysfmF8UmgH1OQ== .
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number 4187346, registered office Churchill House, Cambridge
Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our
technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube,
www.youtube.com/user/CSRplc, Facebook,
www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at
www.twitter.com/CSR_plc.
New for 2014, you can now access the wide range of products powered by aptX at
www.aptx.com.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3] extcon: gpio: Add power resume support
From: Rongjun Ying
When system on the suspend state, Some SoC can't get gpio interrupt.
After system resume, need send extcon uevent to userspace.
Signed-off-by: Rongjun Ying
Reviewed-by: Barry Song
---
-v3:
'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's proposal.
drivers/extcon/extcon-gpio.c | 20
include/linux/extcon/extcon-gpio.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/extcon/extcon-gpio.c b/drivers/extcon/extcon-gpio.c
index 7e0dff5..fde52c1 100644
--- a/drivers/extcon/extcon-gpio.c
+++ b/drivers/extcon/extcon-gpio.c
@@ -40,6 +40,7 @@ struct gpio_extcon_data {
int irq;
struct delayed_work work;
unsigned long debounce_jiffies;
+ bool check_on_resume;
};
static void gpio_extcon_work(struct work_struct *work)
@@ -103,6 +104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
extcon_data->gpio_active_low = pdata->gpio_active_low;
extcon_data->state_on = pdata->state_on;
extcon_data->state_off = pdata->state_off;
+ extcon_data->check_on_resume = pdata->check_on_resume;
if (pdata->state_on && pdata->state_off)
extcon_data->edev.print_state = extcon_gpio_print_state;
if (pdata->debounce) {
@@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct platform_device
*pdev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int gpio_extcon_resume(struct device *dev)
+{
+ struct gpio_extcon_data *extcon_data;
+
+ extcon_data = dev_get_drvdata(dev);
+ if (extcon_data->check_on_resume)
+ queue_delayed_work(system_power_efficient_wq,
+ _data->work, extcon_data->debounce_jiffies);
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops gpio_extcon_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume)
+};
+
static struct platform_driver gpio_extcon_driver = {
.probe = gpio_extcon_probe,
.remove = gpio_extcon_remove,
.driver = {
.name = "extcon-gpio",
.owner = THIS_MODULE,
+ .pm = _extcon_pm_ops,
},
};
diff --git a/include/linux/extcon/extcon-gpio.h
b/include/linux/extcon/extcon-gpio.h
index 4195810..c7f0c3e 100644
--- a/include/linux/extcon/extcon-gpio.h
+++ b/include/linux/extcon/extcon-gpio.h
@@ -51,6 +51,7 @@ struct gpio_extcon_platform_data {
/* if NULL, "0" or "1" will be printed */
const char *state_on;
const char *state_off;
+ bool check_on_resume;
};
#endif /* __EXTCON_GPIO_H__ */
--
1.7.5.4
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3] extcon: gpio: Add power resume support
From: Rongjun Ying rongjun.y...@csr.com
When system on the suspend state, Some SoC can't get gpio interrupt.
After system resume, need send extcon uevent to userspace.
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
Reviewed-by: Barry Song baohua.s...@csr.com
---
-v3:
'check_on_resume' instead of 'load_sleep_irq' as Chanwoo Choi's proposal.
drivers/extcon/extcon-gpio.c | 20
include/linux/extcon/extcon-gpio.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/extcon/extcon-gpio.c b/drivers/extcon/extcon-gpio.c
index 7e0dff5..fde52c1 100644
--- a/drivers/extcon/extcon-gpio.c
+++ b/drivers/extcon/extcon-gpio.c
@@ -40,6 +40,7 @@ struct gpio_extcon_data {
int irq;
struct delayed_work work;
unsigned long debounce_jiffies;
+ bool check_on_resume;
};
static void gpio_extcon_work(struct work_struct *work)
@@ -103,6 +104,7 @@ static int gpio_extcon_probe(struct platform_device *pdev)
extcon_data-gpio_active_low = pdata-gpio_active_low;
extcon_data-state_on = pdata-state_on;
extcon_data-state_off = pdata-state_off;
+ extcon_data-check_on_resume = pdata-check_on_resume;
if (pdata-state_on pdata-state_off)
extcon_data-edev.print_state = extcon_gpio_print_state;
if (pdata-debounce) {
@@ -159,12 +161,30 @@ static int gpio_extcon_remove(struct platform_device
*pdev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int gpio_extcon_resume(struct device *dev)
+{
+ struct gpio_extcon_data *extcon_data;
+
+ extcon_data = dev_get_drvdata(dev);
+ if (extcon_data-check_on_resume)
+ queue_delayed_work(system_power_efficient_wq,
+ extcon_data-work, extcon_data-debounce_jiffies);
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops gpio_extcon_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(NULL, gpio_extcon_resume)
+};
+
static struct platform_driver gpio_extcon_driver = {
.probe = gpio_extcon_probe,
.remove = gpio_extcon_remove,
.driver = {
.name = extcon-gpio,
.owner = THIS_MODULE,
+ .pm = gpio_extcon_pm_ops,
},
};
diff --git a/include/linux/extcon/extcon-gpio.h
b/include/linux/extcon/extcon-gpio.h
index 4195810..c7f0c3e 100644
--- a/include/linux/extcon/extcon-gpio.h
+++ b/include/linux/extcon/extcon-gpio.h
@@ -51,6 +51,7 @@ struct gpio_extcon_platform_data {
/* if NULL, 0 or 1 will be printed */
const char *state_on;
const char *state_off;
+ bool check_on_resume;
};
#endif /* __EXTCON_GPIO_H__ */
--
1.7.5.4
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
> -Original Message- > From: Shawn Guo [mailto:shawn@linaro.org] > Sent: Thursday, November 07, 2013 10:27 AM > To: Rongjun Ying > Cc: Viresh Kumar; rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; > linux...@vger.kernel.org; Linux Kernel Mailing List; Barry Song > Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage > instead of voltage-tolerance > > On Thu, Nov 07, 2013 at 01:55:21AM +, Rongjun Ying wrote: > > > For given board, what voltages could be provided is known. So you > > > can just define OPP table in .dts and specify the voltage as > > > the value that the regulator IC can supply, e.g. 1.200V in above > example. > > > > > > This is not nice, as OPP table is CPU/SoC specific and should be > > > ideally defined in .dtsi. But still it's a way out for you to > > > use > > > cpufreq-cpu0 driver as it is. > > > > > > In any case, you can not just change voltage-tolerance to > > > voltage-max with no care about the existing users. > > > > > > Shawn > > > > > I don't think so. The voltage/freq pairs are attribute of the CPU. > > Any boards can choose regulator IC base the cost and other reasons. > > If the opp table defined in .dts, we can set exact > voltage/freq > > pairs, and not need use the voltage-tolerance to set tolerance. > > If you read my comment above, you should see that I agree OPP is > CPU/SoC specific and should be defined in .dtsi. But property > operating-points can reasonably be overwritten by particular > .dts for some reason like some voltages cannot be supplied on > that board. > > Again, this is just a way for you to use generic cpufreq-cpu0 driver as > it is, but not necessarily the best one. > > Shawn > I think my patch is better. All soc have a max work voltage. If regulator IC can't supply min voltage, It can supply max voltage to soc. As my patch, not need overwrite OPP in .dts. As your comment above, almost all board need overwrite OPP, unless the regulator IC can supply all voltage ranges of SoC need. Thanks -RongJun Ying > > > To report this email as spam click > https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ== > aM23S6+s5uWr7qEkawiSK+0AUqjCk0gm6KMeRLY+cWrx9g== . Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
> -Original Message- > From: Shawn Guo [mailto:shawn@linaro.org] > Sent: Wednesday, November 06, 2013 11:28 AM > To: Rongjun Ying > Cc: Viresh Kumar; rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; > linux...@vger.kernel.org; Linux Kernel Mailing List; > rongjun.y...@gcsr.com > Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage > instead of voltage-tolerance > > On Wed, Nov 06, 2013 at 02:15:07AM +, Rongjun Ying wrote: > > If omit voltage-tolerance, sometimes also can't get appropriate > voltages. > > For example: > > If the regulator IC only can supply min voltage is 1.000V and max > voltage is 1.200V, and cpu work max voltage is 1.200V. > > But the cpu just need 1.100V when cpu run under a freq. > > So regulator_set_voltage_tol will return failed. > > Because the regulator_set_voltage will invoke with min-uV is 110 > and max-uV is 110 parameters. > > Regulator can't supply it. > > As this case, the regulator just need supply 1.200V. > > For given board, what voltages could be provided is known. So you can > just define OPP table in .dts and specify the voltage as the > value that the regulator IC can supply, e.g. 1.200V in above example. > > This is not nice, as OPP table is CPU/SoC specific and should be > ideally defined in .dtsi. But still it's a way out for you to use > cpufreq-cpu0 driver as it is. > > In any case, you can not just change voltage-tolerance to voltage-max > with no care about the existing users. > > Shawn > I don't think so. The voltage/freq pairs are attribute of the CPU. Any boards can choose regulator IC base the cost and other reasons. If the opp table defined in .dts, we can set exact voltage/freq pairs, and not need use the voltage-tolerance to set tolerance. Thanks -RongJun Ying > > > To report this email as spam click > https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ== > ch0RRg48Kxe8iwle4qrOOz8w5o+DwGNVtWag1M3YVHc55g== . Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
-Original Message- From: Shawn Guo [mailto:shawn@linaro.org] Sent: Wednesday, November 06, 2013 11:28 AM To: Rongjun Ying Cc: Viresh Kumar; rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; linux...@vger.kernel.org; Linux Kernel Mailing List; rongjun.y...@gcsr.com Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance On Wed, Nov 06, 2013 at 02:15:07AM +, Rongjun Ying wrote: If omit voltage-tolerance, sometimes also can't get appropriate voltages. For example: If the regulator IC only can supply min voltage is 1.000V and max voltage is 1.200V, and cpu work max voltage is 1.200V. But the cpu just need 1.100V when cpu run under a freq. So regulator_set_voltage_tol will return failed. Because the regulator_set_voltage will invoke with min-uV is 110 and max-uV is 110 parameters. Regulator can't supply it. As this case, the regulator just need supply 1.200V. For given board, what voltages could be provided is known. So you can just define OPP table in board.dts and specify the voltage as the value that the regulator IC can supply, e.g. 1.200V in above example. This is not nice, as OPP table is CPU/SoC specific and should be ideally defined in soc.dtsi. But still it's a way out for you to use cpufreq-cpu0 driver as it is. In any case, you can not just change voltage-tolerance to voltage-max with no care about the existing users. Shawn I don't think so. The voltage/freq pairs are attribute of the CPU. Any boards can choose regulator IC base the cost and other reasons. If the opp table defined in board.dts, we can set exact voltage/freq pairs, and not need use the voltage-tolerance to set tolerance. Thanks -RongJun Ying To report this email as spam click https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ== ch0RRg48Kxe8iwle4qrOOz8w5o+DwGNVtWag1M3YVHc55g== . Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
-Original Message- From: Shawn Guo [mailto:shawn@linaro.org] Sent: Thursday, November 07, 2013 10:27 AM To: Rongjun Ying Cc: Viresh Kumar; rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; linux...@vger.kernel.org; Linux Kernel Mailing List; Barry Song Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance On Thu, Nov 07, 2013 at 01:55:21AM +, Rongjun Ying wrote: For given board, what voltages could be provided is known. So you can just define OPP table in board.dts and specify the voltage as the value that the regulator IC can supply, e.g. 1.200V in above example. This is not nice, as OPP table is CPU/SoC specific and should be ideally defined in soc.dtsi. But still it's a way out for you to use cpufreq-cpu0 driver as it is. In any case, you can not just change voltage-tolerance to voltage-max with no care about the existing users. Shawn I don't think so. The voltage/freq pairs are attribute of the CPU. Any boards can choose regulator IC base the cost and other reasons. If the opp table defined in board.dts, we can set exact voltage/freq pairs, and not need use the voltage-tolerance to set tolerance. If you read my comment above, you should see that I agree OPP is CPU/SoC specific and should be defined in soc.dtsi. But property operating-points can reasonably be overwritten by particular board.dts for some reason like some voltages cannot be supplied on that board. Again, this is just a way for you to use generic cpufreq-cpu0 driver as it is, but not necessarily the best one. Shawn I think my patch is better. All soc have a max work voltage. If regulator IC can't supply min voltage, It can supply max voltage to soc. As my patch, not need overwrite OPP in board.dts. As your comment above, almost all board need overwrite OPP, unless the regulator IC can supply all voltage ranges of SoC need. Thanks -RongJun Ying To report this email as spam click https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ== aM23S6+s5uWr7qEkawiSK+0AUqjCk0gm6KMeRLY+cWrx9g== . Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
> -Original Message-
> From: Shawn Guo [mailto:shawn@linaro.org]
> Sent: Tuesday, November 05, 2013 7:53 PM
> To: Viresh Kumar
> Cc: rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; linux-
> p...@vger.kernel.org; Linux Kernel Mailing List; rongjun.y...@gcsr.com;
> Rongjun Ying
> Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage
> instead of voltage-tolerance
>
> On Tue, Nov 05, 2013 at 10:08:06AM +0530, Viresh Kumar wrote:
> > Adding shawn in cc list..
> >
> > On 5 November 2013 08:40, rjying wrote:
> > > From: Rongjun Ying
> > >
> > > Sometime the regulator can't supply appropriate voltages for
> requestion of cpu.
> > > All voltage tolerance value can't figure out a good voltage.
>
> The voltage-tolerance is an optional device tree property. You can
> omit it if you do not have a value for it.
>
> Shawn
It bounced for some reason, trying to send again.
If omit voltage-tolerance, sometimes also can't get appropriate voltages.
For example:
If the regulator IC only can supply min voltage is 1.000V and max voltage is
1.200V, and cpu work max voltage is 1.200V.
But the cpu just need 1.100V when cpu run under a freq.
So regulator_set_voltage_tol will return failed.
Because the regulator_set_voltage will invoke with min-uV is 110 and max-uV
is 1100000 parameters.
Regulator can't supply it.
As this case, the regulator just need supply 1.200V.
RongJun Ying
>
> > >
> > > Signed-off-by: Rongjun Ying
> > > ---
> > > drivers/cpufreq/cpufreq-cpu0.c | 17 ++---
> > > 1 files changed, 10 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/cpufreq/cpufreq-cpu0.c
> > > b/drivers/cpufreq/cpufreq-cpu0.c index c522a95..0c9e6b9 100644
> > > --- a/drivers/cpufreq/cpufreq-cpu0.c
> > > +++ b/drivers/cpufreq/cpufreq-cpu0.c
> > > @@ -23,7 +23,7 @@
> > > #include
> > >
> > > static unsigned int transition_latency; -static unsigned int
> > > voltage_tolerance; /* in percentage */
> > > +static unsigned int voltage_max;
> > >
> > > static struct device *cpu_dev;
> > > static struct clk *cpu_clk;
> > > @@ -45,7 +45,7 @@ static int cpu0_set_target(struct cpufreq_policy
> > > *policy, {
> > > struct cpufreq_freqs freqs;
> > > struct opp *opp;
> > > - unsigned long volt = 0, volt_old = 0, tol = 0;
> > > + unsigned long volt = 0, volt_old = 0;
> > > long freq_Hz, freq_exact;
> > > unsigned int index;
> > > int ret;
> > > @@ -82,7 +82,6 @@ static int cpu0_set_target(struct cpufreq_policy
> *policy,
> > > }
> > > volt = opp_get_voltage(opp);
> > > rcu_read_unlock();
> > > - tol = volt * voltage_tolerance / 100;
> > > volt_old = regulator_get_voltage(cpu_reg);
> > > }
> > >
> > > @@ -92,7 +91,7 @@ static int cpu0_set_target(struct cpufreq_policy
> > > *policy,
> > >
> > > /* scaling up? scale voltage before frequency */
> > > if (!IS_ERR(cpu_reg) && freqs.new > freqs.old) {
> > > - ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
> > > + ret = regulator_set_voltage(cpu_reg, volt,
> > > + voltage_max);
> > > if (ret) {
> > > pr_err("failed to scale voltage up: %d\n",
> ret);
> > > freqs.new = freqs.old; @@ -104,14 +103,14
> @@
> > > static int cpu0_set_target(struct cpufreq_policy *policy,
> > > if (ret) {
> > > pr_err("failed to set clock rate: %d\n", ret);
> > > if (!IS_ERR(cpu_reg))
> > > - regulator_set_voltage_tol(cpu_reg, volt_old,
> tol);
> > > + regulator_set_voltage(cpu_reg, volt_old,
> > > + voltage_max);
> > > freqs.new = freqs.old;
> > > goto post_notify;
> > > }
> > >
> > > /* scaling down? scale voltage after frequency */
> > > if (!IS_ERR(cpu_reg) && freqs.new < freqs.old) {
> > > - ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
> > > + ret = regulator_set_voltage(cpu_reg, volt,
> > > + voltage_max);
> > > if (ret) {
> > > pr_err("failed to scale vo
RE: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage instead of voltage-tolerance
-Original Message-
From: Shawn Guo [mailto:shawn@linaro.org]
Sent: Tuesday, November 05, 2013 7:53 PM
To: Viresh Kumar
Cc: rjying; Rafael J. Wysocki; cpuf...@vger.kernel.org; linux-
p...@vger.kernel.org; Linux Kernel Mailing List; rongjun.y...@gcsr.com;
Rongjun Ying
Subject: Re: [PATCH 1/1] cpufreq: cpufreq-cpu0: use the max voltage
instead of voltage-tolerance
On Tue, Nov 05, 2013 at 10:08:06AM +0530, Viresh Kumar wrote:
Adding shawn in cc list..
On 5 November 2013 08:40, rjying rjy...@gmail.com wrote:
From: Rongjun Ying rongjun.y...@csr.com
Sometime the regulator can't supply appropriate voltages for
requestion of cpu.
All voltage tolerance value can't figure out a good voltage.
The voltage-tolerance is an optional device tree property. You can
omit it if you do not have a value for it.
Shawn
It bounced for some reason, trying to send again.
If omit voltage-tolerance, sometimes also can't get appropriate voltages.
For example:
If the regulator IC only can supply min voltage is 1.000V and max voltage is
1.200V, and cpu work max voltage is 1.200V.
But the cpu just need 1.100V when cpu run under a freq.
So regulator_set_voltage_tol will return failed.
Because the regulator_set_voltage will invoke with min-uV is 110 and max-uV
is 110 parameters.
Regulator can't supply it.
As this case, the regulator just need supply 1.200V.
RongJun Ying
Signed-off-by: Rongjun Ying rongjun.y...@csr.com
---
drivers/cpufreq/cpufreq-cpu0.c | 17 ++---
1 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/cpufreq/cpufreq-cpu0.c
b/drivers/cpufreq/cpufreq-cpu0.c index c522a95..0c9e6b9 100644
--- a/drivers/cpufreq/cpufreq-cpu0.c
+++ b/drivers/cpufreq/cpufreq-cpu0.c
@@ -23,7 +23,7 @@
#include linux/slab.h
static unsigned int transition_latency; -static unsigned int
voltage_tolerance; /* in percentage */
+static unsigned int voltage_max;
static struct device *cpu_dev;
static struct clk *cpu_clk;
@@ -45,7 +45,7 @@ static int cpu0_set_target(struct cpufreq_policy
*policy, {
struct cpufreq_freqs freqs;
struct opp *opp;
- unsigned long volt = 0, volt_old = 0, tol = 0;
+ unsigned long volt = 0, volt_old = 0;
long freq_Hz, freq_exact;
unsigned int index;
int ret;
@@ -82,7 +82,6 @@ static int cpu0_set_target(struct cpufreq_policy
*policy,
}
volt = opp_get_voltage(opp);
rcu_read_unlock();
- tol = volt * voltage_tolerance / 100;
volt_old = regulator_get_voltage(cpu_reg);
}
@@ -92,7 +91,7 @@ static int cpu0_set_target(struct cpufreq_policy
*policy,
/* scaling up? scale voltage before frequency */
if (!IS_ERR(cpu_reg) freqs.new freqs.old) {
- ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
+ ret = regulator_set_voltage(cpu_reg, volt,
+ voltage_max);
if (ret) {
pr_err(failed to scale voltage up: %d\n,
ret);
freqs.new = freqs.old; @@ -104,14 +103,14
@@
static int cpu0_set_target(struct cpufreq_policy *policy,
if (ret) {
pr_err(failed to set clock rate: %d\n, ret);
if (!IS_ERR(cpu_reg))
- regulator_set_voltage_tol(cpu_reg, volt_old,
tol);
+ regulator_set_voltage(cpu_reg, volt_old,
+ voltage_max);
freqs.new = freqs.old;
goto post_notify;
}
/* scaling down? scale voltage after frequency */
if (!IS_ERR(cpu_reg) freqs.new freqs.old) {
- ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
+ ret = regulator_set_voltage(cpu_reg, volt,
+ voltage_max);
if (ret) {
pr_err(failed to scale voltage down: %d\n,
ret);
clk_set_rate(cpu_clk, freqs.old * 1000); @@
-224,7 +223,11 @@ static int cpu0_cpufreq_probe(struct
platform_device *pdev)
goto out_put_node;
}
- of_property_read_u32(np, voltage-tolerance,
voltage_tolerance);
+ ret = of_property_read_u32(np, voltage-max, voltage_max);
+ if (ret) {
+ pr_err(failed to get max voltage: %d\n, ret);
+ goto out_put_node;
+ }
if (of_property_read_u32(np, clock-latency,
transition_latency))
transition_latency = CPUFREQ_ETERNAL;
--
1.7.5.4
To report this email as spam click
https://www.mailcontrol.com/sr/MZbqvYs5QwJvpeaetUwhCQ==
X88IR7qi8t8XvyHQDjR!61qPoTyr8GNFXkv3KeH4!zzvzA== .
Member of the CSR plc group of companies. CSR plc registered in England and
Wales, registered number
