[PATCH 1/1] Update AMD cpu microcode for family 15h
* Processor Revision ID 0x00610f01 was accidently not included in the previous
submitted microcode container file.
* Update the Version for family 15h microcode .bin file
Key Name= AMD Microcode Signing Key (for signing microcode container
files only)
Key ID = F328AE73
Key Fingerprint = FC7C 6C50 5DAF CC14 7183 57CA E4BE 5339 F328 AE73
Signed-off-by: Sherry Hurwitz
---
WHENCE | 2 +-
amd-ucode/microcode_amd_fam15h.bin | Bin 5356 -> 7876 bytes
amd-ucode/microcode_amd_fam15h.bin.asc | 14 +++---
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/WHENCE b/WHENCE
index 7cf7026..4aa5c20 100644
--- a/WHENCE
+++ b/WHENCE
@@ -3100,7 +3100,7 @@ Driver: microcode_amd - AMD CPU Microcode Update Driver
for Linux
File: amd-ucode/microcode_amd.bin
Version: 2013-07-10
File: amd-ucode/microcode_amd_fam15h.bin
-Version: 2018-05-15
+Version: 2018-05-24
File: amd-ucode/microcode_amd_fam16h.bin
Version: 2014-10-28
File: amd-ucode/microcode_amd_fam17h.bin
diff --git a/amd-ucode/microcode_amd_fam15h.bin
b/amd-ucode/microcode_amd_fam15h.bin
index
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[PATCH 1/1] linux-firmware: Update AMD cpu microcode
* Add AMD cpu microcode for processor family 17h
* Update AMD cpu microcode for processor family 15h
* Update the AMD cpu microcode license copyright
* Add a Version for both microcode family 15h and 17h
Key Name= AMD Microcode Signing Key (for signing microcode container
files only)
Key ID = F328AE73
Key Fingerprint = FC7C 6C50 5DAF CC14 7183 57CA E4BE 5339 F328 AE73
Signed-off-by: Sherry Hurwitz
---
LICENSE.amd-ucode | 2 +-
WHENCE | 4 +++-
amd-ucode/microcode_amd_fam15h.bin | Bin 7876 -> 5356 bytes
amd-ucode/microcode_amd_fam15h.bin.asc | 14 +++---
amd-ucode/microcode_amd_fam17h.bin | Bin 0 -> 3364 bytes
amd-ucode/microcode_amd_fam17h.bin.asc | 11 +++
6 files changed, 22 insertions(+), 9 deletions(-)
create mode 100644 amd-ucode/microcode_amd_fam17h.bin
create mode 100644 amd-ucode/microcode_amd_fam17h.bin.asc
diff --git a/LICENSE.amd-ucode b/LICENSE.amd-ucode
index 2cf8590..de5b29c 100644
--- a/LICENSE.amd-ucode
+++ b/LICENSE.amd-ucode
@@ -1,4 +1,4 @@
-Copyright (C) 2010-2014 Advanced Micro Devices, Inc., All rights reserved.
+Copyright (C) 2010-2018 Advanced Micro Devices, Inc., All rights reserved.
Permission is hereby granted by Advanced Micro Devices, Inc. ("AMD"),
free of any license fees, to any person obtaining a copy of this
diff --git a/WHENCE b/WHENCE
index b360a49..9be6118 100644
--- a/WHENCE
+++ b/WHENCE
@@ -3100,9 +3100,11 @@ Driver: microcode_amd - AMD CPU Microcode Update Driver
for Linux
File: amd-ucode/microcode_amd.bin
Version: 2013-07-10
File: amd-ucode/microcode_amd_fam15h.bin
-Version: 2016-03-16
+Version: 2018-05-15
File: amd-ucode/microcode_amd_fam16h.bin
Version: 2014-10-28
+File: amd-ucode/microcode_amd_fam17h.bin
+Version: 2018-05-15
License: Redistributable. See LICENSE.amd-ucode for details
diff --git a/amd-ucode/microcode_amd_fam15h.bin
b/amd-ucode/microcode_amd_fam15h.bin
index
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Re: [PATCH 2/3] x86/topology: Fix AMD core count
On 03/21/2016 08:57 AM, Borislav Petkov wrote: +- AMD: the number of cores in a processor. On a system where cores are +clustered in groups of 2, 4 or more in compute units, this variable +denotes the number of*compute units* on the node. + +In both cases, the number of scheduling threads is computed by doing: + + x86_max_cores * smp_num_siblings + +This means: + +* smp_num_siblings: the number of siblings in a core. On AMD with +compute units, this number is the number of compute unit siblings, +i.e., compute unit cores in a single compute unit, according to their +nomenclature. -- hr Boris, this documentation will help tremendously. In just this line of code: nr_local_cpus = nr_cores * nr_siblings we have an Intel HT = AMD core = logical_cpu and core = AMD compute unit. Anybody surprised there was a bug? The surprising thing is that running lscpu on a 32 core 2 socket 6300 Opteron system without the patches I get the same output as with the patches and it matches Ray's. I don't see an impact.
[PATCH 1/1] linux-firmware: Update AMD microcode patch firmware
For AMD Family 15h Processors to fix bugs in prior microcode patch
file: amd-ucode/microcode_amd_fam15h.bin
md5sum: 2384ef1d8ec8ca3930b62d82ea5a3813
Version: 2016_03_16
Signed-off-by: Sherry Hurwitz
---
WHENCE | 2 +-
amd-ucode/microcode_amd_fam15h.bin | Bin 7876 -> 7876 bytes
amd-ucode/microcode_amd_fam15h.bin.asc | 14 +++---
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/WHENCE b/WHENCE
index 25f91d9..cecac23 100644
--- a/WHENCE
+++ b/WHENCE
@@ -2777,7 +2777,7 @@ Driver: microcode_amd - AMD CPU Microcode Update Driver
for Linux
File: amd-ucode/microcode_amd.bin
Version: 2013-07-10
File: amd-ucode/microcode_amd_fam15h.bin
-Version: 2014-10-28
+Version: 2016-03-16
File: amd-ucode/microcode_amd_fam16h.bin
Version: 2014-10-28
diff --git a/amd-ucode/microcode_amd_fam15h.bin
b/amd-ucode/microcode_amd_fam15h.bin
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diff --git a/amd-ucode/microcode_amd_fam15h.bin.asc
b/amd-ucode/microcode_amd_fam15h.bin.asc
index 3bc803f..f303a1b 100644
--- a/amd-ucode/microcode_amd_fam15h.bin.asc
+++ b/amd-ucode/microcode_amd_fam15h.b
Re: [BUG/RFC] perf test fails on AMD CPUs
On 08/18/2015 05:10 AM, Jiri Olsa wrote: On Mon, Aug 17, 2015 at 09:06:59AM -0700, Andy Lutomirski wrote: On Sun, Aug 16, 2015 at 9:36 PM, Borislav Petkov wrote: On Mon, Aug 17, 2015 at 12:29:56AM +0200, Jiri Olsa wrote: hi, 'perf test 18' is failing on systems with AMD processor. Hmm, still using that b0rked test box? :-) Also, which kernel? There have been substantial changes to the entry code recently. Although I don't see anything being done differently on AMD there except X86_BUG_SYSRET_SS_ATTRS but that should be unrelated. The only reason I could find is that AMD does not set 'resume flag' in RFLAGS register the way the Intel CPU does. (simplified) test scenario: - create breakpoint (on test_function) perf event with SIGIO signal to be delivered any time the breakpoint is hit - run test_function expected course of actions is: 1) CPU hits 'test_function' 2) DB exception is triggered, with RFLAGS.RF=0 3) DB exception handler sets regs->RFLAGS.RF=1 and perf handler triggers irq_work pending work 4) DB exception executes iretd 5) irq_work interrupt is triggered, with RFLAGS.RF=1 6) irq_work interrupt calls kill_fasync with SIGIO signal 7) irq_work interrupt on return to userspace calls prepare_exit_to_usermode which actually delivers the SIGIO signal 8) sigreturn syscall prepare registers to return to the instruction from step 1) and sets RFLAGS.RF to the its original value from step 5) (RFLAGS.RF=1) 9) CPU hits 'test_function' and DB exception is NOT triggered due to RFLAGS.RF=1 this is how I see it works on Intel But AMD gives me RFLAGS.RF=0 on step 5, which makes the step 9 to trigger the DB exception once again and makes the test fail. Adding Andy, he might have an idea. Leaving in the rest for reference. Gee thanks :-p Jiri, did you instrument the code and observe do_IRQ sees RF clear in its pt_regs? Also, it might be worth checking that regs->ip in the irq_work matches regs->ip. yep, thats what I saw.. once irq_work interrupt was triggered the regs->ip was same as for the previous debug exception but the RFLAGS.RF was 0 It's *possible* that I messed up and broke RF restore with opportunistic sysret, but the code looks correct: testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 jnz opportunistic_sysret_failed AFAICS the problematic paths did not hit syscalls buut anyway, it looks like latest AMD firmware issue: [root@amd-pike-07 ~]# cat /sys/devices/system/cpu/cpu0/microcode/version 0x6000822 [root@amd-pike-07 perf]# ./perf test 18 18: Test breakpoint overflow signal handler : Ok [root@amd-pike-07 perf]# cat /sys/devices/system/cpu/cpu0/microcode/version 0x6000832 [root@amd-pike-07 perf]# ./perf test 18 18: Test breakpoint overflow signal handler : FAILED! [root@amd-pike-07 ~]# cat /proc/cpuinfo processor : 7 vendor_id : AuthenticAMD cpu family : 21 model : 2 model name : AMD Opteron(tm) Processor 3380 stepping: 0 microcode : 0x6000832 SNIP AMD description of RF flag (SDM 3.1.6): === Resume Flag (RF) Bit. Bit 16. The RF bit allows an instruction to be restarted following an instruction breakpoint resulting in a debug exception (#DB). This bit prevents multiple debug exceptions from occurring on the same instruction. The processor clears the RF bit after every instruction is successfully executed, except when the instruction is: • • An IRET that sets the RF bit. JMP, CALL, or INTn through a task gate. In both of the above cases, RF is not cleared to 0 until the next instruction successfully executes. When an exception occurs (or when a string instruction is interrupted), the processor normally sets RF=1 in the RFLAGS image saved on the interrupt stack. However, when a #DB exception occurs as a result of an instruction breakpoint, the processor clears the RF bit to 0 in the interrupt-stack RFLAGS image. That's a little weird, I think. Shouldn't RF be zero on #DB due to a *watchpoint* so that a watchpoint followed immediately by a breakpoint works? the AMD description looked to be more vague (compared to Intels) • For other cases, the value pushed for RF is the value that was in EFLAG.RF at the time the event handler was called. This includes: — Debug exceptions generated in response to instruction breakpoints — Hardware-generated interrupts arriving between instructions (including those arriving after the last iteration of a repeated string instruction) This appears to be why it works on Intel. Does AMD not do that? We could probably work around this in software (by not using irq work for this), but yuck. yep, but hopefuly it's the issue microcode ;-) Cc-ing guys from linux-firmware git Sherry, Suravee, any idea? thanks, jirka Jiri, I have duplicated your problem and asked the HW architect that wrote 832 to review the diff between the 822 an
Re: Issues with AMD microcode updates
On 09/25/2013 08:49 AM, Henrique de Moraes Holschuh wrote: On Tue, 24 Sep 2013, Sherry Hurwitz wrote: You can direct AMD microcode issues to me now. We are setting up some systems in the lab and trying to duplicate the problem now. Thank you! If you're going to be taking care of AMD microcode update issues, maybe it would be a good idea to add your name to the MAINTAINERS file for the "AMD MICROCODE UPDATE SUPPORT", and remove the (dead for a while now) amd64-microc...@amd64.org mailing list? We have failed to reproduce a hang while loading microcode. We have tested with kernel and AMD family combinations with normal and error condition so error paths were taken. Obviously there are factors we are missing that the users are hitting. Any suggestions on how we improve the test matrix would be helpful. We will continue the investigation but any insights are appreciated. NOTE: kernels before 3.0 only load 1 (2k) size of microcode patch and therefore do not support microcode loading of family 14h, 15h, and 16h. Also,in a test request on another thread you suggested someone with family 15h revC0 to load microcode twice with an earlier patch and then the latest, but there has only been 1 microcode patch level published for revB2 so that test won't work. Test Matrix: kernel cpu family results conditions - 2.6.38 fam10h load passed normal 2.6.38 fam15h revC0 load failed 2.6.38 can not handle 4k patches 3.5.2fam10h load passed normal 3.5.2fam15h revB2 load passed loaded 637 then second load 63d 3.5.2fam15h revC0 load passed normal 3.5.2fam15h revC0 load failed used a corrupted bin file 3.7 fam15h revC0 load passed loaded 81c then second load 822 3.10 fam15h revC0 load passed loaded 81c then second load 822 3.11rc7 fam15h revB2 load passedBIOS loaded 637; test loaded 63d; sysfs info can be misleading -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: Issues with AMD microcode updates
On 09/19/2013 11:44 AM, Borislav Petkov wrote: On Thu, Sep 19, 2013 at 11:58:34AM -0300, Henrique de Moraes Holschuh wrote: Jacob, Andreas, I take care of the amd64 microcode update support for Debian, and I'm receiving user reports of lockup issues with the AMD microcode driver in several kernels. This is about the runtime update interface, /sys/devices/system/cpu/*/microcode/reload and /sys/devices/system/cpu/microcode/reload. Basically, the issue is that the process that tries to write "1" to the reload node gets stuck in "D" state on several kernel versions. I started by blacklisting several older kernels (e.g. I got a report of 2.6.38 locking up), but recently I got a report of a lockup with kernel 3.5.1. Blacklisting everything before 3.10 is not exactly kosher, not when I would have to blindly trust 3.0, 3.2 and 3.4 to not have whatever issue is causing the lockups. IMHO that's the point where it becomes interesting to actually track down the bug even if it apparently doesn't exist anymore on the more recent kernels, and ensure that the stable/long-term kernels have the fix. That would also help distros blacklist microcode update on the broken kernels. Unfortunately, I don't own, or have access to, any boxes with an AMD processor (let alone one with an AMD processor in need of a microcode update) to bissect the problem. I'd appreciate if AMD (or anyone with an AMD processor, really) could help me track this issue down. Debian bug reports: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=717185 http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=723081 Well, both Andreas and Jacob don't work for AMD anymore. I could try to help with this but it'll be slow as I'm pretty busy with other stuff. Anyway, I'd suggest we look only on the long term kernels since they're the only ones which can get updates/fixes anyway. Now, how do I reproduce this? Writing 1 to .../reload on latest kernel works here. So I'd need a reproducer. Alternatively, I'd need a sysrq-l and sysrq-w from those systems with hung processes. Thanks. You can direct AMD microcode issues to me now. We are setting up some systems in the lab and trying to duplicate the problem now. Thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] linux-firmware/AMD: add readme files for amd-ucode
On 08/08/2013 03:13 PM, Ben Hutchings wrote: I don't think this documentation is currently very useful. See further comments inline: On Fri, 2013-07-19 at 17:43 -0500, Sherry Hurwitz wrote: File: README File: microcode_amd.bin.README File: microcode_amd_fam15h.bin.README Signed-off-by: Sherry Hurwitz --- amd-ucode/README | 46 + amd-ucode/microcode_amd.bin.README| 29 ++ amd-ucode/microcode_amd_fam15h.bin.README | 13 3 files changed, 88 insertions(+) create mode 100644 amd-ucode/README create mode 100644 amd-ucode/microcode_amd.bin.README create mode 100644 amd-ucode/microcode_amd_fam15h.bin.README diff --git a/amd-ucode/README b/amd-ucode/README new file mode 100644 index 000..a92831d --- /dev/null +++ b/amd-ucode/README @@ -0,0 +1,46 @@ +This package provides latest microcode patches +for AMD processor families >= 0x10. + +See http://www.amd64.org/support/microcode.html +for details. As Marc Dietrich pointed out, this URL is currently broken. I will remove the reference to the URL. +Microcode patches are included in container files: +- 'microcode_amd.bin' (for AMD CPU families 10h - 14h) +- 'microcode_amd_fam15h.bin' (for AMD CPU family 15h) + +Please read the file INSTALL for install instructions. +Please read the file LICENSE for licensing information. These aren't the filenames used in linux-firmware.git. no the files in linux-firmware.git are container files that hold these .asm files which are the true ucode. This was merely listing what is in the container. +The container files include following microcode patches: + +mc_patch_0183_PUB-v4/mc_patch_0183.asm +mc_patch_0184_PUB-v4/mc_patch_0184.asm +mc_patch_01C7_PUB-v1/mc_patch_01C7.asm +mc_patch_01C8_PUB-v1/mc_patch_01C8.asm +mc_patch_01D9_PUB-v1/mc_patch_01D9.asm +mc_patch_01DA_PUB-v1/mc_patch_01DA.asm +mc_patch_01DB_PUB-v1/mc_patch_01DB.asm +mc_patch_01DC_PUB-v1/mc_patch_01DC.asm +mc_patch_0232_PUB-v3/mc_patch_0232.asm +mc_patch_0327_PUB-v1/mc_patch_0327.asm +mc_patch_0529_PUB-v1/mc_patch_0529.asm +mc_patch_05000119_PUB-v1/mc_patch_05000119.asm +mc_patch_0600063D_PUB-v1/mc_patch_0600063D.asm +mc_patch_06000822_PUB-v1/mc_patch_06000822.asm +mc_patch_06001119_PUB-v2/mc_patch_06001119.asm Are these filenames supposed to be meaningful? Are they referenced by some other documentation? These names include the patch ID numbers that could be referenced in the table showing the list of errata or when talking to AMD support. I will explain that in a better way in a new version of the document +*** +Copyright 2008-2013 ADVANCED MICRO DEVICES, INC. All Rights Reserved. + +AMD is granting you permission to use this software and documentation +(if any) (collectively, the “Materials”) pursuant to the terms and +conditions of the Software License Agreement included with the +Materials. This header does NOT give you permission to use the +Materials or any rights under AMD’s intellectual property. Your use +of any portion of these Materials shall constitute your acceptance of +those terms and conditions. If you do not agree to the terms and +conditions of the Software License Agreement, you do not have +permission to use any portion of these Materials. If you do not have +a copy of the Software License Agreement, contact your AMD +representative for a copy. + Isn't this redundant with LICENSE.amd-ucode? Yes, I will remove this in version 2 diff --git a/amd-ucode/microcode_amd.bin.README b/amd-ucode/microcode_amd.bin.README new file mode 100644 index 000..617d951 --- /dev/null +++ b/amd-ucode/microcode_amd.bin.README @@ -0,0 +1,29 @@ +;** +; The associated microcode container file fixes the errata as documented in +; Revision Guide for AMD Family 10h Processors, order #41322, +; Revision Guide for AMD Family 11h Processors, order #41788, +; Revision Guide for AMD Family 12h Processors, order #44739, +; Revision Guide for AMD Family 14h Models 00h-0Fh Processors, order #47534, Where can these be found? (I found *some* revision guides with a web search, but nothing with errata numbers above 400.) I will include the URL for amd developer central where they can be downloaded. +; for different revisions of AMD processors as follows: +; +; CPUIDFn[_0001]_EAX; ID; Errata fixed; +; +; 0x00100F22; 0x0183; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F23; 0x0183; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F2A; 0x0184; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F42; 0x01DB; 342, 440, 573; +; 0x00100F43;
[PATCH] linux-firmware/AMD: add readme files for amd-ucode
File: README File: microcode_amd.bin.README File: microcode_amd_fam15h.bin.README Signed-off-by: Sherry Hurwitz --- amd-ucode/README | 46 + amd-ucode/microcode_amd.bin.README| 29 ++ amd-ucode/microcode_amd_fam15h.bin.README | 13 3 files changed, 88 insertions(+) create mode 100644 amd-ucode/README create mode 100644 amd-ucode/microcode_amd.bin.README create mode 100644 amd-ucode/microcode_amd_fam15h.bin.README diff --git a/amd-ucode/README b/amd-ucode/README new file mode 100644 index 000..a92831d --- /dev/null +++ b/amd-ucode/README @@ -0,0 +1,46 @@ +This package provides latest microcode patches +for AMD processor families >= 0x10. + +See http://www.amd64.org/support/microcode.html +for details. + +Microcode patches are included in container files: +- 'microcode_amd.bin' (for AMD CPU families 10h - 14h) +- 'microcode_amd_fam15h.bin' (for AMD CPU family 15h) + +Please read the file INSTALL for install instructions. +Please read the file LICENSE for licensing information. + +The container files include following microcode patches: + +mc_patch_0183_PUB-v4/mc_patch_0183.asm +mc_patch_0184_PUB-v4/mc_patch_0184.asm +mc_patch_01C7_PUB-v1/mc_patch_01C7.asm +mc_patch_01C8_PUB-v1/mc_patch_01C8.asm +mc_patch_01D9_PUB-v1/mc_patch_01D9.asm +mc_patch_01DA_PUB-v1/mc_patch_01DA.asm +mc_patch_01DB_PUB-v1/mc_patch_01DB.asm +mc_patch_01DC_PUB-v1/mc_patch_01DC.asm +mc_patch_0232_PUB-v3/mc_patch_0232.asm +mc_patch_0327_PUB-v1/mc_patch_0327.asm +mc_patch_0529_PUB-v1/mc_patch_0529.asm +mc_patch_05000119_PUB-v1/mc_patch_05000119.asm +mc_patch_0600063D_PUB-v1/mc_patch_0600063D.asm +mc_patch_06000822_PUB-v1/mc_patch_06000822.asm +mc_patch_06001119_PUB-v2/mc_patch_06001119.asm + +*** +Copyright 2008-2013 ADVANCED MICRO DEVICES, INC. All Rights Reserved. + +AMD is granting you permission to use this software and documentation +(if any) (collectively, the “Materials”) pursuant to the terms and +conditions of the Software License Agreement included with the +Materials. This header does NOT give you permission to use the +Materials or any rights under AMD’s intellectual property. Your use +of any portion of these Materials shall constitute your acceptance of +those terms and conditions. If you do not agree to the terms and +conditions of the Software License Agreement, you do not have +permission to use any portion of these Materials. If you do not have +a copy of the Software License Agreement, contact your AMD +representative for a copy. + diff --git a/amd-ucode/microcode_amd.bin.README b/amd-ucode/microcode_amd.bin.README new file mode 100644 index 000..617d951 --- /dev/null +++ b/amd-ucode/microcode_amd.bin.README @@ -0,0 +1,29 @@ +;** +; The associated microcode container file fixes the errata as documented in +; Revision Guide for AMD Family 10h Processors, order #41322, +; Revision Guide for AMD Family 11h Processors, order #41788, +; Revision Guide for AMD Family 12h Processors, order #44739, +; Revision Guide for AMD Family 14h Models 00h-0Fh Processors, order #47534, +; for different revisions of AMD processors as follows: +; +; CPUIDFn[_0001]_EAX; ID; Errata fixed; +; +; 0x00100F22; 0x0183; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F23; 0x0183; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F2A; 0x0184; 244, 260, 280, 302, 308, 315, 342; +; 0x00100F42; 0x01DB; 342, 440, 573; +; 0x00100F43; 0x01C8; 407, 440; +; 0x00100F52; 0x01DB; 342, 440, 573; +; 0x00100F53; 0x01C8; 407, 440; +; 0x00100F62; 0x01C7; 407, 440; +; 0x00100F63; 0x01C8; 407, 440; +; 0x00100F80; 0x01DA; 419, 440, 573; +; 0x00100F81; 0x01D9; #406, #407, #440, #573, #669; +; 0x00100F91; 0x01D9; #406, #407, #440, #573, #669; +; 0x00100FA0; 0x01DC; 438, 440, 573; +; 0x00200F31; 0x0232; 311, 316; +; 0x00300F10; 0x0327; #564, #573, #662, #686; +; 0x00500F10; 0x0529; #461, #564, #594, #595, #784; +; 0x00500F20; 0x05000119; #461, #564, #594, #639, #662, #686, #784; +; +;** diff --git a/amd-ucode/microcode_amd_fam15h.bin.README b/amd-ucode/microcode_amd_fam15h.bin.README new file mode 100644 index 000..a688b84 --- /dev/null +++ b/amd-ucode/microcode_amd_fam15h.bin.README @@ -0,0 +1,13 @@ +;** +; The associated microco
Re: [PATCH 1/1] linux-firmware: Add AMD microcode patch firmware files
On 07/03/2013 09:56 PM, Ben Hutchings wrote: On Fri, 2013-06-28 at 14:27 -0500, Sherry Hurwitz wrote: For AMD Families 10h ~ 14h Processors file: amd-ucode/microcode_amd.bin md5sum: 55ae79b82cbfddcf7142058be3c9ec2d For AMD Family 15h Processors file: amd-ucode/microcode_amd_fam15h.bin md5sum: 122ac7e56442c2b7c28eb26978b2d57c Signed-off-by: Sherry Hurwitz --- LICENSE.amd-ucode | 64 WHENCE |9 + amd-ucode/microcode_amd.bin| Bin 0 -> 12684 bytes amd-ucode/microcode_amd_fam15h.bin | Bin 0 -> 7876 bytes 4 files changed, 73 insertions(+) create mode 100644 LICENSE.amd-ucode create mode 100644 amd-ucode/microcode_amd.bin create mode 100644 amd-ucode/microcode_amd_fam15h.bin [...] --- a/WHENCE +++ b/WHENCE @@ -2169,3 +2169,12 @@ File: go7007/wis-startrek.fw Licence: Redistributable. See LICENCE.go7007_firmware for details -- + +Driver: microcode_amd - AMD CPU Microcode Update Driver for Linux + +File: amd-ucode/microcode_amd.bin +File: amd-ucode/microcode_amd_fam15h.bin + +License: Redistributable. See LICENSE.amd-ucode for details [...] Please include the version number. I notice that the download page on amd64.org also has GPG signatures. Perhaps those should be included too? (Actually, I would like to see verifiable signatures on all binary firmware, but I don't think that can be made a requirement any time soon. Key 9F94BC90 isn't signed by another published key, so I still have no reason to trust its identity.) Ben. The amd64.org site is down and will no longer be used for distributing AMD microcode patches. Therefore, the Key ID 9F94BC90 will no longer be used to sign the future microcode container files. A new key will be created and signed by me and another AMD co-worker. We will resend the patch with the Key ID 8C0108B4. You can pull this key from the gnuPG key server to verify and see it is signed by two other keys, one belonging to me and the other by Suravee Suthikulpanit, with AMD email addresses. Sherry -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/1] linux-firmware: Add AMD microcode patch firmware files
For AMD Families 10h ~ 14h Processors
file: amd-ucode/microcode_amd.bin
md5sum: 55ae79b82cbfddcf7142058be3c9ec2d
For AMD Family 15h Processors
file: amd-ucode/microcode_amd_fam15h.bin
md5sum: 122ac7e56442c2b7c28eb26978b2d57c
Signed-off-by: Sherry Hurwitz
---
LICENSE.amd-ucode | 64
WHENCE |9 +
amd-ucode/microcode_amd.bin| Bin 0 -> 12684 bytes
amd-ucode/microcode_amd_fam15h.bin | Bin 0 -> 7876 bytes
4 files changed, 73 insertions(+)
create mode 100644 LICENSE.amd-ucode
create mode 100644 amd-ucode/microcode_amd.bin
create mode 100644 amd-ucode/microcode_amd_fam15h.bin
diff --git a/LICENSE.amd-ucode b/LICENSE.amd-ucode
new file mode 100644
index 000..9d4c425
--- /dev/null
+++ b/LICENSE.amd-ucode
@@ -0,0 +1,64 @@
+Copyright (C) 2010-2013 Advanced Micro Devices, Inc., All rights reserved.
+
+Permission is hereby granted by Advanced Micro Devices, Inc. ("AMD"),
+free of any license fees, to any person obtaining a copy of this
+microcode in binary form (the "Software") ("You"), to install,
+reproduce, copy and distribute copies of the Software and to permit
+persons to whom the Software is provided to do the same, subject to
+the following terms and conditions. Your use of any portion of the
+Software shall constitute Your acceptance of the following terms and
+conditions. If You do not agree to the following terms and conditions,
+do not use, retain or redistribute any portion of the Software.
+
+If You redistribute this Software, You must reproduce the above
+copyright notice and this license with the Software.
+Without specific, prior, written permission from AMD, You may not
+reference AMD or AMD products in the promotion of any product derived
+from or incorporating this Software in any manner that implies that
+AMD endorses or has certified such product derived from or
+incorporating this Software.
+
+You may not reverse engineer, decompile, or disassemble this Software
+or any portion thereof.
+
+THE SOFTWARE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED
+WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
+MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY PARTICULAR
+PURPOSE, OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR
+USAGE OF TRADE. IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR
+ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR
+LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF DATA OR
+INFORMATION) ARISING OUT OF AMD'S NEGLIGENCE, GROSS NEGLIGENCE, THE
+USE OF OR INABILITY TO USE THE SOFTWARE, EVEN IF AMD HAS BEEN ADVISED
+OF THE POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS
+PROHIBIT THE EXCLUSION OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR
+INCIDENTAL DAMAGES OR THE EXCLUSION OF IMPLIED WARRANTIES, THE ABOVE
+LIMITATION MAY NOT APPLY TO YOU.
+
+Without limiting the foregoing, the Software may implement third party
+technologies for which You must obtain licenses from parties other
+than AMD. You agree that AMD has not obtained or conveyed to You, and
+that You shall be responsible for obtaining the rights to use and/or
+distribute the applicable underlying intellectual property rights
+related to the third party technologies. These third party
+technologies are not licensed hereunder.
+
+If You use the Software (in whole or in part), You shall adhere to all
+applicable U.S., European, and other export laws, including but not
+limited to the U.S. Export Administration Regulations ("EAR"), (15
+C.F.R. Sections 730 through 774), and E.U. Council Regulation (EC) No
+1334/2000 of 22 June 2000. Further, pursuant to Section 740.6 of the
+EAR, You hereby certify that, except pursuant to a license granted by
+the United States Department of Commerce Bureau of Industry and
+Security or as otherwise permitted pursuant to a License Exception
+under the U.S. Export Administration Regulations ("EAR"), You will not
+(1) export, re-export or release to a national of a country in Country
+Groups D:1, E:1 or E:2 any restricted technology, software, or source
+code You receive hereunder, or (2) export to Country Groups D:1, E:1
+or E:2 the direct product of such technology or software, if such
+foreign produced direct product is subject to national security
+controls as identified on the Commerce Control List (currently found
+in Supplement 1 to Part 774 of EAR). For the most current Country
+Group listings, or for additional information about the EAR or Your
+obligations under those regulations, please refer to the U.S. Bureau
+of Industry and Security?s website at ttp://www.bis.doc.gov/.
diff --git a/WHENCE b/WHENCE
index dd0c5b7..bdd72e6 100644
--- a/WHENCE
+++ b/WHENCE
@@ -2169,3 +2169,12 @@ File: go7007/wis-startrek.fw
Licence: Redistributable. See LICENCE.go7007_firmware for details
---
