[PATCH] ARM: dts: rockchip: rk3288 add more iommu nodes

[Simon Xue]

Add IEP/ISP/VPU/HEVC iommu nodes

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 37 +
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2484f11..90646a2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -953,6 +953,25 @@
status = "okay";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
reg = <0xff93 0x19c>;
@@ -1126,6 +1145,24 @@
};
};
 
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9c0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gpu: mali@ffa3 {
compatible = "rockchip,rk3288-mali", "arm,mali-t760", 
"arm,mali-midgard";
reg = <0xffa3 0x1>;
-- 
1.9.1

[PATCH] ARM: dts: rockchip: rk3288 add more iommu nodes

[Simon Xue]

Add IEP/ISP/VPU/HEVC iommu nodes

Signed-off-by: Simon Xue 
---
 arch/arm/boot/dts/rk3288.dtsi | 37 +
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2484f11..90646a2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -953,6 +953,25 @@
status = "okay";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
reg = <0xff93 0x19c>;
@@ -1126,6 +1145,24 @@
};
};
 
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9c0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gpu: mali@ffa3 {
compatible = "rockchip,rk3288-mali", "arm,mali-t760", 
"arm,mali-midgard";
reg = <0xffa3 0x1>;
-- 
1.9.1

[PATCH V3 3/3] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index e2852b0..78ea341 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1180,6 +1184,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rockchip,disable-mmu-reset");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH V3 3/3] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon Xue 
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index e2852b0..78ea341 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1180,6 +1184,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rockchip,disable-mmu-reset");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH V3 1/3] Docs: dt: rockchip: add rockchip,disable-mmu-reset property

[Simon Xue]

Add rockchip,disable-mmu-reset property to disable some mmu
reset operation

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt 
b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
index 9a55ac3..2098f77 100644
--- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
@@ -15,6 +15,11 @@ Required properties:
 to associate with its master device.  See:
 Documentation/devicetree/bindings/iommu/iommu.txt
 
+Optional properties:
+- rockchip,disable-mmu-reset : Don't use the mmu reset operation.
+  Some mmu instances may produce unexpected results
+  when the reset operation is used.
+
 Example:
 
vopl_mmu: iommu@ff940300 {
-- 
1.9.1

[PATCH V3 1/3] Docs: dt: rockchip: add rockchip,disable-mmu-reset property

[Simon Xue]

Add rockchip,disable-mmu-reset property to disable some mmu
reset operation

Signed-off-by: Simon Xue 
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt 
b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
index 9a55ac3..2098f77 100644
--- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
@@ -15,6 +15,11 @@ Required properties:
 to associate with its master device.  See:
 Documentation/devicetree/bindings/iommu/iommu.txt
 
+Optional properties:
+- rockchip,disable-mmu-reset : Don't use the mmu reset operation.
+  Some mmu instances may produce unexpected results
+  when the reset operation is used.
+
 Example:
 
vopl_mmu: iommu@ff940300 {
-- 
1.9.1

[PATCH V3 2/3] iommu/rockchip: add multi irqs support

[Simon Xue]

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
use platform_irq_count to get irq nums

 drivers/iommu/rockchip-iommu.c | 35 ++-
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..e2852b0 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,23 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
+   iommu->num_irq = platform_irq_count(pdev);
+   if (iommu->num_irq < 0)
+   return iommu->num_irq;
+   if (iommu->num_irq == 0)
return -ENXIO;
+
+   iommu->irq = devm_kcalloc(dev, iommu->num_irq, sizeof(*iommu->irq),
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH V3 2/3] iommu/rockchip: add multi irqs support

[Simon Xue]

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon Xue 
---
changes since V2:
use platform_irq_count to get irq nums

 drivers/iommu/rockchip-iommu.c | 35 ++-
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..e2852b0 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,23 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
+   iommu->num_irq = platform_irq_count(pdev);
+   if (iommu->num_irq < 0)
+   return iommu->num_irq;
+   if (iommu->num_irq == 0)
return -ENXIO;
+
+   iommu->irq = devm_kcalloc(dev, iommu->num_irq, sizeof(*iommu->irq),
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH V3 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..99948d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,35 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1

[PATCH V3 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon Xue 
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..99948d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,35 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1

[PATCH V3 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
 - none

 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH V3 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon Xue 
---
changes since V2:
 - none

 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH V3 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
 - none

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH V3 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon Xue <x...@rock-chips.com>
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..7b7f9c7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,55 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH V3 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon Xue 
---
changes since V2:
 - none

 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH V3 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon Xue 
---
changes since V2:
use rockchip,disable-mmu-reset instead of rk-iommu,disable-reset-quirk

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..7b7f9c7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,55 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rockchip,disable-mmu-reset;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH V2 1/3] Docs: dt: rockchip: add rk-iommu,disable-reset-quirk property

[Simon Xue]

From: Simon 

Add rk-iommu,disable-reset-quirk property to ignore the isp mmu
reset operation

Signed-off-by: Simon 
---
changes since V1:
 - new added file

 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt 
b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
index 9a55ac3..aa2136c 100644
--- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
@@ -15,6 +15,11 @@ Required properties:
 to associate with its master device.  See:
 Documentation/devicetree/bindings/iommu/iommu.txt
 
+Optional properties:
+- rk-iommu,disable-reset-quirk : This ignore the isp mmu reset operation.
+It can't get the expected result when isp mmu
+reset, but the reset function work normally
+
 Example:
 
vopl_mmu: iommu@ff940300 {
-- 
1.9.1

[PATCH V2 1/3] Docs: dt: rockchip: add rk-iommu,disable-reset-quirk property

[Simon Xue]

From: Simon 

Add rk-iommu,disable-reset-quirk property to ignore the isp mmu
reset operation

Signed-off-by: Simon 
---
changes since V1:
 - new added file

 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt 
b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
index 9a55ac3..aa2136c 100644
--- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
@@ -15,6 +15,11 @@ Required properties:
 to associate with its master device.  See:
 Documentation/devicetree/bindings/iommu/iommu.txt
 
+Optional properties:
+- rk-iommu,disable-reset-quirk : This ignore the isp mmu reset operation.
+It can't get the expected result when isp mmu
+reset, but the reset function work normally
+
 Example:
 
vopl_mmu: iommu@ff940300 {
-- 
1.9.1

[PATCH V2 2/3] iommu/rockchip: add multi irqs support

[Simon Xue]

From: Simon 

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon 
---
changes since V1:
 - use devm_kcalloc instead of devm_kzalloc when alloc irq array

 drivers/iommu/rockchip-iommu.c | 34 --
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..3c462c0 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,20 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
-   return -ENXIO;
+   while (platform_get_irq(pdev, iommu->num_irq) >= 0)
+   iommu->num_irq++;
+
+   iommu->irq = devm_kcalloc(dev, iommu->num_irq, sizeof(*iommu->irq),
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH V2 3/3] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

From: Simon 

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon 
---
changes since V1:
 - use '-' instead of '_' for DT property.

 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 3c462c0..3c6dc81 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1177,6 +1181,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rk-iommu,disable-reset-quirk");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH V2 2/3] iommu/rockchip: add multi irqs support

[Simon Xue]

From: Simon 

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon 
---
changes since V1:
 - use devm_kcalloc instead of devm_kzalloc when alloc irq array

 drivers/iommu/rockchip-iommu.c | 34 --
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..3c462c0 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,20 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
-   return -ENXIO;
+   while (platform_get_irq(pdev, iommu->num_irq) >= 0)
+   iommu->num_irq++;
+
+   iommu->irq = devm_kcalloc(dev, iommu->num_irq, sizeof(*iommu->irq),
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH V2 3/3] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

From: Simon 

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon 
---
changes since V1:
 - use '-' instead of '_' for DT property.

 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 3c462c0..3c6dc81 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1177,6 +1181,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rk-iommu,disable-reset-quirk");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH V2 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - none

 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH V2 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - none

 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH V2 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - add rk-iommu,disable-reset-quirk for isp mmus to ignore the isp
   mmu reset operation

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..601d7ef 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,35 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1

[PATCH V2 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

From: Simon 

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - add rk-iommu,disable-reset-quirk for isp mmu to ignore the isp mmu
   reset operation

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..98cacc0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,55 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH V2 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

From: Simon 

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - add rk-iommu,disable-reset-quirk for isp mmu to ignore the isp mmu
   reset operation

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 49 
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..98cacc0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,55 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH V2 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - add rk-iommu,disable-reset-quirk for isp mmus to ignore the isp
   mmu reset operation

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65 
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..601d7ef 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,35 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   rk-iommu,disable-reset-quirk;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1

[PATCH V2 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

From: Simon 

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - none


 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH V2 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

From: Simon 

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon 
---
changes since V1:
 - none


 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH 2/2] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

From: Simon 

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon 
---
 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index b38283e..47c00b9 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1177,6 +1181,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rk_iommu,disable_reset_quirk");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH 2/2] iommu/rockchip: ignore isp mmu reset operation

[Simon Xue]

From: Simon 

ISP mmu can't support reset operation, it won't get the
expected result when reset, but rest functions work normally.
Add this patch as a WA for this issue.

Signed-off-by: Simon 
---
 drivers/iommu/rockchip-iommu.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index b38283e..47c00b9 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -92,6 +92,7 @@ struct rk_iommu {
int num_mmu;
int *irq;
int num_irq;
+   bool reset_disabled;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -415,6 +416,9 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu)
int ret, i;
u32 dte_addr;
 
+   if (iommu->reset_disabled)
+   return 0;
+
/*
 * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY
 * and verifying that upper 5 nybbles are read back.
@@ -1177,6 +1181,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
}
}
 
+   iommu->reset_disabled = device_property_read_bool(dev,
+   "rk_iommu,disable_reset_quirk");
+
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
if (err)
return err;
-- 
1.9.1

[PATCH 1/2] iommu/rockchip: add multi irqs support

[Simon Xue]

From: Simon 

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon 
---
 drivers/iommu/rockchip-iommu.c | 34 --
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..b38283e 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,20 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
-   return -ENXIO;
+   while (platform_get_irq(pdev, iommu->num_irq) >= 0)
+   iommu->num_irq++;
+
+   iommu->irq = devm_kzalloc(dev, sizeof(*iommu->irq) * iommu->num_irq,
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH 1/2] iommu/rockchip: add multi irqs support

[Simon Xue]

From: Simon 

RK3368 vpu mmu have two irqs, this patch support multi irqs

Signed-off-by: Simon 
---
 drivers/iommu/rockchip-iommu.c | 34 --
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 4ba48a2..b38283e 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -90,7 +90,8 @@ struct rk_iommu {
struct device *dev;
void __iomem **bases;
int num_mmu;
-   int irq;
+   int *irq;
+   int num_irq;
struct iommu_device iommu;
struct list_head node; /* entry in rk_iommu_domain.iommus */
struct iommu_domain *domain; /* domain to which iommu is attached */
@@ -825,10 +826,12 @@ static int rk_iommu_attach_device(struct iommu_domain 
*domain,
 
iommu->domain = domain;
 
-   ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
-  IRQF_SHARED, dev_name(dev), iommu);
-   if (ret)
-   return ret;
+   for (i = 0; i < iommu->num_irq; i++) {
+   ret = devm_request_irq(iommu->dev, iommu->irq[i], rk_iommu_irq,
+  IRQF_SHARED, dev_name(dev), iommu);
+   if (ret)
+   return ret;
+   }
 
for (i = 0; i < iommu->num_mmu; i++) {
rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
@@ -878,7 +881,8 @@ static void rk_iommu_detach_device(struct iommu_domain 
*domain,
}
rk_iommu_disable_stall(iommu);
 
-   devm_free_irq(iommu->dev, iommu->irq, iommu);
+   for (i = 0; i < iommu->num_irq; i++)
+   devm_free_irq(iommu->dev, iommu->irq[i], iommu);
 
iommu->domain = NULL;
 
@@ -1157,10 +1161,20 @@ static int rk_iommu_probe(struct platform_device *pdev)
if (iommu->num_mmu == 0)
return PTR_ERR(iommu->bases[0]);
 
-   iommu->irq = platform_get_irq(pdev, 0);
-   if (iommu->irq < 0) {
-   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq);
-   return -ENXIO;
+   while (platform_get_irq(pdev, iommu->num_irq) >= 0)
+   iommu->num_irq++;
+
+   iommu->irq = devm_kzalloc(dev, sizeof(*iommu->irq) * iommu->num_irq,
+ GFP_KERNEL);
+   if (!iommu->irq)
+   return -ENOMEM;
+
+   for (i = 0; i < iommu->num_irq; i++) {
+   iommu->irq[i] = platform_get_irq(pdev, i);
+   if (iommu->irq[i] < 0) {
+   dev_err(dev, "Failed to get IRQ, %d\n", iommu->irq[i]);
+   return -ENXIO;
+   }
}
 
err = iommu_device_sysfs_add(>iommu, dev, NULL, dev_name(dev));
-- 
1.9.1

[PATCH 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

From: Simon 

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 48 
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..ed9a56c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,54 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon 
---
 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH 3/4] ARM64: dts: rockchip: rk3368 add iommu nodes

[Simon Xue]

From: Simon 

Add IEP/ISP/VOP/HEVC/VPU iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 48 
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..ed9a56c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -724,6 +724,54 @@
status = "disabled";
};
 
+   iep_mmu: iommu@ff900800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff900800 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>,
+ <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff930300 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff930300 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   hevc_mmu: iommu@ff9a0440 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0440 0x0 0x40>,
+ <0x0 0xff9a0480 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "hevc_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff9a0800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff9a0800 0x0 0x100>;
+   interrupts = ,
+;
+   interrupt-names = "vepu_mmu", "vdpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
-- 
1.9.1

[PATCH 2/4] ARM: dts: rockchip: rk322x add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon 
---
 arch/arm/boot/dts/rk322x.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -500,6 +500,42 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@20020800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20020800 0x100>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@20030480 {
+   compatible = "rockchip,iommu";
+   reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@20053f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x20053f00 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@20070800 {
+   compatible = "rockchip,iommu";
+   reg = <0x20070800 0x100>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   iommu-cells = <0>;
+   status = "disabled";
+   };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
-- 
1.9.1

[PATCH 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

From: Simon 

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH 1/4] ARM64: dts: rockchip: rk3328 add iommu nodes

[Simon Xue]

From: Simon 

Add H265e/VEPU/VPU/VDEC/VOP iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45 
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 0be96ce..bdd7711 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -320,6 +320,51 @@
status = "disabled";
};
 
+   h265e_mmu: iommu@ff330200 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff330200 0 0x100>;
+   interrupts = ;
+   interrupt-names = "h265e_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vepu_mmu: iommu@ff340800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff340800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vepu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vpu_mmu: iommu@ff350800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff350800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   rkvdec_mmu: iommu@ff360480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "rkvdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vop_mmu: iommu@ff373f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff373f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vop_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
cru: clock-controller@ff44 {
compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
reg = <0x0 0xff44 0x0 0x1000>;
-- 
1.9.1

[PATCH 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 63 
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..95cabe1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,33 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1

[PATCH 4/4] ARM64: dts: rockchip: rk3399 add iommu nodes

[Simon Xue]

From: Simon 

Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes

Signed-off-by: Simon 
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 63 
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 69c56f7..95cabe1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1151,6 +1151,33 @@
status = "disabled";
};
 
+   vpu_mmu: iommu@ff650800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff650800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vpu_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   vdec_mmu: iommu@ff660480 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "vdec_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   iep_mmu: iommu@ff670800 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff670800 0x0 0x40>;
+   interrupts = ;
+   interrupt-names = "iep_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
@@ -1360,6 +1387,15 @@
};
};
 
+   vopl_mmu: iommu@ff8f3f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff8f3f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopl_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@ff848000 {
compatible = "snps,dw-wdt";
reg = <0x0 0xff848000 0x0 0x100>;
@@ -1426,6 +1462,33 @@
status = "disabled";
};
 
+   vopb_mmu: iommu@ff903f00 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff903f00 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "vopb_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp0_mmu: iommu@ff914000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp0_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
+   isp1_mmu: iommu@ff924000 {
+   compatible = "rockchip,iommu";
+   reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+   interrupts = ;
+   interrupt-names = "isp1_mmu";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <>;
-- 
1.9.1