Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
Hello Marco,
Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
> On 21-03-08 07:40, Heiko Schocher wrote:
> > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> >
> > Signed-off-by: Heiko Schocher
> > ---
> >
> > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > +++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index 44a8c2337cee4..0284e7a5c6bba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > };
> > };
> >
> > + {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_flexspi0>;
> > + status = "okay";
> > +
> > + flash0: mt25qu256aba@0 {
> > + reg = <0>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
>
> Please make the compatible the first property followed by the reg
> property. Also you don't need to add the #size-cells and #address-
> cells
> now since you don't add a child node.
but is this not similar to the label here? If you add partitions in the
bootloader you need the cells properties?
Teresa
>
> Regards,
> Marco
>
> > + spi-max-frequency = <8000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > {
> > clock-frequency = <40>;
> > pinctrl-names = "default";
> > @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> > 0x11
> > >;
> > };
> >
> > + pinctrl_flexspi0: flexspi0grp {
> > + fsl,pins = <
> > + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> > 0x1c2
> > + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
> > 2
> > + >;
> > + };
> > +
> > pinctrl_i2c1: i2c1grp {
> > fsl,pins = <
> > MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
> > 1c3
> > --
> > 2.29.2
> >
> >
> >
Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
Hello Heiko,
first thanks for the patch :).
Am Montag, den 08.03.2021, 07:40 +0100 schrieb Heiko Schocher:
> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>
> Signed-off-by: Heiko Schocher
> ---
>
> .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> +++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..0284e7a5c6bba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> };
> };
>
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_flexspi0>;
> + status = "okay";
> +
> + flash0: mt25qu256aba@0 {
you can remove the label. As it is not used here right now.
Also rename the node name to device type like "flash" maybe.
I will try to test this soon.
Thanks,
Teresa
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + spi-max-frequency = <8000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> {
> clock-frequency = <40>;
> pinctrl-names = "default";
> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> 0x11
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> 0x1c2
> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B0x82
> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00
> 0x82
> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01
> 0x82
> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02
> 0x82
> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03
> 0x82
> + >;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <
> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400
> 001c3
Re: [PATCH] ARM: dts: am335x-wega.dtsi: fix wrong card detect pin level
Hello Andreas,
Am Dienstag, den 09.07.2019, 20:32 +0200 schrieb Andreas Klinger:
> mmc cards on mmc1 are not detected because of wrong card detect (cd)
> level.
>
> Change cd from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW.
>
> This is necessary because of commit e63201f19438 ("mmc: omap_hsmmc:
> Delete platform data GPIO CD and WP")
Thanks for noticing. But the fix is already in master.
Teresa
>
> Signed-off-by: Andreas Klinger
> ---
> arch/arm/boot/dts/am335x-wega.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
> b/arch/arm/boot/dts/am335x-wega.dtsi
> index b7d28a20341f..84581fed3d06 100644
> --- a/arch/arm/boot/dts/am335x-wega.dtsi
> +++ b/arch/arm/boot/dts/am335x-wega.dtsi
> @@ -157,7 +157,7 @@
> bus-width = <4>;
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> - cd-gpios = < 6 GPIO_ACTIVE_HIGH>;
> + cd-gpios = < 6 GPIO_ACTIVE_LOW>;
> status = "okay";
> };
>
> --
> 2.11.0
>
>
[PATCH] drm: tilcdc: Fix check for remote port parent
In function tilcdc_get_external_components the check for
the remote port parent is not correct. We need a '||' instead of
an '&&'.
Signed-off-by: Teresa Remmet <t.rem...@phytec.de>
---
There has been send out a different version of this patch about a year ago.
But there was no feedback at all. Please apply one of the solutions.
https://patchwork.kernel.org/patch/6596441/
Teresa
drivers/gpu/drm/tilcdc/tilcdc_external.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index 03acb4f..ceba712 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -145,7 +145,7 @@ int tilcdc_get_external_components(struct device *dev,
struct device_node *node;
node = of_graph_get_remote_port_parent(ep);
- if (!node && !of_device_is_available(node)) {
+ if (!node || !of_device_is_available(node)) {
of_node_put(node);
continue;
}
--
1.9.1
[PATCH] drm: tilcdc: Fix check for remote port parent
In function tilcdc_get_external_components the check for
the remote port parent is not correct. We need a '||' instead of
an '&&'.
Signed-off-by: Teresa Remmet
---
There has been send out a different version of this patch about a year ago.
But there was no feedback at all. Please apply one of the solutions.
https://patchwork.kernel.org/patch/6596441/
Teresa
drivers/gpu/drm/tilcdc/tilcdc_external.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index 03acb4f..ceba712 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -145,7 +145,7 @@ int tilcdc_get_external_components(struct device *dev,
struct device_node *node;
node = of_graph_get_remote_port_parent(ep);
- if (!node && !of_device_is_available(node)) {
+ if (!node || !of_device_is_available(node)) {
of_node_put(node);
continue;
}
--
1.9.1
Re: [PATCH] mtd: nand: omap2: add missing braces
Hello,
Am Donnerstag, den 14.07.2016, 11:53 +0200 schrieb Arnd Bergmann:
> A bug fix just introduced incorrect behavior in the omap2 nand driver, as
> found by gcc-6.1:
>
> drivers/mtd/nand/omap2.c: In function 'omap_get_dt_info':
> drivers/mtd/nand/omap2.c:1658:2: error: this 'if' clause does not guard...
> [-Werror=misleading-indentation]
> if (!info->elm_of_node)
> ^~
> drivers/mtd/nand/omap2.c:1660:3: note: ...this statement, but the latter is
> misleadingly indented as if it is guarded by the 'if'
>if (!info->elm_of_node)
>^~
>
> We clearly need to put the indented code into { } braces to get the intended
> behavior.
how bad that I missed that :(.
But nice that gcc-6.1 catches such things.
Thanks,
Teresa
>
> Signed-off-by: Arnd Bergmann
> Fixes: 3bbca2c54f86 ("mtd: nand: omap2: Add check for old elm binding")
> ---
> drivers/mtd/nand/omap2.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> index a36ad3d146a3..ab7c34096a62 100644
> --- a/drivers/mtd/nand/omap2.c
> +++ b/drivers/mtd/nand/omap2.c
> @@ -1655,10 +1655,11 @@ static int omap_get_dt_info(struct device *dev,
> struct omap_nand_info *info)
>
> /* detect availability of ELM module. Won't be present pre-OMAP4 */
> info->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0);
> - if (!info->elm_of_node)
> + if (!info->elm_of_node) {
> info->elm_of_node = of_parse_phandle(child, "elm_id", 0);
> if (!info->elm_of_node)
> dev_dbg(dev, "ti,elm-id not in DT\n");
> + }
>
> /* select ecc-scheme for NAND */
> if (of_property_read_string(child, "ti,nand-ecc-opt", )) {
Re: [PATCH] mtd: nand: omap2: add missing braces
Hello,
Am Donnerstag, den 14.07.2016, 11:53 +0200 schrieb Arnd Bergmann:
> A bug fix just introduced incorrect behavior in the omap2 nand driver, as
> found by gcc-6.1:
>
> drivers/mtd/nand/omap2.c: In function 'omap_get_dt_info':
> drivers/mtd/nand/omap2.c:1658:2: error: this 'if' clause does not guard...
> [-Werror=misleading-indentation]
> if (!info->elm_of_node)
> ^~
> drivers/mtd/nand/omap2.c:1660:3: note: ...this statement, but the latter is
> misleadingly indented as if it is guarded by the 'if'
>if (!info->elm_of_node)
>^~
>
> We clearly need to put the indented code into { } braces to get the intended
> behavior.
how bad that I missed that :(.
But nice that gcc-6.1 catches such things.
Thanks,
Teresa
>
> Signed-off-by: Arnd Bergmann
> Fixes: 3bbca2c54f86 ("mtd: nand: omap2: Add check for old elm binding")
> ---
> drivers/mtd/nand/omap2.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> index a36ad3d146a3..ab7c34096a62 100644
> --- a/drivers/mtd/nand/omap2.c
> +++ b/drivers/mtd/nand/omap2.c
> @@ -1655,10 +1655,11 @@ static int omap_get_dt_info(struct device *dev,
> struct omap_nand_info *info)
>
> /* detect availability of ELM module. Won't be present pre-OMAP4 */
> info->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0);
> - if (!info->elm_of_node)
> + if (!info->elm_of_node) {
> info->elm_of_node = of_parse_phandle(child, "elm_id", 0);
> if (!info->elm_of_node)
> dev_dbg(dev, "ti,elm-id not in DT\n");
> + }
>
> /* select ecc-scheme for NAND */
> if (of_property_read_string(child, "ti,nand-ecc-opt", )) {
Re: [PATCH v3] net: phy: smsc: Fix disabling energy detect mode
Hello Andrew, Am Mittwoch, den 20.01.2016, 15:21 +0100 schrieb Andrew Lunn: > On Wed, Jan 20, 2016 at 01:40:35PM +0100, Teresa Remmet wrote: > > When the lan87xx_read_status function is getting called the > > energy detect mode is enabled again even if it has been > > disabled by device tree. > > > > Added private struct to check the energy detect status. > > > > Signed-off-by: Teresa Remmet > > Hi Teresa > > Looks a lot better now. > > Reviewd-by: Andrew Lunn thank you for taking the time to review the patch. Regards, Teresa > > Thanks > Andrew
Re: [PATCH v3] net: phy: smsc: Fix disabling energy detect mode
Hello Andrew, Am Mittwoch, den 20.01.2016, 15:21 +0100 schrieb Andrew Lunn: > On Wed, Jan 20, 2016 at 01:40:35PM +0100, Teresa Remmet wrote: > > When the lan87xx_read_status function is getting called the > > energy detect mode is enabled again even if it has been > > disabled by device tree. > > > > Added private struct to check the energy detect status. > > > > Signed-off-by: Teresa Remmet <t.rem...@phytec.de> > > Hi Teresa > > Looks a lot better now. > > Reviewd-by: Andrew Lunn <and...@lunn.ch> thank you for taking the time to review the patch. Regards, Teresa > > Thanks > Andrew
[PATCH 2/2] ARM: dts: am335x-wega: Clean up regulators
Cleaned up the regulators on the wega board. Created a simple bus,
renamed the regulators according to the schematics and added missing
regulator on wega.
Signed-off-by: Teresa Remmet
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 36 ---
arch/arm/boot/dts/am335x-wega.dtsi| 13 ++-
2 files changed, 31 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 5dd084f..2f43e45 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -29,8 +29,17 @@
reg = <0x8000 0x1000>; /* 256 MB */
};
- vbat: fixedregulator@0 {
- compatible = "regulator-fixed";
+ regulators {
+ compatible = "simple-bus";
+
+ vcc5v: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
};
@@ -233,14 +242,14 @@
#include "tps65910.dtsi"
{
- vcc1-supply = <>;
- vcc2-supply = <>;
- vcc3-supply = <>;
- vcc4-supply = <>;
- vcc5-supply = <>;
- vcc6-supply = <>;
- vcc7-supply = <>;
- vccio-supply = <>;
+ vcc1-supply = <>;
+ vcc2-supply = <>;
+ vcc3-supply = <>;
+ vcc4-supply = <>;
+ vcc5-supply = <>;
+ vcc6-supply = <>;
+ vcc7-supply = <>;
+ vccio-supply = <>;
regulators {
vrtc_reg: regulator@0 {
@@ -311,13 +320,6 @@
};
};
- {
- regulator-name = "vbat";
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- regulator-boot-on;
-};
-
/* SPI Busses */
_pinmux {
spi0_pins: pinmux_spi0 {
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
b/arch/arm/boot/dts/am335x-wega.dtsi
index 5e541bd..2cecb39 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -11,6 +11,17 @@
model = "Phytec AM335x phyBOARD-WEGA";
compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som",
"ti,am33xx";
+ regulators {
+ compatible = "simple-bus";
+
+ vcc3v3: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ };
+ };
};
/* CAN Busses */
@@ -80,7 +91,7 @@
};
{
- vmmc-supply = <_reg>;
+ vmmc-supply = <>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <_pins>;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ARM: dts: am335x-phycore-som: Fix mpu voltage
Fix the mpu voltage as it is set to low for the silicon
revision 2.1.
Signed-off-by: Teresa Remmet
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 4d28fc3..5dd084f 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -252,10 +252,10 @@
};
vdd1_reg: regulator@2 {
- /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4%
tolerance */
+ /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4%
tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
- regulator-max-microvolt = <1312500>;
+ regulator-max-microvolt = <1378000>;
regulator-boot-on;
regulator-always-on;
};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] ARM: dts: am335x-wega: Clean up regulators
Cleaned up the regulators on the wega board. Created a simple bus,
renamed the regulators according to the schematics and added missing
regulator on wega.
Signed-off-by: Teresa Remmet <t.rem...@phytec.de>
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 36 ---
arch/arm/boot/dts/am335x-wega.dtsi| 13 ++-
2 files changed, 31 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 5dd084f..2f43e45 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -29,8 +29,17 @@
reg = <0x8000 0x1000>; /* 256 MB */
};
- vbat: fixedregulator@0 {
- compatible = "regulator-fixed";
+ regulators {
+ compatible = "simple-bus";
+
+ vcc5v: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
};
@@ -233,14 +242,14 @@
#include "tps65910.dtsi"
{
- vcc1-supply = <>;
- vcc2-supply = <>;
- vcc3-supply = <>;
- vcc4-supply = <>;
- vcc5-supply = <>;
- vcc6-supply = <>;
- vcc7-supply = <>;
- vccio-supply = <>;
+ vcc1-supply = <>;
+ vcc2-supply = <>;
+ vcc3-supply = <>;
+ vcc4-supply = <>;
+ vcc5-supply = <>;
+ vcc6-supply = <>;
+ vcc7-supply = <>;
+ vccio-supply = <>;
regulators {
vrtc_reg: regulator@0 {
@@ -311,13 +320,6 @@
};
};
- {
- regulator-name = "vbat";
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- regulator-boot-on;
-};
-
/* SPI Busses */
_pinmux {
spi0_pins: pinmux_spi0 {
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
b/arch/arm/boot/dts/am335x-wega.dtsi
index 5e541bd..2cecb39 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -11,6 +11,17 @@
model = "Phytec AM335x phyBOARD-WEGA";
compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som",
"ti,am33xx";
+ regulators {
+ compatible = "simple-bus";
+
+ vcc3v3: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ };
+ };
};
/* CAN Busses */
@@ -80,7 +91,7 @@
};
{
- vmmc-supply = <_reg>;
+ vmmc-supply = <>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <_pins>;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ARM: dts: am335x-phycore-som: Fix mpu voltage
Fix the mpu voltage as it is set to low for the silicon
revision 2.1.
Signed-off-by: Teresa Remmet <t.rem...@phytec.de>
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 4d28fc3..5dd084f 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -252,10 +252,10 @@
};
vdd1_reg: regulator@2 {
- /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4%
tolerance */
+ /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4%
tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
- regulator-max-microvolt = <1312500>;
+ regulator-max-microvolt = <1378000>;
regulator-boot-on;
regulator-always-on;
};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] ARM: dts: am335x-phycore-som: Move NAND partition table into board files
Hello Matthias,
Am Freitag, den 07.08.2015, 11:09 +0200 schrieb Matthias Klein:
> Partitions which are defined in the som file can not be deleted in the
> board file.
>
> Signed-off-by: Matthias Klein
> ---
> arch/arm/boot/dts/am335x-phycore-som.dtsi | 37 -
> arch/arm/boot/dts/am335x-wega.dtsi| 45
> +++
> 2 files changed, 45 insertions(+), 37 deletions(-)
>
> diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
> b/arch/arm/boot/dts/am335x-phycore-som.dtsi
> index 4d28fc3..8f12bd54 100644
> --- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
> +++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
> @@ -189,43 +189,6 @@
>
> #address-cells = <1>;
> #size-cells = <1>;
> -
> - partition@0 {
> - label = "xload";
> - reg = <0x0 0x2>;
> - };
> - partition@1 {
> - label = "xload_backup1";
> - reg = <0x2 0x2>;
> - };
> - partition@2 {
> - label = "xload_backup2";
> - reg = <0x4 0x2>;
> - };
> - partition@3 {
> - label = "xload_backup3";
> - reg = <0x6 0x2>;
> - };
> - partition@4 {
> - label = "barebox";
> - reg = <0x8 0x8>;
> - };
> - partition@5 {
> - label = "bareboxenv";
> - reg = <0x10 0x4>;
> - };
> - partition@6 {
> - label = "oftree";
> - reg = <0x14 0x4>;
> - };
> - partition@7 {
> - label = "kernel";
> - reg = <0x18 0x80>;
> - };
> - partition@8 {
> - label = "root";
> - reg = <0x98 0x0>;
> - };
> };
> };
>
> diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
> b/arch/arm/boot/dts/am335x-wega.dtsi
> index 5e541bd..945a41d 100644
> --- a/arch/arm/boot/dts/am335x-wega.dtsi
> +++ b/arch/arm/boot/dts/am335x-wega.dtsi
> @@ -149,3 +149,48 @@
> _phy {
> status = "okay";
> };
I don't think that moving the nand partition to the carrier board dtsi is
correct.
The nand partition does not have anything to do with the carrier board in first
place.
So they should rather be moved to the am335x-wega-rdk.dts which does describe
the
board in a whole.
If you do this, you should remove the spi partitions from the SoM dtsi also.
And it is generally possible to delete nodes from a device tree with
/delete-node/ _node;
But I have actually not tested this when overwriting partitions. Neither know
if this whould
be a sane solution.
Regards
Teresa
> +
> + {
> + partition@0 {
> + label = "xload";
> + reg = <0x0 0x2>;
> + };
> +
> + partition@1 {
> + label = "xload_backup1";
> + reg = <0x2 0x2>;
> + };
> +
> + partition@2 {
> + label = "xload_backup2";
> + reg = <0x4 0x2>;
> + };
> +
> + partition@3 {
> + label = "xload_backup3";
> + reg = <0x6 0x2>;
> + };
> +
> + partition@4 {
> + label = "barebox";
> + reg = <0x8 0x8>;
> + };
> +
> + partition@5 {
> + label = "bareboxenv";
> + reg = <0x10 0x4>;
> + };
> +
> + partition@6 {
> + label = "oftree";
> + reg = <0x14 0x4>;
> + };
> + partition@7 {
> + label = "kernel";
> + reg = <0x18 0x80>;
> + };
> + partition@8 {
> + label = "root";
> + reg = <0x98 0x0>;
> + };
> +};
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] ARM: dts: am335x-phycore-som: Move NAND partition table into board files
Hello Matthias,
Am Freitag, den 07.08.2015, 11:09 +0200 schrieb Matthias Klein:
Partitions which are defined in the som file can not be deleted in the
board file.
Signed-off-by: Matthias Klein matthias.kl...@optimeas.de
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 37 -
arch/arm/boot/dts/am335x-wega.dtsi| 45
+++
2 files changed, 45 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 4d28fc3..8f12bd54 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -189,43 +189,6 @@
#address-cells = 1;
#size-cells = 1;
-
- partition@0 {
- label = xload;
- reg = 0x0 0x2;
- };
- partition@1 {
- label = xload_backup1;
- reg = 0x2 0x2;
- };
- partition@2 {
- label = xload_backup2;
- reg = 0x4 0x2;
- };
- partition@3 {
- label = xload_backup3;
- reg = 0x6 0x2;
- };
- partition@4 {
- label = barebox;
- reg = 0x8 0x8;
- };
- partition@5 {
- label = bareboxenv;
- reg = 0x10 0x4;
- };
- partition@6 {
- label = oftree;
- reg = 0x14 0x4;
- };
- partition@7 {
- label = kernel;
- reg = 0x18 0x80;
- };
- partition@8 {
- label = root;
- reg = 0x98 0x0;
- };
};
};
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
b/arch/arm/boot/dts/am335x-wega.dtsi
index 5e541bd..945a41d 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -149,3 +149,48 @@
usb1_phy {
status = okay;
};
I don't think that moving the nand partition to the carrier board dtsi is
correct.
The nand partition does not have anything to do with the carrier board in first
place.
So they should rather be moved to the am335x-wega-rdk.dts which does describe
the
board in a whole.
If you do this, you should remove the spi partitions from the SoM dtsi also.
And it is generally possible to delete nodes from a device tree with
/delete-node/ my_node;
But I have actually not tested this when overwriting partitions. Neither know
if this whould
be a sane solution.
Regards
Teresa
+
+nandflash {
+ partition@0 {
+ label = xload;
+ reg = 0x0 0x2;
+ };
+
+ partition@1 {
+ label = xload_backup1;
+ reg = 0x2 0x2;
+ };
+
+ partition@2 {
+ label = xload_backup2;
+ reg = 0x4 0x2;
+ };
+
+ partition@3 {
+ label = xload_backup3;
+ reg = 0x6 0x2;
+ };
+
+ partition@4 {
+ label = barebox;
+ reg = 0x8 0x8;
+ };
+
+ partition@5 {
+ label = bareboxenv;
+ reg = 0x10 0x4;
+ };
+
+ partition@6 {
+ label = oftree;
+ reg = 0x14 0x4;
+ };
+ partition@7 {
+ label = kernel;
+ reg = 0x18 0x80;
+ };
+ partition@8 {
+ label = root;
+ reg = 0x98 0x0;
+ };
+};
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] ARM: dts: Add support for phyCORE-AM335x SoM
Hello Igor,
Am Dienstag, den 28.07.2015, 11:29 +0300 schrieb Igor Grinberg:
> Hi Matt,
>
> On 07/27/15 17:34, Matt Porter wrote:
> > On Thu, Jul 16, 2015 at 10:30:48AM +0200, Teresa Remmet wrote:
> >> phyCORE-AM335x is a SoM (System on Module) containing
> >> a AM335x SOC. The module can be connected to different
> >> carrier boards.
> >>
> >> Some hardware parts are configurable on the phyCORE-AM335x.
> >> So they are disabled on default in this som dtsi file.
> >> They will be enabled in the board dts files, when populated.
> >>
> >> * RAM up to 1GiB
> >> * PMIC
> >> * NAND flash up to 1GiB
> >> * Eth PHY on SOM: 1x RMII
> >> * SPI NOR flash 8MiB (optional)
> >> * i2c RTC (optional)
> >> * i2c EEPROM 4kiB (optional)
> >>
> >> Signed-off-by: Teresa Remmet
> >> ---
> >> arch/arm/boot/dts/am335x-phycore-som.dtsi | 368
> >> ++
> >> 1 file changed, 368 insertions(+)
> >> create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
> >>
> >> diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
> >> b/arch/arm/boot/dts/am335x-phycore-som.dtsi
> >> new file mode 100644
> >> index 000..4d28fc3
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
>
> [...]
>
> >> +#include "am33xx.dtsi"
> >> +
> >> +/ {
> >> + model = "Phytec AM335x phyCORE";
> >> + compatible = "phytec,am335x-phycore-som", "ti,am33xx";
> >
> > One minor thing here...wildcards in compatible strings aren't permitted.
> > However, family compatibles like "ti,am33xx" that came in before this
> > was enforced are grandfathered. Ideally, the newly introced board/som
> > specific strings should not propagate that wildcard. i.e. something
> > like "phytec,am3352-phycore-som" or whatever is the base family part
> > on these SOMs.
> >
>
> I'm not sure this is wild card.
> I tend to think that it is the real name of the som [1], no?
>
> http://phytec.com/products/system-on-modules/phycore/am335x/
Yes, your right. This is the name of the SoM. The phyCORE may have
different am335x versions mounted. So there is not the one am3352 or
am3359 always used.
Regards,
Teresa
>
> [...]
>
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] ARM: dts: Add support for phyCORE-AM335x SoM
Hello Igor,
Am Dienstag, den 28.07.2015, 11:29 +0300 schrieb Igor Grinberg:
Hi Matt,
On 07/27/15 17:34, Matt Porter wrote:
On Thu, Jul 16, 2015 at 10:30:48AM +0200, Teresa Remmet wrote:
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the phyCORE-AM335x.
So they are disabled on default in this som dtsi file.
They will be enabled in the board dts files, when populated.
* RAM up to 1GiB
* PMIC
* NAND flash up to 1GiB
* Eth PHY on SOM: 1x RMII
* SPI NOR flash 8MiB (optional)
* i2c RTC (optional)
* i2c EEPROM 4kiB (optional)
Signed-off-by: Teresa Remmet t.rem...@phytec.de
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 368
++
1 file changed, 368 insertions(+)
create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
new file mode 100644
index 000..4d28fc3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
[...]
+#include am33xx.dtsi
+
+/ {
+ model = Phytec AM335x phyCORE;
+ compatible = phytec,am335x-phycore-som, ti,am33xx;
One minor thing here...wildcards in compatible strings aren't permitted.
However, family compatibles like ti,am33xx that came in before this
was enforced are grandfathered. Ideally, the newly introced board/som
specific strings should not propagate that wildcard. i.e. something
like phytec,am3352-phycore-som or whatever is the base family part
on these SOMs.
I'm not sure this is wild card.
I tend to think that it is the real name of the som [1], no?
http://phytec.com/products/system-on-modules/phycore/am335x/
Yes, your right. This is the name of the SoM. The phyCORE may have
different am335x versions mounted. So there is not the one am3352 or
am3359 always used.
Regards,
Teresa
[...]
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] ARM: dts: Add support for phyCORE-AM335x SoM
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the phyCORE-AM335x.
So they are disabled on default in this som dtsi file.
They will be enabled in the board dts files, when populated.
* RAM up to 1GiB
* PMIC
* NAND flash up to 1GiB
* Eth PHY on SOM: 1x RMII
* SPI NOR flash 8MiB (optional)
* i2c RTC (optional)
* i2c EEPROM 4kiB (optional)
Signed-off-by: Teresa Remmet
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 368 ++
1 file changed, 368 insertions(+)
create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
new file mode 100644
index 000..4d28fc3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am33xx.dtsi"
+
+/ {
+ model = "Phytec AM335x phyCORE";
+ compatible = "phytec,am335x-phycore-som", "ti,am33xx";
+
+ aliases {
+ rtc0 = _rtc;
+ rtc1 =
+ };
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <_reg>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x1000>; /* 256 MB */
+ };
+
+ vbat: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ };
+};
+
+/* Crypto Module */
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+/* Ethernet */
+_pinmux {
+ ethernet0_pins: pinmux_ethernet0 {
+ pinctrl-single,pins = <
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_crs.rmii1_crs_dv */
+ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxerr.rmii1_rxerr */
+ 0x114 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txen.rmii1_txen */
+ 0x124 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd1.rmii1_txd1 */
+ 0x128 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd0.rmii1_txd0 */
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd1.rmii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd0.rmii1_rxd0 */
+ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
rmii1_refclk.rmii1_refclk */
+ >;
+ };
+
+ mdio_pins: pinmux_mdio {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
/* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
/* mdio_clk.mdio_clk */
+ >;
+ };
+};
+
+_emac0 {
+ phy_id = <_mdio>, <0>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <1>;
+};
+
+_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+};
+
+ {
+ slaves = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+};
+
+_sel {
+ rmii-clock-ext;
+};
+
+/* I2C Busses */
+_pinmux {
+ i2c0_pins: pinmux_i2c0 {
+ pinctrl-single,pins = <
+ 0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ clock-frequency = <40>;
+ status = "okay";
+
+ tps: pmic@2d {
+ reg = <0x2d>;
+ };
+
+ i2c_eeprom: eeprom@52 {
+ compatible = "atmel,24c32";
+ pagesize = <32>;
+ reg = <0x52>;
+ status = "disabled";
+ };
+
+ i2c_rtc: rtc@68 {
+ compatible = "rv4162";
+ reg = <0x68>;
+ status = "disabled";
+ };
+};
+
+/* NAND memory */
+_pinmux {
+ nandflash_pins: pinmux_nandflash {
+ pinctrl-single,pins = <
+ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad0.gpmc_ad0 */
+ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad1.gpmc_ad1 */
+ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad2.gpmc_ad2 */
+
[PATCH 2/2] ARM: dts: Add phyBOARD-WEGA-AM335x rdk
phyBOARD-WEGA-AM335x represents a direct soldered
combination of a phyCORE-AM335x SoM and carrier board.
Different kind of SoM options can be connected to
the wega carrier board. So we created a separate
wega dtsi file. The final dts contains the actual
SoM on the carrier board.
WEGA carrier board features:
* ETH phy on carrier board: 1x MII
* 1x CAN
* 2x UART
* USB0 (device)
* USB1 (host)
* mSD slot
Signed-off-by: Teresa Remmet
---
.../devicetree/bindings/arm/omap/omap.txt | 3 +
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/am335x-wega-rdk.dts | 22 +++
arch/arm/boot/dts/am335x-wega.dtsi | 151 +
4 files changed, 178 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/am335x-wega-rdk.dts
create mode 100644 arch/arm/boot/dts/am335x-wega.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 4f6a82c..9f4e513 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -135,6 +135,9 @@ Boards:
- AM335X OrionLXm : Substation Automation Platform
compatible = "novatech,am335x-lxm", "ti,am33xx"
+- AM335X phyBOARD-WEGA: Single Board Computer dev kit
+ compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"
+
- OMAP5 EVM : Evaluation Module
compatible = "ti,omap5-evm", "ti,omap5"
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 246473a..b6393df 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -438,7 +438,8 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-nano.dtb \
am335x-pepper.dtb \
am335x-lxm.dtb \
- am335x-chiliboard.dtb
+ am335x-chiliboard.dtb \
+ am335x-wega-rdk.dtb
dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-duovero-parlor.dtb \
omap4-panda.dtb \
diff --git a/arch/arm/boot/dts/am335x-wega-rdk.dts
b/arch/arm/boot/dts/am335x-wega-rdk.dts
new file mode 100644
index 000..6431b7d
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-rdk.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "am335x-phycore-som.dtsi"
+#include "am335x-wega.dtsi"
+
+/* SoM */
+_eeprom {
+ status = "okay";
+};
+
+_rtc {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
b/arch/arm/boot/dts/am335x-wega.dtsi
new file mode 100644
index 000..5e541bd
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ model = "Phytec AM335x phyBOARD-WEGA";
+ compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som",
"ti,am33xx";
+
+};
+
+/* CAN Busses */
+_pinmux {
+ dcan1_pins: pinmux_dcan1 {
+ pinctrl-single,pins = <
+ 0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /*
uart0_ctsn.d_can1_tx */
+ 0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /*
uart0_rtsn.d_can1_rx */
+ >;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "okay";
+};
+
+/* Ethernet */
+_pinmux {
+ ethernet1_pins: pinmux_ethernet1 {
+ pinctrl-single,pins = <
+ 0x40 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a0.mii2_txen */
+ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a1.mii2_rxdv */
+ 0x48 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a2.mii2_txd3 */
+ 0x4c (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a3.mii2_txd2 */
+ 0x50 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a4.mii2_txd1 */
+ 0x54 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a5.mii2_txd0 */
+ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a6.mii2_txclk */
+ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a7.mii2_rxclk */
+ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a8.mii2_rxd3 */
+ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a9.mii2_rxd2 */
+ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a10.mii2_rxd1 */
+ 0x6c (PIN_INPUT_PULLDOWN | MUX_M
[PATCH 2/2] ARM: dts: Add phyBOARD-WEGA-AM335x rdk
phyBOARD-WEGA-AM335x represents a direct soldered
combination of a phyCORE-AM335x SoM and carrier board.
Different kind of SoM options can be connected to
the wega carrier board. So we created a separate
wega dtsi file. The final dts contains the actual
SoM on the carrier board.
WEGA carrier board features:
* ETH phy on carrier board: 1x MII
* 1x CAN
* 2x UART
* USB0 (device)
* USB1 (host)
* mSD slot
Signed-off-by: Teresa Remmet t.rem...@phytec.de
---
.../devicetree/bindings/arm/omap/omap.txt | 3 +
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/am335x-wega-rdk.dts | 22 +++
arch/arm/boot/dts/am335x-wega.dtsi | 151 +
4 files changed, 178 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/am335x-wega-rdk.dts
create mode 100644 arch/arm/boot/dts/am335x-wega.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 4f6a82c..9f4e513 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -135,6 +135,9 @@ Boards:
- AM335X OrionLXm : Substation Automation Platform
compatible = novatech,am335x-lxm, ti,am33xx
+- AM335X phyBOARD-WEGA: Single Board Computer dev kit
+ compatible = phytec,am335x-wega, phytec,am335x-phycore-som, ti,am33xx
+
- OMAP5 EVM : Evaluation Module
compatible = ti,omap5-evm, ti,omap5
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 246473a..b6393df 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -438,7 +438,8 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-nano.dtb \
am335x-pepper.dtb \
am335x-lxm.dtb \
- am335x-chiliboard.dtb
+ am335x-chiliboard.dtb \
+ am335x-wega-rdk.dtb
dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-duovero-parlor.dtb \
omap4-panda.dtb \
diff --git a/arch/arm/boot/dts/am335x-wega-rdk.dts
b/arch/arm/boot/dts/am335x-wega-rdk.dts
new file mode 100644
index 000..6431b7d
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-rdk.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet t.rem...@phytec.de
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include am335x-phycore-som.dtsi
+#include am335x-wega.dtsi
+
+/* SoM */
+i2c_eeprom {
+ status = okay;
+};
+
+i2c_rtc {
+ status = okay;
+};
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi
b/arch/arm/boot/dts/am335x-wega.dtsi
new file mode 100644
index 000..5e541bd
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet t.rem...@phytec.de
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ model = Phytec AM335x phyBOARD-WEGA;
+ compatible = phytec,am335x-wega, phytec,am335x-phycore-som,
ti,am33xx;
+
+};
+
+/* CAN Busses */
+am33xx_pinmux {
+ dcan1_pins: pinmux_dcan1 {
+ pinctrl-single,pins =
+ 0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /*
uart0_ctsn.d_can1_tx */
+ 0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /*
uart0_rtsn.d_can1_rx */
+ ;
+ };
+};
+
+dcan1 {
+ pinctrl-names = default;
+ pinctrl-0 = dcan1_pins;
+ status = okay;
+};
+
+/* Ethernet */
+am33xx_pinmux {
+ ethernet1_pins: pinmux_ethernet1 {
+ pinctrl-single,pins =
+ 0x40 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a0.mii2_txen */
+ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a1.mii2_rxdv */
+ 0x48 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a2.mii2_txd3 */
+ 0x4c (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a3.mii2_txd2 */
+ 0x50 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a4.mii2_txd1 */
+ 0x54 (PIN_OUTPUT | MUX_MODE1) /*
gpmc_a5.mii2_txd0 */
+ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a6.mii2_txclk */
+ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a7.mii2_rxclk */
+ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a8.mii2_rxd3 */
+ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a9.mii2_rxd2 */
+ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a10.mii2_rxd1 */
+ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_a11.mii2_rxd0 */
+ 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
gpmc_wpn.mii2_rxerr
[PATCH 1/2] ARM: dts: Add support for phyCORE-AM335x SoM
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the phyCORE-AM335x.
So they are disabled on default in this som dtsi file.
They will be enabled in the board dts files, when populated.
* RAM up to 1GiB
* PMIC
* NAND flash up to 1GiB
* Eth PHY on SOM: 1x RMII
* SPI NOR flash 8MiB (optional)
* i2c RTC (optional)
* i2c EEPROM 4kiB (optional)
Signed-off-by: Teresa Remmet t.rem...@phytec.de
---
arch/arm/boot/dts/am335x-phycore-som.dtsi | 368 ++
1 file changed, 368 insertions(+)
create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi
b/arch/arm/boot/dts/am335x-phycore-som.dtsi
new file mode 100644
index 000..4d28fc3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2015 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet t.rem...@phytec.de
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include am33xx.dtsi
+
+/ {
+ model = Phytec AM335x phyCORE;
+ compatible = phytec,am335x-phycore-som, ti,am33xx;
+
+ aliases {
+ rtc0 = i2c_rtc;
+ rtc1 = rtc;
+ };
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = vdd1_reg;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x1000; /* 256 MB */
+ };
+
+ vbat: fixedregulator@0 {
+ compatible = regulator-fixed;
+ };
+};
+
+/* Crypto Module */
+aes {
+ status = okay;
+};
+
+sham {
+ status = okay;
+};
+
+/* Ethernet */
+am33xx_pinmux {
+ ethernet0_pins: pinmux_ethernet0 {
+ pinctrl-single,pins =
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_crs.rmii1_crs_dv */
+ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxerr.rmii1_rxerr */
+ 0x114 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txen.rmii1_txen */
+ 0x124 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd1.rmii1_txd1 */
+ 0x128 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd0.rmii1_txd0 */
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd1.rmii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd0.rmii1_rxd0 */
+ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
rmii1_refclk.rmii1_refclk */
+ ;
+ };
+
+ mdio_pins: pinmux_mdio {
+ pinctrl-single,pins =
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
/* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
/* mdio_clk.mdio_clk */
+ ;
+ };
+};
+
+cpsw_emac0 {
+ phy_id = davinci_mdio, 0;
+ phy-mode = rmii;
+ dual_emac_res_vlan = 1;
+};
+
+davinci_mdio {
+ pinctrl-names = default;
+ pinctrl-0 = mdio_pins;
+ status = okay;
+};
+
+mac {
+ slaves = 1;
+ pinctrl-names = default;
+ pinctrl-0 = ethernet0_pins;
+ status = okay;
+};
+
+phy_sel {
+ rmii-clock-ext;
+};
+
+/* I2C Busses */
+am33xx_pinmux {
+ i2c0_pins: pinmux_i2c0 {
+ pinctrl-single,pins =
+ 0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ ;
+ };
+};
+
+i2c0 {
+ pinctrl-names = default;
+ pinctrl-0 = i2c0_pins;
+ clock-frequency = 40;
+ status = okay;
+
+ tps: pmic@2d {
+ reg = 0x2d;
+ };
+
+ i2c_eeprom: eeprom@52 {
+ compatible = atmel,24c32;
+ pagesize = 32;
+ reg = 0x52;
+ status = disabled;
+ };
+
+ i2c_rtc: rtc@68 {
+ compatible = rv4162;
+ reg = 0x68;
+ status = disabled;
+ };
+};
+
+/* NAND memory */
+am33xx_pinmux {
+ nandflash_pins: pinmux_nandflash {
+ pinctrl-single,pins =
+ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad0.gpmc_ad0 */
+ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad1.gpmc_ad1 */
+ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad2.gpmc_ad2 */
+ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad3.gpmc_ad3 */
+ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad4.gpmc_ad4 */
+ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad5.gpmc_ad5
