Re: [RFC PATCH 6/6] char: fastrpc: Add support for compat ioctls
On 30/11/2018 14:46, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 2:20 PM Thierry Escande wrote: On 30/11/2018 13:58, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 11:48 AM Srinivas Kandagatla wrote: From: Thierry Escande This patch adds support for compat ioctl from 32 bits userland to Qualcomm fastrpc driver. Supported ioctls in this change are INIT, INVOKE, and ALLOC/FREE_DMA. Most of the work is derived from various downstream Qualcomm kernels. Credits to various Qualcomm authors who have contributed to this code. Specially Tharun Kumar Merugu Signed-off-by: Thierry Escande Signed-off-by: Srinivas Kandagatla Can't you just define the native ioctls so that you don't need this. There are long time defined structures that are passed as argument to these ioctls and their sizes vary between 32 and 64 bits userlands, so the ioctl command values. Where? I don't see them in linux-4.19. Unless I'm missing something here this also has the advantage not to be compiled if CONFIG_COMPAT is not set. You can normally just set .compat_ioctl() to the same function as .unlocked_ioctl(), and get no overhead either way. As you suggested for the other patches in this series, we will rework these ioctl data structures and then use the same function. Regards, Thierry
Re: [RFC PATCH 6/6] char: fastrpc: Add support for compat ioctls
On 30/11/2018 14:46, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 2:20 PM Thierry Escande wrote: On 30/11/2018 13:58, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 11:48 AM Srinivas Kandagatla wrote: From: Thierry Escande This patch adds support for compat ioctl from 32 bits userland to Qualcomm fastrpc driver. Supported ioctls in this change are INIT, INVOKE, and ALLOC/FREE_DMA. Most of the work is derived from various downstream Qualcomm kernels. Credits to various Qualcomm authors who have contributed to this code. Specially Tharun Kumar Merugu Signed-off-by: Thierry Escande Signed-off-by: Srinivas Kandagatla Can't you just define the native ioctls so that you don't need this. There are long time defined structures that are passed as argument to these ioctls and their sizes vary between 32 and 64 bits userlands, so the ioctl command values. Where? I don't see them in linux-4.19. Unless I'm missing something here this also has the advantage not to be compiled if CONFIG_COMPAT is not set. You can normally just set .compat_ioctl() to the same function as .unlocked_ioctl(), and get no overhead either way. As you suggested for the other patches in this series, we will rework these ioctl data structures and then use the same function. Regards, Thierry
Re: [RFC PATCH 6/6] char: fastrpc: Add support for compat ioctls
Hi Arnd, On 30/11/2018 13:58, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 11:48 AM Srinivas Kandagatla wrote: From: Thierry Escande This patch adds support for compat ioctl from 32 bits userland to Qualcomm fastrpc driver. Supported ioctls in this change are INIT, INVOKE, and ALLOC/FREE_DMA. Most of the work is derived from various downstream Qualcomm kernels. Credits to various Qualcomm authors who have contributed to this code. Specially Tharun Kumar Merugu Signed-off-by: Thierry Escande Signed-off-by: Srinivas Kandagatla Can't you just define the native ioctls so that you don't need this. There are long time defined structures that are passed as argument to these ioctls and their sizes vary between 32 and 64 bits userlands, so the ioctl command values. Unless I'm missing something here this also has the advantage not to be compiled if CONFIG_COMPAT is not set. Regards, Thierry
Re: [RFC PATCH 6/6] char: fastrpc: Add support for compat ioctls
Hi Arnd, On 30/11/2018 13:58, Arnd Bergmann wrote: On Fri, Nov 30, 2018 at 11:48 AM Srinivas Kandagatla wrote: From: Thierry Escande This patch adds support for compat ioctl from 32 bits userland to Qualcomm fastrpc driver. Supported ioctls in this change are INIT, INVOKE, and ALLOC/FREE_DMA. Most of the work is derived from various downstream Qualcomm kernels. Credits to various Qualcomm authors who have contributed to this code. Specially Tharun Kumar Merugu Signed-off-by: Thierry Escande Signed-off-by: Srinivas Kandagatla Can't you just define the native ioctls so that you don't need this. There are long time defined structures that are passed as argument to these ioctls and their sizes vary between 32 and 64 bits userlands, so the ioctl command values. Unless I'm missing something here this also has the advantage not to be compiled if CONFIG_COMPAT is not set. Regards, Thierry
Re: [lkp-robot] ee410f15b1 BUG: kernel hang in boot stage
On 03/07/2018 04:51, kernel test robot wrote: Greetings, 0day kernel testing robot got the below dmesg and the first bad commit is https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master commit ee410f15b1418f2f4428e79980674c979081bcb7 Author: Thierry Escande AuthorDate: Thu Jun 14 15:28:15 2018 -0700 Commit: Linus Torvalds CommitDate: Fri Jun 15 07:55:25 2018 +0900 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests This patch is already reverted in Linus tree. It's also been superseded in linux-next by a new version. Regards, Thierry If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain '(ptrval)' instead. This patch adds a call to wait_for_random_bytes() before plain 'p' tests to make sure the crng is initialized. Link: http://lkml.kernel.org/r/20180604113708.11554-1-thierry.esca...@linaro.org Signed-off-by: Thierry Escande Acked-by: Tobin C. Harding Reviewed-by: Andrew Morton Cc: David Miller Cc: Rasmus Villemoes Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds 608dbdfb1f hexagon: drop the unused variable zero_page_mask ee410f15b1 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests 883c9ab9eb Merge branch 'parisc-4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux e3c7283c19 Add linux-next specific files for 20180629 +---++++---+ | | 608dbdfb1f | ee410f15b1 | 883c9ab9eb | next-20180629 | +---++++---+ | boot_successes| 35 | 0 | 19 | 13 | | boot_failures | 0 | 15 || | | BUG:kernel_hang_in_boot_stage | 0 | 15 || | +---++++---+ [9.488584] - [9.491008] Testing concurrent rhashtable access from 10 threads [ 21.577749] test 3125 add/delete pairs into rhlist [ 21.734553] test 3125 random rhlist add/delete operations [ 21.813107] Started 10 threads, 0 failed, rhltable test returns 0 BUG: kernel hang in boot stage # HH:MM RESULT GOOD BAD GOOD_BUT_DIRTY DIRTY_NOT_BAD git bisect start 7daf201d7fe8334e2d2364d4e8ed3394ec9af819 v4.17 -- git bisect good a16afaf7928b74c30a4727cdcaa67bd10675a55d # 08:00 G 11 00 0 Merge tag 'for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply git bisect good dc594c39f7a9dcdfd5dbb1a446ac6d06182e2472 # 08:13 G 11 00 0 Merge tag 'ceph-for-4.18-rc1' of git://github.com/ceph/ceph-client git bisect bad 81e97f01371f4e1701feeafe484665112cd9ddc2 # 08:33 B 0 1 15 0 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid git bisect bad 35773c93817c5f2df264d013978e7551056a063a # 08:55 B 0 1 15 0 Merge branch 'afs-proc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs git bisect bad 8949170cf48e91da7e4e69a59e2842d81d9a5885 # 09:26 B 0 1 15 0 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm git bisect bad becfc5e97cbab00b25a592aabc36838ec7217d1f # 09:49 B 0 10 24 0 Merge tag 'drm-next-2018-06-15' of git://anongit.freedesktop.org/drm/drm git bisect good 7a932516f55cdf430c7cce78df2010ff7db6b874 # 10:21 G 11 00 0 Merge tag 'vfs-timespec64' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/playground git bisect bad b5d903c2d656e9bc54bc76554a477d796a63120d # 10:44 B 0 1 15 0 Merge branch 'akpm' (patches from Andrew) git bisect good 3fb3894b84c2e0f83cb1e4f4e960243742e6b3a6 # 11:06 G 10 00 0 kernel/relay.c: change return type to vm_fault_t git bisect good 14f28f5776927be30717986f86b765d49eec392c # 11:20 G 10 00 0 ipc: use new return type vm_fault_t git bisect good fe6bdfc8e1e131720abbe77a2eb990c94c9024cb # 11:44 G 10 00 0 mm: fix oom_kill event handling git bisect good 608dbdfb1f0299f4500e56d62b0d84c44dcfa3be # 11:56 G 11 00 0 hexagon: drop the unused variable zero_page_mask git bisect bad ee410f15b1418f2f4428e79980674c979081bcb7 # 12:16 B 0 1 15 0 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests # first bad commit: [ee410f15b1418f2f4428e79980674c979081bcb7] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests git bisect good 608dbdfb1f0299f4500e56d62b0d84c44dcfa3be # 12:42 G 30 00 0 hexagon: drop
Re: [lkp-robot] ee410f15b1 BUG: kernel hang in boot stage
On 03/07/2018 04:51, kernel test robot wrote: Greetings, 0day kernel testing robot got the below dmesg and the first bad commit is https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master commit ee410f15b1418f2f4428e79980674c979081bcb7 Author: Thierry Escande AuthorDate: Thu Jun 14 15:28:15 2018 -0700 Commit: Linus Torvalds CommitDate: Fri Jun 15 07:55:25 2018 +0900 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests This patch is already reverted in Linus tree. It's also been superseded in linux-next by a new version. Regards, Thierry If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain '(ptrval)' instead. This patch adds a call to wait_for_random_bytes() before plain 'p' tests to make sure the crng is initialized. Link: http://lkml.kernel.org/r/20180604113708.11554-1-thierry.esca...@linaro.org Signed-off-by: Thierry Escande Acked-by: Tobin C. Harding Reviewed-by: Andrew Morton Cc: David Miller Cc: Rasmus Villemoes Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds 608dbdfb1f hexagon: drop the unused variable zero_page_mask ee410f15b1 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests 883c9ab9eb Merge branch 'parisc-4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux e3c7283c19 Add linux-next specific files for 20180629 +---++++---+ | | 608dbdfb1f | ee410f15b1 | 883c9ab9eb | next-20180629 | +---++++---+ | boot_successes| 35 | 0 | 19 | 13 | | boot_failures | 0 | 15 || | | BUG:kernel_hang_in_boot_stage | 0 | 15 || | +---++++---+ [9.488584] - [9.491008] Testing concurrent rhashtable access from 10 threads [ 21.577749] test 3125 add/delete pairs into rhlist [ 21.734553] test 3125 random rhlist add/delete operations [ 21.813107] Started 10 threads, 0 failed, rhltable test returns 0 BUG: kernel hang in boot stage # HH:MM RESULT GOOD BAD GOOD_BUT_DIRTY DIRTY_NOT_BAD git bisect start 7daf201d7fe8334e2d2364d4e8ed3394ec9af819 v4.17 -- git bisect good a16afaf7928b74c30a4727cdcaa67bd10675a55d # 08:00 G 11 00 0 Merge tag 'for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply git bisect good dc594c39f7a9dcdfd5dbb1a446ac6d06182e2472 # 08:13 G 11 00 0 Merge tag 'ceph-for-4.18-rc1' of git://github.com/ceph/ceph-client git bisect bad 81e97f01371f4e1701feeafe484665112cd9ddc2 # 08:33 B 0 1 15 0 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid git bisect bad 35773c93817c5f2df264d013978e7551056a063a # 08:55 B 0 1 15 0 Merge branch 'afs-proc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs git bisect bad 8949170cf48e91da7e4e69a59e2842d81d9a5885 # 09:26 B 0 1 15 0 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm git bisect bad becfc5e97cbab00b25a592aabc36838ec7217d1f # 09:49 B 0 10 24 0 Merge tag 'drm-next-2018-06-15' of git://anongit.freedesktop.org/drm/drm git bisect good 7a932516f55cdf430c7cce78df2010ff7db6b874 # 10:21 G 11 00 0 Merge tag 'vfs-timespec64' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/playground git bisect bad b5d903c2d656e9bc54bc76554a477d796a63120d # 10:44 B 0 1 15 0 Merge branch 'akpm' (patches from Andrew) git bisect good 3fb3894b84c2e0f83cb1e4f4e960243742e6b3a6 # 11:06 G 10 00 0 kernel/relay.c: change return type to vm_fault_t git bisect good 14f28f5776927be30717986f86b765d49eec392c # 11:20 G 10 00 0 ipc: use new return type vm_fault_t git bisect good fe6bdfc8e1e131720abbe77a2eb990c94c9024cb # 11:44 G 10 00 0 mm: fix oom_kill event handling git bisect good 608dbdfb1f0299f4500e56d62b0d84c44dcfa3be # 11:56 G 11 00 0 hexagon: drop the unused variable zero_page_mask git bisect bad ee410f15b1418f2f4428e79980674c979081bcb7 # 12:16 B 0 1 15 0 lib/test_printf.c: call wait_for_random_bytes() before plain %p tests # first bad commit: [ee410f15b1418f2f4428e79980674c979081bcb7] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests git bisect good 608dbdfb1f0299f4500e56d62b0d84c44dcfa3be # 12:42 G 30 00 0 hexagon: drop
Re: [PATCH v10 00/14] Krait clocks + Krait CPUfreq
Hi Sricharan, On 19/06/2018 15:45, Sricharan R wrote: Sricharan R (2): clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: cpufreq: Document operating-points-v2-krait-cpu Stephen Boyd (12): ARM: Add Krait L2 register accessor functions clk: qcom: Add support for High-Frequency PLLs (HFPLLs) clk: qcom: Add HFPLL driver dt-bindings: clock: Document qcom,hfpll clk: qcom: Add MSM8960/APQ8064's HFPLLs clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add support for Krait clocks clk: qcom: Add KPSS ACC/GCC driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add Krait clock controller driver dt-bindings: clock: Document qcom,krait-cc cpufreq: Add module to register cpufreq on Krait CPUs Tested on apq8064 (db600c). Tested-By: Thierry Escande Best regards, Thierry
Re: [PATCH v10 00/14] Krait clocks + Krait CPUfreq
Hi Sricharan, On 19/06/2018 15:45, Sricharan R wrote: Sricharan R (2): clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: cpufreq: Document operating-points-v2-krait-cpu Stephen Boyd (12): ARM: Add Krait L2 register accessor functions clk: qcom: Add support for High-Frequency PLLs (HFPLLs) clk: qcom: Add HFPLL driver dt-bindings: clock: Document qcom,hfpll clk: qcom: Add MSM8960/APQ8064's HFPLLs clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add support for Krait clocks clk: qcom: Add KPSS ACC/GCC driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add Krait clock controller driver dt-bindings: clock: Document qcom,krait-cc cpufreq: Add module to register cpufreq on Krait CPUs Tested on apq8064 (db600c). Tested-By: Thierry Escande Best regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 22/06/2018 22:53, Steven Rostedt wrote:
On Thu, Jun 07, 2018 at 02:24:34PM +0200, Petr Mladek wrote:
On Mon 2018-06-04 13:37:08, Thierry Escande wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Hmm, my system did not boot with this patch and
CONFIG_TEST_PRINTF=y
And neither does my test box. It killed my tests I was running, as one of the
configs I test has this set.
It appears that Andrew pulled it in and sent it to Linus, as it is in
4.18-rc1, and I need to now revert this patch to make my tests work.
This patch has been superseded with a v2 and a v3 pushed into Petr
printk.git tree
(https://git.kernel.org/pub/scm/linux/kernel/git/pmladek/printk.git/commit/?h=for-4.19=ce041c43f22298485122bab15c14d062383fbc67).
Sorry for the mess...
Regards,
Thierry
-- Steve
I guess that there was not enough entropy. It is basically a deadlock.
The build-in module init calls are called when SMP is enabled but
there is no real activity and the init calls are called sequentially.
Therefore there is nothing that could produce some entropy, ...
I suggest to skip the test when crng is not ready.
Best Regards,
Petr
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 22/06/2018 22:53, Steven Rostedt wrote:
On Thu, Jun 07, 2018 at 02:24:34PM +0200, Petr Mladek wrote:
On Mon 2018-06-04 13:37:08, Thierry Escande wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Hmm, my system did not boot with this patch and
CONFIG_TEST_PRINTF=y
And neither does my test box. It killed my tests I was running, as one of the
configs I test has this set.
It appears that Andrew pulled it in and sent it to Linus, as it is in
4.18-rc1, and I need to now revert this patch to make my tests work.
This patch has been superseded with a v2 and a v3 pushed into Petr
printk.git tree
(https://git.kernel.org/pub/scm/linux/kernel/git/pmladek/printk.git/commit/?h=for-4.19=ce041c43f22298485122bab15c14d062383fbc67).
Sorry for the mess...
Regards,
Thierry
-- Steve
I guess that there was not enough entropy. It is basically a deadlock.
The build-in module init calls are called when SMP is enabled but
there is no real activity and the init calls are called sequentially.
Therefore there is nothing that could produce some entropy, ...
I suggest to skip the test when crng is not ready.
Best Regards,
Petr
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH v3] lib/test_printf.c: accept "ptrval" as valid result for plain 'p' tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" or "(ptrval)" instead
(64-bit vs 32-bit).
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the strings "(ptrval)" or
"(ptrval)" as a valid result and print a warning message.
Signed-off-by: Thierry Escande
---
Changes in v3:
- Use "(ptrval)" for 64-bit
- Update commit message headline
Changes in v2:
- Remove wait_for_random_bytes() usage
- Remove Acked-by from Tobin as the proposed solution is not the same
anymore.
lib/test_printf.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..31f00b8ca657 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -206,6 +206,7 @@ test_string(void)
#define PTR_WIDTH 16
#define PTR ((void *)0x0123456789ab)
#define PTR_STR "0123456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
#define ZEROS "" /* hex 32 zero bits */
static int __init
@@ -216,7 +217,16 @@ plain_format(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
return -1;
return 0;
@@ -227,6 +237,7 @@ plain_format(void)
#define PTR_WIDTH 8
#define PTR ((void *)0x456789ab)
#define PTR_STR "456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
static int __init
plain_format(void)
@@ -245,7 +256,16 @@ plain_hash(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
return -1;
return 0;
--
2.14.1
[PATCH v3] lib/test_printf.c: accept "ptrval" as valid result for plain 'p' tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" or "(ptrval)" instead
(64-bit vs 32-bit).
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the strings "(ptrval)" or
"(ptrval)" as a valid result and print a warning message.
Signed-off-by: Thierry Escande
---
Changes in v3:
- Use "(ptrval)" for 64-bit
- Update commit message headline
Changes in v2:
- Remove wait_for_random_bytes() usage
- Remove Acked-by from Tobin as the proposed solution is not the same
anymore.
lib/test_printf.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..31f00b8ca657 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -206,6 +206,7 @@ test_string(void)
#define PTR_WIDTH 16
#define PTR ((void *)0x0123456789ab)
#define PTR_STR "0123456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
#define ZEROS "" /* hex 32 zero bits */
static int __init
@@ -216,7 +217,16 @@ plain_format(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
return -1;
return 0;
@@ -227,6 +237,7 @@ plain_format(void)
#define PTR_WIDTH 8
#define PTR ((void *)0x456789ab)
#define PTR_STR "456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
static int __init
plain_format(void)
@@ -245,7 +256,16 @@ plain_hash(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
return -1;
return 0;
--
2.14.1
Re: [PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 13/06/2018 18:30, Andy Shevchenko wrote:
On Wed, Jun 13, 2018 at 5:59 PM, Thierry Escande
wrote:
On 13/06/2018 13:22, Andy Shevchenko wrote:
On Wed, Jun 13, 2018 at 12:29 PM, Thierry Escande
wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" instead.
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the string "(ptrval)" as a valid
result and print a warning message.
There are two possibilities:
1. (ptrval) for 32-bit case
2. (ptrval) for 64-bit case.
From lib/vsprintf.c, ptr_to_id() puts "(ptrval)" into the buffer, then it
gets left-padded with spaces by widen_string().
Which kernel version you are trying to fix?
What I see for a long time in linux-next:
static char *ptr_to_id(char *buf, char *end, void *ptr, struct printf_spec spec)
{
const char *str = sizeof(ptr) == 8 ? "(ptrval)" : "(ptrval)";
...
brought by the commit 91efafb1dd8f ("lib/vsprintf: Replace space with
'_' before crng is ready").
I missed that one as it's not in v4.17. My bad.
Regards,
Thierry
Re: [PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 13/06/2018 18:30, Andy Shevchenko wrote:
On Wed, Jun 13, 2018 at 5:59 PM, Thierry Escande
wrote:
On 13/06/2018 13:22, Andy Shevchenko wrote:
On Wed, Jun 13, 2018 at 12:29 PM, Thierry Escande
wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" instead.
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the string "(ptrval)" as a valid
result and print a warning message.
There are two possibilities:
1. (ptrval) for 32-bit case
2. (ptrval) for 64-bit case.
From lib/vsprintf.c, ptr_to_id() puts "(ptrval)" into the buffer, then it
gets left-padded with spaces by widen_string().
Which kernel version you are trying to fix?
What I see for a long time in linux-next:
static char *ptr_to_id(char *buf, char *end, void *ptr, struct printf_spec spec)
{
const char *str = sizeof(ptr) == 8 ? "(ptrval)" : "(ptrval)";
...
brought by the commit 91efafb1dd8f ("lib/vsprintf: Replace space with
'_' before crng is ready").
I missed that one as it's not in v4.17. My bad.
Regards,
Thierry
Re: [PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 13/06/2018 13:22, Andy Shevchenko wrote: On Wed, Jun 13, 2018 at 12:29 PM, Thierry Escande wrote: If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain "(ptrval)" instead. Since we cannot wait for the crng to be initialized for an undefined time, both plain 'p' tests now accept the string "(ptrval)" as a valid result and print a warning message. There are two possibilities: 1. (ptrval) for 32-bit case 2. (ptrval) for 64-bit case. From lib/vsprintf.c, ptr_to_id() puts "(ptrval)" into the buffer, then it gets left-padded with spaces by widen_string(). Regards, Thierry
Re: [PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 13/06/2018 13:22, Andy Shevchenko wrote: On Wed, Jun 13, 2018 at 12:29 PM, Thierry Escande wrote: If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain "(ptrval)" instead. Since we cannot wait for the crng to be initialized for an undefined time, both plain 'p' tests now accept the string "(ptrval)" as a valid result and print a warning message. There are two possibilities: 1. (ptrval) for 32-bit case 2. (ptrval) for 64-bit case. From lib/vsprintf.c, ptr_to_id() puts "(ptrval)" into the buffer, then it gets left-padded with spaces by widen_string(). Regards, Thierry
[PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" instead.
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the string "(ptrval)" as a valid
result and print a warning message.
Signed-off-by: Thierry Escande
---
Change in v2:
- Remove wait_for_random_bytes() usage
- Removed Acked-by from Tobin as the proposed solution is not the same
anymore.
lib/test_printf.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..a625e3749566 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -206,6 +206,7 @@ test_string(void)
#define PTR_WIDTH 16
#define PTR ((void *)0x0123456789ab)
#define PTR_STR "0123456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
#define ZEROS "" /* hex 32 zero bits */
static int __init
@@ -216,7 +217,16 @@ plain_format(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
return -1;
return 0;
@@ -227,6 +237,7 @@ plain_format(void)
#define PTR_WIDTH 8
#define PTR ((void *)0x456789ab)
#define PTR_STR "456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
static int __init
plain_format(void)
@@ -245,7 +256,16 @@ plain_hash(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
return -1;
return 0;
--
2.14.1
[PATCH v2] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" instead.
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept the string "(ptrval)" as a valid
result and print a warning message.
Signed-off-by: Thierry Escande
---
Change in v2:
- Remove wait_for_random_bytes() usage
- Removed Acked-by from Tobin as the proposed solution is not the same
anymore.
lib/test_printf.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..a625e3749566 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -206,6 +206,7 @@ test_string(void)
#define PTR_WIDTH 16
#define PTR ((void *)0x0123456789ab)
#define PTR_STR "0123456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
#define ZEROS "" /* hex 32 zero bits */
static int __init
@@ -216,7 +217,16 @@ plain_format(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, ZEROS, strlen(ZEROS)) != 0)
return -1;
return 0;
@@ -227,6 +237,7 @@ plain_format(void)
#define PTR_WIDTH 8
#define PTR ((void *)0x456789ab)
#define PTR_STR "456789ab"
+#define PTR_VAL_NO_CRNG "(ptrval)"
static int __init
plain_format(void)
@@ -245,7 +256,16 @@ plain_hash(void)
nchars = snprintf(buf, PLAIN_BUF_SIZE, "%p", PTR);
- if (nchars != PTR_WIDTH || strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
+ if (nchars != PTR_WIDTH)
+ return -1;
+
+ if (strncmp(buf, PTR_VAL_NO_CRNG, PTR_WIDTH) == 0) {
+ pr_warn("crng possibly not yet initialized. plain 'p' buffer
contains \"%s\"",
+ PTR_VAL_NO_CRNG);
+ return 0;
+ }
+
+ if (strncmp(buf, PTR_STR, PTR_WIDTH) == 0)
return -1;
return 0;
--
2.14.1
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 13:22, Petr Mladek wrote: On Fri 2018-06-08 12:32:33, Thierry Escande wrote: On 08/06/2018 11:46, Andy Shevchenko wrote: On Fri, Jun 8, 2018 at 12:07 PM, Thierry Escande wrote: But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Unfortunately I can't support this as is. We have environments where crng will be ready minutes after the boot. It's unacceptable. So, we need to have means to not delay test for so long. I agree we can't delay test execution for too long. In my case the crng is ready only a few seconds after the boot. So we may just skip this plain 'p' printf test if crng is not ready then. Alternative solution would be to accept const char *str = sizeof(ptr) == 8 ? "(ptrval)" : "(ptrval)"; as a valid result. It would make sense to print some warning in that case. In each case, it would look ugly to use add_random_ready_callback() wihtout passing a callback. If you really needed to check crng_ready(), it would be better to make it public. Agree but even with crng_ready() public we would have to block the test until it's ready which is not good either. Accepting "(ptrval)" as a valid result seems the least bad alternative... Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 13:22, Petr Mladek wrote: On Fri 2018-06-08 12:32:33, Thierry Escande wrote: On 08/06/2018 11:46, Andy Shevchenko wrote: On Fri, Jun 8, 2018 at 12:07 PM, Thierry Escande wrote: But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Unfortunately I can't support this as is. We have environments where crng will be ready minutes after the boot. It's unacceptable. So, we need to have means to not delay test for so long. I agree we can't delay test execution for too long. In my case the crng is ready only a few seconds after the boot. So we may just skip this plain 'p' printf test if crng is not ready then. Alternative solution would be to accept const char *str = sizeof(ptr) == 8 ? "(ptrval)" : "(ptrval)"; as a valid result. It would make sense to print some warning in that case. In each case, it would look ugly to use add_random_ready_callback() wihtout passing a callback. If you really needed to check crng_ready(), it would be better to make it public. Agree but even with crng_ready() public we would have to block the test until it's ready which is not good either. Accepting "(ptrval)" as a valid result seems the least bad alternative... Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 11:46, Andy Shevchenko wrote: On Fri, Jun 8, 2018 at 12:07 PM, Thierry Escande wrote: But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Unfortunately I can't support this as is. We have environments where crng will be ready minutes after the boot. It's unacceptable. So, we need to have means to not delay test for so long. I agree we can't delay test execution for too long. In my case the crng is ready only a few seconds after the boot. So we may just skip this plain 'p' printf test if crng is not ready then. Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 11:46, Andy Shevchenko wrote: On Fri, Jun 8, 2018 at 12:07 PM, Thierry Escande wrote: But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Unfortunately I can't support this as is. We have environments where crng will be ready minutes after the boot. It's unacceptable. So, we need to have means to not delay test for so long. I agree we can't delay test execution for too long. In my case the crng is ready only a few seconds after the boot. So we may just skip this plain 'p' printf test if crng is not ready then. Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 10:04, Petr Mladek wrote: On Thu 2018-06-07 20:47:25, Thierry Escande wrote: Hi Petr, On 07/06/2018 14:24, Petr Mladek wrote: On Mon 2018-06-04 13:37:08, Thierry Escande wrote: If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain '(ptrval)' instead. This patch adds a call to wait_for_random_bytes() before plain 'p' tests to make sure the crng is initialized. Hmm, my system did not boot with this patch and CONFIG_TEST_PRINTF=y I guess that there was not enough entropy. It is basically a deadlock. The build-in module init calls are called when SMP is enabled but there is no real activity and the init calls are called sequentially. Therefore there is nothing that could produce some entropy, ... I suggest to skip the test when crng is not ready. Thanks for pointing this out. The issue is that the crng_ready() is not available outside of random.c. I'll leave the call to wait_for_random_bytes() if test_printf is compiled as a module and use add_random_ready_callback() to check if crng is initialized otherwise. Does that sound ok to you? Great, I was not aware of add_random_ready_callback(). I suggest to make the decision in test_printf_init() and run all tests either as the callback or immediately. The run_kselftest.sh script relies on the error code returned by modprobe to check if the test is passed or not. So the init function has to return the test results and we cannot defer the test execution in the random ready callback if the crng is not yet initialized at __init. My idea was to use add_random_ready_callback() as a non blocking test when compiled built-in as it returns -EALREADY if crng is already initialized. But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
On 08/06/2018 10:04, Petr Mladek wrote: On Thu 2018-06-07 20:47:25, Thierry Escande wrote: Hi Petr, On 07/06/2018 14:24, Petr Mladek wrote: On Mon 2018-06-04 13:37:08, Thierry Escande wrote: If the test_printf module is loaded before the crng is initialized, the plain 'p' tests will fail because the printed address will not be hashed and the buffer will contain '(ptrval)' instead. This patch adds a call to wait_for_random_bytes() before plain 'p' tests to make sure the crng is initialized. Hmm, my system did not boot with this patch and CONFIG_TEST_PRINTF=y I guess that there was not enough entropy. It is basically a deadlock. The build-in module init calls are called when SMP is enabled but there is no real activity and the init calls are called sequentially. Therefore there is nothing that could produce some entropy, ... I suggest to skip the test when crng is not ready. Thanks for pointing this out. The issue is that the crng_ready() is not available outside of random.c. I'll leave the call to wait_for_random_bytes() if test_printf is compiled as a module and use add_random_ready_callback() to check if crng is initialized otherwise. Does that sound ok to you? Great, I was not aware of add_random_ready_callback(). I suggest to make the decision in test_printf_init() and run all tests either as the callback or immediately. The run_kselftest.sh script relies on the error code returned by modprobe to check if the test is passed or not. So the init function has to return the test results and we cannot defer the test execution in the random ready callback if the crng is not yet initialized at __init. My idea was to use add_random_ready_callback() as a non blocking test when compiled built-in as it returns -EALREADY if crng is already initialized. But as I type I realize it's not necessary. I will simply enclose the call to wait_for_random_bytes() by #if IS_MODULE() #endif so it gets called only if built as a module, which is how run_kselftest.sh wants it... If test_printf is compiled built-in and the crng is not yet initialized the test will fail anyway so there is no need to add an extra check. Regards, Thierry
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
Hi Petr,
On 07/06/2018 14:24, Petr Mladek wrote:
On Mon 2018-06-04 13:37:08, Thierry Escande wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Hmm, my system did not boot with this patch and
CONFIG_TEST_PRINTF=y
I guess that there was not enough entropy. It is basically a deadlock.
The build-in module init calls are called when SMP is enabled but
there is no real activity and the init calls are called sequentially.
Therefore there is nothing that could produce some entropy, ...
I suggest to skip the test when crng is not ready.
Thanks for pointing this out.
The issue is that the crng_ready() is not available outside of random.c.
I'll leave the call to wait_for_random_bytes() if test_printf is
compiled as a module and use add_random_ready_callback() to check if
crng is initialized otherwise. Does that sound ok to you?
Regards,
Thierry
Best Regards,
Petr
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
Re: [PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
Hi Petr,
On 07/06/2018 14:24, Petr Mladek wrote:
On Mon 2018-06-04 13:37:08, Thierry Escande wrote:
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Hmm, my system did not boot with this patch and
CONFIG_TEST_PRINTF=y
I guess that there was not enough entropy. It is basically a deadlock.
The build-in module init calls are called when SMP is enabled but
there is no real activity and the init calls are called sequentially.
Therefore there is nothing that could produce some entropy, ...
I suggest to skip the test when crng is not ready.
Thanks for pointing this out.
The issue is that the crng_ready() is not available outside of random.c.
I'll leave the call to wait_for_random_bytes() if test_printf is
compiled as a module and use add_random_ready_callback() to check if
crng is initialized otherwise. Does that sound ok to you?
Regards,
Thierry
Best Regards,
Petr
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH RESEND] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Signed-off-by: Thierry Escande
Acked-by: Tobin C. Harding
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH] Bluetooth: hci_qca: Fix "Sleep inside atomic section" warning
This patch fixes the following warning during boot: do not call blocking ops when !TASK_RUNNING; state=1 set at [<(ptrval)>] qca_setup+0x194/0x750 [hci_uart] WARNING: CPU: 2 PID: 1878 at kernel/sched/core.c:6135 __might_sleep+0x7c/0x88 In qca_set_baudrate(), the current task state is set to TASK_UNINTERRUPTIBLE before going to sleep for 300ms. It was then restored to TASK_INTERRUPTIBLE. This patch sets the current task state back to TASK_RUNNING instead. Signed-off-by: Thierry Escande --- drivers/bluetooth/hci_qca.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c index f05382b5a65d..51790dd02afb 100644 --- a/drivers/bluetooth/hci_qca.c +++ b/drivers/bluetooth/hci_qca.c @@ -910,7 +910,7 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) */ set_current_state(TASK_UNINTERRUPTIBLE); schedule_timeout(msecs_to_jiffies(BAUDRATE_SETTLE_TIMEOUT_MS)); - set_current_state(TASK_INTERRUPTIBLE); + set_current_state(TASK_RUNNING); return 0; } -- 2.14.1
[PATCH] Bluetooth: hci_qca: Fix "Sleep inside atomic section" warning
This patch fixes the following warning during boot: do not call blocking ops when !TASK_RUNNING; state=1 set at [<(ptrval)>] qca_setup+0x194/0x750 [hci_uart] WARNING: CPU: 2 PID: 1878 at kernel/sched/core.c:6135 __might_sleep+0x7c/0x88 In qca_set_baudrate(), the current task state is set to TASK_UNINTERRUPTIBLE before going to sleep for 300ms. It was then restored to TASK_INTERRUPTIBLE. This patch sets the current task state back to TASK_RUNNING instead. Signed-off-by: Thierry Escande --- drivers/bluetooth/hci_qca.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c index f05382b5a65d..51790dd02afb 100644 --- a/drivers/bluetooth/hci_qca.c +++ b/drivers/bluetooth/hci_qca.c @@ -910,7 +910,7 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) */ set_current_state(TASK_UNINTERRUPTIBLE); schedule_timeout(msecs_to_jiffies(BAUDRATE_SETTLE_TIMEOUT_MS)); - set_current_state(TASK_INTERRUPTIBLE); + set_current_state(TASK_RUNNING); return 0; } -- 2.14.1
[PATCH v2] arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
This patch removes the unused bt-en-1-8v regulator and moves the
bt_en_gios claim to the pm8994_gpios node.
This bt_en_gpio could have been moved to the bluetooth serial node but
instead this node declares an 'enable' gpio addressing the bt_en_gpio.
This is needed by the Qualcomm QCA6174 WLAN/BT combo chip that needs to
have the bt_en_gpio claimed even if only WLAN is used.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
Change in v2:
- Rebased on top of [1] posted a few days ago:
[1] https://lkml.org/lkml/2018/5/22/949
"arm64: dts: fix regulator property name for wlan pcie endpoint"
arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 --
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 6167af955659..a6ad3d7fe655 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -4,7 +4,7 @@
_gpios {
pinctrl-names = "default";
- pinctrl-0 = <_exp_gpio_f>;
+ pinctrl-0 = <_exp_gpio_f _en_gpios>;
ls_exp_gpio_f: pm8994_gpio5 {
pinconf {
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 7ca6e78def55..2c026b8af792 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -171,19 +171,6 @@
pinctrl-0 = <_vbus_det_gpio>;
};
- bt_en: bt-en-1-8v {
- pinctrl-names = "default";
- pinctrl-0 = <_en_gpios>;
- compatible = "regulator-fixed";
- regulator-name = "bt-en-regulator";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
-
- /* WLAN card specific delay */
- startup-delay-us = <7>;
- enable-active-high;
- };
-
wlan_en: wlan-en-1-8v {
pinctrl-names = "default";
pinctrl-0 = <_en_gpios>;
@@ -204,7 +191,6 @@
status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <_en>;
- vddpe1-supply = <_en>;
};
pcie@608000 {
--
2.14.1
[PATCH v2] arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
This patch removes the unused bt-en-1-8v regulator and moves the
bt_en_gios claim to the pm8994_gpios node.
This bt_en_gpio could have been moved to the bluetooth serial node but
instead this node declares an 'enable' gpio addressing the bt_en_gpio.
This is needed by the Qualcomm QCA6174 WLAN/BT combo chip that needs to
have the bt_en_gpio claimed even if only WLAN is used.
Signed-off-by: Thierry Escande
---
Change in v2:
- Rebased on top of [1] posted a few days ago:
[1] https://lkml.org/lkml/2018/5/22/949
"arm64: dts: fix regulator property name for wlan pcie endpoint"
arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 --
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 6167af955659..a6ad3d7fe655 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -4,7 +4,7 @@
_gpios {
pinctrl-names = "default";
- pinctrl-0 = <_exp_gpio_f>;
+ pinctrl-0 = <_exp_gpio_f _en_gpios>;
ls_exp_gpio_f: pm8994_gpio5 {
pinconf {
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 7ca6e78def55..2c026b8af792 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -171,19 +171,6 @@
pinctrl-0 = <_vbus_det_gpio>;
};
- bt_en: bt-en-1-8v {
- pinctrl-names = "default";
- pinctrl-0 = <_en_gpios>;
- compatible = "regulator-fixed";
- regulator-name = "bt-en-regulator";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
-
- /* WLAN card specific delay */
- startup-delay-us = <7>;
- enable-active-high;
- };
-
wlan_en: wlan-en-1-8v {
pinctrl-names = "default";
pinctrl-0 = <_en_gpios>;
@@ -204,7 +191,6 @@
status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <_en>;
- vddpe1-supply = <_en>;
};
pcie@608000 {
--
2.14.1
[PATCH] arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
This patch removes the unused bt-en-1-8v regulator and moves the
bt_en_gios claim to the pm8994_gpios node.
This bt_en_gpio could have been moved to the bluetooth serial node but
instead this node declares an 'enable' gpio addressing the bt_en_gpio.
This is needed by the Qualcomm QCA6174 WLAN/BT combo chip that needs to
have the bt_en_gpio claimed even if only WLAN is used.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 --
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 6167af955659..a6ad3d7fe655 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -4,7 +4,7 @@
_gpios {
pinctrl-names = "default";
- pinctrl-0 = <_exp_gpio_f>;
+ pinctrl-0 = <_exp_gpio_f _en_gpios>;
ls_exp_gpio_f: pm8994_gpio5 {
pinconf {
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 8be666ea92bd..affd4486e10e 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -171,19 +171,6 @@
pinctrl-0 = <_vbus_det_gpio>;
};
- bt_en: bt-en-1-8v {
- pinctrl-names = "default";
- pinctrl-0 = <_en_gpios>;
- compatible = "regulator-fixed";
- regulator-name = "bt-en-regulator";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
-
- /* WLAN card specific delay */
- startup-delay-us = <7>;
- enable-active-high;
- };
-
wlan_en: wlan-en-1-8v {
pinctrl-names = "default";
pinctrl-0 = <_en_gpios>;
@@ -204,7 +191,6 @@
status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
vddpe-supply = <_en>;
- vddpe1-supply = <_en>;
};
pcie@608000 {
--
2.14.1
[PATCH] arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
This patch removes the unused bt-en-1-8v regulator and moves the
bt_en_gios claim to the pm8994_gpios node.
This bt_en_gpio could have been moved to the bluetooth serial node but
instead this node declares an 'enable' gpio addressing the bt_en_gpio.
This is needed by the Qualcomm QCA6174 WLAN/BT combo chip that needs to
have the bt_en_gpio claimed even if only WLAN is used.
Signed-off-by: Thierry Escande
---
arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 --
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 6167af955659..a6ad3d7fe655 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -4,7 +4,7 @@
_gpios {
pinctrl-names = "default";
- pinctrl-0 = <_exp_gpio_f>;
+ pinctrl-0 = <_exp_gpio_f _en_gpios>;
ls_exp_gpio_f: pm8994_gpio5 {
pinconf {
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 8be666ea92bd..affd4486e10e 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -171,19 +171,6 @@
pinctrl-0 = <_vbus_det_gpio>;
};
- bt_en: bt-en-1-8v {
- pinctrl-names = "default";
- pinctrl-0 = <_en_gpios>;
- compatible = "regulator-fixed";
- regulator-name = "bt-en-regulator";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
-
- /* WLAN card specific delay */
- startup-delay-us = <7>;
- enable-active-high;
- };
-
wlan_en: wlan-en-1-8v {
pinctrl-names = "default";
pinctrl-0 = <_en_gpios>;
@@ -204,7 +191,6 @@
status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
vddpe-supply = <_en>;
- vddpe1-supply = <_en>;
};
pcie@608000 {
--
2.14.1
[PATCH] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH] lib/test_printf.c: call wait_for_random_bytes() before plain %p tests
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain '(ptrval)' instead.
This patch adds a call to wait_for_random_bytes() before plain 'p' tests
to make sure the crng is initialized.
Signed-off-by: Thierry Escande
---
lib/test_printf.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/test_printf.c b/lib/test_printf.c
index 71ebfa43ad05..839be9385a8a 100644
--- a/lib/test_printf.c
+++ b/lib/test_printf.c
@@ -260,6 +260,13 @@ plain(void)
{
int err;
+ /*
+* Make sure crng is ready. Otherwise we get "(ptrval)" instead
+* of a hashed address when printing '%p' in plain_hash() and
+* plain_format().
+*/
+ wait_for_random_bytes();
+
err = plain_hash();
if (err) {
pr_warn("plain 'p' does not appear to be hashed\n");
--
2.14.1
[PATCH] arm64: dts: msm8996: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 410ae787ebb4..1aaf1fa2604e 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -437,7 +437,7 @@
blsp2_i2c0: i2c@75b5000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x075b5000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP2_AHB_CLK>,
< GCC_BLSP2_QUP1_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -468,7 +468,7 @@
blsp2_i2c1: i2c@75b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x075b6000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP2_AHB_CLK>,
< GCC_BLSP2_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -493,7 +493,7 @@
blsp1_i2c2: i2c@7577000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x07577000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP3_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -526,7 +526,8 @@
reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
reg-names = "hc_mem", "core_mem";
-interrupts = <0 125 0>, <0 221 0>;
+interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clock-names = "iface", "core", "xo";
@@ -809,7 +810,7 @@
dwc3@760 {
compatible = "snps,dwc3";
reg = <0x760 0xcc00>;
- interrupts = <0 138 0>;
+ interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
phys = <_phy2>;
phy-names = "usb2-phy";
};
@@ -838,7 +839,7 @@
dwc3@6a0 {
compatible = "snps,dwc3";
reg = <0x6a0 0xcc00>;
- interrupts = <0 131 0>;
+ interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
phys = <_phy1>, <_phy_0>;
phy-names = "usb2-phy", "usb3-phy";
};
@@ -872,7 +873,7 @@
ranges = <0x0100 0x0 0x0c20 0x0c20
0x0 0x10>,
<0x0200 0x0 0x0c30 0x0c30
0x0 0xd0>;
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -927,7 +928,7 @@
ranges = <0x0100 0x0 0x0d20 0x0d20
0x0 0x10>,
<0x0200 0x0 0x0d30 0x0d30
0x0 0xd0>;
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -980,7 +981,7 @@
device_type = "pci";
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
--
2.14.1
[PATCH] arm64: dts: msm8996: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Thierry Escande
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 410ae787ebb4..1aaf1fa2604e 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -437,7 +437,7 @@
blsp2_i2c0: i2c@75b5000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x075b5000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP2_AHB_CLK>,
< GCC_BLSP2_QUP1_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -468,7 +468,7 @@
blsp2_i2c1: i2c@75b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x075b6000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP2_AHB_CLK>,
< GCC_BLSP2_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -493,7 +493,7 @@
blsp1_i2c2: i2c@7577000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x07577000 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP3_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -526,7 +526,8 @@
reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
reg-names = "hc_mem", "core_mem";
-interrupts = <0 125 0>, <0 221 0>;
+interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clock-names = "iface", "core", "xo";
@@ -809,7 +810,7 @@
dwc3@760 {
compatible = "snps,dwc3";
reg = <0x760 0xcc00>;
- interrupts = <0 138 0>;
+ interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
phys = <_phy2>;
phy-names = "usb2-phy";
};
@@ -838,7 +839,7 @@
dwc3@6a0 {
compatible = "snps,dwc3";
reg = <0x6a0 0xcc00>;
- interrupts = <0 131 0>;
+ interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
phys = <_phy1>, <_phy_0>;
phy-names = "usb2-phy", "usb3-phy";
};
@@ -872,7 +873,7 @@
ranges = <0x0100 0x0 0x0c20 0x0c20
0x0 0x10>,
<0x0200 0x0 0x0c30 0x0c30
0x0 0xd0>;
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -927,7 +928,7 @@
ranges = <0x0100 0x0 0x0d20 0x0d20
0x0 0x10>,
<0x0200 0x0 0x0d30 0x0d30
0x0 0xd0>;
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -980,7 +981,7 @@
device_type = "pci";
- interrupts = ;
+ interrupts = ;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
--
2.14.1
[PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 52 ++---
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5341a39c0392..f26613ffc9e7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -444,7 +444,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1245 0x100>,
<0x1240 0x03>;
- interrupts = <0 193 0x0>;
+ interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_UART_CLK>, <
GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -456,7 +456,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1246 0x1000>;
- interrupts = <0 194 IRQ_TYPE_NONE>;
+ interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_QUP_CLK>, <
GSBI1_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -484,7 +484,7 @@
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
- interrupts = <0 196 IRQ_TYPE_NONE>;
+ interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI2_QUP_CLK>, <
GSBI2_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -508,7 +508,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1628 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GSBI3_QUP_CLK>,
< GSBI3_H_CLK>;
clock-names = "core", "iface";
@@ -534,7 +534,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1638 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GSBI4_QUP_CLK>,
< GSBI4_H_CLK>;
clock-names = "core", "iface";
@@ -556,7 +556,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1a24 0x100>,
<0x1a20 0x03>;
- interrupts = <0 154 0x0>;
+ interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI5_UART_CLK>, <
GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -565,7 +565,7 @@
gsbi5_spi: spi@1a28 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a28 0x1000>;
- interrupts = <0 155 0>;
+ interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <_default>;
pinctrl-1 = <_sleep>;
pinctrl-names = "default", "sleep";
@@ -592,7 +592,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1654 0x100>,
<0x1650 0x03>;
-
[PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Thierry Escande
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 52 ++---
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5341a39c0392..f26613ffc9e7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -444,7 +444,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1245 0x100>,
<0x1240 0x03>;
- interrupts = <0 193 0x0>;
+ interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_UART_CLK>, <
GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -456,7 +456,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1246 0x1000>;
- interrupts = <0 194 IRQ_TYPE_NONE>;
+ interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_QUP_CLK>, <
GSBI1_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -484,7 +484,7 @@
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
- interrupts = <0 196 IRQ_TYPE_NONE>;
+ interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI2_QUP_CLK>, <
GSBI2_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -508,7 +508,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1628 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GSBI3_QUP_CLK>,
< GSBI3_H_CLK>;
clock-names = "core", "iface";
@@ -534,7 +534,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1638 0x1000>;
- interrupts = ;
+ interrupts = ;
clocks = < GSBI4_QUP_CLK>,
< GSBI4_H_CLK>;
clock-names = "core", "iface";
@@ -556,7 +556,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1a24 0x100>,
<0x1a20 0x03>;
- interrupts = <0 154 0x0>;
+ interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI5_UART_CLK>, <
GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -565,7 +565,7 @@
gsbi5_spi: spi@1a28 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a28 0x1000>;
- interrupts = <0 155 0>;
+ interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <_default>;
pinctrl-1 = <_sleep>;
pinctrl-names = "default", "sleep";
@@ -592,7 +592,7 @@
compatible = "qcom,msm-uartdm-v1.3",
"qcom,msm-uartdm";
reg = <0x1654 0x100>,
<0x1650 0x03>;
-
Re: [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
On 18/04/2018 18:34, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index cfbd72186762..5d66a575c7e1 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
Reviewed-by: Thierry Escande <thierry.esca...@linaro.org>
Also successfully tested on dragonboard 410c so:
Tested-by: Thierry Escande <thierry.esca...@linaro.org>
@@ -180,7 +180,7 @@
pmu {
compatible = "arm,cortex-a53-pmu";
- interrupts = ;
+ interrupts = ;
};
thermal-zones {
@@ -513,7 +513,7 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -528,7 +528,7 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b8000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -543,7 +543,7 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078ba000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -575,7 +575,7 @@
"mi2s-bit-clk3";
#sound-dai-cells = <1>;
- interrupts = <0 160 0>;
+ interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "lpass-irq-lpaif";
reg = <0x07708000 0x1>;
reg-names = "lpass-lpaif";
@@ -595,7 +595,7 @@
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 123 0>, <0 138 0>;
+ interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138
IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = < GCC_SDCC1_APPS_CLK>,
< GCC_SDCC1_AHB_CLK>,
@@ -612,7 +612,7 @@
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 125 0>, <0 221 0>;
+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221
IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = < GCC_SDCC2_APPS_CLK>,
< GCC_SDCC2_AHB_CLK>,
@@ -819,7 +819,7 @@
iommu-ctx@2000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x2000 0x1000>;
- interrupts = ;
+ interrupts = ;
};
};
@@ -864,7 +864,7 @@
"bus_clk",
"vsync_clk";
- interrupts = <0 72 0>;
+ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
Re: [PATCH] arm64: msm8916: fix gic_irq_domain_translate warnings
On 18/04/2018 18:34, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Srinivas Kandagatla
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index cfbd72186762..5d66a575c7e1 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
Reviewed-by: Thierry Escande
Also successfully tested on dragonboard 410c so:
Tested-by: Thierry Escande
@@ -180,7 +180,7 @@
pmu {
compatible = "arm,cortex-a53-pmu";
- interrupts = ;
+ interrupts = ;
};
thermal-zones {
@@ -513,7 +513,7 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -528,7 +528,7 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b8000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -543,7 +543,7 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078ba000 0x500>;
- interrupts = ;
+ interrupts = ;
clocks = < GCC_BLSP1_AHB_CLK>,
< GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
@@ -575,7 +575,7 @@
"mi2s-bit-clk3";
#sound-dai-cells = <1>;
- interrupts = <0 160 0>;
+ interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "lpass-irq-lpaif";
reg = <0x07708000 0x1>;
reg-names = "lpass-lpaif";
@@ -595,7 +595,7 @@
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 123 0>, <0 138 0>;
+ interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138
IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = < GCC_SDCC1_APPS_CLK>,
< GCC_SDCC1_AHB_CLK>,
@@ -612,7 +612,7 @@
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";
- interrupts = <0 125 0>, <0 221 0>;
+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221
IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = < GCC_SDCC2_APPS_CLK>,
< GCC_SDCC2_AHB_CLK>,
@@ -819,7 +819,7 @@
iommu-ctx@2000 {
compatible = "qcom,msm-iommu-v1-ns";
reg = <0x2000 0x1000>;
- interrupts = ;
+ interrupts = ;
};
};
@@ -864,7 +864,7 @@
"bus_clk",
"vsync_clk";
- interrupts = <0 72 0>;
+ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
Re: [PATCH 4.9 000/102] 4.9.93-stable review
On 12/04/2018 14:23, Greg Kroah-Hartman wrote: On Thu, Apr 12, 2018 at 02:17:50PM +0200, Thierry Escande wrote: Hi Greg, On 07/04/2018 08:11, Greg Kroah-Hartman wrote: On Fri, Apr 06, 2018 at 05:25:24PM -0500, Dan Rue wrote: On Fri, Apr 06, 2018 at 03:22:41PM +0200, Greg Kroah-Hartman wrote: This is the start of the stable review cycle for the 4.9.93 release. There are 102 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Sun Apr 8 08:42:55 UTC 2018. Anything received after that time might be too late. Results from Linaro’s test farm. No regressions on arm64, arm and x86_64. There is a new test failure on dragonboard 410c (arm64) in kselftest/cpu-on-off-test. However, it looks like the test was failing but giving a false "PASS" on previous versions of 4.9. This -RC seems to have changed the behavior enough to cause the test to actually mark a failure. In any event, this looks like a db410c-specific pre-existing issue that we have already escalated to our Qualcomm team. Details can be found at https://bugs.linaro.org/show_bug.cgi?id=3723 for those interested. Thanks for testing these and letting me know. The test failure on dragonboard 410c comes from [1] to fix a possible deadlock related to the hotplug rework. It's been reverted in v4.12 by [2] because the cpu hotplug rework was not ready yet at that time. Since the hotplug rework has not been backported to v4.9.y, the splat cannot be reproduced and so [1] can be reverted or [2] applied on v4.9.y. [1] https://lkml.org/lkml/2018/3/23/452 [2] https://lkml.org/lkml/2017/5/7/124 Hm, so I need to drop some patch, but what one? lkml.org does not work for me, please be specific and use the git commit ids, or at the very-least, the subject of the patches. Never make someone have to rely on the existance of a random web site not under kernel developer's control to figure out what to do... So the commit to be reverted is [1], introduced in v4.9.90. Or you can apply [2] from v4.12 that actually reverts [1]. [1] 18dd7b964c01ac44497471f4ea3f4c0c663eab55 [2] 51d638b1f56a0bfd9219800620994794a1a2b219 Regards, Thierry
Re: [PATCH 4.9 000/102] 4.9.93-stable review
On 12/04/2018 14:23, Greg Kroah-Hartman wrote: On Thu, Apr 12, 2018 at 02:17:50PM +0200, Thierry Escande wrote: Hi Greg, On 07/04/2018 08:11, Greg Kroah-Hartman wrote: On Fri, Apr 06, 2018 at 05:25:24PM -0500, Dan Rue wrote: On Fri, Apr 06, 2018 at 03:22:41PM +0200, Greg Kroah-Hartman wrote: This is the start of the stable review cycle for the 4.9.93 release. There are 102 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Sun Apr 8 08:42:55 UTC 2018. Anything received after that time might be too late. Results from Linaro’s test farm. No regressions on arm64, arm and x86_64. There is a new test failure on dragonboard 410c (arm64) in kselftest/cpu-on-off-test. However, it looks like the test was failing but giving a false "PASS" on previous versions of 4.9. This -RC seems to have changed the behavior enough to cause the test to actually mark a failure. In any event, this looks like a db410c-specific pre-existing issue that we have already escalated to our Qualcomm team. Details can be found at https://bugs.linaro.org/show_bug.cgi?id=3723 for those interested. Thanks for testing these and letting me know. The test failure on dragonboard 410c comes from [1] to fix a possible deadlock related to the hotplug rework. It's been reverted in v4.12 by [2] because the cpu hotplug rework was not ready yet at that time. Since the hotplug rework has not been backported to v4.9.y, the splat cannot be reproduced and so [1] can be reverted or [2] applied on v4.9.y. [1] https://lkml.org/lkml/2018/3/23/452 [2] https://lkml.org/lkml/2017/5/7/124 Hm, so I need to drop some patch, but what one? lkml.org does not work for me, please be specific and use the git commit ids, or at the very-least, the subject of the patches. Never make someone have to rely on the existance of a random web site not under kernel developer's control to figure out what to do... So the commit to be reverted is [1], introduced in v4.9.90. Or you can apply [2] from v4.12 that actually reverts [1]. [1] 18dd7b964c01ac44497471f4ea3f4c0c663eab55 [2] 51d638b1f56a0bfd9219800620994794a1a2b219 Regards, Thierry
Re: [PATCH 4.9 000/102] 4.9.93-stable review
Hi Greg, On 07/04/2018 08:11, Greg Kroah-Hartman wrote: On Fri, Apr 06, 2018 at 05:25:24PM -0500, Dan Rue wrote: On Fri, Apr 06, 2018 at 03:22:41PM +0200, Greg Kroah-Hartman wrote: This is the start of the stable review cycle for the 4.9.93 release. There are 102 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Sun Apr 8 08:42:55 UTC 2018. Anything received after that time might be too late. Results from Linaro’s test farm. No regressions on arm64, arm and x86_64. There is a new test failure on dragonboard 410c (arm64) in kselftest/cpu-on-off-test. However, it looks like the test was failing but giving a false "PASS" on previous versions of 4.9. This -RC seems to have changed the behavior enough to cause the test to actually mark a failure. In any event, this looks like a db410c-specific pre-existing issue that we have already escalated to our Qualcomm team. Details can be found at https://bugs.linaro.org/show_bug.cgi?id=3723 for those interested. Thanks for testing these and letting me know. The test failure on dragonboard 410c comes from [1] to fix a possible deadlock related to the hotplug rework. It's been reverted in v4.12 by [2] because the cpu hotplug rework was not ready yet at that time. Since the hotplug rework has not been backported to v4.9.y, the splat cannot be reproduced and so [1] can be reverted or [2] applied on v4.9.y. [1] https://lkml.org/lkml/2018/3/23/452 [2] https://lkml.org/lkml/2017/5/7/124 Regards, Thierry
Re: [PATCH 4.9 000/102] 4.9.93-stable review
Hi Greg, On 07/04/2018 08:11, Greg Kroah-Hartman wrote: On Fri, Apr 06, 2018 at 05:25:24PM -0500, Dan Rue wrote: On Fri, Apr 06, 2018 at 03:22:41PM +0200, Greg Kroah-Hartman wrote: This is the start of the stable review cycle for the 4.9.93 release. There are 102 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Sun Apr 8 08:42:55 UTC 2018. Anything received after that time might be too late. Results from Linaro’s test farm. No regressions on arm64, arm and x86_64. There is a new test failure on dragonboard 410c (arm64) in kselftest/cpu-on-off-test. However, it looks like the test was failing but giving a false "PASS" on previous versions of 4.9. This -RC seems to have changed the behavior enough to cause the test to actually mark a failure. In any event, this looks like a db410c-specific pre-existing issue that we have already escalated to our Qualcomm team. Details can be found at https://bugs.linaro.org/show_bug.cgi?id=3723 for those interested. Thanks for testing these and letting me know. The test failure on dragonboard 410c comes from [1] to fix a possible deadlock related to the hotplug rework. It's been reverted in v4.12 by [2] because the cpu hotplug rework was not ready yet at that time. Since the hotplug rework has not been backported to v4.9.y, the splat cannot be reproduced and so [1] can be reverted or [2] applied on v4.9.y. [1] https://lkml.org/lkml/2018/3/23/452 [2] https://lkml.org/lkml/2017/5/7/124 Regards, Thierry
[PATCH v7 1/4] arm64: dts: apq8096-db820c: Enable wlan and bt en pins
From: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
This patch enables regulators and gpios for the Qualcomm QCA6174 BT/WLAN
combo controller.
Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org>
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v7:
- New patch in this patchset
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 22 +++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 31 ++
2 files changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..5d50f45c4df7 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -14,6 +14,28 @@
};
};
+ bt_en_gpios: bt_en_gpios {
+ pinconf {
+ pins = "gpio19";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ bias-pull-down;
+ };
+ };
+
+ wlan_en_gpios: wlan_en_gpios {
+ pinconf {
+ pins = "gpio8";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ bias-pull-down;
+ };
+ };
+
volume_up_gpio: pm8996_gpio2 {
pinconf {
pins = "gpio2";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..ec5e6eee0a7a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -139,9 +139,40 @@
pinctrl-0 = <_vbus_det_gpio>;
};
+ bt_en: bt-en-1-8v {
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_gpios>;
+ compatible = "regulator-fixed";
+ regulator-name = "bt-en-regulator";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+
+ /* WLAN card specific delay */
+ startup-delay-us = <7>;
+ enable-active-high;
+ };
+
+ wlan_en: wlan-en-1-8v {
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_gpios>;
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+
+ gpio = <_gpios 8 0>;
+
+ /* WLAN card specific delay */
+ startup-delay-us = <7>;
+ enable-active-high;
+ };
+
agnoc@0 {
qcom,pcie@60 {
+ status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
+ vddpe-supply = <_en>;
+ vddpe1-supply = <_en>;
};
qcom,pcie@608000 {
--
2.14.1
[PATCH v7 1/4] arm64: dts: apq8096-db820c: Enable wlan and bt en pins
From: Srinivas Kandagatla
This patch enables regulators and gpios for the Qualcomm QCA6174 BT/WLAN
combo controller.
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Thierry Escande
---
v7:
- New patch in this patchset
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 22 +++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 31 ++
2 files changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..5d50f45c4df7 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -14,6 +14,28 @@
};
};
+ bt_en_gpios: bt_en_gpios {
+ pinconf {
+ pins = "gpio19";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ bias-pull-down;
+ };
+ };
+
+ wlan_en_gpios: wlan_en_gpios {
+ pinconf {
+ pins = "gpio8";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ bias-pull-down;
+ };
+ };
+
volume_up_gpio: pm8996_gpio2 {
pinconf {
pins = "gpio2";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..ec5e6eee0a7a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -139,9 +139,40 @@
pinctrl-0 = <_vbus_det_gpio>;
};
+ bt_en: bt-en-1-8v {
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_gpios>;
+ compatible = "regulator-fixed";
+ regulator-name = "bt-en-regulator";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+
+ /* WLAN card specific delay */
+ startup-delay-us = <7>;
+ enable-active-high;
+ };
+
+ wlan_en: wlan-en-1-8v {
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_gpios>;
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+
+ gpio = <_gpios 8 0>;
+
+ /* WLAN card specific delay */
+ startup-delay-us = <7>;
+ enable-active-high;
+ };
+
agnoc@0 {
qcom,pcie@60 {
+ status = "okay";
perst-gpio = < 35 GPIO_ACTIVE_LOW>;
+ vddpe-supply = <_en>;
+ vddpe1-supply = <_en>;
};
qcom,pcie@608000 {
--
2.14.1
[PATCH v7 0/4] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v7: - Add a new patch enabling regulators and gpios for the bt/wlan combo chip v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Srinivas Kandagatla (1): arm64: dts: apq8096-db820c: Enable wlan and bt en pins Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 32 ++ arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 62 arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 268 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v7 3/4] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
Reviewed-by: Rob Herring <r...@kernel.org>
---
v7: no change
v6:
- Remove chip specific pinctrl conf
- Move gpio and clocks into optional props section
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..0ea18a53cc29
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,30 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+ - enable-gpios: gpio specifier used to enable chip
+ - clocks: clock provided to the controller (SUSCLK_32KHZ)
+
+Example:
+
+serial@757 {
+ label = "BT-UART";
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v7 0/4] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v7: - Add a new patch enabling regulators and gpios for the bt/wlan combo chip v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Srinivas Kandagatla (1): arm64: dts: apq8096-db820c: Enable wlan and bt en pins Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 32 ++ arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 62 arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 268 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v7 3/4] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
Reviewed-by: Rob Herring
---
v7: no change
v6:
- Remove chip specific pinctrl conf
- Move gpio and clocks into optional props section
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..0ea18a53cc29
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,30 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+ - enable-gpios: gpio specifier used to enable chip
+ - clocks: clock provided to the controller (SUSCLK_32KHZ)
+
+Example:
+
+serial@757 {
+ label = "BT-UART";
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v7 2/4] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v7:
- Remove bt-en-active node declared in previous patch
v6
- Move gpio properties into pinconf subnode
- move pinmux properties into mux and config subnodes
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 +++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 10
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 30 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10
4 files changed, 76 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..6a573875d45a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,30 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "blsp_uart2";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 5d50f45c4df7..6167af955659 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -48,6 +48,16 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pinconf {
+ pins = "gpio18";
+ function = PMIC_GPIO_FUNC_FUNC2;
+
+ bias-disable;
+ power-source = ;
+ };
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index ec5e6eee0a7a..4b8bb026346e 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,36 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f79
[PATCH v7 2/4] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande
---
v7:
- Remove bt-en-active node declared in previous patch
v6
- Move gpio properties into pinconf subnode
- move pinmux properties into mux and config subnodes
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 +++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 10
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 30 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10
4 files changed, 76 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..6a573875d45a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,30 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "blsp_uart2";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 5d50f45c4df7..6167af955659 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -48,6 +48,16 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pinconf {
+ pins = "gpio18";
+ function = PMIC_GPIO_FUNC_FUNC2;
+
+ bias-disable;
+ power-source = ;
+ };
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index ec5e6eee0a7a..4b8bb026346e 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,36 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm6
[PATCH v7 4/4] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
---
v7: no change
v6:
- Fix gpio name in error message
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 110 +++-
2 files changed, 109 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..1afa17ff6303 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,12 @@
*/
#include
+#include
#include
+#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +55,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +119,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +400,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +459,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +534,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +548,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +915,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +943,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +962,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +996,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ in
[PATCH v7 4/4] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande
Reviewed-by: Andy Shevchenko
---
v7: no change
v6:
- Fix gpio name in error message
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 110 +++-
2 files changed, 109 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..1afa17ff6303 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,12 @@
*/
#include
+#include
#include
+#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +55,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +119,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +400,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +459,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +534,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +548,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +915,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +943,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +962,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +996,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev),
Re: [PATCH v6 0/3] Bluetooth: hci_qca: Add serdev support
Hi, On 28/03/2018 11:51, Thierry Escande wrote: Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 232 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt Please hold this patchset as a v7 is coming soon. Regards, Thierry
Re: [PATCH v6 0/3] Bluetooth: hci_qca: Add serdev support
Hi, On 28/03/2018 11:51, Thierry Escande wrote: Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 232 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt Please hold this patchset as a v7 is coming soon. Regards, Thierry
[PATCH v6 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v6
- Move gpio properties into pinconf subnode
- move pinmux properties into mux and config subnodes
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 +
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 ++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..6a573875d45a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,30 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "blsp_uart2";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..0a8cf7e5974f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,27 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pinconf {
+ pins = "gpio18";
+ function = PMIC_GPIO_FUNC_FUNC2;
+
+ bias-disable;
+ power-source = ;
+ };
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pinconf {
+ pins = "gpio19";
+ function = PMIC_GPIO_FUNC_NORMAL;
+
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ };
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..8b3bcdf0d718 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,39 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+
[PATCH v6 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande
---
v6
- Move gpio properties into pinconf subnode
- move pinmux properties into mux and config subnodes
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 +
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 ++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..6a573875d45a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,30 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "blsp_uart2";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ mux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..0a8cf7e5974f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,27 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pinconf {
+ pins = "gpio18";
+ function = PMIC_GPIO_FUNC_FUNC2;
+
+ bias-disable;
+ power-source = ;
+ };
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pinconf {
+ pins = "gpio19";
+ function = PMIC_GPIO_FUNC_NORMAL;
+
+ output-low;
+ power-source = ; // 1.8V
+ qcom,drive-strength = ;
+ };
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..8b3bcdf0d718 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,39 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a&g
[PATCH v6 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
Reviewed-by: Rob Herring <r...@kernel.org>
---
v6:
- Remove chip specific pinctrl conf
- Move gpio and clocks into optional props section
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..f1ca8f667a5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,30 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+ - enable-gpios: gpio specifier used to enable chip
+ - clocks: clock provided to the controler (SUSCLK_32KHZ)
+
+Example:
+
+serial@757 {
+ label = "BT-UART";
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v6 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
Reviewed-by: Rob Herring
---
v6:
- Remove chip specific pinctrl conf
- Move gpio and clocks into optional props section
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..f1ca8f667a5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,30 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+ - enable-gpios: gpio specifier used to enable chip
+ - clocks: clock provided to the controler (SUSCLK_32KHZ)
+
+Example:
+
+serial@757 {
+ label = "BT-UART";
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v6 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
---
v6:
- Fix gpio name in error message
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..1c4475d0707c 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev =
[PATCH v6 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande
Reviewed-by: Andy Shevchenko
---
v6:
- Fix gpio name in error message
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..1c4475d0707c 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+
[PATCH v6 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 232 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v6 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v6: - Move pinctrl properties into subnodes - fix binding documentation v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 26 + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 21 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 232 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
Re: [PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Bjorn,
On 27/03/2018 00:51, Bjorn Andersson wrote:
On Tue 20 Mar 23:58 HKT 2018, Marcel Holtmann wrote:
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
[..]
+ - clocks: clock phandle for SUSCLK_32KHZ
if I compare this with broadcom-bluetooth.txt or ti-bluetooth.txt then
besides compatible, everything else is optional. The
nokia-bluetooth.txt has everything required, but that is also a really
specific platform.
Can we be less restrictive for a QCA general purpose chip?
The way we deal with this in other bindings is that we tie such
requirements to the compatible; i.e. we would say that qcom,qca6174-bt
requires a clock and we would have something like qcom,qca-bt that makes
it optional.
The beauty of this is that the driver will tell you if you forgot to
specify the clock when it actually is required, which saves you
considerable amount of debugging time.
NB. The way the bcm driver handles this is insufficient, as it treats
any error from clk_get as "there's no clock specified". The driver
should accept a clock not being specified, but should fail properly when
a clock is specified but can't be acquired (e.g. due to clk_get()
returning EPROBE_DEFER).
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
This one I do not understand and you might want to shed some light
into why this is done that way.
This is completely generic and only relates to getting the electrical
properties of the gpio pin set up correctly. So I would recommend that
we omit this from the binding and example (including the pinctrl
properties for the serial above).
If I remove the pinctrl entry in the bluetooth node, the gpio19 is then
marked as unclaimed. The drive strength also defaults to low but that
doesn't seem to be an issue and the the chip can still be enabled
through gpio19. Is it ok to have it unclaimed? If so I can remove it
from the binding and the doc then.
Regarding the blsp1_uart1_default of the serial node, I can still enable
the chip if I remove it but the hci commands all end in timeout. It
seems that the function for these pins has to be explicitly set to
blsp_uart2. So at least, the default pinctrl seems mandatory.
Regards,
Thierry
Regards,
Bjorn
Re: [PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Bjorn,
On 27/03/2018 00:51, Bjorn Andersson wrote:
On Tue 20 Mar 23:58 HKT 2018, Marcel Holtmann wrote:
Signed-off-by: Thierry Escande
[..]
+ - clocks: clock phandle for SUSCLK_32KHZ
if I compare this with broadcom-bluetooth.txt or ti-bluetooth.txt then
besides compatible, everything else is optional. The
nokia-bluetooth.txt has everything required, but that is also a really
specific platform.
Can we be less restrictive for a QCA general purpose chip?
The way we deal with this in other bindings is that we tie such
requirements to the compatible; i.e. we would say that qcom,qca6174-bt
requires a clock and we would have something like qcom,qca-bt that makes
it optional.
The beauty of this is that the driver will tell you if you forgot to
specify the clock when it actually is required, which saves you
considerable amount of debugging time.
NB. The way the bcm driver handles this is insufficient, as it treats
any error from clk_get as "there's no clock specified". The driver
should accept a clock not being specified, but should fail properly when
a clock is specified but can't be acquired (e.g. due to clk_get()
returning EPROBE_DEFER).
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
This one I do not understand and you might want to shed some light
into why this is done that way.
This is completely generic and only relates to getting the electrical
properties of the gpio pin set up correctly. So I would recommend that
we omit this from the binding and example (including the pinctrl
properties for the serial above).
If I remove the pinctrl entry in the bluetooth node, the gpio19 is then
marked as unclaimed. The drive strength also defaults to low but that
doesn't seem to be an issue and the the chip can still be enabled
through gpio19. Is it ok to have it unclaimed? If so I can remove it
from the binding and the doc then.
Regarding the blsp1_uart1_default of the serial node, I can still enable
the chip if I remove it but the hci commands all end in timeout. It
seems that the function for these pins has to be explicitly set to
blsp_uart2. So at least, the default pinctrl seems mandatory.
Regards,
Thierry
Regards,
Bjorn
Re: [PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Marcel,
On 20/03/2018 16:58, Marcel Holtmann wrote:
Hi Thierry,
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..bbc2973634b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - enable-gpios: gpio specifier used to enable chip
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
if I compare this with broadcom-bluetooth.txt or ti-bluetooth.txt then besides
compatible, everything else is optional. The nokia-bluetooth.txt has everything
required, but that is also a really specific platform.
Can we be less restrictive for a QCA general purpose chip?
Ok. To me, at least the enable gpio seems required.
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
This one I do not understand and you might want to shed some light into why
this is done that way.
Sure. It reclaims this gpio pin for this device. Will add it to the
documentation.
+
+ clocks = <>;
No clock-names?
No need for a name as there is only one clk obtained by passing a NULL
id to devm_gpiod_get().
Regards,
Thierry
Regards
Marcel
Re: [PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Marcel,
On 20/03/2018 16:58, Marcel Holtmann wrote:
Hi Thierry,
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..bbc2973634b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - enable-gpios: gpio specifier used to enable chip
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
if I compare this with broadcom-bluetooth.txt or ti-bluetooth.txt then besides
compatible, everything else is optional. The nokia-bluetooth.txt has everything
required, but that is also a really specific platform.
Can we be less restrictive for a QCA general purpose chip?
Ok. To me, at least the enable gpio seems required.
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
This one I do not understand and you might want to shed some light into why
this is done that way.
Sure. It reclaims this gpio pin for this device. Will add it to the
documentation.
+
+ clocks = <>;
No clock-names?
No need for a name as there is only one clk obtained by passing a NULL
id to devm_gpiod_get().
Regards,
Thierry
Regards
Marcel
Re: [PATCH v5 3/3] Bluetooth: hci_qca: Add serdev support
Hi Marcel, On 20/03/2018 16:49, Marcel Holtmann wrote: Hi Thierry, Add support for Qualcomm serial slave devices. Probe the serial device, retrieve its maximum speed and register a new hci uart device. Signed-off-by: Thierry Escande <thierry.esca...@linaro.org> --- v5: - Use gpio new name 'enable' v4: - Rename divclk4 as susclk (its name in the bt chip) - Use gpiod_set_value_cansleep() - Replace #include with - Restore dependency on BT_HCIUART v3: - Remove redundant call to gpiod_set_value() after devm_gpiod_get() - Check returned values for clk_set_rate() and clk_prepare_enable() - Use clk_disable_unprepare() v2: - Fix author email drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c | 109 +++- 2 files changed, 108 insertions(+), 2 deletions(-) so this a more generic question. Does the clk setup has to be done in serdev probe or can we just do that within qca_open callback. I asked because I really want to move towards btuart.c and integrate the vendor specific pieces there nicely. So what I did was that I posted a v2 that has the vendor abstraction build in and it would be super simple to add qca support to it. However I have no vendor specific handling from within the probe callback. If that is not needed and we can do all the clk and GPIO setup in the vendor open callback, then it should be fairly simple to do (I am ignoring IBS support for now, but I realize it is there). I did test that and doing clk and gpio setups in qca_open seems ok. That all said, the hci_qca.c code has __serial_clock_on() and __serial_clock_off() empty stubs. Is this about the susclk or is that something totally different? afaiu these stubs are used to control host UART clock. The susclk concerns the bt chip itself. Regards, Thierry Regards Marcel
Re: [PATCH v5 3/3] Bluetooth: hci_qca: Add serdev support
Hi Marcel, On 20/03/2018 16:49, Marcel Holtmann wrote: Hi Thierry, Add support for Qualcomm serial slave devices. Probe the serial device, retrieve its maximum speed and register a new hci uart device. Signed-off-by: Thierry Escande --- v5: - Use gpio new name 'enable' v4: - Rename divclk4 as susclk (its name in the bt chip) - Use gpiod_set_value_cansleep() - Replace #include with - Restore dependency on BT_HCIUART v3: - Remove redundant call to gpiod_set_value() after devm_gpiod_get() - Check returned values for clk_set_rate() and clk_prepare_enable() - Use clk_disable_unprepare() v2: - Fix author email drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c | 109 +++- 2 files changed, 108 insertions(+), 2 deletions(-) so this a more generic question. Does the clk setup has to be done in serdev probe or can we just do that within qca_open callback. I asked because I really want to move towards btuart.c and integrate the vendor specific pieces there nicely. So what I did was that I posted a v2 that has the vendor abstraction build in and it would be super simple to add qca support to it. However I have no vendor specific handling from within the probe callback. If that is not needed and we can do all the clk and GPIO setup in the vendor open callback, then it should be fairly simple to do (I am ignoring IBS support for now, but I realize it is there). I did test that and doing clk and gpio setups in qca_open seems ok. That all said, the hci_qca.c code has __serial_clock_on() and __serial_clock_off() empty stubs. Is this about the susclk or is that something totally different? afaiu these stubs are used to control host UART clock. The susclk concerns the bt chip itself. Regards, Thierry Regards Marcel
[PATCH v5 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..6e6042f77784 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+
[PATCH v5 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande
---
v5:
- Use gpio new name 'enable'
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..6e6042f77784 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+ qcadev->serdev_hu.serdev = s
[PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..bbc2973634b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - enable-gpios: gpio specifier used to enable chip
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v5 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 216 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v5 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 +++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..8b3bcdf0d718 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,39 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
[PATCH v5 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v5: - Rename 'bt-disable-n' gpio as 'enable' v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 +++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 216 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v5 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 +++
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..8b3bcdf0d718 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,39 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ /* bt_disable_n gpio */
+ enable-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x075700
[PATCH v5 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
---
v5:
- Rename 'bt-disable-n' gpio as 'enable'
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..bbc2973634b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - enable-gpios: gpio specifier used to enable chip
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ enable-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+};
--
2.14.1
Re: [PATCH v4 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Marcel, On 14/03/2018 20:51, Marcel Holtmann wrote: Hi Bjorn, + bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>; can we use a common name here. I think that Nokia and Broadcom drivers define one. And if this is the enable/shutdown GPIO, we should name it consistently across all manufacturers. It essentially does the same on Bluetooth UART chips no matter what chip is behind them. Broadcomm has a device-wakup-gpios and Nokia has bluetooth-wakup-gpios. It might be that these behave in the same way, but from the description they only trigger the wakeup. that is something that we might need to start fixing. I really prefer if we name the GPIOs a bit more consistent. The reason for the proposed naming here is that the pin is named "BT_DISABLE_N" in the datasheet. That is not a reason I buy. So the next board comes around that labels it in the data sheet BT_DISABLE_YEAH_SUPER_GREAT and you send me a patch to the driver to look for that name. If the GPIO does the same thing, I couldn’t care less what the data sheet says. That might be a comment in the DT file, but it should not pollute the driver code. BT_DISABLE_N is the name of this pin in the datasheet of the QCA chip, not on the board, so this name is the same regardless of what you name the line or gpio your board connect it to. and QCA chip v1 and QCA chip v2 will use the same driver and same firmware loading mechanism. So why do we have to add a new GPIO naming if they decide to change the name in the data sheet. With Bluetooth it is pretty much all the same. Every UART chip has a shutdown/reset GPIO to enable/disable the chip behind the UART. A new board should not require driver changes, you just ship a new DT for that board and an existing driver hopefully just does the job. No matter how someone named a GPIO in a piece of paper. I totally agree with the fact that the board should not affect the naming of the gpio in the driver. But I do enjoy when we refer to pins by their real name - instead of having to guess which pin in the _chip_ specification the driver actually refer to. That said, what name would you prefer for this? Afaict this is not "wakeup" and there are a few extra steps between the disabled state and "bluetooth is enabled", so "enable" feels slightly wrong. And it probably should be "bluetooth" and not just "device" as this refers to a pin on a WiFi/BT combo chip. The Broadcom side called it shutdown GPIO, it is essentially the shutdown/reset GPIO or power on/off GPIO. Personally I do not care what it is named, but it will be all the same for all Bluetooth chips. Take a poll from Broadcom, Intel, Realtek and Qualcomm and you can pick a reasonable common name. The Nokia driver has "bluetooth-wakeup" gpio. The Broadcom one has "device-wakeup" and "shutdown". The "shutdown" gpio is set to its active state to power on the chip which sounds reversed logic. Same for the "bt-disable-n" gpio in the Qualcomm driver, configured as ACTIVE_HIGH, and which is set to 1 to enable it... So for consistency, naming it as "shutdown" to stick to the bcm driver but it should be configured as ACTIVE_LOW in the dts so we actually do a gpiod_set_value(0) to un-shutdown it. Does that sound ok? Regards, Thierry For the wakeup GPIOs, these are different and depend on if there is some low-power mode provided. You would need to check the data sheet to see if they provide more advanced low-power state handling. Regards Marcel
Re: [PATCH v4 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Hi Marcel, On 14/03/2018 20:51, Marcel Holtmann wrote: Hi Bjorn, + bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>; can we use a common name here. I think that Nokia and Broadcom drivers define one. And if this is the enable/shutdown GPIO, we should name it consistently across all manufacturers. It essentially does the same on Bluetooth UART chips no matter what chip is behind them. Broadcomm has a device-wakup-gpios and Nokia has bluetooth-wakup-gpios. It might be that these behave in the same way, but from the description they only trigger the wakeup. that is something that we might need to start fixing. I really prefer if we name the GPIOs a bit more consistent. The reason for the proposed naming here is that the pin is named "BT_DISABLE_N" in the datasheet. That is not a reason I buy. So the next board comes around that labels it in the data sheet BT_DISABLE_YEAH_SUPER_GREAT and you send me a patch to the driver to look for that name. If the GPIO does the same thing, I couldn’t care less what the data sheet says. That might be a comment in the DT file, but it should not pollute the driver code. BT_DISABLE_N is the name of this pin in the datasheet of the QCA chip, not on the board, so this name is the same regardless of what you name the line or gpio your board connect it to. and QCA chip v1 and QCA chip v2 will use the same driver and same firmware loading mechanism. So why do we have to add a new GPIO naming if they decide to change the name in the data sheet. With Bluetooth it is pretty much all the same. Every UART chip has a shutdown/reset GPIO to enable/disable the chip behind the UART. A new board should not require driver changes, you just ship a new DT for that board and an existing driver hopefully just does the job. No matter how someone named a GPIO in a piece of paper. I totally agree with the fact that the board should not affect the naming of the gpio in the driver. But I do enjoy when we refer to pins by their real name - instead of having to guess which pin in the _chip_ specification the driver actually refer to. That said, what name would you prefer for this? Afaict this is not "wakeup" and there are a few extra steps between the disabled state and "bluetooth is enabled", so "enable" feels slightly wrong. And it probably should be "bluetooth" and not just "device" as this refers to a pin on a WiFi/BT combo chip. The Broadcom side called it shutdown GPIO, it is essentially the shutdown/reset GPIO or power on/off GPIO. Personally I do not care what it is named, but it will be all the same for all Bluetooth chips. Take a poll from Broadcom, Intel, Realtek and Qualcomm and you can pick a reasonable common name. The Nokia driver has "bluetooth-wakeup" gpio. The Broadcom one has "device-wakeup" and "shutdown". The "shutdown" gpio is set to its active state to power on the chip which sounds reversed logic. Same for the "bt-disable-n" gpio in the Qualcomm driver, configured as ACTIVE_HIGH, and which is set to 1 to enable it... So for consistency, naming it as "shutdown" to stick to the bcm driver but it should be configured as ACTIVE_LOW in the dts so we actually do a gpiod_set_value(0) to un-shutdown it. Does that sound ok? Regards, Thierry For the wakeup GPIOs, these are different and depend on if there is some low-power mode provided. You would need to check the data sheet to see if they provide more advanced low-power state handling. Regards Marcel
[PATCH v4 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..cdb14b96c229
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - bt-disable-n-gpios: gpio specifier, used to enable chip during probe
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v4 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
---
v4:
- Move bt-disable-n-gpios to required properties section
- Add clocks and pinctrl-0 as required properties
v3: no change
v2: no change
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..cdb14b96c229
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+ - bt-disable-n-gpios: gpio specifier, used to enable chip during probe
+ - pinctrl-0: pin phandle for bt_en gpio
+ - clocks: clock phandle for SUSCLK_32KHZ
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+};
--
2.14.1
[PATCH v4 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 215 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v4 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v4: - Fix dt binding documentation - Address some other issues in patch #3 v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 1 + drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 215 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v4 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..6cf0d1d4595a 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+ qcadev->serdev_hu.serdev = s
[PATCH v4 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande
---
v4:
- Rename divclk4 as susclk (its name in the bt chip)
- Use gpiod_set_value_cansleep()
- Replace #include with
- Restore dependency on BT_HCIUART
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
v2:
- Fix author email
drivers/bluetooth/Kconfig | 1 +
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..e0f1a6609b68 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -196,6 +196,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..6cf0d1d4595a 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* susclk rate */
+#define SUSCLK_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *susclk;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+ qcadev->serdev_hu.serdev = serdev;
[PATCH v4 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 ++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..b05d6bc0b856 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,38 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x0757 0x1000>;
+ interrupts = ;
+
[PATCH v4 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande
---
v4: no change
v3: no change
v2:
- Fix author email
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 ++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..b05d6bc0b856 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,38 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x0757 0x1000>;
+ interrupts = ;
+ clocks = < GCC_BLSP1_UART2_APPS_CLK>,
+< GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_spi0: spi@7575000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07575000 0x600>;
--
2.14.1
Re: [PATCH v3 3/3] Bluetooth: hci_qca: Add serdev support
On 13/03/2018 21:57, Andy Shevchenko wrote: On Tue, Mar 13, 2018 at 8:38 PM, Thierry Escande <thierry.esca...@linaro.org> wrote: Add support for Qualcomm serial slave devices. Probe the serial device, retrieve its maximum speed and register a new hci uart device. config BT_HCIUART_QCA bool "Qualcomm Atheros protocol support" - depends on BT_HCIUART + depends on BT_HCIUART_SERDEV Consider to address Loic's comments. +#include This is still here. Why? I forgot that one. This was for struct of_device_id. I'll replace it with mod_devicetable.h. Regards, Thierry
Re: [PATCH v3 3/3] Bluetooth: hci_qca: Add serdev support
On 13/03/2018 21:57, Andy Shevchenko wrote: On Tue, Mar 13, 2018 at 8:38 PM, Thierry Escande wrote: Add support for Qualcomm serial slave devices. Probe the serial device, retrieve its maximum speed and register a new hci uart device. config BT_HCIUART_QCA bool "Qualcomm Atheros protocol support" - depends on BT_HCIUART + depends on BT_HCIUART_SERDEV Consider to address Loic's comments. +#include This is still here. Why? I forgot that one. This was for struct of_device_id. I'll replace it with mod_devicetable.h. Regards, Thierry
[PATCH v3 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 ++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..b05d6bc0b856 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,38 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x0757 0x1000>;
+ interrupts = ;
+ clocks = < GCC_BLSP1_UART2_APPS_CLK>,
+< GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_spi0: spi@7575000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07575000 0x600>;
--
2.14.1
[PATCH v3 1/3] arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.
Signed-off-by: Thierry Escande
---
arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 ++
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++
4 files changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fa..172165d84669 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ blsp1_uart1_default: blsp1_uart1_default {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ blsp1_uart1_sleep: blsp1_uart1_sleep {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 59b29ddfb6e9..f8d2a3b10b1f 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -26,6 +26,23 @@
};
};
+ divclk4_pin_a: divclk4 {
+ pins = "gpio18";
+ function = "func2";
+
+ bias-disable;
+ power-source = ;
+ };
+
+ bt_en_pin_a: bt-en-active {
+ pins = "gpio19";
+ function = "normal";
+
+ output-low;
+ power-source = ;
+ qcom,drive-strength = ;
+ };
+
usb3_vbus_det_gpio: pm8996_gpio22 {
pinconf {
pins = "gpio22";
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index 1c8f1b86472d..b05d6bc0b856 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
aliases {
serial0 = _uart1;
serial1 = _uart2;
+ serial2 = _uart1;
i2c0= _i2c2;
i2c1= _i2c1;
i2c2= _i2c0;
@@ -34,7 +35,38 @@
stdout-path = "serial0:115200n8";
};
+ clocks {
+ divclk4: divclk4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "divclk4";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_a>;
+ };
+ };
+
soc {
+ serial@757 {
+ label = "BT-UART";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19
GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>;
+
+ clocks = <>;
+ };
+ };
+
serial@75b {
label = "LS-UART1";
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 0a6f7952bbb1..2d54a86a027f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -408,6 +408,16 @@
#clock-cells = <1>;
};
+ blsp1_uart1: serial@757 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x0757 0x1000>;
+ interrupts = ;
+ clocks = < GCC_BLSP1_UART2_APPS_CLK>,
+< GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_spi0: spi@7575000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07575000 0x600>;
--
2.14.1
[PATCH v3 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..288cf062e906
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+
+ - bt-disable-n-gpios: GPIO specifier, used to enable chip during probe
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>, <_pin_a>;
+ };
+};
--
2.14.1
[PATCH v3 2/3] dt-bindings: net: bluetooth: Add qualcomm-bluetooth
Add binding document for serial bluetooth chips using Qualcomm protocol.
Signed-off-by: Thierry Escande
---
.../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
new file mode 100644
index ..288cf062e906
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt
@@ -0,0 +1,34 @@
+Qualcomm Bluetooth Chips
+-
+
+This documents the binding structure and common properties for serial
+attached Qualcomm devices.
+
+Serial attached Qualcomm devices shall be a child node of the host UART
+device the slave device is attached to.
+
+Required properties:
+
+ - compatible: should contain one of the following:
+ * "qcom,qca6174-bt"
+
+Optional properties:
+
+ - bt-disable-n-gpios: GPIO specifier, used to enable chip during probe
+
+Example:
+
+serial@757 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_uart1_default>;
+ pinctrl-1 = <_uart1_sleep>;
+
+ bluetooth {
+ compatible = "qcom,qca6174-bt";
+
+ bt-disable-n-gpios = <_gpios 19 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_en_pin_a>, <_pin_a>;
+ };
+};
--
2.14.1
[PATCH v3 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande <thierry.esca...@linaro.org>
---
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
drivers/bluetooth/Kconfig | 2 +-
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 3 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..c2a6a7ebd14b 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -195,7 +195,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
- depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..aa0886d5324f 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* divclk4 rate */
+#define DIVCLK4_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *divclk4;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+ qcadev->serdev_hu.serdev = serdev;
+ serdev_device_set_drvdata(serdev, qcadev);
+
+ qcadev->bt_en = devm_gpiod_get(>dev, "bt-disable-n",
+ GPIOD_OUT_LOW
[PATCH v3 3/3] Bluetooth: hci_qca: Add serdev support
Add support for Qualcomm serial slave devices. Probe the serial device,
retrieve its maximum speed and register a new hci uart device.
Signed-off-by: Thierry Escande
---
v3:
- Remove redundant call to gpiod_set_value() after devm_gpiod_get()
- Check returned values for clk_set_rate() and clk_prepare_enable()
- Use clk_disable_unprepare()
drivers/bluetooth/Kconfig | 2 +-
drivers/bluetooth/hci_qca.c | 109 +++-
2 files changed, 108 insertions(+), 3 deletions(-)
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 07e55cd8f8c8..c2a6a7ebd14b 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -195,7 +195,7 @@ config BT_HCIUART_BCM
config BT_HCIUART_QCA
bool "Qualcomm Atheros protocol support"
- depends on BT_HCIUART
+ depends on BT_HCIUART_SERDEV
select BT_HCIUART_H4
select BT_QCA
help
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 05ec530b8a3a..aa0886d5324f 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -29,7 +29,11 @@
*/
#include
+#include
#include
+#include
+#include
+#include
#include
#include
@@ -50,6 +54,9 @@
#define IBS_TX_IDLE_TIMEOUT_MS 2000
#define BAUDRATE_SETTLE_TIMEOUT_MS 300
+/* divclk4 rate */
+#define DIVCLK4_RATE_32KHZ 32768
+
/* HCI_IBS transmit side sleep protocol states */
enum tx_ibs_states {
HCI_IBS_TX_ASLEEP,
@@ -111,6 +118,12 @@ struct qca_data {
u64 votes_off;
};
+struct qca_serdev {
+ struct hci_uart serdev_hu;
+ struct gpio_desc *bt_en;
+ struct clk *divclk4;
+};
+
static void __serial_clock_on(struct tty_struct *tty)
{
/* TODO: Some chipset requires to enable UART clock on client
@@ -386,6 +399,7 @@ static void hci_ibs_wake_retrans_timeout(struct timer_list
*t)
/* Initialize protocol */
static int qca_open(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca;
BT_DBG("hu %p qca_open", hu);
@@ -444,6 +458,13 @@ static int qca_open(struct hci_uart *hu)
timer_setup(>tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
+ if (hu->serdev) {
+ serdev_device_open(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value(qcadev->bt_en, 1);
+ }
+
BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
qca->tx_idle_delay, qca->wake_retrans);
@@ -512,6 +533,7 @@ static int qca_flush(struct hci_uart *hu)
/* Close protocol */
static int qca_close(struct hci_uart *hu)
{
+ struct qca_serdev *qcadev;
struct qca_data *qca = hu->priv;
BT_DBG("hu %p qca close", hu);
@@ -525,6 +547,13 @@ static int qca_close(struct hci_uart *hu)
destroy_workqueue(qca->workqueue);
qca->hu = NULL;
+ if (hu->serdev) {
+ serdev_device_close(hu->serdev);
+
+ qcadev = serdev_device_get_drvdata(hu->serdev);
+ gpiod_set_value(qcadev->bt_en, 0);
+ }
+
kfree_skb(qca->rx_skb);
hu->priv = NULL;
@@ -885,6 +914,14 @@ static int qca_set_baudrate(struct hci_dev *hdev, uint8_t
baudrate)
return 0;
}
+static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
+{
+ if (hu->serdev)
+ serdev_device_set_baudrate(hu->serdev, speed);
+ else
+ hci_uart_set_baudrate(hu, speed);
+}
+
static int qca_setup(struct hci_uart *hu)
{
struct hci_dev *hdev = hu->hdev;
@@ -905,7 +942,7 @@ static int qca_setup(struct hci_uart *hu)
speed = hu->proto->init_speed;
if (speed)
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
/* Setup user speed if needed */
speed = 0;
@@ -924,7 +961,7 @@ static int qca_setup(struct hci_uart *hu)
ret);
return ret;
}
- hci_uart_set_baudrate(hu, speed);
+ host_set_baudrate(hu, speed);
}
/* Setup patch / NVM configurations */
@@ -958,12 +995,80 @@ static struct hci_uart_proto qca_proto = {
.dequeue= qca_dequeue,
};
+static int qca_serdev_probe(struct serdev_device *serdev)
+{
+ struct qca_serdev *qcadev;
+ int err;
+
+ qcadev = devm_kzalloc(>dev, sizeof(*qcadev), GFP_KERNEL);
+ if (!qcadev)
+ return -ENOMEM;
+
+ qcadev->serdev_hu.serdev = serdev;
+ serdev_device_set_drvdata(serdev, qcadev);
+
+ qcadev->bt_en = devm_gpiod_get(>dev, "bt-disable-n",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(qcadev
[PATCH v3 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 2 +- drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 215 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
[PATCH v3 0/3] Bluetooth: hci_qca: Add serdev support
Hi, This patchset enables the Qualcomm BT controller QCA6174 node in the device tree of the db820c board. This allows the bluetooth chipset to be probed and registered against the hci layer by using the serdev framework. This patchset also contains the documentation for the compatible string "qcom,qca6174-bt" related to this chipset. v3: - Address comments for patch #3 (details in patch) v2: - Fix author email Thierry Escande (3): arm64: dts: apq8096-db820c: enable bluetooth node dt-bindings: net: bluetooth: Add qualcomm-bluetooth Bluetooth: hci_qca: Add serdev support .../devicetree/bindings/net/qualcomm-bluetooth.txt | 34 +++ arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 17 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 32 ++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++ drivers/bluetooth/Kconfig | 2 +- drivers/bluetooth/hci_qca.c| 109 - 7 files changed, 215 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt -- 2.14.1
