RE: [PATCH 1/2] mmc: enable mmc host device to suspend/resume asynchronously
Looks good to me.
Acked-by: Venu Byravarasu
BR,
Venu
-Original Message-
From: Fu, Zhonghui [mailto:zhonghui...@linux.intel.com]
Sent: Monday, December 28, 2015 9:09 PM
To: Ulf Hansson
Cc: Adrian Hunter; chaotian.j...@mediatek.com; l...@metafoo.de; Venu
Byravarasu; sergei.shtyl...@cogentembedded.com; linux-mmc;
linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] mmc: enable mmc host device to suspend/resume
asynchronously
Now, PM core supports asynchronous suspend/resume mode for devices during
system suspend/resume, and the power state transition of one device may be
completed in separate kernel thread. PM core ensures all power state transition
dependency between devices. This patch enables mmc hosts to suspend/resume
asynchronously. This will take advantage of multicore and improve system
suspend/resume speed.
After applying this patch and enabling all mmc hosts' child devices to
suspend/resume asynchronously on ASUS T100TA, the system suspend-to-idle time
is reduced from 1645ms to 1107ms, and the system resume time is reduced from
940ms to 914ms.
Signed-off-by: Zhonghui Fu
---
drivers/mmc/core/host.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index
da950c4..7222fd7 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -339,6 +339,7 @@ struct mmc_host *mmc_alloc_host(int extra, struct device
*dev)
host->class_dev.parent = dev;
host->class_dev.class = _host_class;
device_initialize(>class_dev);
+ device_enable_async_suspend(>class_dev);
if (mmc_gpio_alloc(host)) {
put_device(>class_dev);
-- 1.7.1
RE: [PATCH 1/2] mmc: enable mmc host device to suspend/resume asynchronously
Looks good to me.
Acked-by: Venu Byravarasu <vbyravar...@nvidia.com>
BR,
Venu
-Original Message-
From: Fu, Zhonghui [mailto:zhonghui...@linux.intel.com]
Sent: Monday, December 28, 2015 9:09 PM
To: Ulf Hansson
Cc: Adrian Hunter; chaotian.j...@mediatek.com; l...@metafoo.de; Venu
Byravarasu; sergei.shtyl...@cogentembedded.com; linux-mmc;
linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] mmc: enable mmc host device to suspend/resume
asynchronously
Now, PM core supports asynchronous suspend/resume mode for devices during
system suspend/resume, and the power state transition of one device may be
completed in separate kernel thread. PM core ensures all power state transition
dependency between devices. This patch enables mmc hosts to suspend/resume
asynchronously. This will take advantage of multicore and improve system
suspend/resume speed.
After applying this patch and enabling all mmc hosts' child devices to
suspend/resume asynchronously on ASUS T100TA, the system suspend-to-idle time
is reduced from 1645ms to 1107ms, and the system resume time is reduced from
940ms to 914ms.
Signed-off-by: Zhonghui Fu <zhonghui...@linux.intel.com>
---
drivers/mmc/core/host.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index
da950c4..7222fd7 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -339,6 +339,7 @@ struct mmc_host *mmc_alloc_host(int extra, struct device
*dev)
host->class_dev.parent = dev;
host->class_dev.class = _host_class;
device_initialize(>class_dev);
+ device_enable_async_suspend(>class_dev);
if (mmc_gpio_alloc(host)) {
put_device(>class_dev);
-- 1.7.1
RE: [PATCH] usb: phy-tegra-usb.c: wrong pointer check for remap UTMI
Hi Stephen, Initially Chris sent this patch to Linux-USB alias alone & there I Acked it. Plz check http://marc.info/?l=linux-usb=138475663023376=1 Then he resent the patch to linux-kernel alias with my ACK added. Thanks, Venu > -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Wednesday, December 04, 2013 9:29 AM > To: Chris Ruehl; ba...@ti.com > Cc: gre...@linuxfoundation.org; thierry.red...@gmail.com; linux- > u...@vger.kernel.org; linux-te...@vger.kernel.org; linux- > ker...@vger.kernel.org; Venu Byravarasu > Subject: Re: [PATCH] usb: phy-tegra-usb.c: wrong pointer check for remap > UTMI > > On 12/03/2013 07:02 PM, Chris Ruehl wrote: > > usb: phy-tegra-usb.c: wrong pointer check for remap UTMI > > > > A wrong pointer was used to test the result of devm_ioremap() > > > > Signed-off-by: Chris Ruehl > > Acked-by: Venu Byravarasu > > Out of curiosity, when did that ack happen? I didn't see it. But anyway, > > Acked-by: Stephen Warren -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH] usb: phy-tegra-usb.c: wrong pointer check for remap UTMI
Hi Stephen, Initially Chris sent this patch to Linux-USB alias alone there I Acked it. Plz check http://marc.info/?l=linux-usbm=138475663023376w=1 Then he resent the patch to linux-kernel alias with my ACK added. Thanks, Venu -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Wednesday, December 04, 2013 9:29 AM To: Chris Ruehl; ba...@ti.com Cc: gre...@linuxfoundation.org; thierry.red...@gmail.com; linux- u...@vger.kernel.org; linux-te...@vger.kernel.org; linux- ker...@vger.kernel.org; Venu Byravarasu Subject: Re: [PATCH] usb: phy-tegra-usb.c: wrong pointer check for remap UTMI On 12/03/2013 07:02 PM, Chris Ruehl wrote: usb: phy-tegra-usb.c: wrong pointer check for remap UTMI A wrong pointer was used to test the result of devm_ioremap() Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk Acked-by: Venu Byravarasu vbyravar...@nvidia.com Out of curiosity, when did that ack happen? I didn't see it. But anyway, Acked-by: Stephen Warren swar...@nvidia.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/3] watchdog: xilinx: Fix driver header
> -Original Message- > From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel- > ow...@vger.kernel.org] On Behalf Of Michal Simek > Sent: Thursday, May 30, 2013 5:56 PM > To: linux-kernel@vger.kernel.org > Cc: Michal Simek; Michal Simek; Wim Van Sebroeck; linux- > watch...@vger.kernel.org > Subject: [PATCH 1/3] watchdog: xilinx: Fix driver header > > * PGP Signed by an unknown key > > - Remove reference for IP version > - Fix header coding style > - Remove notes which are visible from the code > - Fix driver license according to header > > Signed-off-by: Michal Simek > --- > drivers/watchdog/of_xilinx_wdt.c | 30 ++ > 1 file changed, 10 insertions(+), 20 deletions(-) > > diff --git a/drivers/watchdog/of_xilinx_wdt.c > b/drivers/watchdog/of_xilinx_wdt.c > index 2761ddb..d4a35ab 100644 > --- a/drivers/watchdog/of_xilinx_wdt.c > +++ b/drivers/watchdog/of_xilinx_wdt.c > @@ -1,23 +1,13 @@ > /* > -* of_xilinx_wdt.c 1.01 A Watchdog Device Driver for Xilinx > xps_timebase_wdt > -* > -* (C) Copyright 2011 (Alejandro Cabrera ) > -* > -* --- > -*/ > + * Watchdog Device Driver for Xilinx axi/xps_timebase_wdt > + * > + * (C) Copyright 2011 (Alejandro Cabrera ) Should year not be updated? > + * > + * This program is free software; you can redistribute it and/or -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/3] watchdog: xilinx: Fix driver header
-Original Message- From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel- ow...@vger.kernel.org] On Behalf Of Michal Simek Sent: Thursday, May 30, 2013 5:56 PM To: linux-kernel@vger.kernel.org Cc: Michal Simek; Michal Simek; Wim Van Sebroeck; linux- watch...@vger.kernel.org Subject: [PATCH 1/3] watchdog: xilinx: Fix driver header * PGP Signed by an unknown key - Remove reference for IP version - Fix header coding style - Remove notes which are visible from the code - Fix driver license according to header Signed-off-by: Michal Simek michal.si...@xilinx.com --- drivers/watchdog/of_xilinx_wdt.c | 30 ++ 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c index 2761ddb..d4a35ab 100644 --- a/drivers/watchdog/of_xilinx_wdt.c +++ b/drivers/watchdog/of_xilinx_wdt.c @@ -1,23 +1,13 @@ /* -* of_xilinx_wdt.c 1.01 A Watchdog Device Driver for Xilinx xps_timebase_wdt -* -* (C) Copyright 2011 (Alejandro Cabrera ald...@gmail.com) -* -* --- -*/ + * Watchdog Device Driver for Xilinx axi/xps_timebase_wdt + * + * (C) Copyright 2011 (Alejandro Cabrera ald...@gmail.com) Should year not be updated? + * + * This program is free software; you can redistribute it and/or -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 4/8] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu
---
delta from v1, v2 & v3: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 17d8112..8bcc12f 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy->clk = clk_get_sys(NULL, ulpi_config->clk);
if (IS_ERR(phy->clk)) {
pr_err("%s: can't get ulpi clock\n", __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy->clk);
}
if (!gpio_is_valid(ulpi_config->reset_gpio))
ulpi_config->reset_gpio =
--
1.7.0.4
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[PATCH v4 6/8] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu
---
delta from v1, v2 & v3: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 0ff1f3e..b8c688a 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy->regs;
- struct tegra_ulpi_config *config = phy->config;
- gpio_direction_output(config->reset_gpio, 0);
+ gpio_direction_output(phy->reset_gpio, 0);
msleep(5);
- gpio_direction_output(config->reset_gpio, 1);
+ gpio_direction_output(phy->reset_gpio, 1);
clk_prepare_enable(phy->clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy->config;
-
clk_disable(phy->clk);
- return gpio_direction_output(config->reset_gpio, 0);
+ return gpio_direction_output(phy->reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err("%s: can't get ulpi clock\n", __func__);
return PTR_ERR(phy->clk);
}
- if (!gpio_is_valid(ulpi_config->reset_gpio))
- ulpi_config->reset_gpio =
- of_get_named_gpio(phy->dev->of_node,
- "nvidia,phy-reset-gpio", 0);
- if (!gpio_is_valid(ulpi_config->reset_gpio)) {
+
+ phy->reset_gpio =
+ of_get_named_gpio(phy->dev->of_node,
+ "nvidia,phy-reset-gpio", 0);
+ if (!gpio_is_valid(phy->reset_gpio)) {
pr_err("%s: invalid reset gpio: %d\n", __func__,
- ulpi_config->reset_gpio);
+ phy->reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(ulpi_config->reset_gpio, 0);
+ gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ gpio_direction_output(phy->reset_gpio, 0);
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index ff2d959..97d123c 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
void (*set_pts)(struct usb_phy *x, u8 pts_val);
void (*set_phcd)(struct usb_phy *x, bool enable);
};
--
1.7.0.4
--
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[PATCH v4 8/8] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu
---
delta from v3:
Removed functions pointers to access PORTSC registers from PHY & accessing
them from PHY using exported functions.
delta from v2:
Rebased to TOT and applied same changes as on v2.
delta from v1:
1. Removed extra memory allocation for u_phy->otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
drivers/usb/host/ehci-tegra.c | 104 +---
drivers/usb/phy/phy-tegra-usb.c | 325 -
include/linux/usb/tegra_usb_phy.h | 11 +-
3 files changed, 230 insertions(+), 210 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 568a6fa..c8ee919 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -611,7 +611,7 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
/* Bits of PORTSC1, which will get cleared by writing 1 into them */
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-static void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
+void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
@@ -622,8 +622,9 @@ static void tegra_ehci_set_pts(struct usb_phy *x, u8
pts_val)
val |= TEGRA_USB_PORTSC1_PTS(pts_val & 3);
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-static void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
+void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
@@ -636,6 +637,7 @@ static void tegra_ehci_set_phcd(struct usb_phy *x, bool
enable)
val &= ~TEGRA_USB_PORTSC1_PHCD;
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
@@ -647,7 +649,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev->id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev->dev.platform_data;
@@ -670,38 +672,49 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(_ehci_hc_driver, >dev,
- dev_name(>dev));
- if (!hcd) {
- dev_err(>dev, "Unable to create HCD\n");
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra->clk = devm_clk_get(>dev, NULL);
if (IS_ERR(tegra->clk)) {
dev_err(>dev, "Can't get ehci clock\n");
- err = PTR_ERR(tegra->clk);
- goto fail_clk;
+ return PTR_ERR(tegra->clk);
}
err = clk_prepare_enable(tegra->clk);
if (err)
- goto fail_clk;
+ return err;
tegra_periph_reset_assert(tegra->clk);
udelay(1);
tegra_periph_reset_deassert(tegra->clk);
+ np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
+
tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
"nvidia,needs-double-reset");
+ hcd = usb_create_hcd(_ehci_hc_driver, >dev,
+ dev_name(>dev));
+ if (!hcd) {
+ dev_err(>dev, "Unable to create HCD\n");
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd->phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(>dev, "Failed to get I/O memory\n");
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
@@ -709,57 +722,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd->regs) {
dev_err(>dev, "Failed to remap I/O memory\n&qu
[PATCH v4 7/8] usb: phy: tegra: Add error handling & clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove the call to clk_disable_unprepare(); this function does not
prepare or enable the clock, so the error path should not disable or
unprepare it.
Signed-off-by: Venu Byravarasu
---
delta from v3:
Modified comment section to indicate 'otg_ulpi_create returned NULL'.
delta from v2:
Fixed checkpatch warnings.
delta from v1:
no changes.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index b8c688a..f423ae8 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy->regs;
- gpio_direction_output(phy->reset_gpio, 0);
+ ret = gpio_direction_output(phy->reset_gpio, 0);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d not set to 0\n", phy->reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy->reset_gpio, 1);
+ ret = gpio_direction_output(phy->reset_gpio, 1);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d not set to 1\n", phy->reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy->clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy->dev->of_node,
"nvidia,phy-reset-gpio", 0);
if (!gpio_is_valid(phy->reset_gpio)) {
- pr_err("%s: invalid reset gpio: %d\n", __func__,
+ dev_err(phy->dev, "invalid gpio: %d\n",
+ phy->reset_gpio);
+ err = phy->reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ if (err < 0) {
+ dev_err(phy->dev, "request failed for gpio: %d\n",
phy->reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy->reset_gpio, 0);
+ if (err < 0) {
+ dev_err(phy->dev, "gpio %d direction not set to
output\n",
+ phy->reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(phy->reset_gpio, 0);
+
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
+ if (!phy->ulpi) {
+ dev_err(phy->dev, "otg_ulpi_create returned NULL\n");
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err < 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy->pll_u);
- clk_put(phy->pll_u);
+cleanup_gpio_req:
+ gpio_free(phy->reset_gpio);
+cleanup_clk_get:
+ clk_put(phy->clk);
return err;
}
--
1.7.0.4
--
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[PATCH v4 5/8] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu
---
delta from v3 & v2:
No change
delta from v1:
replaced gadget with peripheral.
drivers/usb/host/ehci-tegra.c |1 -
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index e3eddc3..568a6fa 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -736,7 +736,6 @@ static int tegra_ehci_probe(struct platform_device *pdev)
tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
pdata->phy_config,
- TEGRA_USB_PHY_MODE_HOST,
tegra_ehci_set_pts,
tegra_ehci_set_phcd);
if (IS_ERR(tegra->phy)) {
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 8bcc12f..0ff1f3e 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -687,7 +687,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
+ void __iomem *regs, void *config,
void (*set_pts)(struct usb_phy *x, u8 pts_val),
void (*set_phcd)(struct usb_phy *x, bool enable))
@@ -705,7 +705,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy->instance = instance;
phy->regs = regs;
phy->config = config;
- phy->mode = phy_mode;
phy->dev = dev;
phy->is_legacy_phy =
of_property_read_bool(np, "nvidia,has-legacy-mode");
@@ -717,6 +716,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy->is_ulpi_phy = true;
+ err = of_property_match_string(np, "dr_mode", "otg");
+ if (err < 0) {
+ err = of_property_match_string(np, "dr_mode", "peripheral");
+ if (err < 0)
+ phy->mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy->mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy->mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy->config) {
if (phy->is_ulpi_phy) {
pr_err("%s: ulpi phy configuration missing", __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 1b7519a..ff2d959 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -66,7 +67,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
+ void __iomem *regs, void *config,
void (*set_pts)(struct usb_phy *x, u8 pts_val),
void (*set_phcd)(struct usb_phy *x, bool enable));
--
1.7.0.4
--
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[PATCH v4 2/8] arm: dt: Tegra20: Modify ULPI reset GPIO properties
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: Venu Byravarasu
---
delta from v3:
No code changes. Commit message only updated.
delta from v2:
Created this patch as per comments received at:
http://marc.info/?l=linux-usb=136501761810344=2
arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +-
arch/arm/boot/dts/tegra20-harmony.dts | 10 +-
arch/arm/boot/dts/tegra20-paz00.dts| 10 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 10 +-
arch/arm/boot/dts/tegra20-trimslice.dts| 10 +-
arch/arm/boot/dts/tegra20-ventana.dts | 10 +-
6 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index a573b94..c12af78 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -449,7 +449,11 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
+ };
+
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
sdhci@c8000600 {
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e7d5de4..e84f3f6 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -430,15 +430,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e3e0c99..e9ac2a9 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -429,15 +429,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index cee4c34..9dd4f8e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -571,15 +571,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9cc78a1..fd7afd6 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -316,15 +316,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-vent
[PATCH v4 3/8] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu
---
delta from v3:
Added status field to USB PHY DT nodes.
delta from v2:
1. Removed dr_mode setting to otg, due to lack of knowledge of all Vbus
supplies,
on all target platforms.
2. All changes related to 'nvidia,phy-reset-gpio' were moved to patch 2 of the
same series.
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
arch/arm/boot/dts/tegra20-harmony.dts |9 ++
arch/arm/boot/dts/tegra20-iris-512.dts |9 +-
arch/arm/boot/dts/tegra20-paz00.dts |9 ++
arch/arm/boot/dts/tegra20-seaboard.dts | 20
arch/arm/boot/dts/tegra20-tamonten.dtsi |4 ++
arch/arm/boot/dts/tegra20-trimslice.dts | 19
arch/arm/boot/dts/tegra20-ventana.dts |9 ++
arch/arm/boot/dts/tegra20-whistler.dts | 28 +
arch/arm/boot/dts/tegra20.dtsi | 49 +++---
9 files changed, 143 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e84f3f6..ec52937 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -428,12 +428,17 @@
status = "okay";
};
+ usb-phy@c500 {
+ status = "okay";
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
usb-phy@c5004000 {
+ status = "okay";
nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
@@ -441,6 +446,10 @@
status = "okay";
};
+ usb-phy@c5008000 {
+ status = "okay";
+ };
+
sdhci@c8000200 {
status = "okay";
cd-gpios = < 69 1>; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..9f64f70 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -38,13 +38,20 @@
usb@c500 {
status = "okay";
- dr_mode = "otg";
+ };
+
+ usb-phy@c500 {
+ status = "okay";
};
usb@c5008000 {
status = "okay";
};
+ usb-phy@c5008000 {
+ status = "okay";
+ };
+
serial@70006000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e9ac2a9..1c17ffa 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -427,12 +427,17 @@
status = "okay";
};
+ usb-phy@c500 {
+ status = "okay";
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
usb-phy@c5004000 {
+ status = "okay";
nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
@@ -440,6 +445,10 @@
status = "okay";
};
+ usb-phy@c5008000 {
+ status = "okay";
+ };
+
sdhci@c800 {
status = "okay";
cd-gpios = < 173 1>; /* gpio PV5 */
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9dd4f8e..b832088 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -569,12 +569,19 @@
dr_mode = "otg";
};
+ usb-phy@c500 {
+ status = "okay";
+ vbus-supply = <_reg>;
+ dr_mode = "otg";
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
usb-phy@c5004000 {
+ status = "okay";
nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
@@ -582,6 +589,10 @@
status = "okay";
};
+ usb-phy@c5008000 {
+ status = "okay";
+ };
+
[PATCH v4 1/8] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues:
1) Many properties are documented as being part of the EHCI controller
node, yet they apply more to the PHY device. They should be moved.
2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
reg entry to point at PHY1's register space. We can't assume the PHY1
driver is present, so the PHY3 driver will directly access those
registers.
3) The list of clocks required by the PHY was missing some required
entries.
4) UTMI PHY Timing parameters are added
5) VBUS control is now specified using a regulator rather than a plain GPIO
6) Added nvidia,is-wired property to indicate whether the device is
hard wired on the board, or pluggable.
This patch fixes the binding definition to resolve these issues.
Signed-off-by: Venu Byravarasu
---
delta from v3:
Added a blank line at EOF of nvidia,tegra20-usb-phy.txt.
delta from v2:
Moved vbus-supply under "Required properties for dr_mode == otg" heading.
delta from v1:
1. added UTMI PHY timing params.
2. replaced gadget with peripheral in dr_mode
3. added nvidia,is-wired & vbus-supply params.
.../bindings/usb/nvidia,tegra20-ehci.txt | 27 ++--
.../bindings/usb/nvidia,tegra20-usb-phy.txt| 41 ++-
2 files changed, 43 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 34c9528..df09330 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following
modifications
and additions :
Required properties :
- - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
- used in host mode.
- - phy_type : Should be one of "ulpi" or "utmi".
- - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
- - nvidia,phy : phandle of the PHY instance, the controller is connected to.
-
-Required properties for phy_type == ulpi:
- - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
+ - compatible : Should be "nvidia,tegra20-ehci".
+ - nvidia,phy : phandle of the PHY that the controller is connected to.
+ - clocks : Contains a single entry which defines the USB controller's clock.
Optional properties:
- - dr_mode : dual role mode. Indicates the working mode for
- nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
- or "otg". Default to "host" if not defined for backward compatibility.
- host means this is a host controller
- peripheral means it is device controller
- otg means it can operate as either ("on the go")
- - nvidia,has-legacy-mode : boolean indicates whether this controller can
-operate in legacy mode (as APX 2500 / 2600). In legacy mode some
-registers are accessed through the APB_MISC base address instead of
-the USB controller. Since this is a legacy issue it probably does not
-warrant a compatible string of its own.
- - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2
-USB ports, which need reset twice due to hardware issues.
+ - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
+ USB ports, which need reset twice due to hardware issues.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index 6bdaba2..c4c9e9e 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -4,14 +4,49 @@ The device node for Tegra SOC USB PHY:
Required properties :
- compatible : Should be "nvidia,tegra20-usb-phy".
- - reg : Address and length of the register set for the USB PHY interface.
- - phy_type : Should be one of "ulpi" or "utmi".
+ - reg : Defines the following set of registers, in the order listed:
+ - The PHY's own register set.
+ Always present.
+ - The register set of the PHY containing the UTMI pad control registers.
+ Present if-and-only-if phy_type == utmi.
+ - phy_type : Should be one of "utmi", "ulpi" or "hsic".
+ - clocks : Defines the clocks listed in the clock-names property.
+ - clock-names : The following clock names must be present:
+ - reg: The clock needed to access the PHY's own registers. This is the
+ associated EHCI controller's clock. Always present.
+ - pll_u: PLL_U. Always present.
+ - timer: The timeout clock (clk_m). Present if phy_type == utmi.
+ - utmi-pads: The clock needed to access the UTMI pad control registers.
+ Present if phy_type == utmi.
+ - ulpi-link: The clock Tegra provides to the ULPI PHY (
[PATCH v4 0/8] Tegra USB PHY driver series
delta from v3: This patch series is prepared as follow up of TEGRA USB PHY driver patch series discussed at: https://lkml.org/lkml/2013/5/10/241 Venu Byravarasu (8): ARM: tegra: finalize USB EHCI and PHY bindings arm: dt: Tegra20: Modify ULPI reset GPIO properties ARM: tegra: update device trees for USB binding rework usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling & clean up. usb: phy: registering Tegra USB PHY as platform driver .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 41 +++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +- arch/arm/boot/dts/tegra20-harmony.dts | 15 +- arch/arm/boot/dts/tegra20-iris-512.dts |9 +- arch/arm/boot/dts/tegra20-paz00.dts| 15 +- arch/arm/boot/dts/tegra20-seaboard.dts | 26 ++- arch/arm/boot/dts/tegra20-tamonten.dtsi|4 + arch/arm/boot/dts/tegra20-trimslice.dts| 25 ++- arch/arm/boot/dts/tegra20-ventana.dts | 15 +- arch/arm/boot/dts/tegra20-whistler.dts | 28 ++ arch/arm/boot/dts/tegra20.dtsi | 49 +++- drivers/usb/host/ehci-tegra.c | 105 +++ drivers/usb/phy/phy-tegra-usb.c| 318 include/linux/usb/tegra_usb_phy.h | 13 +- 15 files changed, 451 insertions(+), 245 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 0/8] Tegra USB PHY driver series
delta from v3: This patch series is prepared as follow up of TEGRA USB PHY driver patch series discussed at: https://lkml.org/lkml/2013/5/10/241 Venu Byravarasu (8): ARM: tegra: finalize USB EHCI and PHY bindings arm: dt: Tegra20: Modify ULPI reset GPIO properties ARM: tegra: update device trees for USB binding rework usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling clean up. usb: phy: registering Tegra USB PHY as platform driver .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 41 +++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +- arch/arm/boot/dts/tegra20-harmony.dts | 15 +- arch/arm/boot/dts/tegra20-iris-512.dts |9 +- arch/arm/boot/dts/tegra20-paz00.dts| 15 +- arch/arm/boot/dts/tegra20-seaboard.dts | 26 ++- arch/arm/boot/dts/tegra20-tamonten.dtsi|4 + arch/arm/boot/dts/tegra20-trimslice.dts| 25 ++- arch/arm/boot/dts/tegra20-ventana.dts | 15 +- arch/arm/boot/dts/tegra20-whistler.dts | 28 ++ arch/arm/boot/dts/tegra20.dtsi | 49 +++- drivers/usb/host/ehci-tegra.c | 105 +++ drivers/usb/phy/phy-tegra-usb.c| 318 include/linux/usb/tegra_usb_phy.h | 13 +- 15 files changed, 451 insertions(+), 245 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/8] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues: 1) Many properties are documented as being part of the EHCI controller node, yet they apply more to the PHY device. They should be moved. 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a reg entry to point at PHY1's register space. We can't assume the PHY1 driver is present, so the PHY3 driver will directly access those registers. 3) The list of clocks required by the PHY was missing some required entries. 4) UTMI PHY Timing parameters are added 5) VBUS control is now specified using a regulator rather than a plain GPIO 6) Added nvidia,is-wired property to indicate whether the device is hard wired on the board, or pluggable. This patch fixes the binding definition to resolve these issues. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- delta from v3: Added a blank line at EOF of nvidia,tegra20-usb-phy.txt. delta from v2: Moved vbus-supply under Required properties for dr_mode == otg heading. delta from v1: 1. added UTMI PHY timing params. 2. replaced gadget with peripheral in dr_mode 3. added nvidia,is-wired vbus-supply params. .../bindings/usb/nvidia,tegra20-ehci.txt | 27 ++-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 41 ++- 2 files changed, 43 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt index 34c9528..df09330 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -6,27 +6,10 @@ Practice : Universal Serial Bus with the following modifications and additions : Required properties : - - compatible : Should be nvidia,tegra20-ehci for USB controllers - used in host mode. - - phy_type : Should be one of ulpi or utmi. - - nvidia,vbus-gpio : If present, specifies a gpio that needs to be - activated for the bus to be powered. - - nvidia,phy : phandle of the PHY instance, the controller is connected to. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. + - compatible : Should be nvidia,tegra20-ehci. + - nvidia,phy : phandle of the PHY that the controller is connected to. + - clocks : Contains a single entry which defines the USB controller's clock. Optional properties: - - dr_mode : dual role mode. Indicates the working mode for - nvidia,tegra20-ehci compatible controllers. Can be host, peripheral, - or otg. Default to host if not defined for backward compatibility. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either (on the go) - - nvidia,has-legacy-mode : boolean indicates whether this controller can -operate in legacy mode (as APX 2500 / 2600). In legacy mode some -registers are accessed through the APB_MISC base address instead of -the USB controller. Since this is a legacy issue it probably does not -warrant a compatible string of its own. - - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2 -USB ports, which need reset twice due to hardware issues. + - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 + USB ports, which need reset twice due to hardware issues. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt index 6bdaba2..c4c9e9e 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt @@ -4,14 +4,49 @@ The device node for Tegra SOC USB PHY: Required properties : - compatible : Should be nvidia,tegra20-usb-phy. - - reg : Address and length of the register set for the USB PHY interface. - - phy_type : Should be one of ulpi or utmi. + - reg : Defines the following set of registers, in the order listed: + - The PHY's own register set. + Always present. + - The register set of the PHY containing the UTMI pad control registers. + Present if-and-only-if phy_type == utmi. + - phy_type : Should be one of utmi, ulpi or hsic. + - clocks : Defines the clocks listed in the clock-names property. + - clock-names : The following clock names must be present: + - reg: The clock needed to access the PHY's own registers. This is the + associated EHCI controller's clock. Always present. + - pll_u: PLL_U. Always present. + - timer: The timeout clock (clk_m). Present if phy_type == utmi. + - utmi-pads: The clock needed to access the UTMI pad control registers. + Present if phy_type == utmi. + - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2). + Present if phy_type == ulpi, and ULPI link mode is in use. Required properties for phy_type == ulpi: - nvidia,phy-reset-gpio : The GPIO used to reset the PHY
[PATCH v4 3/8] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v3:
Added status field to USB PHY DT nodes.
delta from v2:
1. Removed dr_mode setting to otg, due to lack of knowledge of all Vbus
supplies,
on all target platforms.
2. All changes related to 'nvidia,phy-reset-gpio' were moved to patch 2 of the
same series.
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
arch/arm/boot/dts/tegra20-harmony.dts |9 ++
arch/arm/boot/dts/tegra20-iris-512.dts |9 +-
arch/arm/boot/dts/tegra20-paz00.dts |9 ++
arch/arm/boot/dts/tegra20-seaboard.dts | 20
arch/arm/boot/dts/tegra20-tamonten.dtsi |4 ++
arch/arm/boot/dts/tegra20-trimslice.dts | 19
arch/arm/boot/dts/tegra20-ventana.dts |9 ++
arch/arm/boot/dts/tegra20-whistler.dts | 28 +
arch/arm/boot/dts/tegra20.dtsi | 49 +++---
9 files changed, 143 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e84f3f6..ec52937 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -428,12 +428,17 @@
status = okay;
};
+ usb-phy@c500 {
+ status = okay;
+ };
+
usb@c5004000 {
status = okay;
nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
usb-phy@c5004000 {
+ status = okay;
nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
@@ -441,6 +446,10 @@
status = okay;
};
+ usb-phy@c5008000 {
+ status = okay;
+ };
+
sdhci@c8000200 {
status = okay;
cd-gpios = gpio 69 1; /* gpio PI5 */
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..9f64f70 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -38,13 +38,20 @@
usb@c500 {
status = okay;
- dr_mode = otg;
+ };
+
+ usb-phy@c500 {
+ status = okay;
};
usb@c5008000 {
status = okay;
};
+ usb-phy@c5008000 {
+ status = okay;
+ };
+
serial@70006000 {
status = okay;
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e9ac2a9..1c17ffa 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -427,12 +427,17 @@
status = okay;
};
+ usb-phy@c500 {
+ status = okay;
+ };
+
usb@c5004000 {
status = okay;
nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
usb-phy@c5004000 {
+ status = okay;
nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
@@ -440,6 +445,10 @@
status = okay;
};
+ usb-phy@c5008000 {
+ status = okay;
+ };
+
sdhci@c800 {
status = okay;
cd-gpios = gpio 173 1; /* gpio PV5 */
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9dd4f8e..b832088 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -569,12 +569,19 @@
dr_mode = otg;
};
+ usb-phy@c500 {
+ status = okay;
+ vbus-supply = vbus_reg;
+ dr_mode = otg;
+ };
+
usb@c5004000 {
status = okay;
nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
usb-phy@c5004000 {
+ status = okay;
nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
@@ -582,6 +589,10 @@
status = okay;
};
+ usb-phy@c5008000 {
+ status = okay;
+ };
+
sdhci@c800 {
status = okay;
power-gpios = gpio 86 0; /* gpio PK6 */
@@ -807,6 +818,15 @@
gpio = pmic 1 0;
enable-active-high;
};
+
+ vbus_reg: regulator@3 {
+ compatible = regulator-fixed;
+ reg = 3
[PATCH v4 2/8] arm: dt: Tegra20: Modify ULPI reset GPIO properties
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v3:
No code changes. Commit message only updated.
delta from v2:
Created this patch as per comments received at:
http://marc.info/?l=linux-usbm=136501761810344w=2
arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +-
arch/arm/boot/dts/tegra20-harmony.dts | 10 +-
arch/arm/boot/dts/tegra20-paz00.dts| 10 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 10 +-
arch/arm/boot/dts/tegra20-trimslice.dts| 10 +-
arch/arm/boot/dts/tegra20-ventana.dts | 10 +-
6 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index a573b94..c12af78 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -449,7 +449,11 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
+ };
+
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
sdhci@c8000600 {
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e7d5de4..e84f3f6 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -430,15 +430,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e3e0c99..e9ac2a9 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -429,15 +429,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index cee4c34..9dd4f8e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -571,15 +571,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9cc78a1..fd7afd6 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -316,15 +316,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
b/arch/arm/boot/dts/tegra20-ventana.dts
index dd38f1f..a75a0e7 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -507,15 +507,15 @@
usb@c5004000
[PATCH v4 5/8] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v3 v2:
No change
delta from v1:
replaced gadget with peripheral.
drivers/usb/host/ehci-tegra.c |1 -
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index e3eddc3..568a6fa 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -736,7 +736,6 @@ static int tegra_ehci_probe(struct platform_device *pdev)
tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
pdata-phy_config,
- TEGRA_USB_PHY_MODE_HOST,
tegra_ehci_set_pts,
tegra_ehci_set_phcd);
if (IS_ERR(tegra-phy)) {
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 8bcc12f..0ff1f3e 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -687,7 +687,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
+ void __iomem *regs, void *config,
void (*set_pts)(struct usb_phy *x, u8 pts_val),
void (*set_phcd)(struct usb_phy *x, bool enable))
@@ -705,7 +705,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy-instance = instance;
phy-regs = regs;
phy-config = config;
- phy-mode = phy_mode;
phy-dev = dev;
phy-is_legacy_phy =
of_property_read_bool(np, nvidia,has-legacy-mode);
@@ -717,6 +716,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy-is_ulpi_phy = true;
+ err = of_property_match_string(np, dr_mode, otg);
+ if (err 0) {
+ err = of_property_match_string(np, dr_mode, peripheral);
+ if (err 0)
+ phy-mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy-mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy-mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy-config) {
if (phy-is_ulpi_phy) {
pr_err(%s: ulpi phy configuration missing, __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 1b7519a..ff2d959 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -66,7 +67,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
+ void __iomem *regs, void *config,
void (*set_pts)(struct usb_phy *x, u8 pts_val),
void (*set_phcd)(struct usb_phy *x, bool enable));
--
1.7.0.4
--
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[PATCH v4 7/8] usb: phy: tegra: Add error handling clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove the call to clk_disable_unprepare(); this function does not
prepare or enable the clock, so the error path should not disable or
unprepare it.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v3:
Modified comment section to indicate 'otg_ulpi_create returned NULL'.
delta from v2:
Fixed checkpatch warnings.
delta from v1:
no changes.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index b8c688a..f423ae8 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy-regs;
- gpio_direction_output(phy-reset_gpio, 0);
+ ret = gpio_direction_output(phy-reset_gpio, 0);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d not set to 0\n, phy-reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy-reset_gpio, 1);
+ ret = gpio_direction_output(phy-reset_gpio, 1);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d not set to 1\n, phy-reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy-clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy-dev-of_node,
nvidia,phy-reset-gpio, 0);
if (!gpio_is_valid(phy-reset_gpio)) {
- pr_err(%s: invalid reset gpio: %d\n, __func__,
+ dev_err(phy-dev, invalid gpio: %d\n,
+ phy-reset_gpio);
+ err = phy-reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ if (err 0) {
+ dev_err(phy-dev, request failed for gpio: %d\n,
phy-reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy-reset_gpio, 0);
+ if (err 0) {
+ dev_err(phy-dev, gpio %d direction not set to
output\n,
+ phy-reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(phy-reset_gpio, 0);
+
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
+ if (!phy-ulpi) {
+ dev_err(phy-dev, otg_ulpi_create returned NULL\n);
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy-pll_u);
- clk_put(phy-pll_u);
+cleanup_gpio_req:
+ gpio_free(phy-reset_gpio);
+cleanup_clk_get:
+ clk_put(phy-clk);
return err;
}
--
1.7.0.4
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[PATCH v4 8/8] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v3:
Removed functions pointers to access PORTSC registers from PHY accessing
them from PHY using exported functions.
delta from v2:
Rebased to TOT and applied same changes as on v2.
delta from v1:
1. Removed extra memory allocation for u_phy-otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
drivers/usb/host/ehci-tegra.c | 104 +---
drivers/usb/phy/phy-tegra-usb.c | 325 -
include/linux/usb/tegra_usb_phy.h | 11 +-
3 files changed, 230 insertions(+), 210 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 568a6fa..c8ee919 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -611,7 +611,7 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
/* Bits of PORTSC1, which will get cleared by writing 1 into them */
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-static void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
+void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
@@ -622,8 +622,9 @@ static void tegra_ehci_set_pts(struct usb_phy *x, u8
pts_val)
val |= TEGRA_USB_PORTSC1_PTS(pts_val 3);
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-static void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
+void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
@@ -636,6 +637,7 @@ static void tegra_ehci_set_phcd(struct usb_phy *x, bool
enable)
val = ~TEGRA_USB_PORTSC1_PHCD;
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
@@ -647,7 +649,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev-id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev-dev.platform_data;
@@ -670,38 +672,49 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
- dev_name(pdev-dev));
- if (!hcd) {
- dev_err(pdev-dev, Unable to create HCD\n);
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra-clk = devm_clk_get(pdev-dev, NULL);
if (IS_ERR(tegra-clk)) {
dev_err(pdev-dev, Can't get ehci clock\n);
- err = PTR_ERR(tegra-clk);
- goto fail_clk;
+ return PTR_ERR(tegra-clk);
}
err = clk_prepare_enable(tegra-clk);
if (err)
- goto fail_clk;
+ return err;
tegra_periph_reset_assert(tegra-clk);
udelay(1);
tegra_periph_reset_deassert(tegra-clk);
+ np_phy = of_parse_phandle(pdev-dev.of_node, nvidia,phy, 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
+
tegra-needs_double_reset = of_property_read_bool(pdev-dev.of_node,
nvidia,needs-double-reset);
+ hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
+ dev_name(pdev-dev));
+ if (!hcd) {
+ dev_err(pdev-dev, Unable to create HCD\n);
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd-phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(pdev-dev, Failed to get I/O memory\n);
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd-rsrc_start = res-start;
hcd-rsrc_len = resource_size(res);
@@ -709,57 +722,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd-regs) {
dev_err(pdev-dev, Failed to remap I/O memory\n);
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
[PATCH v4 6/8] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1, v2 v3: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 0ff1f3e..b8c688a 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy-regs;
- struct tegra_ulpi_config *config = phy-config;
- gpio_direction_output(config-reset_gpio, 0);
+ gpio_direction_output(phy-reset_gpio, 0);
msleep(5);
- gpio_direction_output(config-reset_gpio, 1);
+ gpio_direction_output(phy-reset_gpio, 1);
clk_prepare_enable(phy-clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy-config;
-
clk_disable(phy-clk);
- return gpio_direction_output(config-reset_gpio, 0);
+ return gpio_direction_output(phy-reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err(%s: can't get ulpi clock\n, __func__);
return PTR_ERR(phy-clk);
}
- if (!gpio_is_valid(ulpi_config-reset_gpio))
- ulpi_config-reset_gpio =
- of_get_named_gpio(phy-dev-of_node,
- nvidia,phy-reset-gpio, 0);
- if (!gpio_is_valid(ulpi_config-reset_gpio)) {
+
+ phy-reset_gpio =
+ of_get_named_gpio(phy-dev-of_node,
+ nvidia,phy-reset-gpio, 0);
+ if (!gpio_is_valid(phy-reset_gpio)) {
pr_err(%s: invalid reset gpio: %d\n, __func__,
- ulpi_config-reset_gpio);
+ phy-reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(ulpi_config-reset_gpio, 0);
+ gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ gpio_direction_output(phy-reset_gpio, 0);
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index ff2d959..97d123c 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
void (*set_pts)(struct usb_phy *x, u8 pts_val);
void (*set_phcd)(struct usb_phy *x, bool enable);
};
--
1.7.0.4
--
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[PATCH v4 4/8] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1, v2 v3: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 17d8112..8bcc12f 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy-clk = clk_get_sys(NULL, ulpi_config-clk);
if (IS_ERR(phy-clk)) {
pr_err(%s: can't get ulpi clock\n, __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy-clk);
}
if (!gpio_is_valid(ulpi_config-reset_gpio))
ulpi_config-reset_gpio =
--
1.7.0.4
--
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[PATCH v3 02/10] arm: dt: Tegra20: Modify ULPI reset GPIO properties
changes with this patch:
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: Venu Byravarasu
---
Created this patch as per comments received at:
http://marc.info/?l=linux-usb=136501761810344=2
arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +-
arch/arm/boot/dts/tegra20-harmony.dts | 10 +-
arch/arm/boot/dts/tegra20-paz00.dts| 10 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 10 +-
arch/arm/boot/dts/tegra20-trimslice.dts| 10 +-
arch/arm/boot/dts/tegra20-ventana.dts | 10 +-
6 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index a573b94..c12af78 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -449,7 +449,11 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
+ };
+
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
sdhci@c8000600 {
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e7d5de4..e84f3f6 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -430,15 +430,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e3e0c99..e9ac2a9 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -429,15 +429,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index cee4c34..9dd4f8e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -571,15 +571,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 1>; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9cc78a1..fd7afd6 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -316,15 +316,15 @@
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
b/arch/arm/boot/dts/tegra20-ventana.dts
index dd38f1f..
[PATCH v3 07/10] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu
---
delta from v1 & v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 16851e2..a2a89a9 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy->regs;
- struct tegra_ulpi_config *config = phy->config;
- gpio_direction_output(config->reset_gpio, 0);
+ gpio_direction_output(phy->reset_gpio, 0);
msleep(5);
- gpio_direction_output(config->reset_gpio, 1);
+ gpio_direction_output(phy->reset_gpio, 1);
clk_prepare_enable(phy->clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy->config;
-
clk_disable(phy->clk);
- return gpio_direction_output(config->reset_gpio, 0);
+ return gpio_direction_output(phy->reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err("%s: can't get ulpi clock\n", __func__);
return PTR_ERR(phy->clk);
}
- if (!gpio_is_valid(ulpi_config->reset_gpio))
- ulpi_config->reset_gpio =
- of_get_named_gpio(phy->dev->of_node,
- "nvidia,phy-reset-gpio", 0);
- if (!gpio_is_valid(ulpi_config->reset_gpio)) {
+
+ phy->reset_gpio =
+ of_get_named_gpio(phy->dev->of_node,
+ "nvidia,phy-reset-gpio", 0);
+ if (!gpio_is_valid(phy->reset_gpio)) {
pr_err("%s: invalid reset gpio: %d\n", __func__,
- ulpi_config->reset_gpio);
+ phy->reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(ulpi_config->reset_gpio, 0);
+ gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ gpio_direction_output(phy->reset_gpio, 0);
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index a7af923..6cfb8f1 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
--
1.7.0.4
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[PATCH v3 03/10] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
The only exception is otg property which was removed, as VBUS details
for all the boards are not known. This should not affect for those boards
in any way, as otg is not really supported in Tegra20 USB driver, though
it was set in DT properties.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
delta from v2:
1. Removed dr_mode setting to otg, due to:
a. Any ways existing Tegra USB driver does not support OTG.
b. lack of knowledge of all Vbus supplies, on all target platforms.
Once real OTG support is added to Tegra USB driver, then this property can be
set back to otg, for target platforms.
2. All changes related to 'nvidia,phy-reset-gpio' were moved to patch 2 of the
same series.
arch/arm/boot/dts/tegra20-iris-512.dts |1 -
arch/arm/boot/dts/tegra20-seaboard.dts | 14 +-
arch/arm/boot/dts/tegra20-trimslice.dts | 13 +
arch/arm/boot/dts/tegra20-whistler.dts | 26 +
arch/arm/boot/dts/tegra20.dtsi | 46 +++
5 files changed, 86 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..b7f71e8 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -38,7 +38,6 @@
usb@c500 {
status = "okay";
- dr_mode = "otg";
};
usb@c5008000 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9dd4f8e..d51e969 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -566,7 +566,10 @@
usb@c500 {
status = "okay";
nvidia,vbus-gpio = < 24 0>; /* PD0 */
- dr_mode = "otg";
+ };
+
+ usb-phy@c500 {
+ vbus-supply = <_reg>;
};
usb@c5004000 {
@@ -807,6 +810,15 @@
gpio = < 1 0>;
enable-active-high;
};
+
+ vbus_reg: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "vdd_5v0";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 24 0>; /* PD0 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index fd7afd6..85699f0 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -314,6 +314,10 @@
nvidia,vbus-gpio = < 170 0>; /* gpio PV2 */
};
+ usb-phy@c500 {
+ vbus-supply = <_reg>;
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 168 1>; /* gpio PV0, active low
*/
@@ -390,6 +394,15 @@
regulator-max-microvolt = <180>;
regulator-always-on;
};
+
+ vbus_reg: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "vdd_5v0";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 170 0>; /* PV2 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts
b/arch/arm/boot/dts/tegra20-whistler.dts
index d2567f8..9aec63a 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -511,11 +511,19 @@
nvidia,vbus-gpio = < 0 0>; /* GPIO_PMU0 */
};
+ usb-phy@c500 {
+ vbus-supply = <_reg1>;
+ };
+
usb@c5008000 {
status = "okay";
nvidia,vbus-gpio = < 1 0>; /* GPIO_PMU1 */
};
+ usb-phy@c5008000 {
+ vbus-supply = <_reg2>;
+ };
+
sdhci@c8000400 {
status = "okay";
cd-gpios = < 69 1>; /* gpio PI5 */
@@ -568,6 +576,24 @@
regulator-max-microvolt = <500>;
[PATCH v3 04/10] Revert "usb: phy: tegra: don't call into tegra-ehci directly"
This reverts commit ee5d5499edb94cd03738a52a7e234b139da8fd72.
Signed-off-by: Venu Byravarasu
---
As PHY is being registered as separate driver, solution proposed with
this patch cannot work anymore.
Hence pushed patch 10 of this series to address the issue.
drivers/usb/host/ehci-tegra.c | 10 +-
drivers/usb/phy/phy-tegra-usb.c | 13 -
include/linux/usb/tegra_usb_phy.h | 10 +-
3 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index e3eddc3..ed201ae 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -611,7 +611,7 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
/* Bits of PORTSC1, which will get cleared by writing 1 into them */
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-static void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
+void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
@@ -622,8 +622,9 @@ static void tegra_ehci_set_pts(struct usb_phy *x, u8
pts_val)
val |= TEGRA_USB_PORTSC1_PTS(pts_val & 3);
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-static void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
+void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
@@ -636,6 +637,7 @@ static void tegra_ehci_set_phcd(struct usb_phy *x, bool
enable)
val &= ~TEGRA_USB_PORTSC1_PHCD;
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
@@ -736,9 +738,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
pdata->phy_config,
- TEGRA_USB_PHY_MODE_HOST,
- tegra_ehci_set_pts,
- tegra_ehci_set_phcd);
+ TEGRA_USB_PHY_MODE_HOST);
if (IS_ERR(tegra->phy)) {
dev_err(>dev, "Failed to open USB phy\n");
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 17d8112..5487d38 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -299,7 +299,7 @@ static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
val &= ~USB_SUSP_SET;
writel(val, base + USB_SUSP_CTRL);
} else
- phy->set_phcd(>u_phy, true);
+ tegra_ehci_set_phcd(>u_phy, true);
if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0) < 0)
pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
@@ -321,7 +321,7 @@ static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
val &= ~USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
} else
- phy->set_phcd(>u_phy, false);
+ tegra_ehci_set_phcd(>u_phy, false);
if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
USB_PHY_CLK_VALID))
@@ -444,7 +444,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
utmi_phy_clk_enable(phy);
if (!phy->is_legacy_phy)
- phy->set_pts(>u_phy, 0);
+ tegra_ehci_set_pts(>u_phy, 0);
return 0;
}
@@ -688,10 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
- void (*set_pts)(struct usb_phy *x, u8 pts_val),
- void (*set_phcd)(struct usb_phy *x, bool enable))
-
+ void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -710,8 +707,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy->dev = dev;
phy->is_legacy_phy =
of_property_read_bool(np, "nvidia,has-legacy-mode");
- phy->set_pts = set_pts;
- phy->set_phcd = set_phcd;
err = of_property_match_string(np, "phy_type", "ulpi");
if (err < 0)
phy->is_ulpi_phy = false;
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 1b7519a..9ebebe9 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -61,14 +61,10 @@ struct tegra_usb_phy {
struct
[PATCH v3 05/10] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu
---
delta from v1:
replaced gadget with peripheral.
delta from v2:
No change
drivers/usb/host/ehci-tegra.c |3 +--
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index ed201ae..f4b2164 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -737,8 +737,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config,
- TEGRA_USB_PHY_MODE_HOST);
+ pdata->phy_config);
if (IS_ERR(tegra->phy)) {
dev_err(>dev, "Failed to open USB phy\n");
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 5487d38..91b6e29 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -688,7 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
+ void __iomem *regs, void *config)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -703,7 +703,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy->instance = instance;
phy->regs = regs;
phy->config = config;
- phy->mode = phy_mode;
phy->dev = dev;
phy->is_legacy_phy =
of_property_read_bool(np, "nvidia,has-legacy-mode");
@@ -713,6 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy->is_ulpi_phy = true;
+ err = of_property_match_string(np, "dr_mode", "otg");
+ if (err < 0) {
+ err = of_property_match_string(np, "dr_mode", "peripheral");
+ if (err < 0)
+ phy->mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy->mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy->mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy->config) {
if (phy->is_ulpi_phy) {
pr_err("%s: ulpi phy configuration missing", __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 9ebebe9..a7af923 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -64,7 +65,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);
+ void __iomem *regs, void *config);
void tegra_usb_phy_preresume(struct usb_phy *phy);
--
1.7.0.4
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[PATCH v3 10/10] Usb: Move PORTSC access to PHY
Changes with this patch:
1. As PHY is being registered as separate platform driver & EHCI Tegra
is no more calling PHY open, moved tegra_ehci_set_pts & tegra_ehci_set_phcd
functions to PHY driver,
2. Removed unused defines for multiple USB port base addresses
Signed-off-by: Venu Byravarasu
---
This is a new patch being added into the series, to address the revert done
with patch#4 of the series.
drivers/usb/host/ehci-tegra.c | 49 -
drivers/usb/phy/phy-tegra-usb.c | 37 +--
include/linux/usb/tegra_usb_phy.h |4 ---
3 files changed, 34 insertions(+), 56 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 406abd9..2340d7a 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -30,15 +30,6 @@
#include
#include
-#define TEGRA_USB_BASE 0xC500
-#define TEGRA_USB2_BASE0xC5004000
-#define TEGRA_USB3_BASE0xC5008000
-
-/* PORTSC registers */
-#define TEGRA_USB_PORTSC1 0x184
-#define TEGRA_USB_PORTSC1_PTS(x) (((x) & 0x3) << 30)
-#define TEGRA_USB_PORTSC1_PHCD (1 << 23)
-
#define TEGRA_USB_DMA_ALIGN 32
struct tegra_ehci_hcd {
@@ -608,37 +599,6 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
#endif
-/* Bits of PORTSC1, which will get cleared by writing 1 into them */
-#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-
-void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
-{
- unsigned long val;
- struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
- void __iomem *base = hcd->regs;
-
- val = readl(base + TEGRA_USB_PORTSC1) & ~TEGRA_PORTSC1_RWC_BITS;
- val &= ~TEGRA_USB_PORTSC1_PTS(3);
- val |= TEGRA_USB_PORTSC1_PTS(pts_val & 3);
- writel(val, base + TEGRA_USB_PORTSC1);
-}
-EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-
-void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
-{
- unsigned long val;
- struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
- void __iomem *base = hcd->regs;
-
- val = readl(base + TEGRA_USB_PORTSC1) & ~TEGRA_PORTSC1_RWC_BITS;
- if (enable)
- val |= TEGRA_USB_PORTSC1_PHCD;
- else
- val &= ~TEGRA_USB_PORTSC1_PHCD;
- writel(val, base + TEGRA_USB_PORTSC1);
-}
-EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
-
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
static int tegra_ehci_probe(struct platform_device *pdev)
@@ -731,15 +691,6 @@ static int tegra_ehci_probe(struct platform_device *pdev)
goto cleanup_hcd_create;
}
- u_phy->otg = devm_kzalloc(>dev, sizeof(struct usb_otg),
-GFP_KERNEL);
- if (!u_phy->otg) {
- dev_err(>dev, "Failed to alloc memory for otg\n");
- err = -ENOMEM;
- goto cleanup_phy;
- }
- u_phy->otg->host = hcd_to_bus(hcd);
-
err = usb_phy_set_suspend(hcd->phy, 0);
if (err) {
dev_err(>dev, "Failed to power on the phy\n");
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 4d81b19..b2a909f 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -33,6 +33,7 @@
#include
#include
#include
+#include
#define ULPI_VIEWPORT 0x170
@@ -196,6 +197,36 @@ static struct tegra_utmip_config utmip_default[] = {
},
};
+/* PORTSC registers */
+#define TEGRA_USB_PORTSC1 0x184
+#define TEGRA_USB_PORTSC1_PTS(x) (((x) & 0x3) << 30)
+#define TEGRA_USB_PORTSC1_PHCD (1 << 23)
+
+/* Bits of PORTSC1, which will get cleared by writing 1 into them */
+#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
+
+static void tegra_ehci_set_pts(void __iomem *base, u8 pts_val)
+{
+ unsigned long val;
+
+ val = readl(base + TEGRA_USB_PORTSC1) & ~TEGRA_PORTSC1_RWC_BITS;
+ val &= ~TEGRA_USB_PORTSC1_PTS(3);
+ val |= TEGRA_USB_PORTSC1_PTS(pts_val & 3);
+ writel(val, base + TEGRA_USB_PORTSC1);
+}
+
+static void tegra_ehci_set_phcd(void __iomem *base, bool enable)
+{
+ unsigned long val;
+
+ val = readl(base + TEGRA_USB_PORTSC1) & ~TEGRA_PORTSC1_RWC_BITS;
+ if (enable)
+ val |= TEGRA_USB_PORTSC1_PHCD;
+ else
+ val &= ~TEGRA_USB_PORTSC1_PHCD;
+ writel(val, base + TEGRA_USB_PORTSC1);
+}
+
static int utmip_pad_open(struct tegra_usb_phy *phy)
{
phy->pad_clk = devm_clk_get(phy->dev, "utmi-pads");
@@ -282,7 +313,7 @@ static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
val &= ~USB_SUSP_SET;
writel(val, base + USB_SUSP_CTRL);
} else
- tegra_ehci_set_phcd(>u_phy,
[PATCH v3 09/10] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. Removed extra memory allocation for u_phy->otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
delta from v2:
Rebased to TOT and applied same changes as on v2.
drivers/usb/host/ehci-tegra.c | 95 +---
drivers/usb/phy/phy-tegra-usb.c | 314 +
include/linux/usb/tegra_usb_phy.h |3 +-
3 files changed, 218 insertions(+), 194 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index f4b2164..406abd9 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -649,7 +649,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev->id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev->dev.platform_data;
@@ -672,38 +672,49 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(_ehci_hc_driver, >dev,
- dev_name(>dev));
- if (!hcd) {
- dev_err(>dev, "Unable to create HCD\n");
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra->clk = devm_clk_get(>dev, NULL);
if (IS_ERR(tegra->clk)) {
dev_err(>dev, "Can't get ehci clock\n");
- err = PTR_ERR(tegra->clk);
- goto fail_clk;
+ return PTR_ERR(tegra->clk);
}
err = clk_prepare_enable(tegra->clk);
if (err)
- goto fail_clk;
+ return err;
tegra_periph_reset_assert(tegra->clk);
udelay(1);
tegra_periph_reset_deassert(tegra->clk);
+ np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
+
tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
"nvidia,needs-double-reset");
+ hcd = usb_create_hcd(_ehci_hc_driver, >dev,
+ dev_name(>dev));
+ if (!hcd) {
+ dev_err(>dev, "Unable to create HCD\n");
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd->phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(>dev, "Failed to get I/O memory\n");
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
@@ -711,55 +722,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd->regs) {
dev_err(>dev, "Failed to remap I/O memory\n");
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
-* device-tree probing. Old code relies on the platform_device
-* numbering that we lack for device-tree-instantiated devices.
-*/
- if (instance < 0) {
- switch (res->start) {
- case TEGRA_USB_BASE:
- instance = 0;
- break;
- case TEGRA_USB2_BASE:
- instance = 1;
- break;
- case TEGRA_USB3_BASE:
- instance = 2;
- break;
- default:
- err = -ENODEV;
- dev_err(>dev, "unknown usb instance\n");
- goto fail_io;
- }
+ goto cleanup_hcd_create;
}
- tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config);
- if (IS_ERR(tegra->phy)) {
- dev_err(>dev, "Failed to open USB phy\n");
- err = -ENXIO;
- goto fail_io;
+ err = usb_phy_init(hcd->
[PATCH v3 08/10] usb: phy: tegra: Add error handling & clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove the call to clk_disable_unprepare(); this function does not
prepare or enable the clock, so the error path should not disable or
unprepare it.
Signed-off-by: Venu Byravarasu
---
delta from v1:
no changes.
delta from v2:
Fixed checkpatch warnings.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index a2a89a9..dce692a 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy->regs;
- gpio_direction_output(phy->reset_gpio, 0);
+ ret = gpio_direction_output(phy->reset_gpio, 0);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d not set to 0\n", phy->reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy->reset_gpio, 1);
+ ret = gpio_direction_output(phy->reset_gpio, 1);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d not set to 1\n", phy->reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy->clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy->dev->of_node,
"nvidia,phy-reset-gpio", 0);
if (!gpio_is_valid(phy->reset_gpio)) {
- pr_err("%s: invalid reset gpio: %d\n", __func__,
+ dev_err(phy->dev, "invalid gpio: %d\n",
+ phy->reset_gpio);
+ err = phy->reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ if (err < 0) {
+ dev_err(phy->dev, "request failed for gpio: %d\n",
phy->reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy->reset_gpio, 0);
+ if (err < 0) {
+ dev_err(phy->dev, "gpio %d direction not set to
output\n",
+ phy->reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(phy->reset_gpio, 0);
+
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
+ if (!phy->ulpi) {
+ dev_err(phy->dev, "otg_ulpi_create returned err\n");
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err < 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy->pll_u);
- clk_put(phy->pll_u);
+cleanup_gpio_req:
+ gpio_free(phy->reset_gpio);
+cleanup_clk_get:
+ clk_put(phy->clk);
return err;
}
--
1.7.0.4
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[PATCH v3 06/10] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu
---
delta from v1 & v2: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 91b6e29..16851e2 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy->clk = clk_get_sys(NULL, ulpi_config->clk);
if (IS_ERR(phy->clk)) {
pr_err("%s: can't get ulpi clock\n", __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy->clk);
}
if (!gpio_is_valid(ulpi_config->reset_gpio))
ulpi_config->reset_gpio =
--
1.7.0.4
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[PATCH v3 01/10] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues:
1) Many properties are documented as being part of the EHCI controller
node, yet they apply more to the PHY device. They should be moved.
2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
reg entry to point at PHY1's register space. We can't assume the PHY1
driver is present, so the PHY3 driver will directly access those
registers.
3) The list of clocks required by the PHY was missing some required
entries.
4) UTMI PHY Timing parameters are added
5) VBUS control is now specified using a regulator rather than a plain GPIO
6) Added nvidia,is-wired property to indicate whether the device is
hard wired on the board, or pluggable.
This patch fixes the binding definition to resolve these issues.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. added UTMI PHY timing params.
2. replaced gadget with peripheral in dr_mode
3. added nvidia,is-wired & vbus-supply params.
delta from v2:
Moved vbus-supply under "Required properties for dr_mode == otg" heading.
.../bindings/usb/nvidia,tegra20-ehci.txt | 27 ++---
.../bindings/usb/nvidia,tegra20-usb-phy.txt| 40 ++-
2 files changed, 42 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 34c9528..df09330 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following
modifications
and additions :
Required properties :
- - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
- used in host mode.
- - phy_type : Should be one of "ulpi" or "utmi".
- - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
- - nvidia,phy : phandle of the PHY instance, the controller is connected to.
-
-Required properties for phy_type == ulpi:
- - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
+ - compatible : Should be "nvidia,tegra20-ehci".
+ - nvidia,phy : phandle of the PHY that the controller is connected to.
+ - clocks : Contains a single entry which defines the USB controller's clock.
Optional properties:
- - dr_mode : dual role mode. Indicates the working mode for
- nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
- or "otg". Default to "host" if not defined for backward compatibility.
- host means this is a host controller
- peripheral means it is device controller
- otg means it can operate as either ("on the go")
- - nvidia,has-legacy-mode : boolean indicates whether this controller can
-operate in legacy mode (as APX 2500 / 2600). In legacy mode some
-registers are accessed through the APB_MISC base address instead of
-the USB controller. Since this is a legacy issue it probably does not
-warrant a compatible string of its own.
- - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2
-USB ports, which need reset twice due to hardware issues.
+ - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
+ USB ports, which need reset twice due to hardware issues.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index 6bdaba2..292d8e2 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -4,14 +4,48 @@ The device node for Tegra SOC USB PHY:
Required properties :
- compatible : Should be "nvidia,tegra20-usb-phy".
- - reg : Address and length of the register set for the USB PHY interface.
- - phy_type : Should be one of "ulpi" or "utmi".
+ - reg : Defines the following set of registers, in the order listed:
+ - The PHY's own register set.
+ Always present.
+ - The register set of the PHY containing the UTMI pad control registers.
+ Present if-and-only-if phy_type == utmi.
+ - phy_type : Should be one of "utmi", "ulpi" or "hsic".
+ - clocks : Defines the clocks listed in the clock-names property.
+ - clock-names : The following clock names must be present:
+ - reg: The clock needed to access the PHY's own registers. This is the
+ associated EHCI controller's clock. Always present.
+ - pll_u: PLL_U. Always present.
+ - timer: The timeout clock (clk_m). Present if phy_type == utmi.
+ - utmi-pads: The clock needed to access the UTMI pad control registers.
+ Present if phy_type == utmi.
+ - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
+ Present if phy_type == ulpi, and ULPI link mode is in use.
[PATCH v3 00/10] Tegra USB PHY driver series
delta from v2: This patch is prepared as follow up patch of TEGRA USB PHY driver patch series discussed at: http://marc.info/?l=linux-tegra=136497946026787=2 Venu Byravarasu (10): ARM: tegra: finalize USB EHCI and PHY bindings arm: dt: Tegra20: Modify ULPI reset GPIO properties ARM: tegra: update device trees for USB binding rework Revert "usb: phy: tegra: don't call into tegra-ehci directly" usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling & clean up. usb: phy: registering Tegra USB PHY as platform driver Usb: Move PORTSC access to PHY .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 40 ++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +- arch/arm/boot/dts/tegra20-harmony.dts | 10 +- arch/arm/boot/dts/tegra20-iris-512.dts |1 - arch/arm/boot/dts/tegra20-paz00.dts| 10 +- arch/arm/boot/dts/tegra20-seaboard.dts | 24 +- arch/arm/boot/dts/tegra20-trimslice.dts| 23 +- arch/arm/boot/dts/tegra20-ventana.dts | 10 +- arch/arm/boot/dts/tegra20-whistler.dts | 26 ++ arch/arm/boot/dts/tegra20.dtsi | 46 ++- drivers/usb/host/ehci-tegra.c | 143 +++-- drivers/usb/phy/phy-tegra-usb.c| 349 +--- include/linux/usb/tegra_usb_phy.h |9 +- 14 files changed, 424 insertions(+), 300 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 00/10] Tegra USB PHY driver series
delta from v2: This patch is prepared as follow up patch of TEGRA USB PHY driver patch series discussed at: http://marc.info/?l=linux-tegram=136497946026787w=2 Venu Byravarasu (10): ARM: tegra: finalize USB EHCI and PHY bindings arm: dt: Tegra20: Modify ULPI reset GPIO properties ARM: tegra: update device trees for USB binding rework Revert usb: phy: tegra: don't call into tegra-ehci directly usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling clean up. usb: phy: registering Tegra USB PHY as platform driver Usb: Move PORTSC access to PHY .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 40 ++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +- arch/arm/boot/dts/tegra20-harmony.dts | 10 +- arch/arm/boot/dts/tegra20-iris-512.dts |1 - arch/arm/boot/dts/tegra20-paz00.dts| 10 +- arch/arm/boot/dts/tegra20-seaboard.dts | 24 +- arch/arm/boot/dts/tegra20-trimslice.dts| 23 +- arch/arm/boot/dts/tegra20-ventana.dts | 10 +- arch/arm/boot/dts/tegra20-whistler.dts | 26 ++ arch/arm/boot/dts/tegra20.dtsi | 46 ++- drivers/usb/host/ehci-tegra.c | 143 +++-- drivers/usb/phy/phy-tegra-usb.c| 349 +--- include/linux/usb/tegra_usb_phy.h |9 +- 14 files changed, 424 insertions(+), 300 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 01/10] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues: 1) Many properties are documented as being part of the EHCI controller node, yet they apply more to the PHY device. They should be moved. 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a reg entry to point at PHY1's register space. We can't assume the PHY1 driver is present, so the PHY3 driver will directly access those registers. 3) The list of clocks required by the PHY was missing some required entries. 4) UTMI PHY Timing parameters are added 5) VBUS control is now specified using a regulator rather than a plain GPIO 6) Added nvidia,is-wired property to indicate whether the device is hard wired on the board, or pluggable. This patch fixes the binding definition to resolve these issues. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- delta from v1: 1. added UTMI PHY timing params. 2. replaced gadget with peripheral in dr_mode 3. added nvidia,is-wired vbus-supply params. delta from v2: Moved vbus-supply under Required properties for dr_mode == otg heading. .../bindings/usb/nvidia,tegra20-ehci.txt | 27 ++--- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 40 ++- 2 files changed, 42 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt index 34c9528..df09330 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -6,27 +6,10 @@ Practice : Universal Serial Bus with the following modifications and additions : Required properties : - - compatible : Should be nvidia,tegra20-ehci for USB controllers - used in host mode. - - phy_type : Should be one of ulpi or utmi. - - nvidia,vbus-gpio : If present, specifies a gpio that needs to be - activated for the bus to be powered. - - nvidia,phy : phandle of the PHY instance, the controller is connected to. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. + - compatible : Should be nvidia,tegra20-ehci. + - nvidia,phy : phandle of the PHY that the controller is connected to. + - clocks : Contains a single entry which defines the USB controller's clock. Optional properties: - - dr_mode : dual role mode. Indicates the working mode for - nvidia,tegra20-ehci compatible controllers. Can be host, peripheral, - or otg. Default to host if not defined for backward compatibility. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either (on the go) - - nvidia,has-legacy-mode : boolean indicates whether this controller can -operate in legacy mode (as APX 2500 / 2600). In legacy mode some -registers are accessed through the APB_MISC base address instead of -the USB controller. Since this is a legacy issue it probably does not -warrant a compatible string of its own. - - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2 -USB ports, which need reset twice due to hardware issues. + - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 + USB ports, which need reset twice due to hardware issues. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt index 6bdaba2..292d8e2 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt @@ -4,14 +4,48 @@ The device node for Tegra SOC USB PHY: Required properties : - compatible : Should be nvidia,tegra20-usb-phy. - - reg : Address and length of the register set for the USB PHY interface. - - phy_type : Should be one of ulpi or utmi. + - reg : Defines the following set of registers, in the order listed: + - The PHY's own register set. + Always present. + - The register set of the PHY containing the UTMI pad control registers. + Present if-and-only-if phy_type == utmi. + - phy_type : Should be one of utmi, ulpi or hsic. + - clocks : Defines the clocks listed in the clock-names property. + - clock-names : The following clock names must be present: + - reg: The clock needed to access the PHY's own registers. This is the + associated EHCI controller's clock. Always present. + - pll_u: PLL_U. Always present. + - timer: The timeout clock (clk_m). Present if phy_type == utmi. + - utmi-pads: The clock needed to access the UTMI pad control registers. + Present if phy_type == utmi. + - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2). + Present if phy_type == ulpi, and ULPI link mode is in use. Required properties for phy_type == ulpi: - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. +Required PHY timing params for utmi phy: + - nvidia,hssync-start-delay
[PATCH v3 06/10] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1 v2: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 91b6e29..16851e2 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy-clk = clk_get_sys(NULL, ulpi_config-clk);
if (IS_ERR(phy-clk)) {
pr_err(%s: can't get ulpi clock\n, __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy-clk);
}
if (!gpio_is_valid(ulpi_config-reset_gpio))
ulpi_config-reset_gpio =
--
1.7.0.4
--
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[PATCH v3 08/10] usb: phy: tegra: Add error handling clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove the call to clk_disable_unprepare(); this function does not
prepare or enable the clock, so the error path should not disable or
unprepare it.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
no changes.
delta from v2:
Fixed checkpatch warnings.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index a2a89a9..dce692a 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy-regs;
- gpio_direction_output(phy-reset_gpio, 0);
+ ret = gpio_direction_output(phy-reset_gpio, 0);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d not set to 0\n, phy-reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy-reset_gpio, 1);
+ ret = gpio_direction_output(phy-reset_gpio, 1);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d not set to 1\n, phy-reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy-clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy-dev-of_node,
nvidia,phy-reset-gpio, 0);
if (!gpio_is_valid(phy-reset_gpio)) {
- pr_err(%s: invalid reset gpio: %d\n, __func__,
+ dev_err(phy-dev, invalid gpio: %d\n,
+ phy-reset_gpio);
+ err = phy-reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ if (err 0) {
+ dev_err(phy-dev, request failed for gpio: %d\n,
phy-reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy-reset_gpio, 0);
+ if (err 0) {
+ dev_err(phy-dev, gpio %d direction not set to
output\n,
+ phy-reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(phy-reset_gpio, 0);
+
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
+ if (!phy-ulpi) {
+ dev_err(phy-dev, otg_ulpi_create returned err\n);
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy-pll_u);
- clk_put(phy-pll_u);
+cleanup_gpio_req:
+ gpio_free(phy-reset_gpio);
+cleanup_clk_get:
+ clk_put(phy-clk);
return err;
}
--
1.7.0.4
--
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[PATCH v3 09/10] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
1. Removed extra memory allocation for u_phy-otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
delta from v2:
Rebased to TOT and applied same changes as on v2.
drivers/usb/host/ehci-tegra.c | 95 +---
drivers/usb/phy/phy-tegra-usb.c | 314 +
include/linux/usb/tegra_usb_phy.h |3 +-
3 files changed, 218 insertions(+), 194 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index f4b2164..406abd9 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -649,7 +649,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev-id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev-dev.platform_data;
@@ -672,38 +672,49 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
- dev_name(pdev-dev));
- if (!hcd) {
- dev_err(pdev-dev, Unable to create HCD\n);
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra-clk = devm_clk_get(pdev-dev, NULL);
if (IS_ERR(tegra-clk)) {
dev_err(pdev-dev, Can't get ehci clock\n);
- err = PTR_ERR(tegra-clk);
- goto fail_clk;
+ return PTR_ERR(tegra-clk);
}
err = clk_prepare_enable(tegra-clk);
if (err)
- goto fail_clk;
+ return err;
tegra_periph_reset_assert(tegra-clk);
udelay(1);
tegra_periph_reset_deassert(tegra-clk);
+ np_phy = of_parse_phandle(pdev-dev.of_node, nvidia,phy, 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
+
tegra-needs_double_reset = of_property_read_bool(pdev-dev.of_node,
nvidia,needs-double-reset);
+ hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
+ dev_name(pdev-dev));
+ if (!hcd) {
+ dev_err(pdev-dev, Unable to create HCD\n);
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd-phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(pdev-dev, Failed to get I/O memory\n);
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd-rsrc_start = res-start;
hcd-rsrc_len = resource_size(res);
@@ -711,55 +722,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd-regs) {
dev_err(pdev-dev, Failed to remap I/O memory\n);
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
-* device-tree probing. Old code relies on the platform_device
-* numbering that we lack for device-tree-instantiated devices.
-*/
- if (instance 0) {
- switch (res-start) {
- case TEGRA_USB_BASE:
- instance = 0;
- break;
- case TEGRA_USB2_BASE:
- instance = 1;
- break;
- case TEGRA_USB3_BASE:
- instance = 2;
- break;
- default:
- err = -ENODEV;
- dev_err(pdev-dev, unknown usb instance\n);
- goto fail_io;
- }
+ goto cleanup_hcd_create;
}
- tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
- pdata-phy_config);
- if (IS_ERR(tegra-phy)) {
- dev_err(pdev-dev, Failed to open USB phy\n);
- err = -ENXIO;
- goto fail_io;
+ err = usb_phy_init(hcd-phy);
+ if (err) {
+ dev_err(pdev-dev, Failed to initialize phy\n);
+ goto cleanup_hcd_create;
}
- hcd-phy
[PATCH v3 10/10] Usb: Move PORTSC access to PHY
Changes with this patch:
1. As PHY is being registered as separate platform driver EHCI Tegra
is no more calling PHY open, moved tegra_ehci_set_pts tegra_ehci_set_phcd
functions to PHY driver,
2. Removed unused defines for multiple USB port base addresses
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
This is a new patch being added into the series, to address the revert done
with patch#4 of the series.
drivers/usb/host/ehci-tegra.c | 49 -
drivers/usb/phy/phy-tegra-usb.c | 37 +--
include/linux/usb/tegra_usb_phy.h |4 ---
3 files changed, 34 insertions(+), 56 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 406abd9..2340d7a 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -30,15 +30,6 @@
#include linux/usb/tegra_usb_phy.h
#include linux/clk/tegra.h
-#define TEGRA_USB_BASE 0xC500
-#define TEGRA_USB2_BASE0xC5004000
-#define TEGRA_USB3_BASE0xC5008000
-
-/* PORTSC registers */
-#define TEGRA_USB_PORTSC1 0x184
-#define TEGRA_USB_PORTSC1_PTS(x) (((x) 0x3) 30)
-#define TEGRA_USB_PORTSC1_PHCD (1 23)
-
#define TEGRA_USB_DMA_ALIGN 32
struct tegra_ehci_hcd {
@@ -608,37 +599,6 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
#endif
-/* Bits of PORTSC1, which will get cleared by writing 1 into them */
-#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-
-void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
-{
- unsigned long val;
- struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
- void __iomem *base = hcd-regs;
-
- val = readl(base + TEGRA_USB_PORTSC1) ~TEGRA_PORTSC1_RWC_BITS;
- val = ~TEGRA_USB_PORTSC1_PTS(3);
- val |= TEGRA_USB_PORTSC1_PTS(pts_val 3);
- writel(val, base + TEGRA_USB_PORTSC1);
-}
-EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-
-void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
-{
- unsigned long val;
- struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
- void __iomem *base = hcd-regs;
-
- val = readl(base + TEGRA_USB_PORTSC1) ~TEGRA_PORTSC1_RWC_BITS;
- if (enable)
- val |= TEGRA_USB_PORTSC1_PHCD;
- else
- val = ~TEGRA_USB_PORTSC1_PHCD;
- writel(val, base + TEGRA_USB_PORTSC1);
-}
-EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
-
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
static int tegra_ehci_probe(struct platform_device *pdev)
@@ -731,15 +691,6 @@ static int tegra_ehci_probe(struct platform_device *pdev)
goto cleanup_hcd_create;
}
- u_phy-otg = devm_kzalloc(pdev-dev, sizeof(struct usb_otg),
-GFP_KERNEL);
- if (!u_phy-otg) {
- dev_err(pdev-dev, Failed to alloc memory for otg\n);
- err = -ENOMEM;
- goto cleanup_phy;
- }
- u_phy-otg-host = hcd_to_bus(hcd);
-
err = usb_phy_set_suspend(hcd-phy, 0);
if (err) {
dev_err(pdev-dev, Failed to power on the phy\n);
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 4d81b19..b2a909f 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -33,6 +33,7 @@
#include asm/mach-types.h
#include linux/usb/tegra_usb_phy.h
#include linux/module.h
+#include linux/usb/ehci_def.h
#define ULPI_VIEWPORT 0x170
@@ -196,6 +197,36 @@ static struct tegra_utmip_config utmip_default[] = {
},
};
+/* PORTSC registers */
+#define TEGRA_USB_PORTSC1 0x184
+#define TEGRA_USB_PORTSC1_PTS(x) (((x) 0x3) 30)
+#define TEGRA_USB_PORTSC1_PHCD (1 23)
+
+/* Bits of PORTSC1, which will get cleared by writing 1 into them */
+#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
+
+static void tegra_ehci_set_pts(void __iomem *base, u8 pts_val)
+{
+ unsigned long val;
+
+ val = readl(base + TEGRA_USB_PORTSC1) ~TEGRA_PORTSC1_RWC_BITS;
+ val = ~TEGRA_USB_PORTSC1_PTS(3);
+ val |= TEGRA_USB_PORTSC1_PTS(pts_val 3);
+ writel(val, base + TEGRA_USB_PORTSC1);
+}
+
+static void tegra_ehci_set_phcd(void __iomem *base, bool enable)
+{
+ unsigned long val;
+
+ val = readl(base + TEGRA_USB_PORTSC1) ~TEGRA_PORTSC1_RWC_BITS;
+ if (enable)
+ val |= TEGRA_USB_PORTSC1_PHCD;
+ else
+ val = ~TEGRA_USB_PORTSC1_PHCD;
+ writel(val, base + TEGRA_USB_PORTSC1);
+}
+
static int utmip_pad_open(struct tegra_usb_phy *phy)
{
phy-pad_clk = devm_clk_get(phy-dev, utmi-pads);
@@ -282,7 +313,7 @@ static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
val = ~USB_SUSP_SET;
writel(val, base + USB_SUSP_CTRL);
} else
- tegra_ehci_set_phcd(phy-u_phy, true);
+ tegra_ehci_set_phcd(base
[PATCH v3 05/10] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
replaced gadget with peripheral.
delta from v2:
No change
drivers/usb/host/ehci-tegra.c |3 +--
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index ed201ae..f4b2164 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -737,8 +737,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
- pdata-phy_config,
- TEGRA_USB_PHY_MODE_HOST);
+ pdata-phy_config);
if (IS_ERR(tegra-phy)) {
dev_err(pdev-dev, Failed to open USB phy\n);
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 5487d38..91b6e29 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -688,7 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
+ void __iomem *regs, void *config)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -703,7 +703,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy-instance = instance;
phy-regs = regs;
phy-config = config;
- phy-mode = phy_mode;
phy-dev = dev;
phy-is_legacy_phy =
of_property_read_bool(np, nvidia,has-legacy-mode);
@@ -713,6 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy-is_ulpi_phy = true;
+ err = of_property_match_string(np, dr_mode, otg);
+ if (err 0) {
+ err = of_property_match_string(np, dr_mode, peripheral);
+ if (err 0)
+ phy-mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy-mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy-mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy-config) {
if (phy-is_ulpi_phy) {
pr_err(%s: ulpi phy configuration missing, __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 9ebebe9..a7af923 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -64,7 +65,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);
+ void __iomem *regs, void *config);
void tegra_usb_phy_preresume(struct usb_phy *phy);
--
1.7.0.4
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[PATCH v3 03/10] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
The only exception is otg property which was removed, as VBUS details
for all the boards are not known. This should not affect for those boards
in any way, as otg is not really supported in Tegra20 USB driver, though
it was set in DT properties.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
delta from v2:
1. Removed dr_mode setting to otg, due to:
a. Any ways existing Tegra USB driver does not support OTG.
b. lack of knowledge of all Vbus supplies, on all target platforms.
Once real OTG support is added to Tegra USB driver, then this property can be
set back to otg, for target platforms.
2. All changes related to 'nvidia,phy-reset-gpio' were moved to patch 2 of the
same series.
arch/arm/boot/dts/tegra20-iris-512.dts |1 -
arch/arm/boot/dts/tegra20-seaboard.dts | 14 +-
arch/arm/boot/dts/tegra20-trimslice.dts | 13 +
arch/arm/boot/dts/tegra20-whistler.dts | 26 +
arch/arm/boot/dts/tegra20.dtsi | 46 +++
5 files changed, 86 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..b7f71e8 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -38,7 +38,6 @@
usb@c500 {
status = okay;
- dr_mode = otg;
};
usb@c5008000 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 9dd4f8e..d51e969 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -566,7 +566,10 @@
usb@c500 {
status = okay;
nvidia,vbus-gpio = gpio 24 0; /* PD0 */
- dr_mode = otg;
+ };
+
+ usb-phy@c500 {
+ vbus-supply = vbus_reg;
};
usb@c5004000 {
@@ -807,6 +810,15 @@
gpio = pmic 1 0;
enable-active-high;
};
+
+ vbus_reg: regulator@3 {
+ compatible = regulator-fixed;
+ reg = 3;
+ regulator-name = vdd_5v0;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gpio 24 0; /* PD0 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index fd7afd6..85699f0 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -314,6 +314,10 @@
nvidia,vbus-gpio = gpio 170 0; /* gpio PV2 */
};
+ usb-phy@c500 {
+ vbus-supply = vbus_reg;
+ };
+
usb@c5004000 {
status = okay;
nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
@@ -390,6 +394,15 @@
regulator-max-microvolt = 180;
regulator-always-on;
};
+
+ vbus_reg: regulator@2 {
+ compatible = regulator-fixed;
+ reg = 2;
+ regulator-name = vdd_5v0;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gpio 170 0; /* PV2 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts
b/arch/arm/boot/dts/tegra20-whistler.dts
index d2567f8..9aec63a 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -511,11 +511,19 @@
nvidia,vbus-gpio = tca6416 0 0; /* GPIO_PMU0 */
};
+ usb-phy@c500 {
+ vbus-supply = vbus_reg1;
+ };
+
usb@c5008000 {
status = okay;
nvidia,vbus-gpio = tca6416 1 0; /* GPIO_PMU1 */
};
+ usb-phy@c5008000 {
+ vbus-supply = vbus_reg2;
+ };
+
sdhci@c8000400 {
status = okay;
cd-gpios = gpio 69 1; /* gpio PI5 */
@@ -568,6 +576,24 @@
regulator-max-microvolt = 500;
regulator-always-on;
};
+
+ vbus_reg1: regulator@2 {
+ compatible = regulator-fixed;
+ reg = 2;
+ regulator
[PATCH v3 04/10] Revert usb: phy: tegra: don't call into tegra-ehci directly
This reverts commit ee5d5499edb94cd03738a52a7e234b139da8fd72.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
As PHY is being registered as separate driver, solution proposed with
this patch cannot work anymore.
Hence pushed patch 10 of this series to address the issue.
drivers/usb/host/ehci-tegra.c | 10 +-
drivers/usb/phy/phy-tegra-usb.c | 13 -
include/linux/usb/tegra_usb_phy.h | 10 +-
3 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index e3eddc3..ed201ae 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -611,7 +611,7 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
/* Bits of PORTSC1, which will get cleared by writing 1 into them */
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
-static void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
+void tegra_ehci_set_pts(struct usb_phy *x, u8 pts_val)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
@@ -622,8 +622,9 @@ static void tegra_ehci_set_pts(struct usb_phy *x, u8
pts_val)
val |= TEGRA_USB_PORTSC1_PTS(pts_val 3);
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_pts);
-static void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
+void tegra_ehci_set_phcd(struct usb_phy *x, bool enable)
{
unsigned long val;
struct usb_hcd *hcd = bus_to_hcd(x-otg-host);
@@ -636,6 +637,7 @@ static void tegra_ehci_set_phcd(struct usb_phy *x, bool
enable)
val = ~TEGRA_USB_PORTSC1_PHCD;
writel(val, base + TEGRA_USB_PORTSC1);
}
+EXPORT_SYMBOL_GPL(tegra_ehci_set_phcd);
static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
@@ -736,9 +738,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
pdata-phy_config,
- TEGRA_USB_PHY_MODE_HOST,
- tegra_ehci_set_pts,
- tegra_ehci_set_phcd);
+ TEGRA_USB_PHY_MODE_HOST);
if (IS_ERR(tegra-phy)) {
dev_err(pdev-dev, Failed to open USB phy\n);
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 17d8112..5487d38 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -299,7 +299,7 @@ static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
val = ~USB_SUSP_SET;
writel(val, base + USB_SUSP_CTRL);
} else
- phy-set_phcd(phy-u_phy, true);
+ tegra_ehci_set_phcd(phy-u_phy, true);
if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0) 0)
pr_err(%s: timeout waiting for phy to stabilize\n, __func__);
@@ -321,7 +321,7 @@ static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
val = ~USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
} else
- phy-set_phcd(phy-u_phy, false);
+ tegra_ehci_set_phcd(phy-u_phy, false);
if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
USB_PHY_CLK_VALID))
@@ -444,7 +444,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
utmi_phy_clk_enable(phy);
if (!phy-is_legacy_phy)
- phy-set_pts(phy-u_phy, 0);
+ tegra_ehci_set_pts(phy-u_phy, 0);
return 0;
}
@@ -688,10 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode,
- void (*set_pts)(struct usb_phy *x, u8 pts_val),
- void (*set_phcd)(struct usb_phy *x, bool enable))
-
+ void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -710,8 +707,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy-dev = dev;
phy-is_legacy_phy =
of_property_read_bool(np, nvidia,has-legacy-mode);
- phy-set_pts = set_pts;
- phy-set_phcd = set_phcd;
err = of_property_match_string(np, phy_type, ulpi);
if (err 0)
phy-is_ulpi_phy = false;
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 1b7519a..9ebebe9 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -61,14 +61,10 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
- void (*set_pts)(struct usb_phy *x, u8 pts_val);
- void
[PATCH v3 07/10] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1 v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 16851e2..a2a89a9 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy-regs;
- struct tegra_ulpi_config *config = phy-config;
- gpio_direction_output(config-reset_gpio, 0);
+ gpio_direction_output(phy-reset_gpio, 0);
msleep(5);
- gpio_direction_output(config-reset_gpio, 1);
+ gpio_direction_output(phy-reset_gpio, 1);
clk_prepare_enable(phy-clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy-config;
-
clk_disable(phy-clk);
- return gpio_direction_output(config-reset_gpio, 0);
+ return gpio_direction_output(phy-reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err(%s: can't get ulpi clock\n, __func__);
return PTR_ERR(phy-clk);
}
- if (!gpio_is_valid(ulpi_config-reset_gpio))
- ulpi_config-reset_gpio =
- of_get_named_gpio(phy-dev-of_node,
- nvidia,phy-reset-gpio, 0);
- if (!gpio_is_valid(ulpi_config-reset_gpio)) {
+
+ phy-reset_gpio =
+ of_get_named_gpio(phy-dev-of_node,
+ nvidia,phy-reset-gpio, 0);
+ if (!gpio_is_valid(phy-reset_gpio)) {
pr_err(%s: invalid reset gpio: %d\n, __func__,
- ulpi_config-reset_gpio);
+ phy-reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(ulpi_config-reset_gpio, 0);
+ gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ gpio_direction_output(phy-reset_gpio, 0);
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index a7af923..6cfb8f1 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
--
1.7.0.4
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[PATCH v3 02/10] arm: dt: Tegra20: Modify ULPI reset GPIO properties
changes with this patch:
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
Created this patch as per comments received at:
http://marc.info/?l=linux-usbm=136501761810344w=2
arch/arm/boot/dts/tegra20-colibri-512.dtsi |6 +-
arch/arm/boot/dts/tegra20-harmony.dts | 10 +-
arch/arm/boot/dts/tegra20-paz00.dts| 10 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 10 +-
arch/arm/boot/dts/tegra20-trimslice.dts| 10 +-
arch/arm/boot/dts/tegra20-ventana.dts | 10 +-
6 files changed, 30 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index a573b94..c12af78 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -449,7 +449,11 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
+ };
+
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
sdhci@c8000600 {
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index e7d5de4..e84f3f6 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -430,15 +430,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index e3e0c99..e9ac2a9 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -429,15 +429,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index cee4c34..9dd4f8e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -571,15 +571,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 1; /* gpio PV1, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9cc78a1..fd7afd6 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -316,15 +316,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 168 1; /* gpio PV0, active low
*/
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
b/arch/arm/boot/dts/tegra20-ventana.dts
index dd38f1f..a75a0e7 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -507,15 +507,15 @@
usb@c5004000 {
status = okay;
- nvidia,phy
RE: [PATCH v2 2/7] ARM: tegra: update device trees for USB binding rework
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Thursday, April 04, 2013 12:47 AM
> To: Venu Byravarasu
> Cc: gre...@linuxfoundation.org; ba...@ti.com;
> st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux-
> u...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 2/7] ARM: tegra: update device trees for USB binding
> rework
>
> On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
> > This patch updates all Tegra board files so that they contain all the
>
> The binding documentation says that the vbus-supply property is required
> in all cases. However, many of the DT files still don't have that
> property even after this patch. That's inconsistent.
Will edit the binding to have the vbus-supply only for otg cases.
>
> > diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
> b/arch/arm/boot/dts/tegra20-iris-512.dts
> > index 52f1103..c99eccc 100644
> > --- a/arch/arm/boot/dts/tegra20-iris-512.dts
> > +++ b/arch/arm/boot/dts/tegra20-iris-512.dts
> > @@ -41,6 +41,10 @@
> > dr_mode = "otg";
> > };
> >
> > + usb-phy@c500 {
> > + dr_mode = "otg";
> > + };
>
> Since this port claims to be OTG-capable, presumably a vbus-supply
> property is mandatory here? If you don't know enough about the board to
> correctly set up such a regulator, lets just mark this port as host-only
> for now; we can switch it back to OTG-mode later once someone implements
> the required regulator. This won't lose any functionality, since we
> don't support OTG-mode yet anyway. However, it will allow the device
> tree to be correct/consistent in the mean time.
Agree completely.
Will update the patch accordingly and send for review.
>
> > diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
> b/arch/arm/boot/dts/tegra20-seaboard.dts
>
> > + usb-phy@c500 {
> > + vbus-supply = <_reg>;
> > + dr_mode = "otg";
> > + };
>
> Where is the nvidia,vbus-gpio property? Since your code changes don't
> actually implement use of the vbus-supply property yet, they will expect
> the vbus-gpio property to exist in the PHY node.
As of now Vbus-gpio is being used by EHCI driver only.
As anyways we wanted to use vbus-supply, will implement its
support in PHY driver and remove vbus-gpio from EHCI node.
Hence did not add vbus-gpio to PHY DT nodes.
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RE: [PATCH v2 6/7] usb: phy: tegra: Add error handling & clean up.
> -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Thursday, April 04, 2013 1:06 AM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; ba...@ti.com; > st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux- > u...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v2 6/7] usb: phy: tegra: Add error handling & clean up. > > On 04/03/2013 02:41 AM, Venu Byravarasu wrote: > > Check return values from all GPIO APIs and handle errors accordingly. > > Remove clk_disable_unprepare which is no more needed. > > checkpatch fails: As these are checkpatch warnings only, did not pay much attention on that. Any how will fix it in next update. > > > WARNING: line over 80 characters > > #27: FILE: drivers/usb/phy/phy-tegra-usb.c:547: > > + dev_err(phy->dev, "gpio %d direction not set\n", phy- > >reset_gpio); > > > > WARNING: line over 80 characters > > #34: FILE: drivers/usb/phy/phy-tegra-usb.c:553: > > + dev_err(phy->dev, "gpio %d direction not set\n", phy- > >reset_gpio); > > > > total: 0 errors, 2 warnings, 72 lines checked > > > > 0006-usb-phy-tegra-Add-error-handling-clean-up.patch has style problems, > please review. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
> -Original Message- > From: linux-tegra-ow...@vger.kernel.org [mailto:linux-tegra- > ow...@vger.kernel.org] On Behalf Of Stephen Warren > Sent: Thursday, April 04, 2013 12:38 AM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; ba...@ti.com; > st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux- > u...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings > > On 04/03/2013 02:41 AM, Venu Byravarasu wrote: > > The existing Tegra USB bindings have a few issues: > ... > > This patch fixes the binding definition to resolve these issues. > > > diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb- > phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb- > phy.txt > > > Required properties : > ... > > + - vbus-supply: regulator for VBUS > > Doesn't the driver only need to control VBUS if the port is in OTG mode? > > If there is no VBUS control, and the HW provides VBUS, I think that the > port can only operate in host mode. > > If there is no VBUS control, and the HW does not provide VBUS, I think > that the port can only operate in peripheral mode. > > If there is VBUS control, then shouldn't the port always operate in OTG > mode, or are there other reasons to control VBUS even in host-only mode? > > If VBUS control is only useful for OTG mode, then I think the > vbus-supply property should be documented in a "Required properties for > dr_mode == otg" section. Agree, will do it in next patch update. > > I assume that VBUS control makes no sense for a peripheral-mode-only > port, so if VBUS control is useful for host-only mode as well as OTG > mode, then I think the vbus-supply property should be documented in a > "Required properties for dr_mode != peripheral" section. > > Is the following table correct? > > Port operating mode: hostperipheral otg > -- --- > VBUS control required:no no yes > VBUS control useful: yes[1]? no yes > > [1] perhaps for power-saving/suspend??? For waking system up from sleep via devices connected to USB, I think Vbus is always kept ON in host mode. > -- > To unsubscribe from this list: send the line "unsubscribe linux-tegra" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
-Original Message- From: linux-tegra-ow...@vger.kernel.org [mailto:linux-tegra- ow...@vger.kernel.org] On Behalf Of Stephen Warren Sent: Thursday, April 04, 2013 12:38 AM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; ba...@ti.com; st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux- u...@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings On 04/03/2013 02:41 AM, Venu Byravarasu wrote: The existing Tegra USB bindings have a few issues: ... This patch fixes the binding definition to resolve these issues. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb- phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb- phy.txt Required properties : ... + - vbus-supply: regulator for VBUS Doesn't the driver only need to control VBUS if the port is in OTG mode? If there is no VBUS control, and the HW provides VBUS, I think that the port can only operate in host mode. If there is no VBUS control, and the HW does not provide VBUS, I think that the port can only operate in peripheral mode. If there is VBUS control, then shouldn't the port always operate in OTG mode, or are there other reasons to control VBUS even in host-only mode? If VBUS control is only useful for OTG mode, then I think the vbus-supply property should be documented in a Required properties for dr_mode == otg section. Agree, will do it in next patch update. I assume that VBUS control makes no sense for a peripheral-mode-only port, so if VBUS control is useful for host-only mode as well as OTG mode, then I think the vbus-supply property should be documented in a Required properties for dr_mode != peripheral section. Is the following table correct? Port operating mode: hostperipheral otg -- --- VBUS control required:no no yes VBUS control useful: yes[1]? no yes [1] perhaps for power-saving/suspend??? For waking system up from sleep via devices connected to USB, I think Vbus is always kept ON in host mode. -- To unsubscribe from this list: send the line unsubscribe linux-tegra in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v2 6/7] usb: phy: tegra: Add error handling clean up.
-Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Thursday, April 04, 2013 1:06 AM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; ba...@ti.com; st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux- u...@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 6/7] usb: phy: tegra: Add error handling clean up. On 04/03/2013 02:41 AM, Venu Byravarasu wrote: Check return values from all GPIO APIs and handle errors accordingly. Remove clk_disable_unprepare which is no more needed. checkpatch fails: As these are checkpatch warnings only, did not pay much attention on that. Any how will fix it in next update. WARNING: line over 80 characters #27: FILE: drivers/usb/phy/phy-tegra-usb.c:547: + dev_err(phy-dev, gpio %d direction not set\n, phy- reset_gpio); WARNING: line over 80 characters #34: FILE: drivers/usb/phy/phy-tegra-usb.c:553: + dev_err(phy-dev, gpio %d direction not set\n, phy- reset_gpio); total: 0 errors, 2 warnings, 72 lines checked 0006-usb-phy-tegra-Add-error-handling-clean-up.patch has style problems, please review. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v2 2/7] ARM: tegra: update device trees for USB binding rework
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Thursday, April 04, 2013 12:47 AM
To: Venu Byravarasu
Cc: gre...@linuxfoundation.org; ba...@ti.com;
st...@rowland.harvard.edu; linux-te...@vger.kernel.org; linux-
u...@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/7] ARM: tegra: update device trees for USB binding
rework
On 04/03/2013 02:41 AM, Venu Byravarasu wrote:
This patch updates all Tegra board files so that they contain all the
The binding documentation says that the vbus-supply property is required
in all cases. However, many of the DT files still don't have that
property even after this patch. That's inconsistent.
Will edit the binding to have the vbus-supply only for otg cases.
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..c99eccc 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -41,6 +41,10 @@
dr_mode = otg;
};
+ usb-phy@c500 {
+ dr_mode = otg;
+ };
Since this port claims to be OTG-capable, presumably a vbus-supply
property is mandatory here? If you don't know enough about the board to
correctly set up such a regulator, lets just mark this port as host-only
for now; we can switch it back to OTG-mode later once someone implements
the required regulator. This won't lose any functionality, since we
don't support OTG-mode yet anyway. However, it will allow the device
tree to be correct/consistent in the mean time.
Agree completely.
Will update the patch accordingly and send for review.
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
+ usb-phy@c500 {
+ vbus-supply = vbus_reg;
+ dr_mode = otg;
+ };
Where is the nvidia,vbus-gpio property? Since your code changes don't
actually implement use of the vbus-supply property yet, they will expect
the vbus-gpio property to exist in the PHY node.
As of now Vbus-gpio is being used by EHCI driver only.
As anyways we wanted to use vbus-supply, will implement its
support in PHY driver and remove vbus-gpio from EHCI node.
Hence did not add vbus-gpio to PHY DT nodes.
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH] usb: host: tegra: Reset Tegra USB controller before init
> -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Tuesday, April 02, 2013 9:02 PM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; linux- > u...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH] usb: host: tegra: Reset Tegra USB controller before init > > On 04/02/2013 01:12 AM, Venu Byravarasu wrote: > >> gre...@linuxfoundation.org wrote at Tuesday, March 05, 2013 6:04 AM: > >> On Mon, Mar 04, 2013 at 09:55:44AM -0700, Stephen Warren wrote: > >>> On 03/04/2013 12:55 AM, Venu Byravarasu wrote: > >>>> Stephen Warren wrote at Thursday, February 28, 2013 11:47 PM: > >>>>> On 02/27/2013 11:36 PM, Venu Byravarasu wrote: > >>>>>> To clear any configurations made by U-Boot on Tegra USB controller, > >>>>>> reset it before init in probe. > ... > >> Acked-by: Greg Kroah-Hartman > > > > Hi Greg, > > > > Stephen initially thought that the patch can be taken through tegra tree, > along with > > other patches posted at http://marc.info/?l=linux- > tegra=136361016003625=2 . > > As some other issues are blocking that patch series, can this change be > merged > > independent of that patch series via USB tree? > > > > The original change can be seen at http://marc.info/?l=linux- > usb=136203353205291=2 > > Venu, you should simply repost the patch; I'm sure its not in anyone's > email inbox any more. Resent the patch, with ACKs added. Latest patch can be seen at: http://marc.info/?l=linux-tegra=136498598329081=2 Thanks, Venu -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH resend] usb: host: tegra: Reset Tegra USB controller before init
To clear any configurations made by U-Boot on Tegra USB controller, reset it before init in probe. Signed-off-by: Venu Byravarasu Acked-by: Alan Stern Acked-by: Greg Kroah-Hartman reviewed-by: Stephen Warren --- This patch was already reviewed at: http://marc.info/?l=linux-usb=136203353205291=2 drivers/usb/host/ehci-tegra.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 1d2488c..60ed5d1 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -28,6 +28,7 @@ #include #include #include +#include #define TEGRA_USB_BASE 0xC500 #define TEGRA_USB2_BASE0xC5004000 @@ -691,6 +692,10 @@ static int tegra_ehci_probe(struct platform_device *pdev) if (err) goto fail_clk; + tegra_periph_reset_assert(tegra->clk); + udelay(1); + tegra_periph_reset_deassert(tegra->clk); + tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node, "nvidia,needs-double-reset"); -- 1.7.0.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues:
1) Many properties are documented as being part of the EHCI controller
node, yet they apply more to the PHY device. They should be moved.
2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
reg entry to point at PHY1's register space. We can't assume the PHY1
driver is present, so the PHY3 driver will directly access those
registers.
3) The list of clocks required by the PHY was missing some required
entries.
4) UTMI PHY Timing parameters are added
5) VBUS control is now specified using a regulator rather than a plain GPIO
6) Added nvidia,is-wired property to indicate whether the device is
hard wired on the board, or pluggable.
This patch fixes the binding definition to resolve these issues.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. added UTMI PHY timing params.
2. replaced gadget with peripheral in dr_mode
3. added nvidia,is-wired & vbus-supply params.
.../bindings/usb/nvidia,tegra20-ehci.txt | 27 +++---
.../bindings/usb/nvidia,tegra20-usb-phy.txt| 39 ++--
2 files changed, 41 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 34c9528..df09330 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following
modifications
and additions :
Required properties :
- - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
- used in host mode.
- - phy_type : Should be one of "ulpi" or "utmi".
- - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
- - nvidia,phy : phandle of the PHY instance, the controller is connected to.
-
-Required properties for phy_type == ulpi:
- - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
+ - compatible : Should be "nvidia,tegra20-ehci".
+ - nvidia,phy : phandle of the PHY that the controller is connected to.
+ - clocks : Contains a single entry which defines the USB controller's clock.
Optional properties:
- - dr_mode : dual role mode. Indicates the working mode for
- nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
- or "otg". Default to "host" if not defined for backward compatibility.
- host means this is a host controller
- peripheral means it is device controller
- otg means it can operate as either ("on the go")
- - nvidia,has-legacy-mode : boolean indicates whether this controller can
-operate in legacy mode (as APX 2500 / 2600). In legacy mode some
-registers are accessed through the APB_MISC base address instead of
-the USB controller. Since this is a legacy issue it probably does not
-warrant a compatible string of its own.
- - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2
-USB ports, which need reset twice due to hardware issues.
+ - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
+ USB ports, which need reset twice due to hardware issues.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index 6bdaba2..6ae8405 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -4,14 +4,47 @@ The device node for Tegra SOC USB PHY:
Required properties :
- compatible : Should be "nvidia,tegra20-usb-phy".
- - reg : Address and length of the register set for the USB PHY interface.
- - phy_type : Should be one of "ulpi" or "utmi".
+ - reg : Defines the following set of registers, in the order listed:
+ - The PHY's own register set.
+ Always present.
+ - The register set of the PHY containing the UTMI pad control registers.
+ Present if-and-only-if phy_type == utmi.
+ - phy_type : Should be one of "utmi", "ulpi" or "hsic".
+ - clocks : Defines the clocks listed in the clock-names property.
+ - clock-names : The following clock names must be present:
+ - reg: The clock needed to access the PHY's own registers. This is the
+ associated EHCI controller's clock. Always present.
+ - pll_u: PLL_U. Always present.
+ - timer: The timeout clock (clk_m). Present if phy_type == utmi.
+ - utmi-pads: The clock needed to access the UTMI pad control registers.
+ Present if phy_type == utmi.
+ - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
+ Present if phy_type == ulpi, and ULPI link mode is in use.
+ - vbus-supply: regulator for VBUS
Required properties for phy_type == ulpi:
- nvidia,phy-r
[PATCH v2 2/7] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 ++
arch/arm/boot/dts/tegra20-harmony.dts |8 ++--
arch/arm/boot/dts/tegra20-iris-512.dts |4 ++
arch/arm/boot/dts/tegra20-paz00.dts|8 ++--
arch/arm/boot/dts/tegra20-seaboard.dts | 22 +++--
arch/arm/boot/dts/tegra20-trimslice.dts| 21 ++--
arch/arm/boot/dts/tegra20-ventana.dts |7 ++--
arch/arm/boot/dts/tegra20.dtsi | 46 ---
8 files changed, 89 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index cb73e62..af5a7ae 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -443,6 +443,10 @@
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ };
+
sdhci@c8000600 {
cd-gpios = < 23 1>; /* gpio PC7 */
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 5fb0888..3454ce2 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -427,12 +427,12 @@
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..c99eccc 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -41,6 +41,10 @@
dr_mode = "otg";
};
+ usb-phy@c500 {
+ dr_mode = "otg";
+ };
+
usb@c5008000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 43fd28b..cc76129 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -426,12 +426,12 @@
nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 4f810a5..d234766 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -563,17 +563,22 @@
dr_mode = "otg";
};
+ usb-phy@c500 {
+ vbus-supply = <_reg>;
+ dr_mode = "otg";
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
@@ -786,6 +791,15 @@
gpio = < 1 0>;
enable-active-high;
};
+
+ vbus_reg: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "vdd_5v0";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 24 0>; /* PD0 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-trimslice
[PATCH v2 3/7] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu
---
delta from v1:
replaced gadget with peripheral.
drivers/usb/host/ehci-tegra.c |3 +--
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 1d2488c..afe9629 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -732,8 +732,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config,
- TEGRA_USB_PHY_MODE_HOST);
+ pdata->phy_config);
if (IS_ERR(tegra->phy)) {
dev_err(>dev, "Failed to open USB phy\n");
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 5487d38..91b6e29 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -688,7 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
+ void __iomem *regs, void *config)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -703,7 +703,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy->instance = instance;
phy->regs = regs;
phy->config = config;
- phy->mode = phy_mode;
phy->dev = dev;
phy->is_legacy_phy =
of_property_read_bool(np, "nvidia,has-legacy-mode");
@@ -713,6 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy->is_ulpi_phy = true;
+ err = of_property_match_string(np, "dr_mode", "otg");
+ if (err < 0) {
+ err = of_property_match_string(np, "dr_mode", "peripheral");
+ if (err < 0)
+ phy->mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy->mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy->mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy->config) {
if (phy->is_ulpi_phy) {
pr_err("%s: ulpi phy configuration missing", __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 9ebebe9..a7af923 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -64,7 +65,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);
+ void __iomem *regs, void *config);
void tegra_usb_phy_preresume(struct usb_phy *phy);
--
1.7.0.4
--
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[PATCH v2 7/7] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu
---
delta from v1:
1. Removed extra memory allocation for u_phy->otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
drivers/usb/host/ehci-tegra.c | 94 +---
drivers/usb/phy/phy-tegra-usb.c | 314 +
include/linux/usb/tegra_usb_phy.h |3 +-
3 files changed, 218 insertions(+), 193 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index afe9629..11f125f 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -648,7 +648,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev->id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev->dev.platform_data;
@@ -671,34 +671,45 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(_ehci_hc_driver, >dev,
- dev_name(>dev));
- if (!hcd) {
- dev_err(>dev, "Unable to create HCD\n");
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra->clk = devm_clk_get(>dev, NULL);
if (IS_ERR(tegra->clk)) {
dev_err(>dev, "Can't get ehci clock\n");
- err = PTR_ERR(tegra->clk);
- goto fail_clk;
+ return PTR_ERR(tegra->clk);
}
err = clk_prepare_enable(tegra->clk);
if (err)
- goto fail_clk;
+ return err;
+
+ np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
"nvidia,needs-double-reset");
+ hcd = usb_create_hcd(_ehci_hc_driver, >dev,
+ dev_name(>dev));
+ if (!hcd) {
+ dev_err(>dev, "Unable to create HCD\n");
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd->phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(>dev, "Failed to get I/O memory\n");
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
@@ -706,55 +717,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd->regs) {
dev_err(>dev, "Failed to remap I/O memory\n");
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
-* device-tree probing. Old code relies on the platform_device
-* numbering that we lack for device-tree-instantiated devices.
-*/
- if (instance < 0) {
- switch (res->start) {
- case TEGRA_USB_BASE:
- instance = 0;
- break;
- case TEGRA_USB2_BASE:
- instance = 1;
- break;
- case TEGRA_USB3_BASE:
- instance = 2;
- break;
- default:
- err = -ENODEV;
- dev_err(>dev, "unknown usb instance\n");
- goto fail_io;
- }
+ goto cleanup_hcd_create;
}
- tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config);
- if (IS_ERR(tegra->phy)) {
- dev_err(>dev, "Failed to open USB phy\n");
- err = -ENXIO;
- goto fail_io;
+ err = usb_phy_init(hcd->phy);
+ if (err) {
+ dev_err(>dev, "Failed to initialize phy\n");
+ goto cleanup_hcd_create;
}
- hcd->phy = u_phy = >
[PATCH v2 5/7] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu
---
delta from v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 16851e2..a2a89a9 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy->regs;
- struct tegra_ulpi_config *config = phy->config;
- gpio_direction_output(config->reset_gpio, 0);
+ gpio_direction_output(phy->reset_gpio, 0);
msleep(5);
- gpio_direction_output(config->reset_gpio, 1);
+ gpio_direction_output(phy->reset_gpio, 1);
clk_prepare_enable(phy->clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy->config;
-
clk_disable(phy->clk);
- return gpio_direction_output(config->reset_gpio, 0);
+ return gpio_direction_output(phy->reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err("%s: can't get ulpi clock\n", __func__);
return PTR_ERR(phy->clk);
}
- if (!gpio_is_valid(ulpi_config->reset_gpio))
- ulpi_config->reset_gpio =
- of_get_named_gpio(phy->dev->of_node,
- "nvidia,phy-reset-gpio", 0);
- if (!gpio_is_valid(ulpi_config->reset_gpio)) {
+
+ phy->reset_gpio =
+ of_get_named_gpio(phy->dev->of_node,
+ "nvidia,phy-reset-gpio", 0);
+ if (!gpio_is_valid(phy->reset_gpio)) {
pr_err("%s: invalid reset gpio: %d\n", __func__,
- ulpi_config->reset_gpio);
+ phy->reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(ulpi_config->reset_gpio, 0);
+ gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ gpio_direction_output(phy->reset_gpio, 0);
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index a7af923..6cfb8f1 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
--
1.7.0.4
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[PATCH v2 4/7] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu
---
delta from v1: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 91b6e29..16851e2 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy->clk = clk_get_sys(NULL, ulpi_config->clk);
if (IS_ERR(phy->clk)) {
pr_err("%s: can't get ulpi clock\n", __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy->clk);
}
if (!gpio_is_valid(ulpi_config->reset_gpio))
ulpi_config->reset_gpio =
--
1.7.0.4
--
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[PATCH v2 6/7] usb: phy: tegra: Add error handling & clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove clk_disable_unprepare which is no more needed.
Signed-off-by: Venu Byravarasu
---
delta from v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index a2a89a9..01c5e23 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy->regs;
- gpio_direction_output(phy->reset_gpio, 0);
+ ret = gpio_direction_output(phy->reset_gpio, 0);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d direction not set\n",
phy->reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy->reset_gpio, 1);
+ ret = gpio_direction_output(phy->reset_gpio, 1);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d direction not set\n",
phy->reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy->clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy->dev->of_node,
"nvidia,phy-reset-gpio", 0);
if (!gpio_is_valid(phy->reset_gpio)) {
- pr_err("%s: invalid reset gpio: %d\n", __func__,
+ dev_err(phy->dev, "invalid gpio: %d\n",
+ phy->reset_gpio);
+ err = phy->reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ if (err < 0) {
+ dev_err(phy->dev, "request failed for gpio: %d\n",
phy->reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy->reset_gpio, 0);
+ if (err < 0) {
+ dev_err(phy->dev, "gpio %d direction not set to
output\n",
+ phy->reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(phy->reset_gpio, 0);
+
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
+ if (!phy->ulpi) {
+ dev_err(phy->dev, "otg_ulpi_create returned err\n");
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err < 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy->pll_u);
- clk_put(phy->pll_u);
+cleanup_gpio_req:
+ gpio_free(phy->reset_gpio);
+cleanup_clk_get:
+ clk_put(phy->clk);
return err;
}
--
1.7.0.4
--
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[PATCH v2 0/7] Tegra USB PHY driver series
delta from v1: This patch is prepared as follow up patch of TEGRA USB PHY driver patch series being discussed at: http://marc.info/?l=linux-tegra=136361016003625=2 Venu Byravarasu (7): ARM: tegra: finalize USB EHCI and PHY bindings ARM: tegra: update device trees for USB binding rework usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling & clean up. usb: phy: registering Tegra USB PHY as platform driver .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 39 +++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 + arch/arm/boot/dts/tegra20-harmony.dts |8 +- arch/arm/boot/dts/tegra20-iris-512.dts |4 + arch/arm/boot/dts/tegra20-paz00.dts|8 +- arch/arm/boot/dts/tegra20-seaboard.dts | 22 ++- arch/arm/boot/dts/tegra20-trimslice.dts| 21 +- arch/arm/boot/dts/tegra20-ventana.dts |7 +- arch/arm/boot/dts/tegra20.dtsi | 46 +++- drivers/usb/host/ehci-tegra.c | 95 +++ drivers/usb/phy/phy-tegra-usb.c| 309 include/linux/usb/tegra_usb_phy.h |5 +- 13 files changed, 364 insertions(+), 231 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/7] Tegra USB PHY driver series
delta from v1: This patch is prepared as follow up patch of TEGRA USB PHY driver patch series being discussed at: http://marc.info/?l=linux-tegram=136361016003625w=2 Venu Byravarasu (7): ARM: tegra: finalize USB EHCI and PHY bindings ARM: tegra: update device trees for USB binding rework usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling clean up. usb: phy: registering Tegra USB PHY as platform driver .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 39 +++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 + arch/arm/boot/dts/tegra20-harmony.dts |8 +- arch/arm/boot/dts/tegra20-iris-512.dts |4 + arch/arm/boot/dts/tegra20-paz00.dts|8 +- arch/arm/boot/dts/tegra20-seaboard.dts | 22 ++- arch/arm/boot/dts/tegra20-trimslice.dts| 21 +- arch/arm/boot/dts/tegra20-ventana.dts |7 +- arch/arm/boot/dts/tegra20.dtsi | 46 +++- drivers/usb/host/ehci-tegra.c | 95 +++ drivers/usb/phy/phy-tegra-usb.c| 309 include/linux/usb/tegra_usb_phy.h |5 +- 13 files changed, 364 insertions(+), 231 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 6/7] usb: phy: tegra: Add error handling clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove clk_disable_unprepare which is no more needed.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index a2a89a9..01c5e23 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy-regs;
- gpio_direction_output(phy-reset_gpio, 0);
+ ret = gpio_direction_output(phy-reset_gpio, 0);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d direction not set\n,
phy-reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy-reset_gpio, 1);
+ ret = gpio_direction_output(phy-reset_gpio, 1);
+ if (ret 0) {
+ dev_err(phy-dev, gpio %d direction not set\n,
phy-reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy-clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy-dev-of_node,
nvidia,phy-reset-gpio, 0);
if (!gpio_is_valid(phy-reset_gpio)) {
- pr_err(%s: invalid reset gpio: %d\n, __func__,
+ dev_err(phy-dev, invalid gpio: %d\n,
+ phy-reset_gpio);
+ err = phy-reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ if (err 0) {
+ dev_err(phy-dev, request failed for gpio: %d\n,
phy-reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy-reset_gpio, 0);
+ if (err 0) {
+ dev_err(phy-dev, gpio %d direction not set to
output\n,
+ phy-reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(phy-reset_gpio, 0);
+
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
+ if (!phy-ulpi) {
+ dev_err(phy-dev, otg_ulpi_create returned err\n);
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy-pll_u);
- clk_put(phy-pll_u);
+cleanup_gpio_req:
+ gpio_free(phy-reset_gpio);
+cleanup_clk_get:
+ clk_put(phy-clk);
return err;
}
--
1.7.0.4
--
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[PATCH v2 4/7] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1: no change.
drivers/usb/phy/phy-tegra-usb.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 91b6e29..16851e2 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy-clk = clk_get_sys(NULL, ulpi_config-clk);
if (IS_ERR(phy-clk)) {
pr_err(%s: can't get ulpi clock\n, __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy-clk);
}
if (!gpio_is_valid(ulpi_config-reset_gpio))
ulpi_config-reset_gpio =
--
1.7.0.4
--
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[PATCH v2 5/7] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v2: no change.
drivers/usb/phy/phy-tegra-usb.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 16851e2..a2a89a9 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy-regs;
- struct tegra_ulpi_config *config = phy-config;
- gpio_direction_output(config-reset_gpio, 0);
+ gpio_direction_output(phy-reset_gpio, 0);
msleep(5);
- gpio_direction_output(config-reset_gpio, 1);
+ gpio_direction_output(phy-reset_gpio, 1);
clk_prepare_enable(phy-clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy-config;
-
clk_disable(phy-clk);
- return gpio_direction_output(config-reset_gpio, 0);
+ return gpio_direction_output(phy-reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err(%s: can't get ulpi clock\n, __func__);
return PTR_ERR(phy-clk);
}
- if (!gpio_is_valid(ulpi_config-reset_gpio))
- ulpi_config-reset_gpio =
- of_get_named_gpio(phy-dev-of_node,
- nvidia,phy-reset-gpio, 0);
- if (!gpio_is_valid(ulpi_config-reset_gpio)) {
+
+ phy-reset_gpio =
+ of_get_named_gpio(phy-dev-of_node,
+ nvidia,phy-reset-gpio, 0);
+ if (!gpio_is_valid(phy-reset_gpio)) {
pr_err(%s: invalid reset gpio: %d\n, __func__,
- ulpi_config-reset_gpio);
+ phy-reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config-reset_gpio, ulpi_phy_reset_b);
- gpio_direction_output(ulpi_config-reset_gpio, 0);
+ gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
+ gpio_direction_output(phy-reset_gpio, 0);
phy-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, 0);
phy-ulpi-io_priv = phy-regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index a7af923..6cfb8f1 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
--
1.7.0.4
--
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[PATCH v2 7/7] usb: phy: registering Tegra USB PHY as platform driver
Registered Tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
1. Removed extra memory allocation for u_phy-otg
2. Moved ulpi_init code into separate function.
3. Initializing all clk and GPIOs in probe.
4. Used devm_ APIs wherever possible.
drivers/usb/host/ehci-tegra.c | 94 +---
drivers/usb/phy/phy-tegra-usb.c | 314 +
include/linux/usb/tegra_usb_phy.h |3 +-
3 files changed, 218 insertions(+), 193 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index afe9629..11f125f 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -648,7 +648,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev-id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev-dev.platform_data;
@@ -671,34 +671,45 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
- dev_name(pdev-dev));
- if (!hcd) {
- dev_err(pdev-dev, Unable to create HCD\n);
- return -ENOMEM;
- }
-
- platform_set_drvdata(pdev, tegra);
-
tegra-clk = devm_clk_get(pdev-dev, NULL);
if (IS_ERR(tegra-clk)) {
dev_err(pdev-dev, Can't get ehci clock\n);
- err = PTR_ERR(tegra-clk);
- goto fail_clk;
+ return PTR_ERR(tegra-clk);
}
err = clk_prepare_enable(tegra-clk);
if (err)
- goto fail_clk;
+ return err;
+
+ np_phy = of_parse_phandle(pdev-dev.of_node, nvidia,phy, 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
tegra-needs_double_reset = of_property_read_bool(pdev-dev.of_node,
nvidia,needs-double-reset);
+ hcd = usb_create_hcd(tegra_ehci_hc_driver, pdev-dev,
+ dev_name(pdev-dev));
+ if (!hcd) {
+ dev_err(pdev-dev, Unable to create HCD\n);
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd-phy = u_phy;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(pdev-dev, Failed to get I/O memory\n);
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd-rsrc_start = res-start;
hcd-rsrc_len = resource_size(res);
@@ -706,55 +717,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd-regs) {
dev_err(pdev-dev, Failed to remap I/O memory\n);
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
-* device-tree probing. Old code relies on the platform_device
-* numbering that we lack for device-tree-instantiated devices.
-*/
- if (instance 0) {
- switch (res-start) {
- case TEGRA_USB_BASE:
- instance = 0;
- break;
- case TEGRA_USB2_BASE:
- instance = 1;
- break;
- case TEGRA_USB3_BASE:
- instance = 2;
- break;
- default:
- err = -ENODEV;
- dev_err(pdev-dev, unknown usb instance\n);
- goto fail_io;
- }
+ goto cleanup_hcd_create;
}
- tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
- pdata-phy_config);
- if (IS_ERR(tegra-phy)) {
- dev_err(pdev-dev, Failed to open USB phy\n);
- err = -ENXIO;
- goto fail_io;
+ err = usb_phy_init(hcd-phy);
+ if (err) {
+ dev_err(pdev-dev, Failed to initialize phy\n);
+ goto cleanup_hcd_create;
}
- hcd-phy = u_phy = tegra-phy-u_phy;
- usb_phy_init(hcd-phy);
-
u_phy-otg = devm_kzalloc(pdev-dev, sizeof(struct usb_otg),
GFP_KERNEL
[PATCH v2 3/7] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
replaced gadget with peripheral.
drivers/usb/host/ehci-tegra.c |3 +--
drivers/usb/phy/phy-tegra-usb.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 1d2488c..afe9629 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -732,8 +732,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
tegra-phy = tegra_usb_phy_open(pdev-dev, instance, hcd-regs,
- pdata-phy_config,
- TEGRA_USB_PHY_MODE_HOST);
+ pdata-phy_config);
if (IS_ERR(tegra-phy)) {
dev_err(pdev-dev, Failed to open USB phy\n);
err = -ENXIO;
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 5487d38..91b6e29 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -688,7 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
+ void __iomem *regs, void *config)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -703,7 +703,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy-instance = instance;
phy-regs = regs;
phy-config = config;
- phy-mode = phy_mode;
phy-dev = dev;
phy-is_legacy_phy =
of_property_read_bool(np, nvidia,has-legacy-mode);
@@ -713,6 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy-is_ulpi_phy = true;
+ err = of_property_match_string(np, dr_mode, otg);
+ if (err 0) {
+ err = of_property_match_string(np, dr_mode, peripheral);
+ if (err 0)
+ phy-mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy-mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy-mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy-config) {
if (phy-is_ulpi_phy) {
pr_err(%s: ulpi phy configuration missing, __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 9ebebe9..a7af923 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -64,7 +65,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);
+ void __iomem *regs, void *config);
void tegra_usb_phy_preresume(struct usb_phy *phy);
--
1.7.0.4
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[PATCH v2 2/7] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
delta from v1:
1. Fixed voltage regulators were used for vbus-supply
2. Added UTMI PHY timing Parameters to DT.
arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 ++
arch/arm/boot/dts/tegra20-harmony.dts |8 ++--
arch/arm/boot/dts/tegra20-iris-512.dts |4 ++
arch/arm/boot/dts/tegra20-paz00.dts|8 ++--
arch/arm/boot/dts/tegra20-seaboard.dts | 22 +++--
arch/arm/boot/dts/tegra20-trimslice.dts| 21 ++--
arch/arm/boot/dts/tegra20-ventana.dts |7 ++--
arch/arm/boot/dts/tegra20.dtsi | 46 ---
8 files changed, 89 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index cb73e62..af5a7ae 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -443,6 +443,10 @@
nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ };
+
sdhci@c8000600 {
cd-gpios = gpio 23 1; /* gpio PC7 */
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 5fb0888..3454ce2 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -427,12 +427,12 @@
nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..c99eccc 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -41,6 +41,10 @@
dr_mode = otg;
};
+ usb-phy@c500 {
+ dr_mode = otg;
+ };
+
usb@c5008000 {
status = okay;
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 43fd28b..cc76129 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -426,12 +426,12 @@
nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 168 0; /* gpio PV0 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 4f810a5..d234766 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -563,17 +563,22 @@
dr_mode = otg;
};
+ usb-phy@c500 {
+ vbus-supply = vbus_reg;
+ dr_mode = otg;
+ };
+
usb@c5004000 {
status = okay;
nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
- usb@c5008000 {
- status = okay;
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
+ usb@c5008000 {
+ status = okay;
};
sdhci@c800 {
@@ -786,6 +791,15 @@
gpio = pmic 1 0;
enable-active-high;
};
+
+ vbus_reg: regulator@3 {
+ compatible = regulator-fixed;
+ reg = 3;
+ regulator-name = vdd_5v0;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gpio 24 0; /* PD0 */
+ };
};
sound {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 955bf49..8f2bb9b 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -305,17 +305,21 @@
nvidia,vbus-gpio = gpio 170 0; /* gpio PV2
[PATCH v2 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues: 1) Many properties are documented as being part of the EHCI controller node, yet they apply more to the PHY device. They should be moved. 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a reg entry to point at PHY1's register space. We can't assume the PHY1 driver is present, so the PHY3 driver will directly access those registers. 3) The list of clocks required by the PHY was missing some required entries. 4) UTMI PHY Timing parameters are added 5) VBUS control is now specified using a regulator rather than a plain GPIO 6) Added nvidia,is-wired property to indicate whether the device is hard wired on the board, or pluggable. This patch fixes the binding definition to resolve these issues. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- delta from v1: 1. added UTMI PHY timing params. 2. replaced gadget with peripheral in dr_mode 3. added nvidia,is-wired vbus-supply params. .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +++--- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 39 ++-- 2 files changed, 41 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt index 34c9528..df09330 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -6,27 +6,10 @@ Practice : Universal Serial Bus with the following modifications and additions : Required properties : - - compatible : Should be nvidia,tegra20-ehci for USB controllers - used in host mode. - - phy_type : Should be one of ulpi or utmi. - - nvidia,vbus-gpio : If present, specifies a gpio that needs to be - activated for the bus to be powered. - - nvidia,phy : phandle of the PHY instance, the controller is connected to. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. + - compatible : Should be nvidia,tegra20-ehci. + - nvidia,phy : phandle of the PHY that the controller is connected to. + - clocks : Contains a single entry which defines the USB controller's clock. Optional properties: - - dr_mode : dual role mode. Indicates the working mode for - nvidia,tegra20-ehci compatible controllers. Can be host, peripheral, - or otg. Default to host if not defined for backward compatibility. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either (on the go) - - nvidia,has-legacy-mode : boolean indicates whether this controller can -operate in legacy mode (as APX 2500 / 2600). In legacy mode some -registers are accessed through the APB_MISC base address instead of -the USB controller. Since this is a legacy issue it probably does not -warrant a compatible string of its own. - - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2 -USB ports, which need reset twice due to hardware issues. + - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 + USB ports, which need reset twice due to hardware issues. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt index 6bdaba2..6ae8405 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt @@ -4,14 +4,47 @@ The device node for Tegra SOC USB PHY: Required properties : - compatible : Should be nvidia,tegra20-usb-phy. - - reg : Address and length of the register set for the USB PHY interface. - - phy_type : Should be one of ulpi or utmi. + - reg : Defines the following set of registers, in the order listed: + - The PHY's own register set. + Always present. + - The register set of the PHY containing the UTMI pad control registers. + Present if-and-only-if phy_type == utmi. + - phy_type : Should be one of utmi, ulpi or hsic. + - clocks : Defines the clocks listed in the clock-names property. + - clock-names : The following clock names must be present: + - reg: The clock needed to access the PHY's own registers. This is the + associated EHCI controller's clock. Always present. + - pll_u: PLL_U. Always present. + - timer: The timeout clock (clk_m). Present if phy_type == utmi. + - utmi-pads: The clock needed to access the UTMI pad control registers. + Present if phy_type == utmi. + - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2). + Present if phy_type == ulpi, and ULPI link mode is in use. + - vbus-supply: regulator for VBUS Required properties for phy_type == ulpi: - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. +Required PHY timing params for utmi phy: + - nvidia,hssync-start-delay : Number of 480 Mhz clock cycles to wait before
[PATCH resend] usb: host: tegra: Reset Tegra USB controller before init
To clear any configurations made by U-Boot on Tegra USB controller, reset it before init in probe. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com Acked-by: Alan Stern st...@rowland.harvard.edu Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org reviewed-by: Stephen Warren swar...@nvidia.com --- This patch was already reviewed at: http://marc.info/?l=linux-usbm=136203353205291w=2 drivers/usb/host/ehci-tegra.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 1d2488c..60ed5d1 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -28,6 +28,7 @@ #include linux/pm_runtime.h #include linux/usb/ehci_def.h #include linux/usb/tegra_usb_phy.h +#include linux/clk/tegra.h #define TEGRA_USB_BASE 0xC500 #define TEGRA_USB2_BASE0xC5004000 @@ -691,6 +692,10 @@ static int tegra_ehci_probe(struct platform_device *pdev) if (err) goto fail_clk; + tegra_periph_reset_assert(tegra-clk); + udelay(1); + tegra_periph_reset_deassert(tegra-clk); + tegra-needs_double_reset = of_property_read_bool(pdev-dev.of_node, nvidia,needs-double-reset); -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH] usb: host: tegra: Reset Tegra USB controller before init
-Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Tuesday, April 02, 2013 9:02 PM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; linux- u...@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH] usb: host: tegra: Reset Tegra USB controller before init On 04/02/2013 01:12 AM, Venu Byravarasu wrote: gre...@linuxfoundation.org wrote at Tuesday, March 05, 2013 6:04 AM: On Mon, Mar 04, 2013 at 09:55:44AM -0700, Stephen Warren wrote: On 03/04/2013 12:55 AM, Venu Byravarasu wrote: Stephen Warren wrote at Thursday, February 28, 2013 11:47 PM: On 02/27/2013 11:36 PM, Venu Byravarasu wrote: To clear any configurations made by U-Boot on Tegra USB controller, reset it before init in probe. ... Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org Hi Greg, Stephen initially thought that the patch can be taken through tegra tree, along with other patches posted at http://marc.info/?l=linux- tegram=136361016003625w=2 . As some other issues are blocking that patch series, can this change be merged independent of that patch series via USB tree? The original change can be seen at http://marc.info/?l=linux- usbm=136203353205291w=2 Venu, you should simply repost the patch; I'm sure its not in anyone's email inbox any more. Resent the patch, with ACKs added. Latest patch can be seen at: http://marc.info/?l=linux-tegram=136498598329081w=2 Thanks, Venu -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH] usb: host: tegra: Reset Tegra USB controller before init
> -Original Message- > From: gre...@linuxfoundation.org [mailto:gre...@linuxfoundation.org] > Sent: Tuesday, March 05, 2013 6:04 AM > To: Stephen Warren > Cc: Venu Byravarasu; st...@rowland.harvard.edu; linux- > u...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH] usb: host: tegra: Reset Tegra USB controller before init > > On Mon, Mar 04, 2013 at 09:55:44AM -0700, Stephen Warren wrote: > > On 03/04/2013 12:55 AM, Venu Byravarasu wrote: > > > Stephen Warren wrote at Thursday, February 28, 2013 11:47 PM: > > >> On 02/27/2013 11:36 PM, Venu Byravarasu wrote: > > >>> To clear any configurations made by U-Boot on Tegra USB controller, > > >>> reset it before init in probe. > > >> > > >>> diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci- > tegra.c > > >> > > >>> @@ -691,6 +692,10 @@ static int tegra_ehci_probe(struct > platform_device > > >> *pdev) > > >>> if (err) > > >>> goto fail_clk; > > >>> > > >>> + tegra_periph_reset_assert(tegra->clk); > > >>> + udelay(1); > > >>> + tegra_periph_reset_deassert(tegra->clk); > > >> > > Alan, Greg, if you're OK with this patch now, or for any revised > > version, an Ack so I can take it through the Tegra tree would be great, > > thanks. > > Acked-by: Greg Kroah-Hartman Hi Greg, Stephen initially thought that the patch can be taken through tegra tree, along with other patches posted at http://marc.info/?l=linux-tegra=136361016003625=2 . As some other issues are blocking that patch series, can this change be merged independent of that patch series via USB tree? The original change can be seen at http://marc.info/?l=linux-usb=136203353205291=2 Thanks, Venu -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH] usb: host: tegra: Reset Tegra USB controller before init
-Original Message- From: gre...@linuxfoundation.org [mailto:gre...@linuxfoundation.org] Sent: Tuesday, March 05, 2013 6:04 AM To: Stephen Warren Cc: Venu Byravarasu; st...@rowland.harvard.edu; linux- u...@vger.kernel.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH] usb: host: tegra: Reset Tegra USB controller before init On Mon, Mar 04, 2013 at 09:55:44AM -0700, Stephen Warren wrote: On 03/04/2013 12:55 AM, Venu Byravarasu wrote: Stephen Warren wrote at Thursday, February 28, 2013 11:47 PM: On 02/27/2013 11:36 PM, Venu Byravarasu wrote: To clear any configurations made by U-Boot on Tegra USB controller, reset it before init in probe. diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci- tegra.c @@ -691,6 +692,10 @@ static int tegra_ehci_probe(struct platform_device *pdev) if (err) goto fail_clk; + tegra_periph_reset_assert(tegra-clk); + udelay(1); + tegra_periph_reset_deassert(tegra-clk); Alan, Greg, if you're OK with this patch now, or for any revised version, an Ack so I can take it through the Tegra tree would be great, thanks. Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org Hi Greg, Stephen initially thought that the patch can be taken through tegra tree, along with other patches posted at http://marc.info/?l=linux-tegram=136361016003625w=2 . As some other issues are blocking that patch series, can this change be merged independent of that patch series via USB tree? The original change can be seen at http://marc.info/?l=linux-usbm=136203353205291w=2 Thanks, Venu -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 7/7] usb: phy: registering tegra USB PHY as platform driver
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Wednesday, March 20, 2013 1:51 AM
> To: Venu Byravarasu
> Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org
> Subject: Re: [PATCH 7/7] usb: phy: registering tegra USB PHY as platform
> driver
>
> On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
> > Registered tegra USB PHY as a separate platform driver.
> >
> > diff --git a/drivers/usb/phy/tegra_usb_phy.c
> b/drivers/usb/phy/tegra_usb_phy.c
>
> > static void tegra_usb_phy_close(struct usb_phy *x)
> > {
> > if (phy->is_ulpi_phy)
> > clk_put(phy->clk);
>
> phy->clk is obtained using devm_clk_get(). This typically means you
> never need to clk_put() it, and if for some reason you really have to,
> you should use devm_clk_put() instead of plain clk_put().
Agree, will remove clk_put.
>
> > @@ -774,23 +667,53 @@ struct tegra_usb_phy
> *tegra_usb_phy_open(struct device *dev, int instance,
>
> > + err = gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
>
> I think you can use devm_gpio_request() here to simplify the error-handling.
Sure, will do.
>
> I wonder why in the ULPI case, all the code is inline here, whereas in
> the UTMI case, this simply calls a function. Wouldn't it be more
> consistent to have the following code here:
>
> if (phy->is_ulpi_phy)
> err = ulpi_open();
> else
> err = utmip_open();
> if (err)
> goto fail;
Sure, will take care of this in next patch.
>
> > +static int tegra_usb_phy_probe(struct platform_device *pdev)
>
> Hmmm. Note that in order to make deferred probe work correctly, all the
> gpio_request(), clk_get(), etc. calls that acquire resources from other
> drivers must happen here in probe() and not in tegra_usb_phy_open().
In present code tegra_usb_phy_open() is indirectly called via usb_phy_init()
from ehci-tegra.c.
Between obtaining PHY handle (and hence getting into deferred probe, when it is
not available)
and calling usb_phy_init, no other USB registers were accessed. Hence I was
doing this way.
Do you still think it would be better to move gpio and clk APIs to probe?
>
> > + err = of_property_match_string(np, "dr_mode", "otg");
> > + if (err < 0) {
> > + err = of_property_match_string(np, "dr_mode", "gadget");
>
> Again, use "peripheral", not "gadget".
Will do.
>
> > +struct usb_phy *tegra_usb_get_phy(struct device_node *dn)
> > +{
> > + struct device *dev;
> > + struct tegra_usb_phy *tegra_phy;
> > +
> > + dev = driver_find_device(_usb_phy_driver.driver, NULL, dn,
> > +tegra_usb_phy_match);
> > + if (!dev)
> > + return ERR_PTR(-EPROBE_DEFER);
> > +
> > + tegra_phy = dev_get_drvdata(dev);
> > +
> > + return _phy->u_phy;
> > +}
>
> I think you need a module_get() somewhere in there, and also need to add
> a tegra_usb_put_phy() function too, so you can call module_put() from it.
Am not clear on why to add module_get here. Can you plz provide more details?
Thanks Stephen, for the review.
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RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
> -Original Message-
> From: Felipe Balbi [mailto:ba...@ti.com]
> Sent: Wednesday, March 20, 2013 5:55 PM
> To: Venu Byravarasu
> Cc: kishon; gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
> disc...@lists.ozlabs.org
> Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
> rework
>
> * PGP Signed by an unknown key
>
> On Wed, Mar 20, 2013 at 05:47:46PM +0530, Venu Byravarasu wrote:
> > > -Original Message-
> > > From: kishon [mailto:kis...@ti.com]
> > > Sent: Wednesday, March 20, 2013 4:53 PM
> > > To: Venu Byravarasu
> > > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> > > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> > > swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
> > > disc...@lists.ozlabs.org
> > > Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
> > > rework
> > >
> > > Hi,
> > > >
> > > > + usb-phy@c5004000 {
> > > This node doesn't have a *reg* property. So "@c5004000" is not needed.
> > > This comment applies to all the nodes which doesn't have *reg* property.
> >
> > Thanks Kishon for the comments.
> > As I've 3 usb-phy DT nodes, how to differentiate between them if I remove
> this @Address ?
>
> then add reg property :-)
Thanks Felipe, for confirming.
>
> --
> balbi
>
> * Unknown Key
> * 0x35CAA444
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RE: [PATCH 3/7] usb: phy: tegra: Get PHY mode using DT
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Wednesday, March 20, 2013 1:29 AM
> To: Venu Byravarasu
> Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org
> Subject: Re: [PATCH 3/7] usb: phy: tegra: Get PHY mode using DT
>
> On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
> > Added a new PHY mode to support OTG.
> > Obtained Tegra USB PHY mode using DT property.
>
> > diff --git a/drivers/usb/phy/tegra_usb_phy.c
> b/drivers/usb/phy/tegra_usb_phy.c
>
> > @@ -713,6 +712,16 @@ struct tegra_usb_phy
> *tegra_usb_phy_open(struct device *dev, int instance,
> > else
> > phy->is_ulpi_phy = true;
> >
> > + err = of_property_match_string(np, "dr_mode", "otg");
> > + if (err < 0) {
> > + err = of_property_match_string(np, "dr_mode", "gadget");
> > + if (err < 0)
>
> The binding says the 3 legal values for this property are "host",
> "peripheral", or "otg". This agrees with the usage in
> Documentation/devicetree/bindings/usb/fsl-usb.txt and
> drivers/usb/host/fsl-mph-dr-of.c. So, "gadget" is not something the code
> should be checking for.
Agree, will correct it.
>
> I'm sure I pointed this out before.
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RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
> -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Wednesday, March 20, 2013 1:24 AM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org > Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding > rework > > On 03/18/2013 06:29 AM, Venu Byravarasu wrote: > > This patch updates all Tegra board files so that they contain all the > > properties required by the updated USB DT binding. Note that this patch > > only adds the new properties and does not yet remove the old properties, > > in order to maintain bisectability. The old properties will be removed > > once the driver has been updated to assume the new bindings. > > > > Signed-off-by: Venu Byravarasu > > --- > > arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 +++ > > arch/arm/boot/dts/tegra20-harmony.dts |8 +++--- > > arch/arm/boot/dts/tegra20-iris-512.dts |4 +++ > > arch/arm/boot/dts/tegra20-paz00.dts|8 +++--- > > arch/arm/boot/dts/tegra20-seaboard.dts | 13 +++--- > > arch/arm/boot/dts/tegra20-trimslice.dts| 12 +++--- > > arch/arm/boot/dts/tegra20-ventana.dts |7 +++-- > > arch/arm/boot/dts/tegra20.dtsi | 32 > > +-- > > 8 files changed, 57 insertions(+), 31 deletions(-) > > I think you forgot to update arch/arm/boot/dts/tegra20-whistler.dts in > this patch. Thanks Stephen, will add that & send updated patch for review. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
> -Original Message-
> From: kishon [mailto:kis...@ti.com]
> Sent: Wednesday, March 20, 2013 4:53 PM
> To: Venu Byravarasu
> Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
> ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
> disc...@lists.ozlabs.org
> Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
> rework
>
> Hi,
>
> On Monday 18 March 2013 05:59 PM, Venu Byravarasu wrote:
> > This patch updates all Tegra board files so that they contain all the
> > properties required by the updated USB DT binding. Note that this patch
> > only adds the new properties and does not yet remove the old properties,
> > in order to maintain bisectability. The old properties will be removed
> > once the driver has been updated to assume the new bindings.
> >
> > Signed-off-by: Venu Byravarasu
> > ---
> > arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 +++
> > arch/arm/boot/dts/tegra20-harmony.dts |8 +++---
> > arch/arm/boot/dts/tegra20-iris-512.dts |4 +++
> > arch/arm/boot/dts/tegra20-paz00.dts|8 +++---
> > arch/arm/boot/dts/tegra20-seaboard.dts | 13 +++---
> > arch/arm/boot/dts/tegra20-trimslice.dts| 12 +++---
> > arch/arm/boot/dts/tegra20-ventana.dts |7 +++--
> > arch/arm/boot/dts/tegra20.dtsi | 32
> > +--
> > 8 files changed, 57 insertions(+), 31 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> > index cb73e62..af5a7ae 100644
> > --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> > +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> > @@ -443,6 +443,10 @@
> > nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
> > };
> >
> > + usb-phy@c5004000 {
> This node doesn't have a *reg* property. So "@c5004000" is not needed.
> This comment applies to all the nodes which doesn't have *reg* property.
Thanks Kishon for the comments.
As I've 3 usb-phy DT nodes, how to differentiate between them if I remove this
@Address ?
>
> Thanks
> Kishon
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RE: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
> -Original Message- > From: kishon [mailto:kis...@ti.com] > Sent: Wednesday, March 20, 2013 4:49 PM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree- > disc...@lists.ozlabs.org > Subject: Re: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings > > Hi, > > On Monday 18 March 2013 05:59 PM, Venu Byravarasu wrote: > > The existing Tegra USB bindings have a few issues: > > > > 1) Many properties are documented as being part of the EHCI controller > > node, yet they apply more to the PHY device. They should be moved. > > > > 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a > > reg entry to point at PHY1's register space. We can't assume the PHY1 > > driver is present, so the PHY3 driver will directly access those > > registers. > > > > 3) The list of clocks required by the PHY was missing some required > > entries. > > > > This patch fixes the binding definition to resolve these issues. > > > > Signed-off-by: Venu Byravarasu > > --- > > .../bindings/usb/nvidia,tegra20-ehci.txt | 27 > > +++ > > .../bindings/usb/nvidia,tegra20-usb-phy.txt| 27 > +-- > > 2 files changed, 29 insertions(+), 25 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt > b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt > > index 34c9528..df09330 100644 > > --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt > > +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt > > @@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following > modifications > > and additions : > > > > Required properties : > > - - compatible : Should be "nvidia,tegra20-ehci" for USB controllers > > - used in host mode. > > - - phy_type : Should be one of "ulpi" or "utmi". > > > > Optional properties: > > - - dr_mode : dual role mode. Indicates the working mode for > > index 6bdaba2..7ceccd3 100644 > > --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt > > +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt > > @@ -4,8 +4,24 @@ The device node for Tegra SOC USB PHY: > > > > Required properties : > > + - phy_type : Should be one of "utmi", "ulpi" or "hsic". > > dt property names generally dont have "_". Thanks Kishon, for your comments. Is it mandatory or optional? If it is mandatory, then I might have to change dr_mode as well along with phy_type. > > Thanks > Kishon -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver
> -Original Message- > From: Venu Byravarasu > Sent: Wednesday, March 20, 2013 11:30 AM > To: 'Stephen Warren' > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org > Subject: RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as > platform driver > > > -Original Message- > > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > > Sent: Wednesday, March 20, 2013 1:22 AM > > To: Venu Byravarasu > > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > > linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org > > Subject: Re: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as > > platform driver > > > > On 03/18/2013 06:29 AM, Venu Byravarasu wrote: > > > As part of this series, apart from patch containing changes to register > > TEGRA > > > USB PHY driver as platform driver, prepared below patches: > > > 1. Re-arranging & adding new DT properties. > > > 2. Getting various params from DT properties added. > > > 3. code clean up. > > > > Venu, I'm curious whether these patches were tested at all. I have found > > at least two significant problems with trivial testing: > > Stephen, > Initially started testing after applying each and every patch. > Like that tested till first 5 patches. > As did not see any issues till then, applied rest 2 patches at once and tested > with that. > Though did not see mouse getting vbus on the 1st boot, Vbus was coming > fine after disconnect and connect. > Hence did not test thereafter. > > After checking your current mail, tried now and observed that there seems to > be some real issue with patch#7 only. (As tried now after applying till patch# > 6 and did not see this issue). > Will debug further on patch#7 and update with proper fix after addressing > your other comments. Debugged further and found that the issue is because of http://marc.info/?l=linux-arm-kernel=135890098024987=2 On reverting that patch and applying it on top of patch#7, able to see enumeration working fine. Anyhow, will take care of your other comments and merge this change with patch#7 and resend for review. > > Thanks for the review & heads up, > venu > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver
> -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Wednesday, March 20, 2013 1:22 AM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org > Subject: Re: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as > platform driver > > On 03/18/2013 06:29 AM, Venu Byravarasu wrote: > > As part of this series, apart from patch containing changes to register > TEGRA > > USB PHY driver as platform driver, prepared below patches: > > 1. Re-arranging & adding new DT properties. > > 2. Getting various params from DT properties added. > > 3. code clean up. > > Venu, I'm curious whether these patches were tested at all. I have found > at least two significant problems with trivial testing: Stephen, Initially started testing after applying each and every patch. Like that tested till first 5 patches. As did not see any issues till then, applied rest 2 patches at once and tested with that. Though did not see mouse getting vbus on the 1st boot, Vbus was coming fine after disconnect and connect. Hence did not test thereafter. After checking your current mail, tried now and observed that there seems to be some real issue with patch#7 only. (As tried now after applying till patch# 6 and did not see this issue). Will debug further on patch#7 and update with proper fix after addressing your other comments. Thanks for the review & heads up, venu > > 1) > > "reboot" or "shutdown -h now" both cause the following crash, with or > without any USB devices plugged in (or ever having been plugged in): > > > [ 355.836288] Unable to handle kernel NULL pointer dereference at virtual > address 0028 > > [ 355.847961] pgd = ed62 > > [ 355.854093] [0028] *pgd= > ... > > [ 356.146728] [] (tegra_ehci_hcd_shutdown+0x18/0x2c) from > [] (platform_drv_shutdown+0x18/0x1c) > > [ 356.160379] [] (platform_drv_shutdown+0x18/0x1c) from > [] (device_shutdown+0x34/0x188) > > [ 356.173464] [] (device_shutdown+0x34/0x188) from > [] (kernel_restart_prepare+0x34/0x3c) > > [ 356.186668] [] (kernel_restart_prepare+0x34/0x3c) from > [] (kernel_restart+0xc/0x4c) > > [ 356.199637] [] (kernel_restart+0xc/0x4c) from [] > (sys_reboot+0x1ac/0x1d8) > > [ 356.211704] [] (sys_reboot+0x1ac/0x1d8) from [] > (ret_fast_syscall+0x0/0x30) > > [ 356.223965] Code: ebfe4b27 e5903000 e24300e8 e5133044 (e5933028) > > [ 356.233896] ---[ end trace 088d89482b4af176 ]--- > > 2) > > The first time enumeration USB devices is attempted on a port fails. For > devices that are plugged in at boot, this means that to get them > working, they must be unplugged and re-plugged after boot. For devices > that are not plugged in at boot, this means they must be plugged, > unplugged, and then plugged in again. > > This is obviously problematic in and of itself. This is especially true > for boards like Harmony that have a built-in USB hub and network chip. I > didn't actually test this, but I assume that they cannot be made to work > at all with this patch series, since they cannot be unplugged. > > The failed enumeration is accompanied by the following message: > > [2.451530] hub 3-0:1.0: unable to enumerate USB device on port 1 > > Both of these problems reproduce on at least boards Ventana and > Seaboard(Springbank), although I assume that all boards are affected. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver
-Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Wednesday, March 20, 2013 1:22 AM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org Subject: Re: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver On 03/18/2013 06:29 AM, Venu Byravarasu wrote: As part of this series, apart from patch containing changes to register TEGRA USB PHY driver as platform driver, prepared below patches: 1. Re-arranging adding new DT properties. 2. Getting various params from DT properties added. 3. code clean up. Venu, I'm curious whether these patches were tested at all. I have found at least two significant problems with trivial testing: Stephen, Initially started testing after applying each and every patch. Like that tested till first 5 patches. As did not see any issues till then, applied rest 2 patches at once and tested with that. Though did not see mouse getting vbus on the 1st boot, Vbus was coming fine after disconnect and connect. Hence did not test thereafter. After checking your current mail, tried now and observed that there seems to be some real issue with patch#7 only. (As tried now after applying till patch# 6 and did not see this issue). Will debug further on patch#7 and update with proper fix after addressing your other comments. Thanks for the review heads up, venu 1) reboot or shutdown -h now both cause the following crash, with or without any USB devices plugged in (or ever having been plugged in): [ 355.836288] Unable to handle kernel NULL pointer dereference at virtual address 0028 [ 355.847961] pgd = ed62 [ 355.854093] [0028] *pgd= ... [ 356.146728] [c02e5978] (tegra_ehci_hcd_shutdown+0x18/0x2c) from [c0279edc] (platform_drv_shutdown+0x18/0x1c) [ 356.160379] [c0279edc] (platform_drv_shutdown+0x18/0x1c) from [c027703c] (device_shutdown+0x34/0x188) [ 356.173464] [c027703c] (device_shutdown+0x34/0x188) from [c0034650] (kernel_restart_prepare+0x34/0x3c) [ 356.186668] [c0034650] (kernel_restart_prepare+0x34/0x3c) from [c0034664] (kernel_restart+0xc/0x4c) [ 356.199637] [c0034664] (kernel_restart+0xc/0x4c) from [c0034858] (sys_reboot+0x1ac/0x1d8) [ 356.211704] [c0034858] (sys_reboot+0x1ac/0x1d8) from [c000e2c0] (ret_fast_syscall+0x0/0x30) [ 356.223965] Code: ebfe4b27 e5903000 e24300e8 e5133044 (e5933028) [ 356.233896] ---[ end trace 088d89482b4af176 ]--- 2) The first time enumeration USB devices is attempted on a port fails. For devices that are plugged in at boot, this means that to get them working, they must be unplugged and re-plugged after boot. For devices that are not plugged in at boot, this means they must be plugged, unplugged, and then plugged in again. This is obviously problematic in and of itself. This is especially true for boards like Harmony that have a built-in USB hub and network chip. I didn't actually test this, but I assume that they cannot be made to work at all with this patch series, since they cannot be unplugged. The failed enumeration is accompanied by the following message: [2.451530] hub 3-0:1.0: unable to enumerate USB device on port 1 Both of these problems reproduce on at least boards Ventana and Seaboard(Springbank), although I assume that all boards are affected. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver
-Original Message- From: Venu Byravarasu Sent: Wednesday, March 20, 2013 11:30 AM To: 'Stephen Warren' Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org Subject: RE: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Wednesday, March 20, 2013 1:22 AM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org Subject: Re: [PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver On 03/18/2013 06:29 AM, Venu Byravarasu wrote: As part of this series, apart from patch containing changes to register TEGRA USB PHY driver as platform driver, prepared below patches: 1. Re-arranging adding new DT properties. 2. Getting various params from DT properties added. 3. code clean up. Venu, I'm curious whether these patches were tested at all. I have found at least two significant problems with trivial testing: Stephen, Initially started testing after applying each and every patch. Like that tested till first 5 patches. As did not see any issues till then, applied rest 2 patches at once and tested with that. Though did not see mouse getting vbus on the 1st boot, Vbus was coming fine after disconnect and connect. Hence did not test thereafter. After checking your current mail, tried now and observed that there seems to be some real issue with patch#7 only. (As tried now after applying till patch# 6 and did not see this issue). Will debug further on patch#7 and update with proper fix after addressing your other comments. Debugged further and found that the issue is because of http://marc.info/?l=linux-arm-kernelm=135890098024987w=2 On reverting that patch and applying it on top of patch#7, able to see enumeration working fine. Anyhow, will take care of your other comments and merge this change with patch#7 and resend for review. Thanks for the review heads up, venu -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
-Original Message- From: kishon [mailto:kis...@ti.com] Sent: Wednesday, March 20, 2013 4:49 PM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree- disc...@lists.ozlabs.org Subject: Re: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings Hi, On Monday 18 March 2013 05:59 PM, Venu Byravarasu wrote: The existing Tegra USB bindings have a few issues: 1) Many properties are documented as being part of the EHCI controller node, yet they apply more to the PHY device. They should be moved. 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a reg entry to point at PHY1's register space. We can't assume the PHY1 driver is present, so the PHY3 driver will directly access those registers. 3) The list of clocks required by the PHY was missing some required entries. This patch fixes the binding definition to resolve these issues. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +++ .../bindings/usb/nvidia,tegra20-usb-phy.txt| 27 +-- 2 files changed, 29 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt index 34c9528..df09330 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -6,27 +6,10 @@ Practice : Universal Serial Bus with the following modifications and additions : Required properties : - - compatible : Should be nvidia,tegra20-ehci for USB controllers - used in host mode. - - phy_type : Should be one of ulpi or utmi. Optional properties: - - dr_mode : dual role mode. Indicates the working mode for index 6bdaba2..7ceccd3 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt @@ -4,8 +4,24 @@ The device node for Tegra SOC USB PHY: Required properties : + - phy_type : Should be one of utmi, ulpi or hsic. dt property names generally dont have _. Thanks Kishon, for your comments. Is it mandatory or optional? If it is mandatory, then I might have to change dr_mode as well along with phy_type. Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
-Original Message-
From: kishon [mailto:kis...@ti.com]
Sent: Wednesday, March 20, 2013 4:53 PM
To: Venu Byravarasu
Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
disc...@lists.ozlabs.org
Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
rework
Hi,
On Monday 18 March 2013 05:59 PM, Venu Byravarasu wrote:
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com
---
arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 +++
arch/arm/boot/dts/tegra20-harmony.dts |8 +++---
arch/arm/boot/dts/tegra20-iris-512.dts |4 +++
arch/arm/boot/dts/tegra20-paz00.dts|8 +++---
arch/arm/boot/dts/tegra20-seaboard.dts | 13 +++---
arch/arm/boot/dts/tegra20-trimslice.dts| 12 +++---
arch/arm/boot/dts/tegra20-ventana.dts |7 +++--
arch/arm/boot/dts/tegra20.dtsi | 32
+--
8 files changed, 57 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index cb73e62..af5a7ae 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -443,6 +443,10 @@
nvidia,phy-reset-gpio = gpio 169 0; /* gpio PV1 */
};
+ usb-phy@c5004000 {
This node doesn't have a *reg* property. So @c5004000 is not needed.
This comment applies to all the nodes which doesn't have *reg* property.
Thanks Kishon for the comments.
As I've 3 usb-phy DT nodes, how to differentiate between them if I remove this
@Address ?
Thanks
Kishon
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Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
-Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Wednesday, March 20, 2013 1:24 AM To: Venu Byravarasu Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework On 03/18/2013 06:29 AM, Venu Byravarasu wrote: This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 +++ arch/arm/boot/dts/tegra20-harmony.dts |8 +++--- arch/arm/boot/dts/tegra20-iris-512.dts |4 +++ arch/arm/boot/dts/tegra20-paz00.dts|8 +++--- arch/arm/boot/dts/tegra20-seaboard.dts | 13 +++--- arch/arm/boot/dts/tegra20-trimslice.dts| 12 +++--- arch/arm/boot/dts/tegra20-ventana.dts |7 +++-- arch/arm/boot/dts/tegra20.dtsi | 32 +-- 8 files changed, 57 insertions(+), 31 deletions(-) I think you forgot to update arch/arm/boot/dts/tegra20-whistler.dts in this patch. Thanks Stephen, will add that send updated patch for review. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 3/7] usb: phy: tegra: Get PHY mode using DT
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Wednesday, March 20, 2013 1:29 AM
To: Venu Byravarasu
Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org
Subject: Re: [PATCH 3/7] usb: phy: tegra: Get PHY mode using DT
On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
diff --git a/drivers/usb/phy/tegra_usb_phy.c
b/drivers/usb/phy/tegra_usb_phy.c
@@ -713,6 +712,16 @@ struct tegra_usb_phy
*tegra_usb_phy_open(struct device *dev, int instance,
else
phy-is_ulpi_phy = true;
+ err = of_property_match_string(np, dr_mode, otg);
+ if (err 0) {
+ err = of_property_match_string(np, dr_mode, gadget);
+ if (err 0)
The binding says the 3 legal values for this property are host,
peripheral, or otg. This agrees with the usage in
Documentation/devicetree/bindings/usb/fsl-usb.txt and
drivers/usb/host/fsl-mph-dr-of.c. So, gadget is not something the code
should be checking for.
Agree, will correct it.
I'm sure I pointed this out before.
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RE: [PATCH 2/7] ARM: tegra: update device trees for USB binding rework
-Original Message-
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Wednesday, March 20, 2013 5:55 PM
To: Venu Byravarasu
Cc: kishon; gre...@linuxfoundation.org; st...@rowland.harvard.edu;
ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
disc...@lists.ozlabs.org
Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
rework
* PGP Signed by an unknown key
On Wed, Mar 20, 2013 at 05:47:46PM +0530, Venu Byravarasu wrote:
-Original Message-
From: kishon [mailto:kis...@ti.com]
Sent: Wednesday, March 20, 2013 4:53 PM
To: Venu Byravarasu
Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree-
disc...@lists.ozlabs.org
Subject: Re: [PATCH 2/7] ARM: tegra: update device trees for USB binding
rework
Hi,
+ usb-phy@c5004000 {
This node doesn't have a *reg* property. So @c5004000 is not needed.
This comment applies to all the nodes which doesn't have *reg* property.
Thanks Kishon for the comments.
As I've 3 usb-phy DT nodes, how to differentiate between them if I remove
this @Address ?
then add reg property :-)
Thanks Felipe, for confirming.
--
balbi
* Unknown Key
* 0x35CAA444
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RE: [PATCH 7/7] usb: phy: registering tegra USB PHY as platform driver
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Wednesday, March 20, 2013 1:51 AM
To: Venu Byravarasu
Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu;
ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-te...@vger.kernel.org; devicetree-disc...@lists.ozlabs.org
Subject: Re: [PATCH 7/7] usb: phy: registering tegra USB PHY as platform
driver
On 03/18/2013 06:29 AM, Venu Byravarasu wrote:
Registered tegra USB PHY as a separate platform driver.
diff --git a/drivers/usb/phy/tegra_usb_phy.c
b/drivers/usb/phy/tegra_usb_phy.c
static void tegra_usb_phy_close(struct usb_phy *x)
{
if (phy-is_ulpi_phy)
clk_put(phy-clk);
phy-clk is obtained using devm_clk_get(). This typically means you
never need to clk_put() it, and if for some reason you really have to,
you should use devm_clk_put() instead of plain clk_put().
Agree, will remove clk_put.
@@ -774,23 +667,53 @@ struct tegra_usb_phy
*tegra_usb_phy_open(struct device *dev, int instance,
+ err = gpio_request(phy-reset_gpio, ulpi_phy_reset_b);
I think you can use devm_gpio_request() here to simplify the error-handling.
Sure, will do.
I wonder why in the ULPI case, all the code is inline here, whereas in
the UTMI case, this simply calls a function. Wouldn't it be more
consistent to have the following code here:
if (phy-is_ulpi_phy)
err = ulpi_open();
else
err = utmip_open();
if (err)
goto fail;
Sure, will take care of this in next patch.
+static int tegra_usb_phy_probe(struct platform_device *pdev)
Hmmm. Note that in order to make deferred probe work correctly, all the
gpio_request(), clk_get(), etc. calls that acquire resources from other
drivers must happen here in probe() and not in tegra_usb_phy_open().
In present code tegra_usb_phy_open() is indirectly called via usb_phy_init()
from ehci-tegra.c.
Between obtaining PHY handle (and hence getting into deferred probe, when it is
not available)
and calling usb_phy_init, no other USB registers were accessed. Hence I was
doing this way.
Do you still think it would be better to move gpio and clk APIs to probe?
+ err = of_property_match_string(np, dr_mode, otg);
+ if (err 0) {
+ err = of_property_match_string(np, dr_mode, gadget);
Again, use peripheral, not gadget.
Will do.
+struct usb_phy *tegra_usb_get_phy(struct device_node *dn)
+{
+ struct device *dev;
+ struct tegra_usb_phy *tegra_phy;
+
+ dev = driver_find_device(tegra_usb_phy_driver.driver, NULL, dn,
+tegra_usb_phy_match);
+ if (!dev)
+ return ERR_PTR(-EPROBE_DEFER);
+
+ tegra_phy = dev_get_drvdata(dev);
+
+ return tegra_phy-u_phy;
+}
I think you need a module_get() somewhere in there, and also need to add
a tegra_usb_put_phy() function too, so you can call module_put() from it.
Am not clear on why to add module_get here. Can you plz provide more details?
Thanks Stephen, for the review.
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RE: [PATCH 5/7] usb: phy: tegra: get ULPI reset GPIO info using DT.
> -Original Message- > From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb- > ow...@vger.kernel.org] On Behalf Of Sergei Shtylyov > Sent: Monday, March 18, 2013 6:32 PM > To: Venu Byravarasu > Cc: gre...@linuxfoundation.org; st...@rowland.harvard.edu; > ba...@ti.com; linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > swar...@wwwdotorg.org; linux-te...@vger.kernel.org; devicetree- > disc...@lists.ozlabs.org > Subject: Re: [PATCH 5/7] usb: phy: tegra: get ULPI reset GPIO info using DT. > > Hello. > > On 18-03-2013 16:29, Venu Byravarasu wrote: > > > As GPIO information is avail through DT, used it to get Tegra ULPI > > reset GPIO number. Added a new member to tegra_usb_phy structure to > > store this number. > > > Signed-off-by: Venu Byravarasu > > --- > > drivers/usb/phy/tegra_usb_phy.c | 25 +++-- > > include/linux/usb/tegra_usb_phy.h |1 + > > 2 files changed, 12 insertions(+), 14 deletions(-) > > > diff --git a/drivers/usb/phy/tegra_usb_phy.c > b/drivers/usb/phy/tegra_usb_phy.c > > index b5b2037..29c5ac4 100644 > > --- a/drivers/usb/phy/tegra_usb_phy.c > > +++ b/drivers/usb/phy/tegra_usb_phy.c > [...] > > @@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x) > [...] > > - gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b"); > > - gpio_direction_output(ulpi_config->reset_gpio, 0); > > + gpio_request(phy->reset_gpio, "ulpi_phy_reset_b"); > > + gpio_direction_output(phy->reset_gpio, 0); > > Why not use goio_request_one() instead of these two? Thought maybe it's > a > material of another patch... Sure, can take this up as part of next patch. Thanks for the review. > > WBR, Sergei > > -- > To unsubscribe from this list: send the line "unsubscribe linux-usb" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/7] USB: PHY: Tegra: registering TEGRA USB PHY as platform driver
As part of this series, apart from patch containing changes to register TEGRA USB PHY driver as platform driver, prepared below patches: 1. Re-arranging & adding new DT properties. 2. Getting various params from DT properties added. 3. code clean up. Venu Byravarasu (7): ARM: tegra: finalize USB EHCI and PHY bindings ARM: tegra: update device trees for USB binding rework usb: phy: tegra: Get PHY mode using DT usb: phy: tegra: Return correct error value provided by clk_get_sys usb: phy: tegra: get ULPI reset GPIO info using DT. usb: phy: tegra: Add error handling & clean up. usb: phy: registering tegra USB PHY as platform driver .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +-- .../bindings/usb/nvidia,tegra20-usb-phy.txt| 27 ++- arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 + arch/arm/boot/dts/tegra20-harmony.dts |8 +- arch/arm/boot/dts/tegra20-iris-512.dts |4 + arch/arm/boot/dts/tegra20-paz00.dts|8 +- arch/arm/boot/dts/tegra20-seaboard.dts | 13 +- arch/arm/boot/dts/tegra20-trimslice.dts| 12 +- arch/arm/boot/dts/tegra20-ventana.dts |7 +- arch/arm/boot/dts/tegra20.dtsi | 32 ++- drivers/usb/host/ehci-tegra.c | 100 +++ drivers/usb/phy/tegra_usb_phy.c| 301 include/linux/usb/tegra_usb_phy.h |5 +- 13 files changed, 322 insertions(+), 226 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 7/7] usb: phy: registering tegra USB PHY as platform driver
Registered tegra USB PHY as a separate platform driver.
To synchronize host controller and PHY initialization, used deferred
probe mechanism. As PHY should be initialized before EHCI starts running,
deferred probe of Tegra EHCI driver till PHY probe gets completed.
Got rid of instance number based handling in host driver.
Made use of DT params to get the PHY Pad registers.
Merged tegra_phy_init into tegra_usb_phy_init.
Signed-off-by: Venu Byravarasu
---
drivers/usb/host/ehci-tegra.c | 99 ++--
drivers/usb/phy/tegra_usb_phy.c | 308 +
include/linux/usb/tegra_usb_phy.h |3 +-
3 files changed, 221 insertions(+), 189 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 7afb962..772fa29 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -648,7 +648,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
struct tegra_ehci_platform_data *pdata;
int err = 0;
int irq;
- int instance = pdev->id;
+ struct device_node *np_phy;
struct usb_phy *u_phy;
pdata = pdev->dev.platform_data;
@@ -671,34 +671,56 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!tegra)
return -ENOMEM;
- hcd = usb_create_hcd(_ehci_hc_driver, >dev,
- dev_name(>dev));
- if (!hcd) {
- dev_err(>dev, "Unable to create HCD\n");
- return -ENOMEM;
- }
-
platform_set_drvdata(pdev, tegra);
tegra->clk = devm_clk_get(>dev, NULL);
if (IS_ERR(tegra->clk)) {
dev_err(>dev, "Can't get ehci clock\n");
- err = PTR_ERR(tegra->clk);
- goto fail_clk;
+ return PTR_ERR(tegra->clk);
}
err = clk_prepare_enable(tegra->clk);
if (err)
- goto fail_clk;
+ return err;
+
+ np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
+ if (!np_phy) {
+ err = -ENODEV;
+ goto cleanup_clk;
+ }
+
+ u_phy = tegra_usb_get_phy(np_phy);
+ if (IS_ERR(u_phy)) {
+ err = PTR_ERR(u_phy);
+ goto cleanup_clk;
+ }
tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
"nvidia,needs-double-reset");
+ hcd = usb_create_hcd(_ehci_hc_driver, >dev,
+ dev_name(>dev));
+ if (!hcd) {
+ dev_err(>dev, "Unable to create HCD\n");
+ err = -ENOMEM;
+ goto cleanup_clk;
+ }
+ hcd->phy = u_phy;
+ u_phy->otg = devm_kzalloc(>dev, sizeof(struct usb_otg),
+GFP_KERNEL);
+ if (!u_phy->otg) {
+ dev_err(>dev, "Failed to alloc memory for otg\n");
+ err = -ENXIO;
+ goto cleanup_hcd_create;
+ }
+
+ u_phy->otg->host = hcd_to_bus(hcd);
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(>dev, "Failed to get I/O memory\n");
err = -ENXIO;
- goto fail_io;
+ goto cleanup_hcd_create;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
@@ -706,55 +728,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
if (!hcd->regs) {
dev_err(>dev, "Failed to remap I/O memory\n");
err = -ENOMEM;
- goto fail_io;
- }
-
- /* This is pretty ugly and needs to be fixed when we do only
-* device-tree probing. Old code relies on the platform_device
-* numbering that we lack for device-tree-instantiated devices.
-*/
- if (instance < 0) {
- switch (res->start) {
- case TEGRA_USB_BASE:
- instance = 0;
- break;
- case TEGRA_USB2_BASE:
- instance = 1;
- break;
- case TEGRA_USB3_BASE:
- instance = 2;
- break;
- default:
- err = -ENODEV;
- dev_err(>dev, "unknown usb instance\n");
- goto fail_io;
- }
+ goto cleanup_hcd_create;
}
- tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config);
- if (IS_ERR(tegra->phy)) {
- dev_err(>dev, "Failed to open USB phy\n");
- err = -ENXIO;
- goto fail_io;
+ err = usb_ph
[PATCH 4/7] usb: phy: tegra: Return correct error value provided by clk_get_sys
In case if clk_get_sys fails, return correct error value provided by
the API.
Signed-off-by: Venu Byravarasu
---
drivers/usb/phy/tegra_usb_phy.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/phy/tegra_usb_phy.c b/drivers/usb/phy/tegra_usb_phy.c
index 93abd68..b5b2037 100644
--- a/drivers/usb/phy/tegra_usb_phy.c
+++ b/drivers/usb/phy/tegra_usb_phy.c
@@ -620,8 +620,7 @@ static int tegra_phy_init(struct usb_phy *x)
phy->clk = clk_get_sys(NULL, ulpi_config->clk);
if (IS_ERR(phy->clk)) {
pr_err("%s: can't get ulpi clock\n", __func__);
- err = -ENXIO;
- goto err1;
+ return PTR_ERR(phy->clk);
}
if (!gpio_is_valid(ulpi_config->reset_gpio))
ulpi_config->reset_gpio =
--
1.7.0.4
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[PATCH 2/7] ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: Venu Byravarasu
---
arch/arm/boot/dts/tegra20-colibri-512.dtsi |4 +++
arch/arm/boot/dts/tegra20-harmony.dts |8 +++---
arch/arm/boot/dts/tegra20-iris-512.dts |4 +++
arch/arm/boot/dts/tegra20-paz00.dts|8 +++---
arch/arm/boot/dts/tegra20-seaboard.dts | 13 +++---
arch/arm/boot/dts/tegra20-trimslice.dts| 12 +++---
arch/arm/boot/dts/tegra20-ventana.dts |7 +++--
arch/arm/boot/dts/tegra20.dtsi | 32 +--
8 files changed, 57 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index cb73e62..af5a7ae 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -443,6 +443,10 @@
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ };
+
sdhci@c8000600 {
cd-gpios = < 23 1>; /* gpio PC7 */
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 1f79c0d..14dd6ed 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -427,12 +427,12 @@
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts
b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..c99eccc 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -41,6 +41,10 @@
dr_mode = "otg";
};
+ usb-phy@c500 {
+ dr_mode = "otg";
+ };
+
usb@c5008000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 9db36da..cc3c032 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -426,12 +426,12 @@
nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
b/arch/arm/boot/dts/tegra20-seaboard.dts
index 715a8b8..320964f 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -563,17 +563,22 @@
dr_mode = "otg";
};
+ usb-phy@c500 {
+ nvidia,vbus-gpio = < 24 0>; /* PD0 */
+ dr_mode = "otg";
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
};
- usb-phy@c5004400 {
- nvidia,phy-reset-gpio = < 169 0>; /* gpio PV1 */
+ usb@c5008000 {
+ status = "okay";
};
sdhci@c800 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
b/arch/arm/boot/dts/tegra20-trimslice.dts
index 98f3e44..3a8d6ed 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -305,17 +305,21 @@
nvidia,vbus-gpio = < 170 0>; /* gpio PV2 */
};
+ usb-phy@c500 {
+ nvidia,vbus-gpio = < 170 0>; /* gpio PV2 */
+ };
+
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = < 168 0>; /* gpio PV0 */
};
- usb@c5008000 {
- status = "okay";
+ usb-phy@c5004000 {
+ nvidia,phy-reset-gpio = < 168 0>; /* gpio PV
[PATCH 6/7] usb: phy: tegra: Add error handling & clean up.
Check return values from all GPIO APIs and handle errors accordingly.
Remove clk_disable_unprepare which is no more needed.
Signed-off-by: Venu Byravarasu
---
drivers/usb/phy/tegra_usb_phy.c | 50 ++
1 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/tegra_usb_phy.c b/drivers/usb/phy/tegra_usb_phy.c
index 29c5ac4..7ead114 100644
--- a/drivers/usb/phy/tegra_usb_phy.c
+++ b/drivers/usb/phy/tegra_usb_phy.c
@@ -542,9 +542,17 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy->regs;
- gpio_direction_output(phy->reset_gpio, 0);
+ ret = gpio_direction_output(phy->reset_gpio, 0);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d direction not set\n",
phy->reset_gpio);
+ return ret;
+ }
msleep(5);
- gpio_direction_output(phy->reset_gpio, 1);
+ ret = gpio_direction_output(phy->reset_gpio, 1);
+ if (ret < 0) {
+ dev_err(phy->dev, "gpio %d direction not set\n",
phy->reset_gpio);
+ return ret;
+ }
clk_prepare_enable(phy->clk);
msleep(1);
@@ -624,24 +632,44 @@ static inttegra_phy_init(struct usb_phy *x)
of_get_named_gpio(phy->dev->of_node,
"nvidia,phy-reset-gpio", 0);
if (!gpio_is_valid(phy->reset_gpio)) {
- pr_err("%s: invalid reset gpio: %d\n", __func__,
+ dev_err(phy->dev, "invalid gpio: %d\n",
+ phy->reset_gpio);
+ err = phy->reset_gpio;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ if (err < 0) {
+ dev_err(phy->dev, "request failed for gpio: %d\n",
phy->reset_gpio);
- err = -EINVAL;
- goto err1;
+ goto cleanup_clk_get;
+ }
+
+ err = gpio_direction_output(phy->reset_gpio, 0);
+ if (err < 0) {
+ dev_err(phy->dev, "gpio %d direction not set to
output\n",
+ phy->reset_gpio);
+ goto cleanup_gpio_req;
}
- gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(phy->reset_gpio, 0);
+
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
+ if (!phy->ulpi) {
+ dev_err(phy->dev, "otg_ulpi_create returned err\n");
+ err = -ENOMEM;
+ goto cleanup_gpio_req;
+ }
+
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
err = utmip_pad_open(phy);
if (err < 0)
- goto err1;
+ return err;
}
return 0;
-err1:
- clk_disable_unprepare(phy->pll_u);
- clk_put(phy->pll_u);
+cleanup_gpio_req:
+ gpio_free(phy->reset_gpio);
+cleanup_clk_get:
+ clk_put(phy->clk);
return err;
}
--
1.7.0.4
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[PATCH 3/7] usb: phy: tegra: Get PHY mode using DT
Added a new PHY mode to support OTG.
Obtained Tegra USB PHY mode using DT property.
Signed-off-by: Venu Byravarasu
---
drivers/usb/host/ehci-tegra.c |3 +--
drivers/usb/phy/tegra_usb_phy.c | 13 +++--
include/linux/usb/tegra_usb_phy.h |3 ++-
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 568aecc..7afb962 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -732,8 +732,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
tegra->phy = tegra_usb_phy_open(>dev, instance, hcd->regs,
- pdata->phy_config,
- TEGRA_USB_PHY_MODE_HOST);
+ pdata->phy_config);
if (IS_ERR(tegra->phy)) {
dev_err(>dev, "Failed to open USB phy\n");
err = -ENXIO;
diff --git a/drivers/usb/phy/tegra_usb_phy.c b/drivers/usb/phy/tegra_usb_phy.c
index 5487d38..93abd68 100644
--- a/drivers/usb/phy/tegra_usb_phy.c
+++ b/drivers/usb/phy/tegra_usb_phy.c
@@ -688,7 +688,7 @@ static int tegra_usb_phy_suspend(struct usb_phy *x, int
suspend)
}
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)
+ void __iomem *regs, void *config)
{
struct tegra_usb_phy *phy;
unsigned long parent_rate;
@@ -703,7 +703,6 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
phy->instance = instance;
phy->regs = regs;
phy->config = config;
- phy->mode = phy_mode;
phy->dev = dev;
phy->is_legacy_phy =
of_property_read_bool(np, "nvidia,has-legacy-mode");
@@ -713,6 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device
*dev, int instance,
else
phy->is_ulpi_phy = true;
+ err = of_property_match_string(np, "dr_mode", "otg");
+ if (err < 0) {
+ err = of_property_match_string(np, "dr_mode", "gadget");
+ if (err < 0)
+ phy->mode = TEGRA_USB_PHY_MODE_HOST;
+ else
+ phy->mode = TEGRA_USB_PHY_MODE_DEVICE;
+ } else
+ phy->mode = TEGRA_USB_PHY_MODE_OTG;
+
if (!phy->config) {
if (phy->is_ulpi_phy) {
pr_err("%s: ulpi phy configuration missing", __func__);
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index 9ebebe9..a7af923 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -42,6 +42,7 @@ enum tegra_usb_phy_port_speed {
enum tegra_usb_phy_mode {
TEGRA_USB_PHY_MODE_DEVICE,
TEGRA_USB_PHY_MODE_HOST,
+ TEGRA_USB_PHY_MODE_OTG,
};
struct tegra_xtal_freq;
@@ -64,7 +65,7 @@ struct tegra_usb_phy {
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
- void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);
+ void __iomem *regs, void *config);
void tegra_usb_phy_preresume(struct usb_phy *phy);
--
1.7.0.4
--
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[PATCH 5/7] usb: phy: tegra: get ULPI reset GPIO info using DT.
As GPIO information is avail through DT, used it to get Tegra ULPI
reset GPIO number. Added a new member to tegra_usb_phy structure to
store this number.
Signed-off-by: Venu Byravarasu
---
drivers/usb/phy/tegra_usb_phy.c | 25 +++--
include/linux/usb/tegra_usb_phy.h |1 +
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/phy/tegra_usb_phy.c b/drivers/usb/phy/tegra_usb_phy.c
index b5b2037..29c5ac4 100644
--- a/drivers/usb/phy/tegra_usb_phy.c
+++ b/drivers/usb/phy/tegra_usb_phy.c
@@ -541,11 +541,10 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
int ret;
unsigned long val;
void __iomem *base = phy->regs;
- struct tegra_ulpi_config *config = phy->config;
- gpio_direction_output(config->reset_gpio, 0);
+ gpio_direction_output(phy->reset_gpio, 0);
msleep(5);
- gpio_direction_output(config->reset_gpio, 1);
+ gpio_direction_output(phy->reset_gpio, 1);
clk_prepare_enable(phy->clk);
msleep(1);
@@ -603,10 +602,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
{
- struct tegra_ulpi_config *config = phy->config;
-
clk_disable(phy->clk);
- return gpio_direction_output(config->reset_gpio, 0);
+ return gpio_direction_output(phy->reset_gpio, 0);
}
static int tegra_phy_init(struct usb_phy *x)
@@ -622,18 +619,18 @@ static inttegra_phy_init(struct usb_phy *x)
pr_err("%s: can't get ulpi clock\n", __func__);
return PTR_ERR(phy->clk);
}
- if (!gpio_is_valid(ulpi_config->reset_gpio))
- ulpi_config->reset_gpio =
- of_get_named_gpio(phy->dev->of_node,
- "nvidia,phy-reset-gpio", 0);
- if (!gpio_is_valid(ulpi_config->reset_gpio)) {
+
+ phy->reset_gpio =
+ of_get_named_gpio(phy->dev->of_node,
+ "nvidia,phy-reset-gpio", 0);
+ if (!gpio_is_valid(phy->reset_gpio)) {
pr_err("%s: invalid reset gpio: %d\n", __func__,
- ulpi_config->reset_gpio);
+ phy->reset_gpio);
err = -EINVAL;
goto err1;
}
- gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
- gpio_direction_output(ulpi_config->reset_gpio, 0);
+ gpio_request(phy->reset_gpio, "ulpi_phy_reset_b");
+ gpio_direction_output(phy->reset_gpio, 0);
phy->ulpi = otg_ulpi_create(_viewport_access_ops, 0);
phy->ulpi->io_priv = phy->regs + ULPI_VIEWPORT;
} else {
diff --git a/include/linux/usb/tegra_usb_phy.h
b/include/linux/usb/tegra_usb_phy.h
index a7af923..6cfb8f1 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -62,6 +62,7 @@ struct tegra_usb_phy {
struct device *dev;
bool is_legacy_phy;
bool is_ulpi_phy;
+ int reset_gpio;
};
struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
--
1.7.0.4
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[PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues:
1) Many properties are documented as being part of the EHCI controller
node, yet they apply more to the PHY device. They should be moved.
2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
reg entry to point at PHY1's register space. We can't assume the PHY1
driver is present, so the PHY3 driver will directly access those
registers.
3) The list of clocks required by the PHY was missing some required
entries.
This patch fixes the binding definition to resolve these issues.
Signed-off-by: Venu Byravarasu
---
.../bindings/usb/nvidia,tegra20-ehci.txt | 27 +++
.../bindings/usb/nvidia,tegra20-usb-phy.txt| 27 +--
2 files changed, 29 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 34c9528..df09330 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following
modifications
and additions :
Required properties :
- - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
- used in host mode.
- - phy_type : Should be one of "ulpi" or "utmi".
- - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
- - nvidia,phy : phandle of the PHY instance, the controller is connected to.
-
-Required properties for phy_type == ulpi:
- - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
+ - compatible : Should be "nvidia,tegra20-ehci".
+ - nvidia,phy : phandle of the PHY that the controller is connected to.
+ - clocks : Contains a single entry which defines the USB controller's clock.
Optional properties:
- - dr_mode : dual role mode. Indicates the working mode for
- nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
- or "otg". Default to "host" if not defined for backward compatibility.
- host means this is a host controller
- peripheral means it is device controller
- otg means it can operate as either ("on the go")
- - nvidia,has-legacy-mode : boolean indicates whether this controller can
-operate in legacy mode (as APX 2500 / 2600). In legacy mode some
-registers are accessed through the APB_MISC base address instead of
-the USB controller. Since this is a legacy issue it probably does not
-warrant a compatible string of its own.
- - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2
-USB ports, which need reset twice due to hardware issues.
+ - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
+ USB ports, which need reset twice due to hardware issues.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index 6bdaba2..7ceccd3 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -4,8 +4,24 @@ The device node for Tegra SOC USB PHY:
Required properties :
- compatible : Should be "nvidia,tegra20-usb-phy".
- - reg : Address and length of the register set for the USB PHY interface.
- - phy_type : Should be one of "ulpi" or "utmi".
+ - reg : Defines the following set of registers, in the order listed:
+ - The PHY's own register set.
+ Always present.
+ - The register set of the PHY containing the UTMI pad control registers.
+ Present if-and-only-if phy_type == utmi.
+ - phy_type : Should be one of "utmi", "ulpi" or "hsic".
+ - clocks : Defines the clocks listed in the clock-names property.
+ - clock-names : The following clock names must be present:
+ - reg: The clock needed to access the PHY's own registers. This is the
+ associated EHCI controller's clock. Always present.
+ - pll_u: PLL_U. Always present.
+ - timer: The timeout clock (clk_m). Present if phy_type == utmi.
+ - utmi-pads: The clock needed to access the UTMI pad control registers.
+ Present if phy_type == utmi.
+ - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2).
+ Present if phy_type == ulpi, and ULPI link mode is in use.
+ - nvidia,vbus-gpio : If present, specifies a GPIO that needs to be
+activated for the bus to be powered.
Required properties for phy_type == ulpi:
- nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
@@ -14,4 +30,9 @@ Optional properties:
- nvidia,has-legacy-mode : boolean indicates whether this controller can
operate in legacy mode (as APX 2500 / 2600). In legacy mode some
registers are accessed through the APB_MISC base address ins
[PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues: 1) Many properties are documented as being part of the EHCI controller node, yet they apply more to the PHY device. They should be moved. 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a reg entry to point at PHY1's register space. We can't assume the PHY1 driver is present, so the PHY3 driver will directly access those registers. 3) The list of clocks required by the PHY was missing some required entries. This patch fixes the binding definition to resolve these issues. Signed-off-by: Venu Byravarasu vbyravar...@nvidia.com --- .../bindings/usb/nvidia,tegra20-ehci.txt | 27 +++ .../bindings/usb/nvidia,tegra20-usb-phy.txt| 27 +-- 2 files changed, 29 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt index 34c9528..df09330 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt @@ -6,27 +6,10 @@ Practice : Universal Serial Bus with the following modifications and additions : Required properties : - - compatible : Should be nvidia,tegra20-ehci for USB controllers - used in host mode. - - phy_type : Should be one of ulpi or utmi. - - nvidia,vbus-gpio : If present, specifies a gpio that needs to be - activated for the bus to be powered. - - nvidia,phy : phandle of the PHY instance, the controller is connected to. - -Required properties for phy_type == ulpi: - - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. + - compatible : Should be nvidia,tegra20-ehci. + - nvidia,phy : phandle of the PHY that the controller is connected to. + - clocks : Contains a single entry which defines the USB controller's clock. Optional properties: - - dr_mode : dual role mode. Indicates the working mode for - nvidia,tegra20-ehci compatible controllers. Can be host, peripheral, - or otg. Default to host if not defined for backward compatibility. - host means this is a host controller - peripheral means it is device controller - otg means it can operate as either (on the go) - - nvidia,has-legacy-mode : boolean indicates whether this controller can -operate in legacy mode (as APX 2500 / 2600). In legacy mode some -registers are accessed through the APB_MISC base address instead of -the USB controller. Since this is a legacy issue it probably does not -warrant a compatible string of its own. - - nvidia,needs-double-reset : boolean is to be set for some of the Tegra2 -USB ports, which need reset twice due to hardware issues. + - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 + USB ports, which need reset twice due to hardware issues. diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt index 6bdaba2..7ceccd3 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt @@ -4,8 +4,24 @@ The device node for Tegra SOC USB PHY: Required properties : - compatible : Should be nvidia,tegra20-usb-phy. - - reg : Address and length of the register set for the USB PHY interface. - - phy_type : Should be one of ulpi or utmi. + - reg : Defines the following set of registers, in the order listed: + - The PHY's own register set. + Always present. + - The register set of the PHY containing the UTMI pad control registers. + Present if-and-only-if phy_type == utmi. + - phy_type : Should be one of utmi, ulpi or hsic. + - clocks : Defines the clocks listed in the clock-names property. + - clock-names : The following clock names must be present: + - reg: The clock needed to access the PHY's own registers. This is the + associated EHCI controller's clock. Always present. + - pll_u: PLL_U. Always present. + - timer: The timeout clock (clk_m). Present if phy_type == utmi. + - utmi-pads: The clock needed to access the UTMI pad control registers. + Present if phy_type == utmi. + - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2). + Present if phy_type == ulpi, and ULPI link mode is in use. + - nvidia,vbus-gpio : If present, specifies a GPIO that needs to be +activated for the bus to be powered. Required properties for phy_type == ulpi: - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. @@ -14,4 +30,9 @@ Optional properties: - nvidia,has-legacy-mode : boolean indicates whether this controller can operate in legacy mode (as APX 2500 / 2600). In legacy mode some registers are accessed through the APB_MISC base address instead of -the USB controller. \ No newline at end of file +the USB controller. + - dr_mode : dual role mode. Indicates the working mode for the PHY. Can
