[PATCH] dts: sun8i-h3: add sy8106a to orange pi plus

[jorik]

From: Jorik Jonker 

The Orange Pi Plus board lacks voltage scaling capabilities in its
current form. This results in random freezes during boot when cpufreq is
enabled, probably due to wrong voltages.

This patch (a copy/paste of 06139c) does the following things on this
board:
- enable r_i2c
- add sy8106a to the r_i2c bus
- have the sy8106a regulate VDD of cpu

I have tested this on two Orange Pi Plus boards, and they run stable
across a range of voltages (and frequencies).

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 29 
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b403e5d78..fd64b5c94 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -74,6 +74,10 @@
};
 };
 
+ {
+   cpu-supply = <_vdd_cpux>;
+};
+
  {
status = "okay";
 };
@@ -119,6 +123,31 @@
};
 };
 
+_i2c {
+   status = "okay";
+
+   reg_vdd_cpux: regulator@65 {
+   compatible = "silergy,sy8106a";
+   reg = <0x65>;
+   regulator-name = "vdd-cpux";
+   silergy,fixed-microvolt = <120>;
+   /*
+* The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+* however both the Armbian DVFS table and the official one
+* have operating points with voltage under 1.1V, and both
+* DVFS table are known to work properly at the lowest
+* operating point.
+*
+* Use 1.0V as the minimum voltage instead.
+*/
+   regulator-min-microvolt = <100>;
+   regulator-max-microvolt = <140>;
+   regulator-ramp-delay = <200>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.17.1

[PATCH] dts: sun8i-h3: add sy8106a to orange pi plus

[jorik]

From: Jorik Jonker 

The Orange Pi Plus board lacks voltage scaling capabilities in its
current form. This results in random freezes during boot when cpufreq is
enabled, probably due to wrong voltages.

This patch (a copy/paste of 06139c) does the following things on this
board:
- enable r_i2c
- add sy8106a to the r_i2c bus
- have the sy8106a regulate VDD of cpu

I have tested this on two Orange Pi Plus boards, and they run stable
across a range of voltages (and frequencies).

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 29 
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b403e5d78..fd64b5c94 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -74,6 +74,10 @@
};
 };
 
+ {
+   cpu-supply = <_vdd_cpux>;
+};
+
  {
status = "okay";
 };
@@ -119,6 +123,31 @@
};
 };
 
+_i2c {
+   status = "okay";
+
+   reg_vdd_cpux: regulator@65 {
+   compatible = "silergy,sy8106a";
+   reg = <0x65>;
+   regulator-name = "vdd-cpux";
+   silergy,fixed-microvolt = <120>;
+   /*
+* The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+* however both the Armbian DVFS table and the official one
+* have operating points with voltage under 1.1V, and both
+* DVFS table are known to work properly at the lowest
+* operating point.
+*
+* Use 1.0V as the minimum voltage instead.
+*/
+   regulator-min-microvolt = <100>;
+   regulator-max-microvolt = <140>;
+   regulator-ramp-delay = <200>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.17.1

[PATCH] dts: sun8i-h3: correct UART3 pin definitions

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.

Fixes: e3d11d3c45c5 ("dts: sun8i-h3: add pinmux definitions for
UART2-3")

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75a8654..f4ba088 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -410,7 +410,7 @@
};
 
uart3_pins: uart3 {
-   allwinner,pins = "PG13", "PG14";
+   allwinner,pins = "PA13", "PA14";
allwinner,function = "uart3";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.9.3

[PATCH] dts: sun8i-h3: correct UART3 pin definitions

[jorik]

From: Jorik Jonker 

In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.

Fixes: e3d11d3c45c5 ("dts: sun8i-h3: add pinmux definitions for
UART2-3")

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75a8654..f4ba088 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -410,7 +410,7 @@
};
 
uart3_pins: uart3 {
-   allwinner,pins = "PG13", "PG14";
+   allwinner,pins = "PA13", "PA14";
allwinner,function = "uart3";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.9.3

[PATCH] dts: sun8i-h3: correct UART3 pin definitions

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.

Fixes: e3d11d3c45c5 ("dts: sun8i-h3: add pinmux definitions for
UART2-3")

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75a8654..f4ba088 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -410,7 +410,7 @@
};
 
uart3_pins: uart3 {
-   allwinner,pins = "PG13", "PG14";
+   allwinner,pins = "PA13", "PA14";
allwinner,function = "uart3";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.9.3

[PATCH] dts: sun8i-h3: correct UART3 pin definitions

[jorik]

From: Jorik Jonker 

In a previous commit, I made a copy/paste error in the pinmux
definitions of UART3: PG{13,14} instead of PA{13,14}. This commit takes
care of that. I have tested this commit on Orange Pi PC and Orange Pi
Plus, and it works for these boards.

Fixes: e3d11d3c45c5 ("dts: sun8i-h3: add pinmux definitions for
UART2-3")

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75a8654..f4ba088 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -410,7 +410,7 @@
};
 
uart3_pins: uart3 {
-   allwinner,pins = "PG13", "PG14";
+   allwinner,pins = "PA13", "PA14";
allwinner,function = "uart3";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.9.3

[PATCH v5 1/5] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the pinmux definitions for UART2-3 on H3. These UARTs can only
be muxed to these pins, so _a and @0 do not really make sense. I have
left out RTS/CTS, since these are rarely used. These can easily be
enabled using an additional pinmux set.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..665fa32 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins: uart2 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins: uart3 {
+   allwinner,pins = "PG13", "PG14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v5 5/5] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These peripherals can only be muxed to these pins, so they are
associated in the DTSI instead of the board files. This makes it very
easy to enable them using overlays or u-boot commands:

 => fdt set /soc/i2c@01c2ac00 status okay

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ed6628d..bfc9200 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -483,6 +483,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C2>;
+   resets = < RST_BUS_I2C2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v5 1/5] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker 

These are the pinmux definitions for UART2-3 on H3. These UARTs can only
be muxed to these pins, so _a and @0 do not really make sense. I have
left out RTS/CTS, since these are rarely used. These can easily be
enabled using an additional pinmux set.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..665fa32 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins: uart2 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins: uart3 {
+   allwinner,pins = "PG13", "PG14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v5 5/5] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker 

These peripherals can only be muxed to these pins, so they are
associated in the DTSI instead of the board files. This makes it very
easy to enable them using overlays or u-boot commands:

 => fdt set /soc/i2c@01c2ac00 status okay

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ed6628d..bfc9200 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -483,6 +483,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C2>;
+   resets = < RST_BUS_I2C2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v5 4/5] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the only possible pins for these peripherals according to the
datasheet.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 742bced..ed6628d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v5 3/5] dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These H3 boards all expose UART1-3 on their expansion header. Since
other functions can be muxed to these pins, they are explicitly
disabled. To enable them, one could use DT overlays or U-boot commands:

 => fdt set /soc/serial@01c28c00 status okay

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 18 ++
 3 files changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..9aa2bb7 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -176,6 +176,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
 _vbus_pin_a {
allwinner,pins = "PG13";
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..5c9b5bf 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -139,6 +139,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
  {
/* USB VBUS is always on */
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..3ec9712 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH v5 4/5] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker 

These are the only possible pins for these peripherals according to the
datasheet.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 742bced..ed6628d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v5 3/5] dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards

[jorik]

From: Jorik Jonker 

These H3 boards all expose UART1-3 on their expansion header. Since
other functions can be muxed to these pins, they are explicitly
disabled. To enable them, one could use DT overlays or U-boot commands:

 => fdt set /soc/serial@01c28c00 status okay

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 18 ++
 3 files changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..9aa2bb7 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -176,6 +176,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
 _vbus_pin_a {
allwinner,pins = "PG13";
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..5c9b5bf 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -139,6 +139,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
  {
/* USB VBUS is always on */
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..3ec9712 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH v5 2/5] dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This was done to make UART1-3 on H3 consistent, and less complicated to
enable UART1-3 on the breakout header on the several H3 board (notably
Orange Pi's). This patch adds a bit of complexity for the existing Banana
Pi, which already had the RTS/CTS associated on UART1.

The RTS/CTS for UART2-3 could be defined in the same way, but since
there is no actual use case for them at the moment, they are left out.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 11 +--
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..06fddaa 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>, <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 665fa32..742bced 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,8 +367,15 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
-   allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+   uart1_pins: uart1 {
+   allwinner,pins = "PG6", "PG7";
+   allwinner,function = "uart1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart1_rts_cts_pins: uart1_rts_cts {
+   allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.7.4

[PATCH v5 0/5] dts: sun8i-h3: complete UART I2C for H3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This is my fifth attempt to complete the UART/I2C definitions on H3.

Many thanks to Maxime and Chen-Yu for helping me understand the 
philosophy behind the DTS/DTSI structure. I hope I get it and five
times is a charm :-)

Changes since v4:
 * RTS/CTS for UART1 is split off in seperate pinmux to make uart1-3
   consistent.
 * UART0 is left untouched
 * UARTs 1-3 are associated and re-disabled in DTS instead of DTSI

Best,
Jorik

Jorik Jonker (5):
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
  dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 18 ++
 arch/arm/boot/dts/sun8i-h3.dtsi | 85 -
 5 files changed, 138 insertions(+), 3 deletions(-)

-- 
2.7.4

[PATCH v5 2/5] dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux

[jorik]

From: Jorik Jonker 

This was done to make UART1-3 on H3 consistent, and less complicated to
enable UART1-3 on the breakout header on the several H3 board (notably
Orange Pi's). This patch adds a bit of complexity for the existing Banana
Pi, which already had the RTS/CTS associated on UART1.

The RTS/CTS for UART2-3 could be defined in the same way, but since
there is no actual use case for them at the moment, they are left out.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 11 +--
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..06fddaa 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>, <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 665fa32..742bced 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,8 +367,15 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
-   allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+   uart1_pins: uart1 {
+   allwinner,pins = "PG6", "PG7";
+   allwinner,function = "uart1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart1_rts_cts_pins: uart1_rts_cts {
+   allwinner,pins = "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
allwinner,pull = ;
-- 
2.7.4

[PATCH v5 0/5] dts: sun8i-h3: complete UART I2C for H3

[jorik]

From: Jorik Jonker 

This is my fifth attempt to complete the UART/I2C definitions on H3.

Many thanks to Maxime and Chen-Yu for helping me understand the 
philosophy behind the DTS/DTSI structure. I hope I get it and five
times is a charm :-)

Changes since v4:
 * RTS/CTS for UART1 is split off in seperate pinmux to make uart1-3
   consistent.
 * UART0 is left untouched
 * UARTs 1-3 are associated and re-disabled in DTS instead of DTSI

Best,
Jorik

Jorik Jonker (5):
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
  dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 18 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 18 ++
 arch/arm/boot/dts/sun8i-h3.dtsi | 85 -
 5 files changed, 138 insertions(+), 3 deletions(-)

-- 
2.7.4

Re: [PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[Jorik Jonker]

On Thu, Sep 08, 2016 at 11:01:53AM +0200, Maxime Ripard wrote:

On Thu, Sep 08, 2016 at 10:02:13AM +0200, Jorik Jonker wrote:

So, I'm going for a v5, with these changes:
- rename uart0_pins to uart0_pa_pins (as there could be a pf)
- associate uart0_pa_pins with uart0 on all H3 board DTS files


Please don't. We use that naming scheme everywhere else. Plus, nothing
prevents any one from using one PF pin and one PA pin.


OK, I will leave uart0 untouched, that's a good point.


- put rts/cts in seperate pinmux sets for uart1 (2,3: see below)
- associate rx/tx for uart1-3 in H3 DTSI (this is the only option)


I'm still a bit skeptical about this. This wouldn't be in any way
consistant. I prefer to have something consistant and a bit duplicated
over something without any duplication but that confuses everyone
about what should be placed where.


- associate UART1 rts/cts as pinctrl-1 in sun8i-h3-bananapi-m2-plus
 (to prevent breakage for existing users)


You can also set it in pinctrl-0.


OK, sounds reasonable, but also a bit contradictive. One the one hand 
you prefer consistency (so, let uart2-3 follow uart1 and include rts/cts 
in them), on the other hand the common case over the rare (so split off 
rts/cts). What should I do with uarts2-3 and should I do that to uart1 
too?


Moreover, Chen-Yu prefers to drop _a and @0 when they are redundant, 
which does not appear to be the convention, looking at existing 
sun*dsti. What's your opinion on this?


Best,
Jorik


signature.asc
Description: PGP signature

Re: [PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[Jorik Jonker]

On Thu, Sep 08, 2016 at 11:01:53AM +0200, Maxime Ripard wrote:

On Thu, Sep 08, 2016 at 10:02:13AM +0200, Jorik Jonker wrote:

So, I'm going for a v5, with these changes:
- rename uart0_pins to uart0_pa_pins (as there could be a pf)
- associate uart0_pa_pins with uart0 on all H3 board DTS files


Please don't. We use that naming scheme everywhere else. Plus, nothing
prevents any one from using one PF pin and one PA pin.


OK, I will leave uart0 untouched, that's a good point.


- put rts/cts in seperate pinmux sets for uart1 (2,3: see below)
- associate rx/tx for uart1-3 in H3 DTSI (this is the only option)


I'm still a bit skeptical about this. This wouldn't be in any way
consistant. I prefer to have something consistant and a bit duplicated
over something without any duplication but that confuses everyone
about what should be placed where.


- associate UART1 rts/cts as pinctrl-1 in sun8i-h3-bananapi-m2-plus
 (to prevent breakage for existing users)


You can also set it in pinctrl-0.


OK, sounds reasonable, but also a bit contradictive. One the one hand 
you prefer consistency (so, let uart2-3 follow uart1 and include rts/cts 
in them), on the other hand the common case over the rare (so split off 
rts/cts). What should I do with uarts2-3 and should I do that to uart1 
too?


Moreover, Chen-Yu prefers to drop _a and @0 when they are redundant, 
which does not appear to be the convention, looking at existing 
sun*dsti. What's your opinion on this?


Best,
Jorik


signature.asc
Description: PGP signature

Re: [PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[Jorik Jonker]

Maxime, Chen-Yu: thanks for taking the effort to go through my patches 
again!


On Thu, Sep 08, 2016 at 08:23:17AM +0200, Maxime Ripard wrote:

On Wed, Sep 07, 2016 at 09:58:57AM +0200, jo...@kippendief.biz wrote:

From: Jorik Jonker <jo...@kippendief.biz>

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.


Using RTS / CTS is very rare among the boards. Forcing it down the
throat of every user doesn't seem like the right thing to do.


So, I'm going for a v5, with these changes:
- rename uart0_pins to uart0_pa_pins (as there could be a pf)
- associate uart0_pa_pins with uart0 on all H3 board DTS files
- put rts/cts in seperate pinmux sets for uart1 (2,3: see below)
- associate rx/tx for uart1-3 in H3 DTSI (this is the only option)
- associate UART1 rts/cts as pinctrl-1 in sun8i-h3-bananapi-m2-plus
 (to prevent breakage for existing users)

I am a bit in doubt if I should include pinmux definitions for the 
following things, as Chen-Yu said to only include stuff that is actually 
used in a board:


- uart0_pf_pins, since there is no board using it
- uart{2,3}_rts_cts, as I agree RTS/CTS is a bit exotic

Maxime/Chen-Yu: what do you think of this?

Best,
Jorik


signature.asc
Description: PGP signature

Re: [PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[Jorik Jonker]

Maxime, Chen-Yu: thanks for taking the effort to go through my patches 
again!


On Thu, Sep 08, 2016 at 08:23:17AM +0200, Maxime Ripard wrote:

On Wed, Sep 07, 2016 at 09:58:57AM +0200, jo...@kippendief.biz wrote:

From: Jorik Jonker 

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.


Using RTS / CTS is very rare among the boards. Forcing it down the
throat of every user doesn't seem like the right thing to do.


So, I'm going for a v5, with these changes:
- rename uart0_pins to uart0_pa_pins (as there could be a pf)
- associate uart0_pa_pins with uart0 on all H3 board DTS files
- put rts/cts in seperate pinmux sets for uart1 (2,3: see below)
- associate rx/tx for uart1-3 in H3 DTSI (this is the only option)
- associate UART1 rts/cts as pinctrl-1 in sun8i-h3-bananapi-m2-plus
 (to prevent breakage for existing users)

I am a bit in doubt if I should include pinmux definitions for the 
following things, as Chen-Yu said to only include stuff that is actually 
used in a board:


- uart0_pf_pins, since there is no board using it
- uart{2,3}_rts_cts, as I agree RTS/CTS is a bit exotic

Maxime/Chen-Yu: what do you think of this?

Best,
Jorik


signature.asc
Description: PGP signature

[PATCH v4 6/8] dts: sun8i-h3: associate pinmux/peripherals for UART2-3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 5cde54c..e9528d1 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -443,6 +443,8 @@
resets = < RST_BUS_UART2>;
dmas = < 8>, < 8>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
@@ -456,6 +458,8 @@
resets = < RST_BUS_UART3>;
dmas = < 9>, < 9>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 6/8] dts: sun8i-h3: associate pinmux/peripherals for UART2-3

[jorik]

From: Jorik Jonker 

Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 5cde54c..e9528d1 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -443,6 +443,8 @@
resets = < RST_BUS_UART2>;
dmas = < 8>, < 8>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
@@ -456,6 +458,8 @@
resets = < RST_BUS_UART3>;
dmas = < 9>, < 9>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c874270..4c86e45 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -182,8 +182,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6635f3d..685755c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -414,6 +414,8 @@
resets = < RST_BUS_UART1>;
dmas = < 7>, < 7>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 7/8] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the only possible pins for these peripherals.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1..937096a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v4 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker 

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c874270..4c86e45 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -182,8 +182,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6635f3d..685755c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -414,6 +414,8 @@
resets = < RST_BUS_UART1>;
dmas = < 7>, < 7>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 7/8] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker 

These are the only possible pins for these peripherals.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1..937096a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v4 5/8] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 685755c..5cde54c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_rts_cts_pins: uart2_rts_cts {
+   allwinner,pins = "PA0", "PA1", "PA2", "PA3";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_rts_cts_pins: uart3_rts_cts {
+   allwinner,pins = "PA13", "PA14", "PA15", "PA16";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v4 5/8] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker 

These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 685755c..5cde54c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_rts_cts_pins: uart2_rts_cts {
+   allwinner,pins = "PA0", "PA1", "PA2", "PA3";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_rts_cts_pins: uart3_rts_cts {
+   allwinner,pins = "PA13", "PA14", "PA15", "PA16";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v4 8/8] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 937096a..342183a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -484,6 +484,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C2>;
+   resets = < RST_BUS_I2C2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v4 2/8] dts: sun8i-h3: clarify uart1 pinmux definition name

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 3779280..45f623b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ee10004..933d42c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,7 +367,7 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
+   uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
-- 
2.7.4

[PATCH v4 2/8] dts: sun8i-h3: clarify uart1 pinmux definition name

[jorik]

From: Jorik Jonker 

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 3779280..45f623b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ee10004..933d42c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,7 +367,7 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
+   uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
-- 
2.7.4

[PATCH v4 8/8] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker 

These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 937096a..342183a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -484,6 +484,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C2>;
+   resets = < RST_BUS_I2C2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v4 3/8] dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 5 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 45f623b..c874270 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -178,8 +178,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 6cb29f3..c9c0014 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -171,8 +171,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1423cc..c830ff9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -134,8 +134,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 772239e..ae87061 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -156,8 +156,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 933d42c..6635f3d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -399,6 +399,8 @@
resets = < RST_BUS_UART0>;
dmas = < 6>, < 6>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 1/8] dts: sun8i-h3: drop _a and address suffix from uart0 pinmux

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the only possible pins for UART0 on H3

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..3779280 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -179,7 +179,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..6cb29f3 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -172,7 +172,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..a1423cc 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -135,7 +135,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..772239e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -157,7 +157,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..ee10004 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -360,7 +360,7 @@
allwinner,pull = ;
};
 
-   uart0_pins_a: uart0@0 {
+   uart0_pins: uart0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
allwinner,drive = ;
-- 
2.7.4

[PATCH v4 1/8] dts: sun8i-h3: drop _a and address suffix from uart0 pinmux

[jorik]

From: Jorik Jonker 

These are the only possible pins for UART0 on H3

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..3779280 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -179,7 +179,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..6cb29f3 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -172,7 +172,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..a1423cc 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -135,7 +135,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..772239e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -157,7 +157,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..ee10004 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -360,7 +360,7 @@
allwinner,pull = ;
};
 
-   uart0_pins_a: uart0@0 {
+   uart0_pins: uart0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
allwinner,drive = ;
-- 
2.7.4

[PATCH v4 3/8] dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker 

This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 5 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 45f623b..c874270 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -178,8 +178,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 6cb29f3..c9c0014 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -171,8 +171,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1423cc..c830ff9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -134,8 +134,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 772239e..ae87061 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -156,8 +156,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 933d42c..6635f3d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -399,6 +399,8 @@
resets = < RST_BUS_UART0>;
dmas = < 6>, < 6>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v4 0/8] dts: sun8i-h3: complete UART I2C definitions for H3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Of course, minutes after sending you notice a huge copy/paste error in
the submitted patch. Mae culpa, and here is a new version.

This is my fourth attempt to complete the UART/I2C definitions on H3.
Changes since v3:
 * I was sloppy when I copy/pasted the i2c2 peripheral, so it had to
   share clocks/resets and interrupts with i2c1. This is fixed now.

Changes since v2:
 * I have moved the pinmux/peripheral associations to the H3 DTSI file,
   including already existing associations for UART0 and UART1.
 * I have left out _a and @0 prefixes where there is only one option
 * I have added i2c2, since it is there (although not exposed on my test
   board)

Best,

Jorik


Jorik Jonker (8):
  dts: sun8i-h3: drop _a and address suffix from uart0 pinmux
  dts: sun8i-h3: clarify uart1 pinmux definition name
  dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: associate pinmux/peripherals for UART2-3
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  4 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  |  2 -
 arch/arm/boot/dts/sun8i-h3.dtsi | 86 -
 5 files changed, 84 insertions(+), 12 deletions(-)

-- 
2.7.4

[PATCH v4 0/8] dts: sun8i-h3: complete UART I2C definitions for H3

[jorik]

From: Jorik Jonker 

Of course, minutes after sending you notice a huge copy/paste error in
the submitted patch. Mae culpa, and here is a new version.

This is my fourth attempt to complete the UART/I2C definitions on H3.
Changes since v3:
 * I was sloppy when I copy/pasted the i2c2 peripheral, so it had to
   share clocks/resets and interrupts with i2c1. This is fixed now.

Changes since v2:
 * I have moved the pinmux/peripheral associations to the H3 DTSI file,
   including already existing associations for UART0 and UART1.
 * I have left out _a and @0 prefixes where there is only one option
 * I have added i2c2, since it is there (although not exposed on my test
   board)

Best,

Jorik


Jorik Jonker (8):
  dts: sun8i-h3: drop _a and address suffix from uart0 pinmux
  dts: sun8i-h3: clarify uart1 pinmux definition name
  dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: associate pinmux/peripherals for UART2-3
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  4 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  |  2 -
 arch/arm/boot/dts/sun8i-h3.dtsi | 86 -
 5 files changed, 84 insertions(+), 12 deletions(-)

-- 
2.7.4

[PATCH v3 1/8] dts: sun8i-h3: drop _a and address suffix from uart0 pinmux

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the only possible pins for UART0 on H3

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..3779280 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -179,7 +179,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..6cb29f3 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -172,7 +172,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..a1423cc 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -135,7 +135,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..772239e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -157,7 +157,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..ee10004 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -360,7 +360,7 @@
allwinner,pull = ;
};
 
-   uart0_pins_a: uart0@0 {
+   uart0_pins: uart0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
allwinner,drive = ;
-- 
2.7.4

[PATCH v3 1/8] dts: sun8i-h3: drop _a and address suffix from uart0 pinmux

[jorik]

From: Jorik Jonker 

These are the only possible pins for UART0 on H3

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f..3779280 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -179,7 +179,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index f93f5d1..6cb29f3 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -172,7 +172,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 0adf932..a1423cc 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -135,7 +135,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..772239e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -157,7 +157,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..ee10004 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -360,7 +360,7 @@
allwinner,pull = ;
};
 
-   uart0_pins_a: uart0@0 {
+   uart0_pins: uart0 {
allwinner,pins = "PA4", "PA5";
allwinner,function = "uart0";
allwinner,drive = ;
-- 
2.7.4

[PATCH v3 0/8] dts: sun8i-h3: complete UART I2C definitions for H3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This is my third attempt to complete the UART/I2C definitions on H3.
Changes since v2:
 * I have moved the pinmux/peripheral associations to the H3 DTSI file,
   including already existing associations for UART0 and UART1.
 * I have left out _a and @0 prefixes where there is only one option
 * I have added i2c2, since it is there (although not exposed on my test
   board)

Best,

Jorik

Jorik Jonker (8):
  dts: sun8i-h3: drop _a and address suffix from uart0 pinmux
  dts: sun8i-h3: clarify uart1 pinmux definition name
  dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: associate pinmux/peripherals for UART2-3
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  4 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  |  2 -
 arch/arm/boot/dts/sun8i-h3.dtsi | 86 -
 5 files changed, 84 insertions(+), 12 deletions(-)

-- 
2.7.4

[PATCH v3 7/8] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the only possible pins for these peripherals.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1..937096a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v3 3/8] dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 5 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 45f623b..c874270 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -178,8 +178,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 6cb29f3..c9c0014 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -171,8 +171,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1423cc..c830ff9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -134,8 +134,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 772239e..ae87061 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -156,8 +156,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 933d42c..6635f3d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -399,6 +399,8 @@
resets = < RST_BUS_UART0>;
dmas = < 6>, < 6>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c874270..4c86e45 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -182,8 +182,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6635f3d..685755c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -414,6 +414,8 @@
resets = < RST_BUS_UART1>;
dmas = < 7>, < 7>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 0/8] dts: sun8i-h3: complete UART I2C definitions for H3

[jorik]

From: Jorik Jonker 

This is my third attempt to complete the UART/I2C definitions on H3.
Changes since v2:
 * I have moved the pinmux/peripheral associations to the H3 DTSI file,
   including already existing associations for UART0 and UART1.
 * I have left out _a and @0 prefixes where there is only one option
 * I have added i2c2, since it is there (although not exposed on my test
   board)

Best,

Jorik

Jorik Jonker (8):
  dts: sun8i-h3: drop _a and address suffix from uart0 pinmux
  dts: sun8i-h3: clarify uart1 pinmux definition name
  dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI
  dts: sun8i-h3: add pinmux definitions for UART2-3
  dts: sun8i-h3: associate pinmux/peripherals for UART2-3
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts |  4 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts |  2 -
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  |  2 -
 arch/arm/boot/dts/sun8i-h3.dtsi | 86 -
 5 files changed, 84 insertions(+), 12 deletions(-)

-- 
2.7.4

[PATCH v3 7/8] dts: sun8i-h3: add pinmux definitions for I2C0-2

[jorik]

From: Jorik Jonker 

These are the only possible pins for these peripherals.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e9528d1..937096a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,27 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins: i2c0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins: i2c1 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c2_pins: i2c2 {
+   allwinner,pins = "PE12", "PE13";
+   allwinner,function = "i2c2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v3 3/8] dts: sun8i-h3: move uart0 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker 

This is the only sensible pinmux/peripheral association for uart0, so I have
moved it from the board specific DTS to the DTSI. It is still up to the boards
to enable it, though.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts   | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts  | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 5 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 45f623b..c874270 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -178,8 +178,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 6cb29f3..c9c0014 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -171,8 +171,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1423cc..c830ff9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -134,8 +134,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 772239e..ae87061 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -156,8 +156,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 933d42c..6635f3d 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -399,6 +399,8 @@
resets = < RST_BUS_UART0>;
dmas = < 6>, < 6>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 4/8] dts: sun8i-h3: move uart1 pinmux/peripheral assocation to DSTI

[jorik]

From: Jorik Jonker 

Users using this UART without RTS/CTS should override the association in
their board specific DTS. All (1) board using this UART uses RTS/CTS, so
this breaks nothing.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c874270..4c86e45 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -182,8 +182,6 @@
 };
 
  {
-   pinctrl-names = "default";
-   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6635f3d..685755c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -414,6 +414,8 @@
resets = < RST_BUS_UART1>;
dmas = < 7>, < 7>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 6/8] dts: sun8i-h3: associate pinmux/peripherals for UART2-3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 5cde54c..e9528d1 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -443,6 +443,8 @@
resets = < RST_BUS_UART2>;
dmas = < 8>, < 8>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
@@ -456,6 +458,8 @@
resets = < RST_BUS_UART3>;
dmas = < 9>, < 9>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 8/8] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 937096a..411458f 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -484,6 +484,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v3 6/8] dts: sun8i-h3: associate pinmux/peripherals for UART2-3

[jorik]

From: Jorik Jonker 

Although these peripherals are disabled, they are associated to the
pinmux definitions. Again, these are the full pinmux defs which include
RTS/CTS. One could narrow this down to RX/TX only in a board specific
DTS.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 5cde54c..e9528d1 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -443,6 +443,8 @@
resets = < RST_BUS_UART2>;
dmas = < 8>, < 8>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
@@ -456,6 +458,8 @@
resets = < RST_BUS_UART3>;
dmas = < 9>, < 9>;
dma-names = "rx", "tx";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rts_cts_pins>;
status = "disabled";
};
 
-- 
2.7.4

[PATCH v3 8/8] dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC

[jorik]

From: Jorik Jonker 

These peripherals have only possible set of pins, so I have associated
the peripherals with those pinmux definitions.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 937096a..411458f 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -484,6 +484,45 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c2: i2c@01c2b400 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v3 2/8] dts: sun8i-h3: clarify uart1 pinmux definition name

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 3779280..45f623b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ee10004..933d42c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,7 +367,7 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
+   uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
-- 
2.7.4

[PATCH v3 5/8] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 685755c..5cde54c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_rts_cts_pins: uart2_rts_cts {
+   allwinner,pins = "PA0", "PA1", "PA2", "PA3";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_rts_cts_pins: uart3_rts_cts {
+   allwinner,pins = "PA13", "PA14", "PA15", "PA16";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v3 2/8] dts: sun8i-h3: clarify uart1 pinmux definition name

[jorik]

From: Jorik Jonker 

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
 arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 3779280..45f623b 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index ee10004..933d42c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -367,7 +367,7 @@
allwinner,pull = ;
};
 
-   uart1_pins_a: uart1@0 {
+   uart1_rts_cts_pins: uart1_rts_cts {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart1";
allwinner,drive = ;
-- 
2.7.4

[PATCH v3 5/8] dts: sun8i-h3: add pinmux definitions for UART2-3

[jorik]

From: Jorik Jonker 

These are the pinmux definitions for uarts2-3 on H3. These are the only
pins for these UARTS, but one could choose to use reduce them to only
RX/TX.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 685755c..5cde54c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_rts_cts_pins: uart2_rts_cts {
+   allwinner,pins = "PA0", "PA1", "PA2", "PA3";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_rts_cts_pins: uart3_rts_cts {
+   allwinner,pins = "PA13", "PA14", "PA15", "PA16";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

Re: [PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[Jorik Jonker]

On Tue, Sep 06, 2016 at 11:04:38AM +0800, Chen-Yu Tsai wrote:

In short, I'm ok with it. But please put an explicit

   status = "disabled";

and probably a comment about how/where the peripheral can be
used in the board dts.


Allright, I will do that in v3.


I intended to do this for the Banana Pis. Though my original plan
was to enable Raspberry Pi compatible peripherals by default, and
list the other peripherals that are defined by the vendor as
"disabled".

"Defined by the vendor" means that the vendor has some sort of
document associating the gpio header pins with the peripherals,
as shown in:

   http://www.orangepi.org/Docs/Pindefinition.html#CON3_Definition

This should make it easier for the average user to enable the
peripherals. I'm not sure we should list _all_ possible ones
though. That would make the list very large, and some might
end up never being used.


This is exactly what I was thinking, albeit I wanted to go a bit 
'bigger': move all unambiguous pinmux/peripheral associations from the 
H3 DTS files to the DTSI, complete them with known associations for 
which there are drivers, and have all of these disabled. Reduce the 
existing blocks in the DTS files to just "status = okay".


Peripherals requiring board-specific things (like emac, USB, voltage 
regulators, displays) stay put in the DTS.


It will explodes the scope of my proposed change a bit, but if you are 
OK with this, I will gladly do it.


Maxime, Chen-Yu: what do you think of this?

Best,

Jorik


signature.asc
Description: PGP signature

Re: [PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[Jorik Jonker]

On Tue, Sep 06, 2016 at 11:04:38AM +0800, Chen-Yu Tsai wrote:

In short, I'm ok with it. But please put an explicit

   status = "disabled";

and probably a comment about how/where the peripheral can be
used in the board dts.


Allright, I will do that in v3.


I intended to do this for the Banana Pis. Though my original plan
was to enable Raspberry Pi compatible peripherals by default, and
list the other peripherals that are defined by the vendor as
"disabled".

"Defined by the vendor" means that the vendor has some sort of
document associating the gpio header pins with the peripherals,
as shown in:

   http://www.orangepi.org/Docs/Pindefinition.html#CON3_Definition

This should make it easier for the average user to enable the
peripherals. I'm not sure we should list _all_ possible ones
though. That would make the list very large, and some might
end up never being used.


This is exactly what I was thinking, albeit I wanted to go a bit 
'bigger': move all unambiguous pinmux/peripheral associations from the 
H3 DTS files to the DTSI, complete them with known associations for 
which there are drivers, and have all of these disabled. Reduce the 
existing blocks in the DTS files to just "status = okay".


Peripherals requiring board-specific things (like emac, USB, voltage 
regulators, displays) stay put in the DTS.


It will explodes the scope of my proposed change a bit, but if you are 
OK with this, I will gladly do it.


Maxime, Chen-Yu: what do you think of this?

Best,

Jorik


signature.asc
Description: PGP signature

Re: [PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[Jorik Jonker]

On Fri, Sep 02, 2016 at 09:04:25AM +0200, Maxime Ripard wrote:

Unfortunately, these pins can be used for other purposes as well, so
we cannot make force that decision down to our users.


Yes, but since the associated peripheral is disabled, the users are free 
to configure other functions/peripherals, right? I mean something like 
this in pseudo-DT:


/soc/pio: pinctrl@01c20800/uart1_pins:
  allwinner,pins = "PG6, PG7";
/soc/pio: pinctrl@01c20800/foo0_pins:
  allwinner,pins = "PG6, PG7";
  ..
/soc/uart1: serial@serial@01c28400:
  pinctrl-0 = <_pins>;
  status = "disabled";
/soc/bar:
  pinctrl-0 = <_pins>;
  status = "disabled";

Assuming Linux/DT allows this, this would force nothing, only offer 
choice and ease of use.


Best,

Jorik

Re: [PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[Jorik Jonker]

On Fri, Sep 02, 2016 at 09:04:25AM +0200, Maxime Ripard wrote:

Unfortunately, these pins can be used for other purposes as well, so
we cannot make force that decision down to our users.


Yes, but since the associated peripheral is disabled, the users are free 
to configure other functions/peripherals, right? I mean something like 
this in pseudo-DT:


/soc/pio: pinctrl@01c20800/uart1_pins:
  allwinner,pins = "PG6, PG7";
/soc/pio: pinctrl@01c20800/foo0_pins:
  allwinner,pins = "PG6, PG7";
  ..
/soc/uart1: serial@serial@01c28400:
  pinctrl-0 = <_pins>;
  status = "disabled";
/soc/bar:
  pinctrl-0 = <_pins>;
  status = "disabled";

Assuming Linux/DT allows this, this would force nothing, only offer 
choice and ease of use.


Best,

Jorik

Re: [PATCH v2 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[Jorik Jonker]

Hi,

(trying again in plaintext, sorry for the HTML spam...)

A bit tricky to reply to two mails in one, as I think my reply relates
to both, but here it goes.

On 1 September 2016 at 04:42, Chen-Yu Tsai <w...@csie.org> wrote:
> On Thu, Sep 1, 2016 at 3:30 AM,  <jo...@kippendief.biz> wrote:
>> From: Jorik Jonker <jo...@kippendief.biz>
>>
>> This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
>> controller, but I do not have a board on hands on which i2c2 is exposed in 
>> such
>> a way that I can verify that it works.
>
> If they are listed in the manual, and the interrupts, clocks, resets, pins
> all exist, that is good enough for me.

That sounds sensible, I will do that in v3.

> These pinmuxes are the only ones possible for each peripheral.
> Please drop the _a suffix and the @0 address for both of them.

Agreed. But: I think the same goes for UARTs 0-3, of which 0-1 have a pinmux
following the _a / @0 syntax in current kernel. There are not really options
here, except leaving out RTS/CTS on uarts1-3, which one could do in a
board-specific pinmux.

Moreover, I could put all the pinmux-peripheral associations for H3 in the DTSI,
removing them from the DTS files (including already existing), as the
associations themselves are not really board specific, right?

Best,
Jorik

Re: [PATCH v2 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[Jorik Jonker]

Hi,

(trying again in plaintext, sorry for the HTML spam...)

A bit tricky to reply to two mails in one, as I think my reply relates
to both, but here it goes.

On 1 September 2016 at 04:42, Chen-Yu Tsai  wrote:
> On Thu, Sep 1, 2016 at 3:30 AM,   wrote:
>> From: Jorik Jonker 
>>
>> This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
>> controller, but I do not have a board on hands on which i2c2 is exposed in 
>> such
>> a way that I can verify that it works.
>
> If they are listed in the manual, and the interrupts, clocks, resets, pins
> all exist, that is good enough for me.

That sounds sensible, I will do that in v3.

> These pinmuxes are the only ones possible for each peripheral.
> Please drop the _a suffix and the @0 address for both of them.

Agreed. But: I think the same goes for UARTs 0-3, of which 0-1 have a pinmux
following the _a / @0 syntax in current kernel. There are not really options
here, except leaving out RTS/CTS on uarts1-3, which one could do in a
board-specific pinmux.

Moreover, I could put all the pinmux-peripheral associations for H3 in the DTSI,
removing them from the DTS files (including already existing), as the
associations themselves are not really board specific, right?

Best,
Jorik

[PATCH v2 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 0637b95..b4ce925 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -469,6 +469,28 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v2 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[jorik]

From: Jorik Jonker 

This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 0637b95..b4ce925 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -469,6 +469,28 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH v2 5/7] dts: sun8i-h3: add UART1-3 to Orange Pi PC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..602b012 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH v2 5/7] dts: sun8i-h3: add UART1-3 to Orange Pi PC

[jorik]

From: Jorik Jonker 

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..602b012 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH v2 6/7] dts: sun8i-h3: add I2C0-1 to Orange Pi Plus

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has I2C0-2 exposed on its expansion header.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 7a17839..fcacafa 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -64,6 +64,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_8bit_pins>;
-- 
2.7.4

[PATCH v2 6/7] dts: sun8i-h3: add I2C0-1 to Orange Pi Plus

[jorik]

From: Jorik Jonker 

This board has I2C0-2 exposed on its expansion header.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 7a17839..fcacafa 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -64,6 +64,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_8bit_pins>;
-- 
2.7.4

[PATCH v2 7/7] dts: sun8i-h3: add I2C0-1 to Orange Pi PC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has I2C0-I2C1 exposed on its expansion header.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 602b012..6102e37 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -108,6 +108,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
-- 
2.7.4

[PATCH v2 7/7] dts: sun8i-h3: add I2C0-1 to Orange Pi PC

[jorik]

From: Jorik Jonker 

This board has I2C0-I2C1 exposed on its expansion header.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 602b012..6102e37 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -108,6 +108,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
-- 
2.7.4

[PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b0cb417..7a17839 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -90,6 +90,21 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.7.4

[PATCH v2 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[jorik]

From: Jorik Jonker 

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b0cb417..7a17839 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -90,6 +90,21 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.7.4

[PATCH v2 2/7] dts: sun8i-h3: add pinmux definitions for i2c0/i2c1

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 7740748..0637b95 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,20 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins_a: i2c0@0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins_a: i2c1@0 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v2 2/7] dts: sun8i-h3: add pinmux definitions for i2c0/i2c1

[jorik]

From: Jorik Jonker 

This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 7740748..0637b95 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,20 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins_a: i2c0@0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins_a: i2c1@0 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH v2 0/7] dts: sun8i: add extra uart/i2c to H3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This is v2 of my patch series. Just after sending I noticed the interrupts
of i2c1 were too liberally copy/paste'd. This is fixed in v2.

This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS files. In this series I explicitly
leave out i2c2, since this is not broken out on my boards, so I cannot verify if
it actually works.

After the patch, one enables for example uart1 on a opi+ like this from u-boot:
 => fdt set /soc/serial@01c28400 status okay

Regards,
Jorik

Jorik Jonker (7):
  dts: sun8i-h3: add pinmux definitions for uart2/uart3
  dts: sun8i-h3: add pinmux definitions for i2c0/i2c1
  dts: sun8i-h3: add i2c0/i2c1 SoC peripherals
  dts: sun8i-h3: add UART1-3 to Orange Pi Plus
  dts: sun8i-h3: add UART1-3 to Orange Pi PC
  dts: sun8i-h3: add I2C0-1 to Orange Pi Plus
  dts: sun8i-h3: add I2C0-1 to Orange Pi PC

 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts   | 25 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 25 ++
 arch/arm/boot/dts/sun8i-h3.dtsi  | 50 
 3 files changed, 100 insertions(+)

-- 
2.7.4

[PATCH v2 1/7] dts: sun8i-h3: add pinmux definitions for uart2/uart3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This adds pinmux definitions for uarts 2 and 3 on H3 boards

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..7740748 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins_a: uart2@0 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins_a: uart3@0 {
+   allwinner,pins = "PA13", "PA14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH v2 0/7] dts: sun8i: add extra uart/i2c to H3

[jorik]

From: Jorik Jonker 

This is v2 of my patch series. Just after sending I noticed the interrupts
of i2c1 were too liberally copy/paste'd. This is fixed in v2.

This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS files. In this series I explicitly
leave out i2c2, since this is not broken out on my boards, so I cannot verify if
it actually works.

After the patch, one enables for example uart1 on a opi+ like this from u-boot:
 => fdt set /soc/serial@01c28400 status okay

Regards,
Jorik

Jorik Jonker (7):
  dts: sun8i-h3: add pinmux definitions for uart2/uart3
  dts: sun8i-h3: add pinmux definitions for i2c0/i2c1
  dts: sun8i-h3: add i2c0/i2c1 SoC peripherals
  dts: sun8i-h3: add UART1-3 to Orange Pi Plus
  dts: sun8i-h3: add UART1-3 to Orange Pi PC
  dts: sun8i-h3: add I2C0-1 to Orange Pi Plus
  dts: sun8i-h3: add I2C0-1 to Orange Pi PC

 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts   | 25 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 25 ++
 arch/arm/boot/dts/sun8i-h3.dtsi  | 50 
 3 files changed, 100 insertions(+)

-- 
2.7.4

[PATCH v2 1/7] dts: sun8i-h3: add pinmux definitions for uart2/uart3

[jorik]

From: Jorik Jonker 

This adds pinmux definitions for uarts 2 and 3 on H3 boards

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..7740748 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins_a: uart2@0 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins_a: uart3@0 {
+   allwinner,pins = "PA13", "PA14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH 0/7] dts: sun8i: add extra uart/i2c to H3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS files. In this series I explicitly
leave out i2c2, since this is not broken out on my boards, so I cannot verify if
it actually works.

After the patch, one enables for example uart1 on a opi+ like this from u-boot:
 => fdt set /soc/serial@01c28400 status okay

Regards,
Jorik

Jorik Jonker (7):
  dts: sun8i-h3: add pinmux definitions for uart2/uart3
  dts: sun8i-h3: add pinmux definitions for i2c0/i2c1
  dts: sun8i-h3: add i2c0/i2c1 SoC peripherals
  dts: sun8i-h3: add UART1-3 to Orange Pi Plus
  dts: sun8i-h3: add UART1-3 to Orange Pi PC
  dts: sun8i-h3: add I2C0-1 to Orange Pi Plus
  dts: sun8i-h3: add I2C0-1 to Orange Pi PC

 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts   | 25 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 25 ++
 arch/arm/boot/dts/sun8i-h3.dtsi  | 50 
 3 files changed, 100 insertions(+)

-- 
2.7.4

[PATCH 6/7] dts: sun8i-h3: add I2C0-1 to Orange Pi Plus

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has I2C0-2 exposed on its expansion header.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 7a17839..fcacafa 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -64,6 +64,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_8bit_pins>;
-- 
2.7.4

[PATCH 0/7] dts: sun8i: add extra uart/i2c to H3

[jorik]

From: Jorik Jonker 

This series is a follow-up to Martin Ayotte's efforts to add additional UARTS
and I2C ports to the AllWinner H3 SoC DTS files. In this series I explicitly
leave out i2c2, since this is not broken out on my boards, so I cannot verify if
it actually works.

After the patch, one enables for example uart1 on a opi+ like this from u-boot:
 => fdt set /soc/serial@01c28400 status okay

Regards,
Jorik

Jorik Jonker (7):
  dts: sun8i-h3: add pinmux definitions for uart2/uart3
  dts: sun8i-h3: add pinmux definitions for i2c0/i2c1
  dts: sun8i-h3: add i2c0/i2c1 SoC peripherals
  dts: sun8i-h3: add UART1-3 to Orange Pi Plus
  dts: sun8i-h3: add UART1-3 to Orange Pi PC
  dts: sun8i-h3: add I2C0-1 to Orange Pi Plus
  dts: sun8i-h3: add I2C0-1 to Orange Pi PC

 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts   | 25 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 25 ++
 arch/arm/boot/dts/sun8i-h3.dtsi  | 50 
 3 files changed, 100 insertions(+)

-- 
2.7.4

[PATCH 6/7] dts: sun8i-h3: add I2C0-1 to Orange Pi Plus

[jorik]

From: Jorik Jonker 

This board has I2C0-2 exposed on its expansion header.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 7a17839..fcacafa 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -64,6 +64,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_8bit_pins>;
-- 
2.7.4

[PATCH 5/7] dts: sun8i-h3: add UART1-3 to Orange Pi PC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..602b012 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH 5/7] dts: sun8i-h3: add UART1-3 to Orange Pi PC

[jorik]

From: Jorik Jonker 

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9..602b012 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -161,6 +161,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
/* USB VBUS is always on */
status = "okay";
-- 
2.7.4

[PATCH 2/7] dts: sun8i-h3: add pinmux definitions for i2c0/i2c1

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 7740748..0637b95 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,20 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins_a: i2c0@0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins_a: i2c1@0 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH 1/7] dts: sun8i-h3: add pinmux definitions for uart2/uart3

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This adds pinmux definitions for uarts 2 and 3 on H3 boards

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..7740748 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins_a: uart2@0 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins_a: uart3@0 {
+   allwinner,pins = "PA13", "PA14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b0cb417..7a17839 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -90,6 +90,21 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.7.4

[PATCH 4/7] dts: sun8i-h3: add UART1-3 to Orange Pi Plus

[jorik]

From: Jorik Jonker 

This board has UARTS1-3 exposed on its expansion header

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index b0cb417..7a17839 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -90,6 +90,21 @@
};
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
usb3_vbus-supply = <_usb3_vbus>;
 };
-- 
2.7.4

[PATCH 2/7] dts: sun8i-h3: add pinmux definitions for i2c0/i2c1

[jorik]

From: Jorik Jonker 

This adds proper pinmux definitions for i2c0 and i2c1. Although H3 has a third
i2c controller, these are not exposed on my boards. If someone actually has a
H3 board with an exposed i2c2, they could add the third.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 7740748..0637b95 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -327,6 +327,20 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   i2c0_pins_a: i2c0@0 {
+   allwinner,pins = "PA11", "PA12";
+   allwinner,function = "i2c0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   i2c1_pins_a: i2c1@0 {
+   allwinner,pins = "PA18", "PA19";
+   allwinner,function = "i2c1";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 "PF4", "PF5";
-- 
2.7.4

[PATCH 1/7] dts: sun8i-h3: add pinmux definitions for uart2/uart3

[jorik]

From: Jorik Jonker 

This adds pinmux definitions for uarts 2 and 3 on H3 boards

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdb..7740748 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -373,6 +373,20 @@
allwinner,drive = ;
allwinner,pull = ;
};
+
+   uart2_pins_a: uart2@0 {
+   allwinner,pins = "PA0", "PA1";
+   allwinner,function = "uart2";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   uart3_pins_a: uart3@0 {
+   allwinner,pins = "PA13", "PA14";
+   allwinner,function = "uart3";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
};
 
timer@01c20c00 {
-- 
2.7.4

[PATCH 7/7] dts: sun8i-h3: add I2C0-1 to Orange Pi PC

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This board has I2C0-I2C1 exposed on its expansion header.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 602b012..6102e37 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -108,6 +108,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
-- 
2.7.4

[PATCH 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 0637b95..d6cfef8 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -469,6 +469,28 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH 7/7] dts: sun8i-h3: add I2C0-1 to Orange Pi PC

[jorik]

From: Jorik Jonker 

This board has I2C0-I2C1 exposed on its expansion header.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 602b012..6102e37 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -108,6 +108,16 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
-- 
2.7.4

[PATCH 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals

[jorik]

From: Jorik Jonker 

This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third
controller, but I do not have a board on hands on which i2c2 is exposed in such
a way that I can verify that it works.

Signed-off-by: Jorik Jonker 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 0637b95..d6cfef8 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -469,6 +469,28 @@
status = "disabled";
};
 
+   i2c0: i2c@01c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C0>;
+   resets = < RST_BUS_I2C0>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@01c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = < CLK_BUS_I2C1>;
+   resets = < RST_BUS_I2C1>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
-- 
2.7.4

[PATCH] clk: sunxi-ng: Fix wrong reset register offsets

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

The reset register offsets for UART*, I2C* and SCR were off by a few bytes.

Signed-off-by: Jorik Jonker <jo...@kippendief.biz>

---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index feabc0f..280ba74 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
@@ -783,14 +783,14 @@ static struct ccu_reset_map sun8i_h3_ccu_resets[] = {
[RST_BUS_I2S1]  =  { 0x2d0, BIT(13) },
[RST_BUS_I2S2]  =  { 0x2d0, BIT(14) },
 
-   [RST_BUS_I2C0]  =  { 0x2d4, BIT(0) },
-   [RST_BUS_I2C1]  =  { 0x2d4, BIT(1) },
-   [RST_BUS_I2C2]  =  { 0x2d4, BIT(2) },
-   [RST_BUS_UART0] =  { 0x2d4, BIT(16) },
-   [RST_BUS_UART1] =  { 0x2d4, BIT(17) },
-   [RST_BUS_UART2] =  { 0x2d4, BIT(18) },
-   [RST_BUS_UART3] =  { 0x2d4, BIT(19) },
-   [RST_BUS_SCR]   =  { 0x2d4, BIT(20) },
+   [RST_BUS_I2C0]  =  { 0x2d8, BIT(0) },
+   [RST_BUS_I2C1]  =  { 0x2d8, BIT(1) },
+   [RST_BUS_I2C2]  =  { 0x2d8, BIT(2) },
+   [RST_BUS_UART0] =  { 0x2d8, BIT(16) },
+   [RST_BUS_UART1] =  { 0x2d8, BIT(17) },
+   [RST_BUS_UART2] =  { 0x2d8, BIT(18) },
+   [RST_BUS_UART3] =  { 0x2d8, BIT(19) },
+   [RST_BUS_SCR]   =  { 0x2d8, BIT(20) },
 };
 
 static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
-- 
2.7.4

[PATCH] clk: sunxi-ng: Fix wrong reset register offsets

[jorik]

From: Jorik Jonker 

The reset register offsets for UART*, I2C* and SCR were off by a few bytes.

Signed-off-by: Jorik Jonker 

---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index feabc0f..280ba74 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
@@ -783,14 +783,14 @@ static struct ccu_reset_map sun8i_h3_ccu_resets[] = {
[RST_BUS_I2S1]  =  { 0x2d0, BIT(13) },
[RST_BUS_I2S2]  =  { 0x2d0, BIT(14) },
 
-   [RST_BUS_I2C0]  =  { 0x2d4, BIT(0) },
-   [RST_BUS_I2C1]  =  { 0x2d4, BIT(1) },
-   [RST_BUS_I2C2]  =  { 0x2d4, BIT(2) },
-   [RST_BUS_UART0] =  { 0x2d4, BIT(16) },
-   [RST_BUS_UART1] =  { 0x2d4, BIT(17) },
-   [RST_BUS_UART2] =  { 0x2d4, BIT(18) },
-   [RST_BUS_UART3] =  { 0x2d4, BIT(19) },
-   [RST_BUS_SCR]   =  { 0x2d4, BIT(20) },
+   [RST_BUS_I2C0]  =  { 0x2d8, BIT(0) },
+   [RST_BUS_I2C1]  =  { 0x2d8, BIT(1) },
+   [RST_BUS_I2C2]  =  { 0x2d8, BIT(2) },
+   [RST_BUS_UART0] =  { 0x2d8, BIT(16) },
+   [RST_BUS_UART1] =  { 0x2d8, BIT(17) },
+   [RST_BUS_UART2] =  { 0x2d8, BIT(18) },
+   [RST_BUS_UART3] =  { 0x2d8, BIT(19) },
+   [RST_BUS_SCR]   =  { 0x2d8, BIT(20) },
 };
 
 static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
-- 
2.7.4

[PATCH] clk: sunxi-ng: Fix wrong reset register offsets

[jorik]

From: Jorik Jonker <jo...@kippendief.biz>

The reset register offsets for UART*, I2C* and SCR were off by a few bytes.
---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index feabc0f..280ba74 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
@@ -783,14 +783,14 @@ static struct ccu_reset_map sun8i_h3_ccu_resets[] = {
[RST_BUS_I2S1]  =  { 0x2d0, BIT(13) },
[RST_BUS_I2S2]  =  { 0x2d0, BIT(14) },
 
-   [RST_BUS_I2C0]  =  { 0x2d4, BIT(0) },
-   [RST_BUS_I2C1]  =  { 0x2d4, BIT(1) },
-   [RST_BUS_I2C2]  =  { 0x2d4, BIT(2) },
-   [RST_BUS_UART0] =  { 0x2d4, BIT(16) },
-   [RST_BUS_UART1] =  { 0x2d4, BIT(17) },
-   [RST_BUS_UART2] =  { 0x2d4, BIT(18) },
-   [RST_BUS_UART3] =  { 0x2d4, BIT(19) },
-   [RST_BUS_SCR]   =  { 0x2d4, BIT(20) },
+   [RST_BUS_I2C0]  =  { 0x2d8, BIT(0) },
+   [RST_BUS_I2C1]  =  { 0x2d8, BIT(1) },
+   [RST_BUS_I2C2]  =  { 0x2d8, BIT(2) },
+   [RST_BUS_UART0] =  { 0x2d8, BIT(16) },
+   [RST_BUS_UART1] =  { 0x2d8, BIT(17) },
+   [RST_BUS_UART2] =  { 0x2d8, BIT(18) },
+   [RST_BUS_UART3] =  { 0x2d8, BIT(19) },
+   [RST_BUS_SCR]   =  { 0x2d8, BIT(20) },
 };
 
 static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
-- 
2.7.4

[PATCH] clk: sunxi-ng: Fix wrong reset register offsets

[jorik]

From: Jorik Jonker 

The reset register offsets for UART*, I2C* and SCR were off by a few bytes.
---
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index feabc0f..280ba74 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
@@ -783,14 +783,14 @@ static struct ccu_reset_map sun8i_h3_ccu_resets[] = {
[RST_BUS_I2S1]  =  { 0x2d0, BIT(13) },
[RST_BUS_I2S2]  =  { 0x2d0, BIT(14) },
 
-   [RST_BUS_I2C0]  =  { 0x2d4, BIT(0) },
-   [RST_BUS_I2C1]  =  { 0x2d4, BIT(1) },
-   [RST_BUS_I2C2]  =  { 0x2d4, BIT(2) },
-   [RST_BUS_UART0] =  { 0x2d4, BIT(16) },
-   [RST_BUS_UART1] =  { 0x2d4, BIT(17) },
-   [RST_BUS_UART2] =  { 0x2d4, BIT(18) },
-   [RST_BUS_UART3] =  { 0x2d4, BIT(19) },
-   [RST_BUS_SCR]   =  { 0x2d4, BIT(20) },
+   [RST_BUS_I2C0]  =  { 0x2d8, BIT(0) },
+   [RST_BUS_I2C1]  =  { 0x2d8, BIT(1) },
+   [RST_BUS_I2C2]  =  { 0x2d8, BIT(2) },
+   [RST_BUS_UART0] =  { 0x2d8, BIT(16) },
+   [RST_BUS_UART1] =  { 0x2d8, BIT(17) },
+   [RST_BUS_UART2] =  { 0x2d8, BIT(18) },
+   [RST_BUS_UART3] =  { 0x2d8, BIT(19) },
+   [RST_BUS_SCR]   =  { 0x2d8, BIT(20) },
 };
 
 static const struct sunxi_ccu_desc sun8i_h3_ccu_desc = {
-- 
2.7.4