Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-21 Thread wstephen
> Right. For review purposes, I think it would be helpful to split this
> huge patch into several steps then:
>
> - add a base driver
> - add the overlay interface
> - add the nss driver
>
> Ideally more of them.

The nss-drv driver is open sourced but we are currently not planning to
upstream to linux kernel yet because we are still actively adding new
features
https://www.codeaurora.org/cgit/quic/qsdk/oss/lklm/nss-drv

> Thanks for the description, this sounds very interesting indeed. I do
> have more questions though: how do you get the rules into the NSS driver?
> Does this get handled transparently by the openvswitch driver or
> did you have to add new user interfaces for it?
>
>   Arnd
>

No, we are not using openvswitch. We have a connection manager monitoring
conntrack events and creates rules then send it through the interface
built in nss-drv.

Thanks,
Stephen

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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-19 Thread wstephen
> On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
>>
>> The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
>> SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
>> main purpose of these NSS cores is to offload the networking stack from
>> the ARM cores to achieve high performance at routing/ipsec..etc without
>> exhausting the ARM core CPU cycles. There is another nss-drv driver for
>> the NSS cores.
>
> I see.
>
>> The nss-gmac driver is designed to work standalone or with the nss-drv
>> driver so the switchable data plane overlay was implemented. When it
>> worked standalone, the data plane is running on the ARM core as a
>> standard
>> networking driver.
>
> How do you decide which way it gets used on a particular system?
>

By default the GMAC driver uses a native (Host ARM CPU) based data plane. 
If the configuration loads the offload nss-drv driver, the offload driver
registers an overlay with the GMAC.

>> The nss-drv driver can take over the data plane and
>> offload it to the NSS cores. The STMicro stmmac driver does not have
>> this
>> kind of overlay design so is not suitable for IPQ806x. This is why we
>> don't based on the stmmac driver
>
> Which kind of offload is implemented specifically? 'data plane' sounds
> fairly generic and could mean anything, and the code isn't readable enough
> in its current form for me to find out.

The Network Subsystem (NSS core) provides a GMAC pass-through until it is
given a rule to offload work.  Once a rule is given, it is capable of
performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other
protocols.
>
>   Arnd
>

Hope this clarify your question!

Thanks,
Stephen


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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread wstephen
Hi Arnd, Francois

The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
main purpose of these NSS cores is to offload the networking stack from
the ARM cores to achieve high performance at routing/ipsec..etc without
exhausting the ARM core CPU cycles. There is another nss-drv driver for
the NSS cores.
The nss-gmac driver is designed to work standalone or with the nss-drv
driver so the switchable data plane overlay was implemented. When it
worked standalone, the data plane is running on the ARM core as a standard
networking driver. The nss-drv driver can take over the data plane and
offload it to the NSS cores. The STMicro stmmac driver does not have this
kind of overlay design so is not suitable for IPQ806x. This is why we
don't based on the stmmac driver

Thanks,
Stephen

>> diff --git a/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> new file mode 100644
>> index 000..806f2e6
>> --- /dev/null
>> +++ b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> @@ -0,0 +1,14 @@
>> +Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
>> +Linux Driver for 3507 DWC Ether MAC 10/100 Universal
>> +
>> +IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and
>> documentation (hereinafter, "Software") are unsupported proprietary
>> works of Synopsys, Inc. unless otherwise expressly agreed to in writing
>> between Synopsys and you.
>> +
>> +The Software uses certain Linux kernel functionality and may therefore
>> be subject to the GNU Public License which is available at:
>> +http://www.gnu.org/licenses/gpl.html
>
> It sounds like this one is related to the dwmac driver in
> drivers/net/ethernet/stmicro/stmmac/. Please move the code into
> the same directory and reuse as much as you can.
>
> If this is a completely unrelated part, it should probably go
> into drivers/net/ethernet/designware or drivers/net/ethernet/synopsys.
>
>> +#ifdef CONFIG_OF
>> +#include 
>> +#else
>> +#include 
>> +#endif
>
> Drop the non-CONFIG_OF part here and elsewhere, we don't support
> separate platform directories any more, and mach-qcom is already
> DT-only.
>
>> +/**
>> + * GMAC registers Map
>> + * For Pci based system address is BARx + gmac_register_base
>> + * For any other system translation is done accordingly
>> + **/
>> +enum gmac_registers {
>> +gmac_config = 0x,   /* Mac config Register*/
>> +gmac_frame_filter = 0x0004, /* Mac frame filtering controls   */
>> +gmac_hash_high = 0x0008,/* Multi-cast hash table high */
>> +gmac_hash_low = 0x000c, /* Multi-cast hash table low  */
>> +gmac_gmii_addr = 0x0010,/* GMII address Register(ext. Phy)*/
>> +gmac_gmii_data = 0x0014,/* GMII data Register(ext. Phy)   */
>> +gmac_flow_control = 0x0018, /* Flow control Register  */
>> +gmac_vlan = 0x001c, /* VLAN tag Register (IEEE 802.1Q)*/
>> +gmac_version = 0x0020,  /* GMAC Core Version Register */
>> +gmac_wakeup_addr = 0x0028,  /* GMAC wake-up frame filter adrress
>> +   reg*/
>
> This looks a lot like dwmac1000 as well.
>
>> +if (of_property_read_u32(np, "qcom,id", &gmacdev->macid)
>> +|| of_property_read_u32(np, "qcom,emulation", 
>> &gmaccfg->emulation)
>> +|| of_property_read_u32(np, "qcom,phy_mii_type",
>> &gmaccfg->phy_mii_type)
>> +|| of_property_read_u32(np, "qcom,phy_mdio_addr",
>> &gmaccfg->phy_mdio_addr)
>> +|| of_property_read_u32(np, "qcom,rgmii_delay",
>> &gmaccfg->rgmii_delay)
>> +|| of_property_read_u32(np, "qcom,poll_required",
>> &gmaccfg->poll_required)
>> +|| of_property_read_u32(np, "qcom,forced_speed",
>> &gmaccfg->forced_speed)
>> +|| of_property_read_u32(np, "qcom,forced_duplex",
>> &gmaccfg->forced_duplex)
>> +|| of_property_read_u32(np, "qcom,irq", &netdev->irq)
>> +|| of_property_read_u32(np, "qcom,socver", &gmaccfg->socver)) {
>
> This is not an acceptable way to pass data from DT, please use the
> standard properties.
>
>> +if (test_bit(__NSS_GMAC_LINKPOLL, &gmacdev->flags)) {
>> +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 8, 0))
>> +gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
>> +  &nss_gmac_adjust_link, 0, phyif);
>> +#else
>> +gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
>> +  &nss_gmac_adjust_link, phyif);
>> +#endif
>
> Drop all LINUX_VERSION_CODE checks
>
>> +if (IS_ERR_OR_NULL(gmacdev->phydev)) {
>> +netdev_dbg