Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Alim Akhtar]

Hi,

On 12/16/2016 01:07 PM, Krzysztof Kozlowski wrote:

On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:

[ I added Arjun to Cc:, maybe he can help in explaining this issue
   (unfortunately Inderpal's email is no longer working). ]

Please also note that on Exynos5422/5800 SoCs the same ARM rail
voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
IOW if the problem exists it is already present in the mainline
kernel.


Interesting.  In the ChromeOS tree I see significantly higher voltages
needed...  Note that one might naively look at
.

1362500, /* L0  2100 */
1312500, /* L1  2000 */

..but, amazingly enough those voltages aren't used at all.  Surprise!

I believe that the above numbers are actually not used and the ASV
numbers are used instead.  See


{ 210,
135, 135, 135, 135, 135,
1337500, 1325000, 1312500, 130, 1287500,
1275000, 1262500, 125, 1237500 },

I believe that interpretation there is: some bins of the CPU can run
at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.


That is definitely the case. One could just look at vendors ASV table
(for 1.9 GHz):
{ 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
 120, 1187500, 1175000, 1162500, 115,
 1137500, 1125000, 1112500, 1112500},

The theoretical difference is up to 1.875V! From my experiments I saw
BIN1 chips which should be the same... but some working on 1.2V, some on
1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
does not mean that there aren't such...


...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
running on a CPU from a nice bin?


Would be nice to see a dump of PKG_ID and AUX_INFO chipid registers
along with name of tested board. Because the "Tested on XU3" is not
sufficient.

I agree, we should be dumping PKG_ID and other chip info to know on 
which BIN sample this patch is tested on...

As far as Peach-{pit/pi} boards are concerns, this is what I can remember:
1> 5420 (PIT) -> max recommended target frequency is 1800 MHz for A15
2> 5800 (PI)-> max recommended target frequency can go upto 2000 MHz, 
with INT rail locking.
INT rail locking schemes never made to mainline, so to be safer side 
instead of bumping the clock and voltages better to keep it at safer 
range for pit and pi, probably thats why it was kept at 1800MHz.

I am not sure if the same limitation applies to Odroid-XU3 samples.



Best regards,
Krzysztof

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Markus Reichl]

Hi Javier,

Am 16.12.2016 um 17:22 schrieb Javier Martinez Canillas:
> Hello Markus,
> 
> On 12/16/2016 06:08 AM, Markus Reichl wrote:
>> Am 16.12.2016 um 08:37 schrieb Krzysztof Kozlowski:
>>> On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:
> [ I added Arjun to Cc:, maybe he can help in explaining this issue
>   (unfortunately Inderpal's email is no longer working). ]
>
> Please also note that on Exynos5422/5800 SoCs the same ARM rail
> voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
> IOW if the problem exists it is already present in the mainline
> kernel.

 Interesting.  In the ChromeOS tree I see significantly higher voltages
 needed...  Note that one might naively look at
 .

 1362500, /* L0  2100 */
 1312500, /* L1  2000 */

 ..but, amazingly enough those voltages aren't used at all.  Surprise!

 I believe that the above numbers are actually not used and the ASV
 numbers are used instead.  See
 

 { 210,
 135, 135, 135, 135, 135,
 1337500, 1325000, 1312500, 130, 1287500,
 1275000, 1262500, 125, 1237500 },

 I believe that interpretation there is: some bins of the CPU can run
 at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.
>>>
>>> That is definitely the case. One could just look at vendors ASV table
>>> (for 1.9 GHz):
>>> { 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
>>> 120, 1187500, 1175000, 1162500, 115,
>>>  1137500, 1125000, 1112500, 1112500},
>>>
>>> The theoretical difference is up to 1.875V! From my experiments I saw
>>> BIN1 chips which should be the same... but some working on 1.2V, some on
>>> 1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
>>> does not mean that there aren't such...
>>>
 ...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
 running on a CPU from a nice bin?
>>
>> I've been running the proposed frequency/voltage combinations without any
>> stability problems on my XU4, XU3 and even XU3-lite ( I did not delete the
>> nodes on XU3-lite dts) with make -j8 kernel and ssvb-cpuburn.
>> The chips are poorly cooled, especially the XU4 and quickly step down.
>>
>>>
>>> Would be nice to see a dump of PKG_ID and AUX_INFO chipid registers
>>> along with name of tested board. Because the "Tested on XU3" is not
>>> sufficient.
>>
>> If you point me to how to read these values out, I will publish them.
>>
> 
> You can use the exynos-chipid driver posted by Pankaj. Apply patches 1 and
> 2 from this series (http://www.spinics.net/lists/arm-kernel/msg548384.html)
> and then this diff to get the values of the registers that Krzysztof asked:
> 
Thanks for the code.

XU4: [0.080039] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x1c04832a] 
AUX_INFO[0x43] 
XU3: [0.080034] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x1604832a] 
AUX_INFO[0x43] 
XU3-lite:[0.080033] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x5a12832a] 
AUX_INFO[0x1354] 

Servus,
--
Markus Reichl

> diff --git a/drivers/soc/samsung/exynos-chipid.c 
> b/drivers/soc/samsung/exynos-chipid.c
> index cf0128b18ee2..49fa76ec6d49 100644
> --- a/drivers/soc/samsung/exynos-chipid.c
> +++ b/drivers/soc/samsung/exynos-chipid.c
> @@ -22,6 +22,9 @@
>  #define EXYNOS_MAINREV_MASK  (0xF << 0)
>  #define EXYNOS_REV_MASK  (EXYNOS_SUBREV_MASK | 
> EXYNOS_MAINREV_MASK)
>  
> +#define EXYNOS_PKG_ID0x04
> +#define EXYNOS_AUX_INFO  0x1C
> +
>  static const struct exynos_soc_id {
>   const char *name;
>   unsigned int id;
> @@ -71,6 +74,8 @@ int __init exynos_chipid_early_init(void)
>   const struct of_device_id *match;
>   u32 product_id;
>   u32 revision;
> + u32 pkg_id;
> + u32 aux_info;
>  
>   np = of_find_matching_node_and_match(NULL,
>   of_exynos_chipid_ids, &match);
> @@ -84,6 +89,8 @@ int __init exynos_chipid_early_init(void)
>  
>   product_id  = readl_relaxed(exynos_chipid_base);
>   revision = product_id & EXYNOS_REV_MASK;
> + pkg_id = readl_relaxed(exynos_chipid_base + EXYNOS_PKG_ID);
> + aux_info = readl_relaxed(exynos_chipid_base + EXYNOS_AUX_INFO);
>   iounmap(exynos_chipid_base);
>  
>   soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> @@ -100,8 +107,8 @@ int __init exynos_chipid_early_init(void)
>   soc_dev_attr->soc_id = product_id_to_soc_id(product_id);
>  
>  
> - pr_info("Exynos: CPU[%s] CPU_REV[0x%x] Detected\n",
> - product_id_to_soc_id(product_id), revision);
> + pr_info("Exynos: CPU[%s] CPU_R

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Anand Moon]

Hi Markus,

On 16 December 2016 at 14:38, Markus Reichl  wrote:
> Am 16.12.2016 um 08:37 schrieb Krzysztof Kozlowski:
>> On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:
 [ I added Arjun to Cc:, maybe he can help in explaining this issue
   (unfortunately Inderpal's email is no longer working). ]

 Please also note that on Exynos5422/5800 SoCs the same ARM rail
 voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
 IOW if the problem exists it is already present in the mainline
 kernel.
>>>
>>> Interesting.  In the ChromeOS tree I see significantly higher voltages
>>> needed...  Note that one might naively look at
>>> .
>>>
>>> 1362500, /* L0  2100 */
>>> 1312500, /* L1  2000 */
>>>
>>> ..but, amazingly enough those voltages aren't used at all.  Surprise!
>>>
>>> I believe that the above numbers are actually not used and the ASV
>>> numbers are used instead.  See
>>> 
>>>
>>> { 210,
>>> 135, 135, 135, 135, 135,
>>> 1337500, 1325000, 1312500, 130, 1287500,
>>> 1275000, 1262500, 125, 1237500 },
>>>
>>> I believe that interpretation there is: some bins of the CPU can run
>>> at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.
>>
>> That is definitely the case. One could just look at vendors ASV table
>> (for 1.9 GHz):
>> { 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
>> 120, 1187500, 1175000, 1162500, 115,
>>1137500, 1125000, 1112500, 1112500},
>>
>> The theoretical difference is up to 1.875V! From my experiments I saw
>> BIN1 chips which should be the same... but some working on 1.2V, some on
>> 1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
>> does not mean that there aren't such...
>>
>>> ...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
>>> running on a CPU from a nice bin?
>
> I've been running the proposed frequency/voltage combinations without any
> stability problems on my XU4, XU3 and even XU3-lite ( I did not delete the
> nodes on XU3-lite dts) with make -j8 kernel and ssvb-cpuburn.
> The chips are poorly cooled, especially the XU4 and quickly step down.

[snip]

As per my knowlegde Odroid XU3/4 can throttle at much high temperature.

https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/drivers/thermal/exynos_thermal.c#L1629

The device tree binding for thermal-zone is kept bit low alert
temperature values
in-order to avoid reaches critical temperature and board shutdown
when compiling the source code. We need t fix this thermal-zone

Their could be some race in thermal or the step wise governor for
exynos is not working correctly.

Better option is to print the cpufreq for cpu0 and cpu4 and respective temp
and plot a graph along timeline. It will give us clear idea on how much
time is spend on high frequency on stress testing.

#!/bin/bash
t=0
while true :
do
 a=`cat /sys/devices/virtual/thermal/thermal_zone0/temp`
 b=`cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq`
 c=`cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq`
 d=`cat /sys/devices/system/cpu/cpu4/cpufreq/scaling_cur_freq`
 e=`cat /sys/devices/system/cpu/cpu4/cpufreq/cpuinfo_cur_freq`
 (( t += 5 ))
 echo $t,$a,$b,$d,$e
 sleep 1
done

Best Regards
-Anand Moon

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Javier Martinez Canillas]

Hello Markus,

On 12/16/2016 06:08 AM, Markus Reichl wrote:
> Am 16.12.2016 um 08:37 schrieb Krzysztof Kozlowski:
>> On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:
 [ I added Arjun to Cc:, maybe he can help in explaining this issue
   (unfortunately Inderpal's email is no longer working). ]

 Please also note that on Exynos5422/5800 SoCs the same ARM rail
 voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
 IOW if the problem exists it is already present in the mainline
 kernel.
>>>
>>> Interesting.  In the ChromeOS tree I see significantly higher voltages
>>> needed...  Note that one might naively look at
>>> .
>>>
>>> 1362500, /* L0  2100 */
>>> 1312500, /* L1  2000 */
>>>
>>> ..but, amazingly enough those voltages aren't used at all.  Surprise!
>>>
>>> I believe that the above numbers are actually not used and the ASV
>>> numbers are used instead.  See
>>> 
>>>
>>> { 210,
>>> 135, 135, 135, 135, 135,
>>> 1337500, 1325000, 1312500, 130, 1287500,
>>> 1275000, 1262500, 125, 1237500 },
>>>
>>> I believe that interpretation there is: some bins of the CPU can run
>>> at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.
>>
>> That is definitely the case. One could just look at vendors ASV table
>> (for 1.9 GHz):
>> { 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
>> 120, 1187500, 1175000, 1162500, 115,
>>   1137500, 1125000, 1112500, 1112500},
>>
>> The theoretical difference is up to 1.875V! From my experiments I saw
>> BIN1 chips which should be the same... but some working on 1.2V, some on
>> 1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
>> does not mean that there aren't such...
>>
>>> ...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
>>> running on a CPU from a nice bin?
> 
> I've been running the proposed frequency/voltage combinations without any
> stability problems on my XU4, XU3 and even XU3-lite ( I did not delete the
> nodes on XU3-lite dts) with make -j8 kernel and ssvb-cpuburn.
> The chips are poorly cooled, especially the XU4 and quickly step down.
> 
>>
>> Would be nice to see a dump of PKG_ID and AUX_INFO chipid registers
>> along with name of tested board. Because the "Tested on XU3" is not
>> sufficient.
> 
> If you point me to how to read these values out, I will publish them.
>

You can use the exynos-chipid driver posted by Pankaj. Apply patches 1 and
2 from this series (http://www.spinics.net/lists/arm-kernel/msg548384.html)
and then this diff to get the values of the registers that Krzysztof asked:

diff --git a/drivers/soc/samsung/exynos-chipid.c 
b/drivers/soc/samsung/exynos-chipid.c
index cf0128b18ee2..49fa76ec6d49 100644
--- a/drivers/soc/samsung/exynos-chipid.c
+++ b/drivers/soc/samsung/exynos-chipid.c
@@ -22,6 +22,9 @@
 #define EXYNOS_MAINREV_MASK(0xF << 0)
 #define EXYNOS_REV_MASK(EXYNOS_SUBREV_MASK | 
EXYNOS_MAINREV_MASK)
 
+#define EXYNOS_PKG_ID  0x04
+#define EXYNOS_AUX_INFO0x1C
+
 static const struct exynos_soc_id {
const char *name;
unsigned int id;
@@ -71,6 +74,8 @@ int __init exynos_chipid_early_init(void)
const struct of_device_id *match;
u32 product_id;
u32 revision;
+   u32 pkg_id;
+   u32 aux_info;
 
np = of_find_matching_node_and_match(NULL,
of_exynos_chipid_ids, &match);
@@ -84,6 +89,8 @@ int __init exynos_chipid_early_init(void)
 
product_id  = readl_relaxed(exynos_chipid_base);
revision = product_id & EXYNOS_REV_MASK;
+   pkg_id = readl_relaxed(exynos_chipid_base + EXYNOS_PKG_ID);
+   aux_info = readl_relaxed(exynos_chipid_base + EXYNOS_AUX_INFO);
iounmap(exynos_chipid_base);
 
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
@@ -100,8 +107,8 @@ int __init exynos_chipid_early_init(void)
soc_dev_attr->soc_id = product_id_to_soc_id(product_id);
 
 
-   pr_info("Exynos: CPU[%s] CPU_REV[0x%x] Detected\n",
-   product_id_to_soc_id(product_id), revision);
+   pr_info("Exynos: CPU[%s] CPU_REV[0x%x] PKG_ID[0x%x] AUX_INFO[0x%x] \n",
+   product_id_to_soc_id(product_id), revision, pkg_id, aux_info);
 
soc_dev = soc_device_register(soc_dev_attr);
if (IS_ERR(soc_dev)) {

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Markus Reichl]

Am 16.12.2016 um 08:37 schrieb Krzysztof Kozlowski:
> On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:
>>> [ I added Arjun to Cc:, maybe he can help in explaining this issue
>>>   (unfortunately Inderpal's email is no longer working). ]
>>>
>>> Please also note that on Exynos5422/5800 SoCs the same ARM rail
>>> voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
>>> IOW if the problem exists it is already present in the mainline
>>> kernel.
>>
>> Interesting.  In the ChromeOS tree I see significantly higher voltages
>> needed...  Note that one might naively look at
>> .
>>
>> 1362500, /* L0  2100 */
>> 1312500, /* L1  2000 */
>>
>> ..but, amazingly enough those voltages aren't used at all.  Surprise!
>>
>> I believe that the above numbers are actually not used and the ASV
>> numbers are used instead.  See
>> 
>>
>> { 210,
>> 135, 135, 135, 135, 135,
>> 1337500, 1325000, 1312500, 130, 1287500,
>> 1275000, 1262500, 125, 1237500 },
>>
>> I believe that interpretation there is: some bins of the CPU can run
>> at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.
> 
> That is definitely the case. One could just look at vendors ASV table
> (for 1.9 GHz):
> { 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
> 120, 1187500, 1175000, 1162500, 115,
>1137500, 1125000, 1112500, 1112500},
> 
> The theoretical difference is up to 1.875V! From my experiments I saw
> BIN1 chips which should be the same... but some working on 1.2V, some on
> 1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
> does not mean that there aren't such...
> 
>> ...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
>> running on a CPU from a nice bin?

I've been running the proposed frequency/voltage combinations without any
stability problems on my XU4, XU3 and even XU3-lite ( I did not delete the
nodes on XU3-lite dts) with make -j8 kernel and ssvb-cpuburn.
The chips are poorly cooled, especially the XU4 and quickly step down.

> 
> Would be nice to see a dump of PKG_ID and AUX_INFO chipid registers
> along with name of tested board. Because the "Tested on XU3" is not
> sufficient.

If you point me to how to read these values out, I will publish them.

> 
> Best regards,
> Krzysztof
--
Markus Reichl

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Krzysztof Kozlowski]

On Thu, Dec 15, 2016 at 04:52:58PM -0800, Doug Anderson wrote:
> > [ I added Arjun to Cc:, maybe he can help in explaining this issue
> >   (unfortunately Inderpal's email is no longer working). ]
> >
> > Please also note that on Exynos5422/5800 SoCs the same ARM rail
> > voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
> > IOW if the problem exists it is already present in the mainline
> > kernel.
> 
> Interesting.  In the ChromeOS tree I see significantly higher voltages
> needed...  Note that one might naively look at
> .
> 
> 1362500, /* L0  2100 */
> 1312500, /* L1  2000 */
> 
> ..but, amazingly enough those voltages aren't used at all.  Surprise!
> 
> I believe that the above numbers are actually not used and the ASV
> numbers are used instead.  See
> 
> 
> { 210,
> 135, 135, 135, 135, 135,
> 1337500, 1325000, 1312500, 130, 1287500,
> 1275000, 1262500, 125, 1237500 },
> 
> I believe that interpretation there is: some bins of the CPU can run
> at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.

That is definitely the case. One could just look at vendors ASV table
(for 1.9 GHz):
{ 190, 130, 1287500, 1262500, 1237500, 1225000, 1212500,
120, 1187500, 1175000, 1162500, 115,
 1137500, 1125000, 1112500, 1112500},

The theoretical difference is up to 1.875V! From my experiments I saw
BIN1 chips which should be the same... but some working on 1.2V, some on
1.225V (@1.9 GHz). I didn't see any requiring higher voltages but that
does not mean that there aren't such...

> ...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
> running on a CPU from a nice bin?

Would be nice to see a dump of PKG_ID and AUX_INFO chipid registers
along with name of tested board. Because the "Tested on XU3" is not
sufficient.

Best regards,
Krzysztof

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Doug Anderson]

Hi,

On Wed, Dec 14, 2016 at 5:28 AM, Bartlomiej Zolnierkiewicz
 wrote:
>
> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
>> Hello Bartlomiej,
>
> Hi,
>
>> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
>> > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
>> > (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
>> > cooling maps to account for new OPPs.
>> >
>> > Since new OPPs are not available on all Exynos5422/5800 boards modify
>> > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
>> > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>> >
>> > Tested on Odroid-XU3 and XU3 Lite.
>> >
>> > Cc: Doug Anderson 
>> > Cc: Javier Martinez Canillas 
>> > Cc: Andreas Faerber 
>> > Cc: Thomas Abraham 
>> > Cc: Ben Gamari 
>> > Signed-off-by: Bartlomiej Zolnierkiewicz 
>> > ---
>> >  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
>> >  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 
>> > +
>> >  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
>> >  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
>> >  4 files changed, 43 insertions(+), 7 deletions(-)
>> >
>> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> > ===
>> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
>> > 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
>> > 15:59:33.775763261 +0100
>> > @@ -118,7 +118,7 @@
>> > /*
>> >  * When reaching cpu_alert3, reduce CPU
>> >  * by 2 steps. On Exynos5422/5800 that would
>> > -* be: 1600 MHz and 1100 MHz.
>> > +* (usually) be: 1800 MHz and 1200 MHz.
>> >  */
>> > map3 {
>> > trip = <&cpu_alert3>;
>> > @@ -131,16 +131,16 @@
>> >
>> > /*
>> >  * When reaching cpu_alert4, reduce CPU
>> > -* further, down to 600 MHz (11 steps for big,
>> > -* 7 steps for LITTLE).
>> > +* further, down to 600 MHz (13 steps for big,
>> > +* 8 steps for LITTLE).
>> >  */
>> > -   map5 {
>> > +   cooling_map5: map5 {
>> > trip = <&cpu_alert4>;
>> > -   cooling-device = <&cpu0 3 7>;
>> > +   cooling-device = <&cpu0 3 8>;
>> > };
>> > -   map6 {
>> > +   cooling_map6: map6 {
>> > trip = <&cpu_alert4>;
>> > -   cooling-device = <&cpu4 3 11>;
>> > +   cooling-device = <&cpu4 3 13>;
>> > };
>> > };
>> > };
>> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
>> > ===
>> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>> > 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>> > 15:59:33.775763261 +0100
>> > @@ -21,6 +21,23 @@
>> > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
>> > "samsung,exynos5";
>> >  };
>> >
>> > +&cluster_a15_opp_table {
>> > +   /delete-node/opp@20;
>> > +   /delete-node/opp@19;
>> > +};
>> > +
>> > +&cluster_a7_opp_table {
>> > +   /delete-node/opp@14;
>> > +};
>> > +
>>
>> I think that a comment in the DTS why these operating points aren't available
>> in this board will make more clear why the nodes are being deleted.
>
> Ok, I will add these comments in the next patch revision.
>
>> > +&cooling_map5 {
>> > +   cooling-device = <&cpu0 3 7>;
>> > +};
>> > +
>> > +&cooling_map6 {
>> > +   cooling-device = <&cpu4 3 11>;
>> > +};
>> > +
>> >  &pwm {
>> > /*
>> >  * PWM 0 -- fan
>> > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> > ===
>> > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
>> > 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
>> > 15:59:33.779763261 +0100
>> > @@ -146,6 +146,10 @@
>> > vdd-supply = <&ldo9_reg>;
>> >  };
>> >
>> > +&cluster_a7_opp_table {
>> > +   /delete-property/opp@14;
>> > +};
>> > +
>> >  &cpu0 {
>> > cpu-supply = <&buck2_reg>;
>> >  };
>> > Index: b/arch/arm/boot/dts/exynos5800.dtsi
>> > ===

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Krzysztof Kozlowski]

On Tue, Dec 13, 2016 at 04:18:05PM -0300, Javier Martinez Canillas wrote:
> Hello Bartlomiej,
> 
> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> > (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> > cooling maps to account for new OPPs.
> > 
> > Since new OPPs are not available on all Exynos5422/5800 boards modify
> > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
> > 
> > Tested on Odroid-XU3 and XU3 Lite.
> > 
> > Cc: Doug Anderson 
> > Cc: Javier Martinez Canillas 
> > Cc: Andreas Faerber 
> > Cc: Thomas Abraham 
> > Cc: Ben Gamari 
> > Signed-off-by: Bartlomiej Zolnierkiewicz 
> > ---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 +
> >  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
> >  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
> >  4 files changed, 43 insertions(+), 7 deletions(-)
> > 
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
> > 15:59:33.775763261 +0100
> > @@ -118,7 +118,7 @@
> > /*
> >  * When reaching cpu_alert3, reduce CPU
> >  * by 2 steps. On Exynos5422/5800 that would
> > -* be: 1600 MHz and 1100 MHz.
> > +* (usually) be: 1800 MHz and 1200 MHz.
> >  */
> > map3 {
> > trip = <&cpu_alert3>;
> > @@ -131,16 +131,16 @@
> >  
> > /*
> >  * When reaching cpu_alert4, reduce CPU
> > -* further, down to 600 MHz (11 steps for big,
> > -* 7 steps for LITTLE).
> > +* further, down to 600 MHz (13 steps for big,
> > +* 8 steps for LITTLE).
> >  */
> > -   map5 {
> > +   cooling_map5: map5 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu0 3 7>;
> > +   cooling-device = <&cpu0 3 8>;
> > };
> > -   map6 {
> > +   cooling_map6: map6 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu4 3 11>;
> > +   cooling-device = <&cpu4 3 13>;
> > };
> > };
> > };
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.775763261 +0100
> > @@ -21,6 +21,23 @@
> > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
> > "samsung,exynos5";
> >  };
> >  
> > +&cluster_a15_opp_table {
> > +   /delete-node/opp@20;
> > +   /delete-node/opp@19;
> > +};
> > +
> > +&cluster_a7_opp_table {
> > +   /delete-node/opp@14;
> > +};
> > +
> 
> I think that a comment in the DTS why these operating points aren't available
> in this board will make more clear why the nodes are being deleted.
> 
> > +&cooling_map5 {
> > +   cooling-device = <&cpu0 3 7>;
> > +};
> > +
> > +&cooling_map6 {
> > +   cooling-device = <&cpu4 3 11>;
> > +};
> > +
> >  &pwm {
> > /*
> >  * PWM 0 -- fan
> > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> > ===
> > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
> > 15:59:33.779763261 +0100
> > @@ -146,6 +146,10 @@
> > vdd-supply = <&ldo9_reg>;
> >  };
> >  
> > +&cluster_a7_opp_table {
> > +   /delete-property/opp@14;
> > +};
> > +
> >  &cpu0 {
> > cpu-supply = <&buck2_reg>;
> >  };
> > Index: b/arch/arm/boot/dts/exynos5800.dtsi
> > ===
> > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 
> > +0100
> > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 
> > +0100
> > @@ -24,6 +24,16 @@
> >  

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Javier Martinez Canillas]

Hello Bartlomiej,

On 12/14/2016 01:10 PM, Bartlomiej Zolnierkiewicz wrote:
> 
> Hi,
> 
> On Wednesday, December 14, 2016 11:40:08 AM Javier Martinez Canillas wrote:
>> Hello Bartlomiej,
>>
>> On 12/14/2016 11:25 AM, Bartlomiej Zolnierkiewicz wrote:
>>>
>>> Hi,
>>>
>>> On Wednesday, December 14, 2016 11:06:45 AM Javier Martinez Canillas wrote:

 Hello Bartlomiej,

 On 12/14/2016 10:28 AM, Bartlomiej Zolnierkiewicz wrote:
>
> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
>> Hello Bartlomiej,
>
> Hi,
>
>> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
>>> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
>>> (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
>>> cooling maps to account for new OPPs.
>>>
>>> Since new OPPs are not available on all Exynos5422/5800 boards modify
>>> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
>>> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>>>
>>> Tested on Odroid-XU3 and XU3 Lite.
>>>
>>> Cc: Doug Anderson 
>>> Cc: Javier Martinez Canillas 
>>> Cc: Andreas Faerber 
>>> Cc: Thomas Abraham 
>>> Cc: Ben Gamari 
>>> Signed-off-by: Bartlomiej Zolnierkiewicz 
>>> ---
>>>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 
>>> +++---
>>>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 
>>> +
>>>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
>>>  arch/arm/boot/dts/exynos5800.dtsi  |   15 
>>> +++
>>>  4 files changed, 43 insertions(+), 7 deletions(-)
>>>
>>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> 2016-12-13 15:59:33.779763261 +0100
>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> 2016-12-13 15:59:33.775763261 +0100
>>> @@ -118,7 +118,7 @@
>>> /*
>>>  * When reaching cpu_alert3, reduce CPU
>>>  * by 2 steps. On Exynos5422/5800 that 
>>> would
>>> -* be: 1600 MHz and 1100 MHz.
>>> +* (usually) be: 1800 MHz and 1200 MHz.
>>>  */
>>> map3 {
>>> trip = <&cpu_alert3>;
>>> @@ -131,16 +131,16 @@
>>>  
>>> /*
>>>  * When reaching cpu_alert4, reduce CPU
>>> -* further, down to 600 MHz (11 steps 
>>> for big,
>>> -* 7 steps for LITTLE).
>>> +* further, down to 600 MHz (13 steps 
>>> for big,
>>> +* 8 steps for LITTLE).
>>>  */
>>> -   map5 {
>>> +   cooling_map5: map5 {
>>> trip = <&cpu_alert4>;
>>> -   cooling-device = <&cpu0 3 7>;
>>> +   cooling-device = <&cpu0 3 8>;
>>> };
>>> -   map6 {
>>> +   cooling_map6: map6 {
>>> trip = <&cpu_alert4>;
>>> -   cooling-device = <&cpu4 3 11>;
>>> +   cooling-device = <&cpu4 3 13>;
>>> };
>>> };
>>> };
>>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>>> 15:59:33.779763261 +0100
>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>>> 15:59:33.775763261 +0100
>>> @@ -21,6 +21,23 @@
>>> compatible = "hardkernel,odroid-xu3-lite", 
>>> "samsung,exynos5800", "samsung,exynos5";
>>>  };
>>>  
>>> +&cluster_a15_opp_table {
>>> +   /delete-node/opp@20;
>>> +   /delete-node/opp@19;
>>> +};
>>> +
>>> +&cluster_a7_opp_table {
>>> +   /delete-node/opp@14;
>>> +};
>>> +
>>
>> I think that a comment in the DTS why these operating points aren't 
>> available
>> in this board will make more clear why the nodes are being deleted.
>
> Ok, I will add these comments in t

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Bartlomiej Zolnierkiewicz]

Hi,

On Wednesday, December 14, 2016 11:40:08 AM Javier Martinez Canillas wrote:
> Hello Bartlomiej,
> 
> On 12/14/2016 11:25 AM, Bartlomiej Zolnierkiewicz wrote:
> > 
> > Hi,
> > 
> > On Wednesday, December 14, 2016 11:06:45 AM Javier Martinez Canillas wrote:
> >>
> >> Hello Bartlomiej,
> >>
> >> On 12/14/2016 10:28 AM, Bartlomiej Zolnierkiewicz wrote:
> >>>
> >>> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
>  Hello Bartlomiej,
> >>>
> >>> Hi,
> >>>
>  On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> > (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> > cooling maps to account for new OPPs.
> >
> > Since new OPPs are not available on all Exynos5422/5800 boards modify
> > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
> >
> > Tested on Odroid-XU3 and XU3 Lite.
> >
> > Cc: Doug Anderson 
> > Cc: Javier Martinez Canillas 
> > Cc: Andreas Faerber 
> > Cc: Thomas Abraham 
> > Cc: Ben Gamari 
> > Signed-off-by: Bartlomiej Zolnierkiewicz 
> > ---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 
> > +++---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 
> > +
> >  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
> >  arch/arm/boot/dts/exynos5800.dtsi  |   15 
> > +++
> >  4 files changed, 43 insertions(+), 7 deletions(-)
> >
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> > 2016-12-13 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> > 2016-12-13 15:59:33.775763261 +0100
> > @@ -118,7 +118,7 @@
> > /*
> >  * When reaching cpu_alert3, reduce CPU
> >  * by 2 steps. On Exynos5422/5800 that 
> > would
> > -* be: 1600 MHz and 1100 MHz.
> > +* (usually) be: 1800 MHz and 1200 MHz.
> >  */
> > map3 {
> > trip = <&cpu_alert3>;
> > @@ -131,16 +131,16 @@
> >  
> > /*
> >  * When reaching cpu_alert4, reduce CPU
> > -* further, down to 600 MHz (11 steps 
> > for big,
> > -* 7 steps for LITTLE).
> > +* further, down to 600 MHz (13 steps 
> > for big,
> > +* 8 steps for LITTLE).
> >  */
> > -   map5 {
> > +   cooling_map5: map5 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu0 3 7>;
> > +   cooling-device = <&cpu0 3 8>;
> > };
> > -   map6 {
> > +   cooling_map6: map6 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu4 3 11>;
> > +   cooling-device = <&cpu4 3 13>;
> > };
> > };
> > };
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.775763261 +0100
> > @@ -21,6 +21,23 @@
> > compatible = "hardkernel,odroid-xu3-lite", 
> > "samsung,exynos5800", "samsung,exynos5";
> >  };
> >  
> > +&cluster_a15_opp_table {
> > +   /delete-node/opp@20;
> > +   /delete-node/opp@19;
> > +};
> > +
> > +&cluster_a7_opp_table {
> > +   /delete-node/opp@14;
> > +};
> > +
> 
>  I think that a comment in the DTS why these operating points aren't 
>  available
>  in this board will make more clear why the nodes are being deleted.
> >>>
> >>> Ok, I will add these comments in the next patch revision.
> >>>
> > +&cooling_map5 {
> > +   cooling-devic

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Javier Martinez Canillas]

Hello Bartlomiej,

On 12/14/2016 11:25 AM, Bartlomiej Zolnierkiewicz wrote:
> 
> Hi,
> 
> On Wednesday, December 14, 2016 11:06:45 AM Javier Martinez Canillas wrote:
>>
>> Hello Bartlomiej,
>>
>> On 12/14/2016 10:28 AM, Bartlomiej Zolnierkiewicz wrote:
>>>
>>> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
 Hello Bartlomiej,
>>>
>>> Hi,
>>>
 On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> cooling maps to account for new OPPs.
>
> Since new OPPs are not available on all Exynos5422/5800 boards modify
> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>
> Tested on Odroid-XU3 and XU3 Lite.
>
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Cc: Thomas Abraham 
> Cc: Ben Gamari 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 
> +
>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
>  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
>  4 files changed, 43 insertions(+), 7 deletions(-)
>
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> ===
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> 15:59:33.775763261 +0100
> @@ -118,7 +118,7 @@
>   /*
>* When reaching cpu_alert3, reduce CPU
>* by 2 steps. On Exynos5422/5800 that would
> -  * be: 1600 MHz and 1100 MHz.
> +  * (usually) be: 1800 MHz and 1200 MHz.
>*/
>   map3 {
>   trip = <&cpu_alert3>;
> @@ -131,16 +131,16 @@
>  
>   /*
>* When reaching cpu_alert4, reduce CPU
> -  * further, down to 600 MHz (11 steps for big,
> -  * 7 steps for LITTLE).
> +  * further, down to 600 MHz (13 steps for big,
> +  * 8 steps for LITTLE).
>*/
> - map5 {
> + cooling_map5: map5 {
>   trip = <&cpu_alert4>;
> - cooling-device = <&cpu0 3 7>;
> + cooling-device = <&cpu0 3 8>;
>   };
> - map6 {
> + cooling_map6: map6 {
>   trip = <&cpu_alert4>;
> - cooling-device = <&cpu4 3 11>;
> + cooling-device = <&cpu4 3 13>;
>   };
>   };
>   };
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> ===
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> 15:59:33.775763261 +0100
> @@ -21,6 +21,23 @@
>   compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
> "samsung,exynos5";
>  };
>  
> +&cluster_a15_opp_table {
> + /delete-node/opp@20;
> + /delete-node/opp@19;
> +};
> +
> +&cluster_a7_opp_table {
> + /delete-node/opp@14;
> +};
> +

 I think that a comment in the DTS why these operating points aren't 
 available
 in this board will make more clear why the nodes are being deleted.
>>>
>>> Ok, I will add these comments in the next patch revision.
>>>
> +&cooling_map5 {
> + cooling-device = <&cpu0 3 7>;
> +};
> +
> +&cooling_map6 {
> + cooling-device = <&cpu4 3 11>;
> +};
> +
>  &pwm {
>   /*
>* PWM 0 -- fan
> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> ===
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> 15:59:33.779763261 +0100
> @@ -146,6 +146,10 @@
>   vdd-supply = <&ldo9_reg>;
>>>

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Bartlomiej Zolnierkiewicz]

Hi,

On Wednesday, December 14, 2016 11:06:45 AM Javier Martinez Canillas wrote:
> 
> Hello Bartlomiej,
> 
> On 12/14/2016 10:28 AM, Bartlomiej Zolnierkiewicz wrote:
> > 
> > On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
> >> Hello Bartlomiej,
> > 
> > Hi,
> > 
> >> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> >>> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> >>> (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> >>> cooling maps to account for new OPPs.
> >>>
> >>> Since new OPPs are not available on all Exynos5422/5800 boards modify
> >>> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> >>> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
> >>>
> >>> Tested on Odroid-XU3 and XU3 Lite.
> >>>
> >>> Cc: Doug Anderson 
> >>> Cc: Javier Martinez Canillas 
> >>> Cc: Andreas Faerber 
> >>> Cc: Thomas Abraham 
> >>> Cc: Ben Gamari 
> >>> Signed-off-by: Bartlomiej Zolnierkiewicz 
> >>> ---
> >>>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
> >>>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 
> >>> +
> >>>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
> >>>  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
> >>>  4 files changed, 43 insertions(+), 7 deletions(-)
> >>>
> >>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> >>> ===
> >>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> >>> 15:59:33.779763261 +0100
> >>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> >>> 15:59:33.775763261 +0100
> >>> @@ -118,7 +118,7 @@
> >>>   /*
> >>>* When reaching cpu_alert3, reduce CPU
> >>>* by 2 steps. On Exynos5422/5800 that would
> >>> -  * be: 1600 MHz and 1100 MHz.
> >>> +  * (usually) be: 1800 MHz and 1200 MHz.
> >>>*/
> >>>   map3 {
> >>>   trip = <&cpu_alert3>;
> >>> @@ -131,16 +131,16 @@
> >>>  
> >>>   /*
> >>>* When reaching cpu_alert4, reduce CPU
> >>> -  * further, down to 600 MHz (11 steps for big,
> >>> -  * 7 steps for LITTLE).
> >>> +  * further, down to 600 MHz (13 steps for big,
> >>> +  * 8 steps for LITTLE).
> >>>*/
> >>> - map5 {
> >>> + cooling_map5: map5 {
> >>>   trip = <&cpu_alert4>;
> >>> - cooling-device = <&cpu0 3 7>;
> >>> + cooling-device = <&cpu0 3 8>;
> >>>   };
> >>> - map6 {
> >>> + cooling_map6: map6 {
> >>>   trip = <&cpu_alert4>;
> >>> - cooling-device = <&cpu4 3 11>;
> >>> + cooling-device = <&cpu4 3 13>;
> >>>   };
> >>>   };
> >>>   };
> >>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> >>> ===
> >>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> >>> 15:59:33.779763261 +0100
> >>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> >>> 15:59:33.775763261 +0100
> >>> @@ -21,6 +21,23 @@
> >>>   compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
> >>> "samsung,exynos5";
> >>>  };
> >>>  
> >>> +&cluster_a15_opp_table {
> >>> + /delete-node/opp@20;
> >>> + /delete-node/opp@19;
> >>> +};
> >>> +
> >>> +&cluster_a7_opp_table {
> >>> + /delete-node/opp@14;
> >>> +};
> >>> +
> >>
> >> I think that a comment in the DTS why these operating points aren't 
> >> available
> >> in this board will make more clear why the nodes are being deleted.
> > 
> > Ok, I will add these comments in the next patch revision.
> > 
> >>> +&cooling_map5 {
> >>> + cooling-device = <&cpu0 3 7>;
> >>> +};
> >>> +
> >>> +&cooling_map6 {
> >>> + cooling-device = <&cpu4 3 11>;
> >>> +};
> >>> +
> >>>  &pwm {
> >>>   /*
> >>>* PWM 0 -- fan
> >>> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> >>> ===
> >>> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> >>> 15:59:33.779763261 +0100
> >>> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> >>> 15:59:33.779763261 +0100
> >>> @@ -146,6 +146,10 @@
> >>>   vdd-supply = <&ldo9_reg>;
> >>>  };
> >>>  
> >>> +&cluster_a7_opp_table {
> >>> + /delete-property/opp@14

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Javier Martinez Canillas]

Hello Bartlomiej,

On 12/14/2016 10:28 AM, Bartlomiej Zolnierkiewicz wrote:
> 
> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
>> Hello Bartlomiej,
> 
> Hi,
> 
>> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
>>> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
>>> (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
>>> cooling maps to account for new OPPs.
>>>
>>> Since new OPPs are not available on all Exynos5422/5800 boards modify
>>> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
>>> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>>>
>>> Tested on Odroid-XU3 and XU3 Lite.
>>>
>>> Cc: Doug Anderson 
>>> Cc: Javier Martinez Canillas 
>>> Cc: Andreas Faerber 
>>> Cc: Thomas Abraham 
>>> Cc: Ben Gamari 
>>> Signed-off-by: Bartlomiej Zolnierkiewicz 
>>> ---
>>>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
>>>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 +
>>>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
>>>  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
>>>  4 files changed, 43 insertions(+), 7 deletions(-)
>>>
>>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
>>> 15:59:33.779763261 +0100
>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
>>> 15:59:33.775763261 +0100
>>> @@ -118,7 +118,7 @@
>>> /*
>>>  * When reaching cpu_alert3, reduce CPU
>>>  * by 2 steps. On Exynos5422/5800 that would
>>> -* be: 1600 MHz and 1100 MHz.
>>> +* (usually) be: 1800 MHz and 1200 MHz.
>>>  */
>>> map3 {
>>> trip = <&cpu_alert3>;
>>> @@ -131,16 +131,16 @@
>>>  
>>> /*
>>>  * When reaching cpu_alert4, reduce CPU
>>> -* further, down to 600 MHz (11 steps for big,
>>> -* 7 steps for LITTLE).
>>> +* further, down to 600 MHz (13 steps for big,
>>> +* 8 steps for LITTLE).
>>>  */
>>> -   map5 {
>>> +   cooling_map5: map5 {
>>> trip = <&cpu_alert4>;
>>> -   cooling-device = <&cpu0 3 7>;
>>> +   cooling-device = <&cpu0 3 8>;
>>> };
>>> -   map6 {
>>> +   cooling_map6: map6 {
>>> trip = <&cpu_alert4>;
>>> -   cooling-device = <&cpu4 3 11>;
>>> +   cooling-device = <&cpu4 3 13>;
>>> };
>>> };
>>> };
>>> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>>> 15:59:33.779763261 +0100
>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
>>> 15:59:33.775763261 +0100
>>> @@ -21,6 +21,23 @@
>>> compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
>>> "samsung,exynos5";
>>>  };
>>>  
>>> +&cluster_a15_opp_table {
>>> +   /delete-node/opp@20;
>>> +   /delete-node/opp@19;
>>> +};
>>> +
>>> +&cluster_a7_opp_table {
>>> +   /delete-node/opp@14;
>>> +};
>>> +
>>
>> I think that a comment in the DTS why these operating points aren't available
>> in this board will make more clear why the nodes are being deleted.
> 
> Ok, I will add these comments in the next patch revision.
> 
>>> +&cooling_map5 {
>>> +   cooling-device = <&cpu0 3 7>;
>>> +};
>>> +
>>> +&cooling_map6 {
>>> +   cooling-device = <&cpu4 3 11>;
>>> +};
>>> +
>>>  &pwm {
>>> /*
>>>  * PWM 0 -- fan
>>> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
>>> 15:59:33.779763261 +0100
>>> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
>>> 15:59:33.779763261 +0100
>>> @@ -146,6 +146,10 @@
>>> vdd-supply = <&ldo9_reg>;
>>>  };
>>>  
>>> +&cluster_a7_opp_table {
>>> +   /delete-property/opp@14;
>>> +};
>>> +
>>>  &cpu0 {
>>> cpu-supply = <&buck2_reg>;
>>>  };
>>> Index: b/arch/arm/boot/dts/exynos5800.dtsi
>>> ===
>>> --- a/arch/arm/boot/dts/exynos5800.dtsi 2016

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Bartlomiej Zolnierkiewicz]

On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
> Hello Bartlomiej,

Hi,

> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> > (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> > cooling maps to account for new OPPs.
> > 
> > Since new OPPs are not available on all Exynos5422/5800 boards modify
> > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
> > 
> > Tested on Odroid-XU3 and XU3 Lite.
> > 
> > Cc: Doug Anderson 
> > Cc: Javier Martinez Canillas 
> > Cc: Andreas Faerber 
> > Cc: Thomas Abraham 
> > Cc: Ben Gamari 
> > Signed-off-by: Bartlomiej Zolnierkiewicz 
> > ---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
> >  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 +
> >  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
> >  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
> >  4 files changed, 43 insertions(+), 7 deletions(-)
> > 
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
> > 15:59:33.775763261 +0100
> > @@ -118,7 +118,7 @@
> > /*
> >  * When reaching cpu_alert3, reduce CPU
> >  * by 2 steps. On Exynos5422/5800 that would
> > -* be: 1600 MHz and 1100 MHz.
> > +* (usually) be: 1800 MHz and 1200 MHz.
> >  */
> > map3 {
> > trip = <&cpu_alert3>;
> > @@ -131,16 +131,16 @@
> >  
> > /*
> >  * When reaching cpu_alert4, reduce CPU
> > -* further, down to 600 MHz (11 steps for big,
> > -* 7 steps for LITTLE).
> > +* further, down to 600 MHz (13 steps for big,
> > +* 8 steps for LITTLE).
> >  */
> > -   map5 {
> > +   cooling_map5: map5 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu0 3 7>;
> > +   cooling-device = <&cpu0 3 8>;
> > };
> > -   map6 {
> > +   cooling_map6: map6 {
> > trip = <&cpu_alert4>;
> > -   cooling-device = <&cpu4 3 11>;
> > +   cooling-device = <&cpu4 3 13>;
> > };
> > };
> > };
> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> > ===
> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
> > 15:59:33.775763261 +0100
> > @@ -21,6 +21,23 @@
> > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
> > "samsung,exynos5";
> >  };
> >  
> > +&cluster_a15_opp_table {
> > +   /delete-node/opp@20;
> > +   /delete-node/opp@19;
> > +};
> > +
> > +&cluster_a7_opp_table {
> > +   /delete-node/opp@14;
> > +};
> > +
> 
> I think that a comment in the DTS why these operating points aren't available
> in this board will make more clear why the nodes are being deleted.

Ok, I will add these comments in the next patch revision.

> > +&cooling_map5 {
> > +   cooling-device = <&cpu0 3 7>;
> > +};
> > +
> > +&cooling_map6 {
> > +   cooling-device = <&cpu4 3 11>;
> > +};
> > +
> >  &pwm {
> > /*
> >  * PWM 0 -- fan
> > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> > ===
> > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
> > 15:59:33.779763261 +0100
> > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 
> > 15:59:33.779763261 +0100
> > @@ -146,6 +146,10 @@
> > vdd-supply = <&ldo9_reg>;
> >  };
> >  
> > +&cluster_a7_opp_table {
> > +   /delete-property/opp@14;
> > +};
> > +
> >  &cpu0 {
> > cpu-supply = <&buck2_reg>;
> >  };
> > Index: b/arch/arm/boot/dts/exynos5800.dtsi
> > ===
> > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 
> > +0100
> > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-

Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Javier Martinez Canillas]

Hello Bartlomiej,

On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> (for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> cooling maps to account for new OPPs.
> 
> Since new OPPs are not available on all Exynos5422/5800 boards modify
> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
> 
> Tested on Odroid-XU3 and XU3 Lite.
> 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Cc: Thomas Abraham 
> Cc: Ben Gamari 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 +
>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
>  arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
>  4 files changed, 43 insertions(+), 7 deletions(-)
> 
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> ===
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi  2016-12-13 
> 15:59:33.775763261 +0100
> @@ -118,7 +118,7 @@
>   /*
>* When reaching cpu_alert3, reduce CPU
>* by 2 steps. On Exynos5422/5800 that would
> -  * be: 1600 MHz and 1100 MHz.
> +  * (usually) be: 1800 MHz and 1200 MHz.
>*/
>   map3 {
>   trip = <&cpu_alert3>;
> @@ -131,16 +131,16 @@
>  
>   /*
>* When reaching cpu_alert4, reduce CPU
> -  * further, down to 600 MHz (11 steps for big,
> -  * 7 steps for LITTLE).
> +  * further, down to 600 MHz (13 steps for big,
> +  * 8 steps for LITTLE).
>*/
> - map5 {
> + cooling_map5: map5 {
>   trip = <&cpu_alert4>;
> - cooling-device = <&cpu0 3 7>;
> + cooling-device = <&cpu0 3 8>;
>   };
> - map6 {
> + cooling_map6: map6 {
>   trip = <&cpu_alert4>;
> - cooling-device = <&cpu4 3 11>;
> + cooling-device = <&cpu4 3 13>;
>   };
>   };
>   };
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> ===
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 
> 15:59:33.775763261 +0100
> @@ -21,6 +21,23 @@
>   compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
> "samsung,exynos5";
>  };
>  
> +&cluster_a15_opp_table {
> + /delete-node/opp@20;
> + /delete-node/opp@19;
> +};
> +
> +&cluster_a7_opp_table {
> + /delete-node/opp@14;
> +};
> +

I think that a comment in the DTS why these operating points aren't available
in this board will make more clear why the nodes are being deleted.

> +&cooling_map5 {
> + cooling-device = <&cpu0 3 7>;
> +};
> +
> +&cooling_map6 {
> + cooling-device = <&cpu4 3 11>;
> +};
> +
>  &pwm {
>   /*
>* PWM 0 -- fan
> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> ===
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts   2016-12-13 
> 15:59:33.779763261 +0100
> @@ -146,6 +146,10 @@
>   vdd-supply = <&ldo9_reg>;
>  };
>  
> +&cluster_a7_opp_table {
> + /delete-property/opp@14;
> +};
> +
>  &cpu0 {
>   cpu-supply = <&buck2_reg>;
>  };
> Index: b/arch/arm/boot/dts/exynos5800.dtsi
> ===
> --- a/arch/arm/boot/dts/exynos5800.dtsi   2016-12-13 15:59:33.779763261 
> +0100
> +++ b/arch/arm/boot/dts/exynos5800.dtsi   2016-12-13 15:59:33.779763261 
> +0100
> @@ -24,6 +24,16 @@
>  };
>  
>  &cluster_a15_opp_table {
> + opp@20 {
> + opp-hz = /bits/ 64 <20>;
> + opp-microvolt = <125>;
> + clock-latency-ns = <14>;
> + };
> + opp@19 {
> +  

[PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800

[Bartlomiej Zolnierkiewicz]

Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
(for A7 cores).  Also update common Odroid-XU3 Lite/XU3/XU4 thermal
cooling maps to account for new OPPs.

Since new OPPs are not available on all Exynos5422/5800 boards modify
dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.

Tested on Odroid-XU3 and XU3 Lite.

Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Thomas Abraham 
Cc: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   14 +++---
 arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   17 +
 arch/arm/boot/dts/exynos5800-peach-pi.dts  |4 
 arch/arm/boot/dts/exynos5800.dtsi  |   15 +++
 4 files changed, 43 insertions(+), 7 deletions(-)

Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
===
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
15:59:33.779763261 +0100
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi2016-12-13 
15:59:33.775763261 +0100
@@ -118,7 +118,7 @@
/*
 * When reaching cpu_alert3, reduce CPU
 * by 2 steps. On Exynos5422/5800 that would
-* be: 1600 MHz and 1100 MHz.
+* (usually) be: 1800 MHz and 1200 MHz.
 */
map3 {
trip = <&cpu_alert3>;
@@ -131,16 +131,16 @@
 
/*
 * When reaching cpu_alert4, reduce CPU
-* further, down to 600 MHz (11 steps for big,
-* 7 steps for LITTLE).
+* further, down to 600 MHz (13 steps for big,
+* 8 steps for LITTLE).
 */
-   map5 {
+   cooling_map5: map5 {
trip = <&cpu_alert4>;
-   cooling-device = <&cpu0 3 7>;
+   cooling-device = <&cpu0 3 8>;
};
-   map6 {
+   cooling_map6: map6 {
trip = <&cpu_alert4>;
-   cooling-device = <&cpu4 3 11>;
+   cooling-device = <&cpu4 3 13>;
};
};
};
Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
===
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
15:59:33.779763261 +0100
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts   2016-12-13 
15:59:33.775763261 +0100
@@ -21,6 +21,23 @@
compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", 
"samsung,exynos5";
 };
 
+&cluster_a15_opp_table {
+   /delete-node/opp@20;
+   /delete-node/opp@19;
+};
+
+&cluster_a7_opp_table {
+   /delete-node/opp@14;
+};
+
+&cooling_map5 {
+   cooling-device = <&cpu0 3 7>;
+};
+
+&cooling_map6 {
+   cooling-device = <&cpu4 3 11>;
+};
+
 &pwm {
/*
 * PWM 0 -- fan
Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
===
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 
+0100
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 
+0100
@@ -146,6 +146,10 @@
vdd-supply = <&ldo9_reg>;
 };
 
+&cluster_a7_opp_table {
+   /delete-property/opp@14;
+};
+
 &cpu0 {
cpu-supply = <&buck2_reg>;
 };
Index: b/arch/arm/boot/dts/exynos5800.dtsi
===
--- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
+++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
@@ -24,6 +24,16 @@
 };
 
 &cluster_a15_opp_table {
+   opp@20 {
+   opp-hz = /bits/ 64 <20>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp@19 {
+   opp-hz = /bits/ 64 <19>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
opp@17 {
opp-microvolt = <125>;
};
@@ -85,6 +95,11 @@
 };
 
 &cluster_a7_opp_table {
+   opp_a7_14: opp@14 {
+   opp-hz = /bits/ 64 <14>;
+   opp-microvolt = <125>;
+