Re: [PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

2018-05-10 Thread Amit Kucheria 
On Fri, Apr 20, 2018 at 1:39 PM, Thierry Escande
 wrote:
> Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
> patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
> the use of IRQ_TYPE_NONE").
>
> Signed-off-by: Thierry Escande 

Reviewed-by: Amit Kucheria 
Tested-by: Amit Kucheria 

> ---
>  arch/arm/boot/dts/qcom-apq8064.dtsi | 52 
> ++---
>  1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
> b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 5341a39c0392..f26613ffc9e7 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -444,7 +444,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1245 0x100>,
>   <0x1240 0x03>;
> -   interrupts = <0 193 0x0>;
> +   interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI1_UART_CLK>, < 
> GSBI1_H_CLK>;
> clock-names = "core", "iface";
> status = "disabled";
> @@ -456,7 +456,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1246 0x1000>;
> -   interrupts = <0 194 IRQ_TYPE_NONE>;
> +   interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI1_QUP_CLK>, < 
> GSBI1_H_CLK>;
> clock-names = "core", "iface";
> #address-cells = <1>;
> @@ -484,7 +484,7 @@
> pinctrl-0 = <_pins>;
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> -   interrupts = <0 196 IRQ_TYPE_NONE>;
> +   interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI2_QUP_CLK>, < 
> GSBI2_H_CLK>;
> clock-names = "core", "iface";
> #address-cells = <1>;
> @@ -508,7 +508,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1628 0x1000>;
> -   interrupts = ;
> +   interrupts =  IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI3_QUP_CLK>,
>  < GSBI3_H_CLK>;
> clock-names = "core", "iface";
> @@ -534,7 +534,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1638 0x1000>;
> -   interrupts = ;
> +   interrupts =  IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI4_QUP_CLK>,
>  < GSBI4_H_CLK>;
> clock-names = "core", "iface";
> @@ -556,7 +556,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1a24 0x100>,
>   <0x1a20 0x03>;
> -   interrupts = <0 154 0x0>;
> +   interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI5_UART_CLK>, < 
> GSBI5_H_CLK>;
> clock-names = "core", "iface";
> status = "disabled";
> @@ -565,7 +565,7 @@
> gsbi5_spi: spi@1a28 {
> compatible = "qcom,spi-qup-v1.1.1";
> reg = <0x1a28 0x1000>;
> -   interrupts = <0 155 0>;
> +   interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-0 = <_default>;
> pinctrl-1 = <_sleep>;
> pinctrl-names = "default", "sleep";
> @@ -592,7 +592,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1654 0x100>,
>   <0x1650 0x03>;
> -   interrupts = <0 156 0x0>;
> +   interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
>

Re: [PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

2018-05-10 Thread Amit Kucheria 
On Fri, Apr 20, 2018 at 1:39 PM, Thierry Escande
 wrote:
> Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
> patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
> the use of IRQ_TYPE_NONE").
>
> Signed-off-by: Thierry Escande 

Reviewed-by: Amit Kucheria 
Tested-by: Amit Kucheria 

> ---
>  arch/arm/boot/dts/qcom-apq8064.dtsi | 52 
> ++---
>  1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
> b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 5341a39c0392..f26613ffc9e7 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -444,7 +444,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1245 0x100>,
>   <0x1240 0x03>;
> -   interrupts = <0 193 0x0>;
> +   interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI1_UART_CLK>, < 
> GSBI1_H_CLK>;
> clock-names = "core", "iface";
> status = "disabled";
> @@ -456,7 +456,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1246 0x1000>;
> -   interrupts = <0 194 IRQ_TYPE_NONE>;
> +   interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI1_QUP_CLK>, < 
> GSBI1_H_CLK>;
> clock-names = "core", "iface";
> #address-cells = <1>;
> @@ -484,7 +484,7 @@
> pinctrl-0 = <_pins>;
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> -   interrupts = <0 196 IRQ_TYPE_NONE>;
> +   interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI2_QUP_CLK>, < 
> GSBI2_H_CLK>;
> clock-names = "core", "iface";
> #address-cells = <1>;
> @@ -508,7 +508,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1628 0x1000>;
> -   interrupts = ;
> +   interrupts =  IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI3_QUP_CLK>,
>  < GSBI3_H_CLK>;
> clock-names = "core", "iface";
> @@ -534,7 +534,7 @@
> pinctrl-1 = <_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x1638 0x1000>;
> -   interrupts = ;
> +   interrupts =  IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI4_QUP_CLK>,
>  < GSBI4_H_CLK>;
> clock-names = "core", "iface";
> @@ -556,7 +556,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1a24 0x100>,
>   <0x1a20 0x03>;
> -   interrupts = <0 154 0x0>;
> +   interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI5_UART_CLK>, < 
> GSBI5_H_CLK>;
> clock-names = "core", "iface";
> status = "disabled";
> @@ -565,7 +565,7 @@
> gsbi5_spi: spi@1a28 {
> compatible = "qcom,spi-qup-v1.1.1";
> reg = <0x1a28 0x1000>;
> -   interrupts = <0 155 0>;
> +   interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-0 = <_default>;
> pinctrl-1 = <_sleep>;
> pinctrl-names = "default", "sleep";
> @@ -592,7 +592,7 @@
> compatible = "qcom,msm-uartdm-v1.3", 
> "qcom,msm-uartdm";
> reg = <0x1654 0x100>,
>   <0x1650 0x03>;
> -   interrupts = <0 156 0x0>;
> +   interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
> clocks = < GSBI6_UART_CLK>, < 
> GSBI6_H_CLK>;
> clock-names = "core",

[PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

2018-04-20 Thread Thierry Escande 
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").

Signed-off-by: Thierry Escande 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 52 ++---
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5341a39c0392..f26613ffc9e7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -444,7 +444,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1245 0x100>,
  <0x1240 0x03>;
-   interrupts = <0 193 0x0>;
+   interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_UART_CLK>, < 
GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -456,7 +456,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1246 0x1000>;
-   interrupts = <0 194 IRQ_TYPE_NONE>;
+   interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_QUP_CLK>, < 
GSBI1_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -484,7 +484,7 @@
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
-   interrupts = <0 196 IRQ_TYPE_NONE>;
+   interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI2_QUP_CLK>, < 
GSBI2_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -508,7 +508,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1628 0x1000>;
-   interrupts = ;
+   interrupts = ;
clocks = < GSBI3_QUP_CLK>,
 < GSBI3_H_CLK>;
clock-names = "core", "iface";
@@ -534,7 +534,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1638 0x1000>;
-   interrupts = ;
+   interrupts = ;
clocks = < GSBI4_QUP_CLK>,
 < GSBI4_H_CLK>;
clock-names = "core", "iface";
@@ -556,7 +556,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1a24 0x100>,
  <0x1a20 0x03>;
-   interrupts = <0 154 0x0>;
+   interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI5_UART_CLK>, < 
GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -565,7 +565,7 @@
gsbi5_spi: spi@1a28 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a28 0x1000>;
-   interrupts = <0 155 0>;
+   interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <_default>;
pinctrl-1 = <_sleep>;
pinctrl-names = "default", "sleep";
@@ -592,7 +592,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1654 0x100>,
  <0x1650 0x03>;
-   interrupts = <0 156 0x0>;
+   interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI6_UART_CLK>, < 
GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -604,7 +604,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1658 0x1000>;
-   interrupts = ;
+

[PATCH] ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

2018-04-20 Thread Thierry Escande 
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").

Signed-off-by: Thierry Escande 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 52 ++---
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5341a39c0392..f26613ffc9e7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -444,7 +444,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1245 0x100>,
  <0x1240 0x03>;
-   interrupts = <0 193 0x0>;
+   interrupts = <0 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_UART_CLK>, < 
GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -456,7 +456,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1246 0x1000>;
-   interrupts = <0 194 IRQ_TYPE_NONE>;
+   interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI1_QUP_CLK>, < 
GSBI1_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -484,7 +484,7 @@
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
-   interrupts = <0 196 IRQ_TYPE_NONE>;
+   interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI2_QUP_CLK>, < 
GSBI2_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
@@ -508,7 +508,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1628 0x1000>;
-   interrupts = ;
+   interrupts = ;
clocks = < GSBI3_QUP_CLK>,
 < GSBI3_H_CLK>;
clock-names = "core", "iface";
@@ -534,7 +534,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1638 0x1000>;
-   interrupts = ;
+   interrupts = ;
clocks = < GSBI4_QUP_CLK>,
 < GSBI4_H_CLK>;
clock-names = "core", "iface";
@@ -556,7 +556,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1a24 0x100>,
  <0x1a20 0x03>;
-   interrupts = <0 154 0x0>;
+   interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI5_UART_CLK>, < 
GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -565,7 +565,7 @@
gsbi5_spi: spi@1a28 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a28 0x1000>;
-   interrupts = <0 155 0>;
+   interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <_default>;
pinctrl-1 = <_sleep>;
pinctrl-names = "default", "sleep";
@@ -592,7 +592,7 @@
compatible = "qcom,msm-uartdm-v1.3", 
"qcom,msm-uartdm";
reg = <0x1654 0x100>,
  <0x1650 0x03>;
-   interrupts = <0 156 0x0>;
+   interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = < GSBI6_UART_CLK>, < 
GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@@ -604,7 +604,7 @@
pinctrl-1 = <_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x1658 0x1000>;
-   interrupts = ;
+