Re: [PATCH] arm64: dts: lx2160a: add tmu device node
On Tue, Sep 03, 2019 at 11:31:32AM +0800, Yuantian Tang wrote:
> Add the TMU (Thermal Monitoring Unit) device node to enable
> TMU feature.
>
> Signed-off-by: Yuantian Tang
> ---
> .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 108 +++---
> 1 file changed, 92 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 39d497df769e..e70ddd01cd84 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -6,6 +6,7 @@
>
> #include
> #include
> +#include
>
> /memreserve/ 0x8000 0x0001;
>
> @@ -24,7 +25,7 @@
> #size-cells = <0>;
>
> // 8 clusters having 2 Cortex-A72 cores each
> - cpu@0 {
> + cpu0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -38,9 +39,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@1 {
> + cpu1: cpu@1 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -54,9 +56,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@100 {
> + cpu100: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -70,9 +73,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@101 {
> + cpu101: cpu@101 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -86,9 +90,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@200 {
> + cpu200: cpu@200 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -102,9 +107,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@201 {
> + cpu201: cpu@201 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -118,9 +124,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@300 {
> + cpu300: cpu@300 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -134,9 +141,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@301 {
> + cpu301: cpu@301 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -150,9 +158,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@400 {
> + cpu400: cpu@400 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
> enable-method = "psci";
> @@ -166,9 +175,10 @@
> i-cache-sets = <192>;
> next-level-cache = <_l2>;
> cpu-idle-states = <_pw20>;
> + #cooling-cells = <2>;
> };
>
> - cpu@401 {
> + cpu401: cpu@401 {
> device_type = "cpu";
> compatible = "arm,cortex-a72";
>
[PATCH] arm64: dts: lx2160a: add tmu device node
Add the TMU (Thermal Monitoring Unit) device node to enable
TMU feature.
Signed-off-by: Yuantian Tang
---
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 108 +++---
1 file changed, 92 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 39d497df769e..e70ddd01cd84 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -6,6 +6,7 @@
#include
#include
+#include
/memreserve/ 0x8000 0x0001;
@@ -24,7 +25,7 @@
#size-cells = <0>;
// 8 clusters having 2 Cortex-A72 cores each
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -38,9 +39,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -54,9 +56,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@100 {
+ cpu100: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -70,9 +73,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@101 {
+ cpu101: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -86,9 +90,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@200 {
+ cpu200: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -102,9 +107,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@201 {
+ cpu201: cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -118,9 +124,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@300 {
+ cpu300: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -134,9 +141,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@301 {
+ cpu301: cpu@301 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -150,9 +158,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@400 {
+ cpu400: cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -166,9 +175,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
cpu-idle-states = <_pw20>;
+ #cooling-cells = <2>;
};
- cpu@401 {
+ cpu401: cpu@401 {
device_type = "cpu";
compatible = "arm,cortex-a72";
enable-method = "psci";
@@ -182,9 +192,10 @@
i-cache-sets = <192>;
next-level-cache = <_l2>;
