Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

2020-11-25 Thread Michal Simek
Ășt 29. 9. 2020 v 13:43 odesĂ­latel Michal Simek  napsal:
>
> DT schema is checking tuples which should be properly separated. The patch
> is doing this separation to avoid the following warning:
> ..yaml: axi: pcie@fd0e:ranges: [[33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
> any of the given schemas (Possible causes of the failure):
> ...dt.yaml: axi: pcie@fd0e:ranges: True was expected
> ...dt.yaml: axi: pcie@fd0e:ranges:0: [33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
>
> Signed-off-by: Michal Simek 
> ---
>
> I have seen one conversation about it but don't have link which I can point
> to.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 771f60e0346d..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -542,8 +542,8 @@ pcie: pcie@fd0e {
>   <0x0 0xfd48 0x0 0x1000>,
>   <0x80 0x 0x0 0x100>;
> reg-names = "breg", "pcireg", "cfg";
> -   ranges = <0x0200 0x 0xe000 0x 
> 0xe000 0x 0x1000  /* non-prefetchable memory */
> - 0x4300 0x0006 0x 0x0006 
> 0x 0x0002 0x>;/* prefetchable memory */
> +   ranges = <0x0200 0x 0xe000 0x 
> 0xe000 0x 0x1000>,/* non-prefetchable memory */
> +<0x4300 0x0006 0x 0x0006 
> 0x 0x0002 0x>;/* prefetchable memory */
> bus-range = <0x00 0xff>;
> interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> interrupt-map = <0x0 0x0 0x0 0x1 _intc 0x1>,
> --
> 2.28.0
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

2020-10-02 Thread Michal Simek
Hi Laurent,

On 02. 10. 20 4:02, Laurent Pinchart wrote:
> Hi Michal,
> 
> Thank you for the patch.
> 
> On Tue, Sep 29, 2020 at 01:43:22PM +0200, Michal Simek wrote:
>> DT schema is checking tuples which should be properly separated. The patch
>> is doing this separation to avoid the following warning:
>> ..yaml: axi: pcie@fd0e:ranges: [[33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
>> any of the given schemas (Possible causes of the failure):
>> ...dt.yaml: axi: pcie@fd0e:ranges: True was expected
>> ...dt.yaml: axi: pcie@fd0e:ranges:0: [33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
> 
> I would keep the error message unwrapped as it's a bit confusing to
> read, even if it exceeds the normal 72 columns limit of commit messaged.

>From git log I see that both ways are used.

> 
>> Signed-off-by: Michal Simek 
> 
> Reviewed-by: Laurent Pinchart 

Thanks,
Michal


Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

2020-10-01 Thread Laurent Pinchart
Hi Michal,

Thank you for the patch.

On Tue, Sep 29, 2020 at 01:43:22PM +0200, Michal Simek wrote:
> DT schema is checking tuples which should be properly separated. The patch
> is doing this separation to avoid the following warning:
> ..yaml: axi: pcie@fd0e:ranges: [[33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
> any of the given schemas (Possible causes of the failure):
> ...dt.yaml: axi: pcie@fd0e:ranges: True was expected
> ...dt.yaml: axi: pcie@fd0e:ranges:0: [33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long

I would keep the error message unwrapped as it's a bit confusing to
read, even if it exceeds the normal 72 columns limit of commit messaged.

> Signed-off-by: Michal Simek 

Reviewed-by: Laurent Pinchart 

> ---
> 
> I have seen one conversation about it but don't have link which I can point
> to.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 771f60e0346d..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -542,8 +542,8 @@ pcie: pcie@fd0e {
> <0x0 0xfd48 0x0 0x1000>,
> <0x80 0x 0x0 0x100>;
>   reg-names = "breg", "pcireg", "cfg";
> - ranges = <0x0200 0x 0xe000 0x 
> 0xe000 0x 0x1000  /* non-prefetchable memory */
> -   0x4300 0x0006 0x 0x0006 
> 0x 0x0002 0x>;/* prefetchable memory */
> + ranges = <0x0200 0x 0xe000 0x 
> 0xe000 0x 0x1000>,/* non-prefetchable memory */
> +  <0x4300 0x0006 0x 0x0006 
> 0x 0x0002 0x>;/* prefetchable memory */
>   bus-range = <0x00 0xff>;
>   interrupt-map-mask = <0x0 0x0 0x0 0x7>;
>   interrupt-map = <0x0 0x0 0x0 0x1 _intc 0x1>,

-- 
Regards,

Laurent Pinchart


[PATCH] arm64: dts: zynqmp: Fix pcie ranges description

2020-09-29 Thread Michal Simek
DT schema is checking tuples which should be properly separated. The patch
is doing this separation to avoid the following warning:
..yaml: axi: pcie@fd0e:ranges: [[33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
any of the given schemas (Possible causes of the failure):
...dt.yaml: axi: pcie@fd0e:ranges: True was expected
...dt.yaml: axi: pcie@fd0e:ranges:0: [33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long

Signed-off-by: Michal Simek 
---

I have seen one conversation about it but don't have link which I can point
to.
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 771f60e0346d..98073f3223e5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -542,8 +542,8 @@ pcie: pcie@fd0e {
  <0x0 0xfd48 0x0 0x1000>,
  <0x80 0x 0x0 0x100>;
reg-names = "breg", "pcireg", "cfg";
-   ranges = <0x0200 0x 0xe000 0x 
0xe000 0x 0x1000  /* non-prefetchable memory */
- 0x4300 0x0006 0x 0x0006 
0x 0x0002 0x>;/* prefetchable memory */
+   ranges = <0x0200 0x 0xe000 0x 
0xe000 0x 0x1000>,/* non-prefetchable memory */
+<0x4300 0x0006 0x 0x0006 
0x 0x0002 0x>;/* prefetchable memory */
bus-range = <0x00 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 _intc 0x1>,
-- 
2.28.0