Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-23 Thread David Miller
From: Arnd Bergmann 
Date: Thu, 22 Jan 2015 11:18:50 +0100

> I see. In this case, I think merging your new driver is not a good idea:

+1
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-23 Thread David Miller
From: Arnd Bergmann a...@arndb.de
Date: Thu, 22 Jan 2015 11:18:50 +0100

 I see. In this case, I think merging your new driver is not a good idea:

+1
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-22 Thread Arnd Bergmann
On Thursday 22 January 2015 00:20:59 wstep...@codeaurora.org wrote:
> > Right. For review purposes, I think it would be helpful to split this
> > huge patch into several steps then:
> >
> > - add a base driver
> > - add the overlay interface
> > - add the nss driver
> >
> > Ideally more of them.
> 
> The nss-drv driver is open sourced but we are currently not planning to
> upstream to linux kernel yet because we are still actively adding new
> features
> https://www.codeaurora.org/cgit/quic/qsdk/oss/lklm/nss-drv
> 
> > Thanks for the description, this sounds very interesting indeed. I do
> > have more questions though: how do you get the rules into the NSS driver?
> > Does this get handled transparently by the openvswitch driver or
> > did you have to add new user interfaces for it?
> >
> 
> No, we are not using openvswitch. We have a connection manager monitoring
> conntrack events and creates rules then send it through the interface
> built in nss-drv.
> 

I see. In this case, I think merging your new driver is not a good idea:

- We already have a driver (dwmac1000) for the ethernet hardware,
  which is known to work on a lot of hardware and has an established
  binding.

- The main difference in your new driver is the plug-in interface,
  but that has no upstream users

- The nss driver is not getting submitted, and has little chance of
  getting merged if you do, because it introduces a driver-specific
  API for something that should be hardware independent.

You can simplify your private nss code a lot if you remove the
abstraction layer and only implement ethernet features you need
in the same module, and then load either the upstream driver or
your nss driver. Make sure they use a compatible binding so the
device gets attached to just one of the two drivers. For the
built-in case, you can use the 'unbind' interface from user space
to remove the device from the dwmac1000 driver.

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-22 Thread Arnd Bergmann
On Thursday 22 January 2015 00:20:59 wstep...@codeaurora.org wrote:
  Right. For review purposes, I think it would be helpful to split this
  huge patch into several steps then:
 
  - add a base driver
  - add the overlay interface
  - add the nss driver
 
  Ideally more of them.
 
 The nss-drv driver is open sourced but we are currently not planning to
 upstream to linux kernel yet because we are still actively adding new
 features
 https://www.codeaurora.org/cgit/quic/qsdk/oss/lklm/nss-drv
 
  Thanks for the description, this sounds very interesting indeed. I do
  have more questions though: how do you get the rules into the NSS driver?
  Does this get handled transparently by the openvswitch driver or
  did you have to add new user interfaces for it?
 
 
 No, we are not using openvswitch. We have a connection manager monitoring
 conntrack events and creates rules then send it through the interface
 built in nss-drv.
 

I see. In this case, I think merging your new driver is not a good idea:

- We already have a driver (dwmac1000) for the ethernet hardware,
  which is known to work on a lot of hardware and has an established
  binding.

- The main difference in your new driver is the plug-in interface,
  but that has no upstream users

- The nss driver is not getting submitted, and has little chance of
  getting merged if you do, because it introduces a driver-specific
  API for something that should be hardware independent.

You can simplify your private nss code a lot if you remove the
abstraction layer and only implement ethernet features you need
in the same module, and then load either the upstream driver or
your nss driver. Make sure they use a compatible binding so the
device gets attached to just one of the two drivers. For the
built-in case, you can use the 'unbind' interface from user space
to remove the device from the dwmac1000 driver.

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-21 Thread wstephen
> Right. For review purposes, I think it would be helpful to split this
> huge patch into several steps then:
>
> - add a base driver
> - add the overlay interface
> - add the nss driver
>
> Ideally more of them.

The nss-drv driver is open sourced but we are currently not planning to
upstream to linux kernel yet because we are still actively adding new
features
https://www.codeaurora.org/cgit/quic/qsdk/oss/lklm/nss-drv

> Thanks for the description, this sounds very interesting indeed. I do
> have more questions though: how do you get the rules into the NSS driver?
> Does this get handled transparently by the openvswitch driver or
> did you have to add new user interfaces for it?
>
>   Arnd
>

No, we are not using openvswitch. We have a connection manager monitoring
conntrack events and creates rules then send it through the interface
built in nss-drv.

Thanks,
Stephen

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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-21 Thread wstephen
 Right. For review purposes, I think it would be helpful to split this
 huge patch into several steps then:

 - add a base driver
 - add the overlay interface
 - add the nss driver

 Ideally more of them.

The nss-drv driver is open sourced but we are currently not planning to
upstream to linux kernel yet because we are still actively adding new
features
https://www.codeaurora.org/cgit/quic/qsdk/oss/lklm/nss-drv

 Thanks for the description, this sounds very interesting indeed. I do
 have more questions though: how do you get the rules into the NSS driver?
 Does this get handled transparently by the openvswitch driver or
 did you have to add new user interfaces for it?

   Arnd


No, we are not using openvswitch. We have a connection manager monitoring
conntrack events and creates rules then send it through the interface
built in nss-drv.

Thanks,
Stephen

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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-20 Thread Arnd Bergmann
On Monday 19 January 2015 21:58:09 wstep...@codeaurora.org wrote:
> > On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
> >
> >> The nss-gmac driver is designed to work standalone or with the nss-drv
> >> driver so the switchable data plane overlay was implemented. When it
> >> worked standalone, the data plane is running on the ARM core as a
> >> standard
> >> networking driver.
> >
> > How do you decide which way it gets used on a particular system?
> >
> 
> By default the GMAC driver uses a native (Host ARM CPU) based data plane. 
> If the configuration loads the offload nss-drv driver, the offload driver
> registers an overlay with the GMAC.

Right. For review purposes, I think it would be helpful to split this
huge patch into several steps then:

- add a base driver
- add the overlay interface
- add the nss driver

Ideally more of them.

> >> The nss-drv driver can take over the data plane and
> >> offload it to the NSS cores. The STMicro stmmac driver does not have
> >> this
> >> kind of overlay design so is not suitable for IPQ806x. This is why we
> >> don't based on the stmmac driver
> >
> > Which kind of offload is implemented specifically? 'data plane' sounds
> > fairly generic and could mean anything, and the code isn't readable enough
> > in its current form for me to find out.
> 
> The Network Subsystem (NSS core) provides a GMAC pass-through until it is
> given a rule to offload work.  Once a rule is given, it is capable of
> performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other
> protocols.
> 
> Hope this clarify your question!

Thanks for the description, this sounds very interesting indeed. I do
have more questions though: how do you get the rules into the NSS driver?
Does this get handled transparently by the openvswitch driver or
did you have to add new user interfaces for it?

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-20 Thread Arnd Bergmann
On Monday 19 January 2015 21:58:09 wstep...@codeaurora.org wrote:
  On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
 
  The nss-gmac driver is designed to work standalone or with the nss-drv
  driver so the switchable data plane overlay was implemented. When it
  worked standalone, the data plane is running on the ARM core as a
  standard
  networking driver.
 
  How do you decide which way it gets used on a particular system?
 
 
 By default the GMAC driver uses a native (Host ARM CPU) based data plane. 
 If the configuration loads the offload nss-drv driver, the offload driver
 registers an overlay with the GMAC.

Right. For review purposes, I think it would be helpful to split this
huge patch into several steps then:

- add a base driver
- add the overlay interface
- add the nss driver

Ideally more of them.

  The nss-drv driver can take over the data plane and
  offload it to the NSS cores. The STMicro stmmac driver does not have
  this
  kind of overlay design so is not suitable for IPQ806x. This is why we
  don't based on the stmmac driver
 
  Which kind of offload is implemented specifically? 'data plane' sounds
  fairly generic and could mean anything, and the code isn't readable enough
  in its current form for me to find out.
 
 The Network Subsystem (NSS core) provides a GMAC pass-through until it is
 given a rule to offload work.  Once a rule is given, it is capable of
 performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other
 protocols.
 
 Hope this clarify your question!

Thanks for the description, this sounds very interesting indeed. I do
have more questions though: how do you get the rules into the NSS driver?
Does this get handled transparently by the openvswitch driver or
did you have to add new user interfaces for it?

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-19 Thread wstephen
> On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
>>
>> The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
>> SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
>> main purpose of these NSS cores is to offload the networking stack from
>> the ARM cores to achieve high performance at routing/ipsec..etc without
>> exhausting the ARM core CPU cycles. There is another nss-drv driver for
>> the NSS cores.
>
> I see.
>
>> The nss-gmac driver is designed to work standalone or with the nss-drv
>> driver so the switchable data plane overlay was implemented. When it
>> worked standalone, the data plane is running on the ARM core as a
>> standard
>> networking driver.
>
> How do you decide which way it gets used on a particular system?
>

By default the GMAC driver uses a native (Host ARM CPU) based data plane. 
If the configuration loads the offload nss-drv driver, the offload driver
registers an overlay with the GMAC.

>> The nss-drv driver can take over the data plane and
>> offload it to the NSS cores. The STMicro stmmac driver does not have
>> this
>> kind of overlay design so is not suitable for IPQ806x. This is why we
>> don't based on the stmmac driver
>
> Which kind of offload is implemented specifically? 'data plane' sounds
> fairly generic and could mean anything, and the code isn't readable enough
> in its current form for me to find out.

The Network Subsystem (NSS core) provides a GMAC pass-through until it is
given a rule to offload work.  Once a rule is given, it is capable of
performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other
protocols.
>
>   Arnd
>

Hope this clarify your question!

Thanks,
Stephen


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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-19 Thread wstephen
 On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:

 The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
 SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
 main purpose of these NSS cores is to offload the networking stack from
 the ARM cores to achieve high performance at routing/ipsec..etc without
 exhausting the ARM core CPU cycles. There is another nss-drv driver for
 the NSS cores.

 I see.

 The nss-gmac driver is designed to work standalone or with the nss-drv
 driver so the switchable data plane overlay was implemented. When it
 worked standalone, the data plane is running on the ARM core as a
 standard
 networking driver.

 How do you decide which way it gets used on a particular system?


By default the GMAC driver uses a native (Host ARM CPU) based data plane. 
If the configuration loads the offload nss-drv driver, the offload driver
registers an overlay with the GMAC.

 The nss-drv driver can take over the data plane and
 offload it to the NSS cores. The STMicro stmmac driver does not have
 this
 kind of overlay design so is not suitable for IPQ806x. This is why we
 don't based on the stmmac driver

 Which kind of offload is implemented specifically? 'data plane' sounds
 fairly generic and could mean anything, and the code isn't readable enough
 in its current form for me to find out.

The Network Subsystem (NSS core) provides a GMAC pass-through until it is
given a rule to offload work.  Once a rule is given, it is capable of
performing: bridging, IPv4 NAT/FWD, IPv6 NAT/FWD, IPSec, LAG, and other
protocols.

   Arnd


Hope this clarify your question!

Thanks,
Stephen


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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang  wrote:

> +static int32_t nss_gmac_setup_tx_desc_queue(struct nss_gmac_dev *gmacdev,
> + struct device *dev,
> + uint32_t no_of_desc,
> + uint32_t desc_mode)
> +{
> + int32_t i;
> + struct dma_desc *first_desc = NULL;
> + dma_addr_t dma_addr;
> +
> + gmacdev->tx_desc_count = 0;
> +
> + BUG_ON(desc_mode != RINGMODE);
> + BUG_ON((no_of_desc & (no_of_desc - 1)) != 0);
> +
> + netdev_dbg(gmacdev->netdev, "Total size of memory required for Tx 
> Descriptors in Ring Mode = 0x%08x"
> + , (uint32_t) ((sizeof(struct dma_desc) * no_of_desc)));
> +
> + first_desc = dma_alloc_coherent(dev, sizeof(struct dma_desc) * 
> no_of_desc
> + , _addr, GFP_KERNEL);
> + if (first_desc == NULL) {

In a lot of places you first initialize a variable then assign it 5 lines
later to it's initial value.  Get rid of the first initialization.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang  wrote:

> + struct nss_gmac_data_plane_ops *data_plane_ops;
> + /* ops to send messages to nss-drv*/

This should be a const pointer.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang  wrote:

> + uint32_t rx_bytes;  /**< Number of RX bytes */
> + uint32_t rx_packets;/**< Number of RX packets */

32 bit packet stats are a problem with lots of traffic.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Arnd Bergmann
On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
> 
> The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
> SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
> main purpose of these NSS cores is to offload the networking stack from
> the ARM cores to achieve high performance at routing/ipsec..etc without
> exhausting the ARM core CPU cycles. There is another nss-drv driver for
> the NSS cores.

I see.

> The nss-gmac driver is designed to work standalone or with the nss-drv
> driver so the switchable data plane overlay was implemented. When it
> worked standalone, the data plane is running on the ARM core as a standard
> networking driver.

How do you decide which way it gets used on a particular system?

> The nss-drv driver can take over the data plane and
> offload it to the NSS cores. The STMicro stmmac driver does not have this
> kind of overlay design so is not suitable for IPQ806x. This is why we
> don't based on the stmmac driver

Which kind of offload is implemented specifically? 'data plane' sounds
fairly generic and could mean anything, and the code isn't readable enough
in its current form for me to find out.

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread wstephen
Hi Arnd, Francois

The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
main purpose of these NSS cores is to offload the networking stack from
the ARM cores to achieve high performance at routing/ipsec..etc without
exhausting the ARM core CPU cycles. There is another nss-drv driver for
the NSS cores.
The nss-gmac driver is designed to work standalone or with the nss-drv
driver so the switchable data plane overlay was implemented. When it
worked standalone, the data plane is running on the ARM core as a standard
networking driver. The nss-drv driver can take over the data plane and
offload it to the NSS cores. The STMicro stmmac driver does not have this
kind of overlay design so is not suitable for IPQ806x. This is why we
don't based on the stmmac driver

Thanks,
Stephen

>> diff --git a/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> new file mode 100644
>> index 000..806f2e6
>> --- /dev/null
>> +++ b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
>> @@ -0,0 +1,14 @@
>> +Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
>> +Linux Driver for 3507 DWC Ether MAC 10/100 Universal
>> +
>> +IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and
>> documentation (hereinafter, "Software") are unsupported proprietary
>> works of Synopsys, Inc. unless otherwise expressly agreed to in writing
>> between Synopsys and you.
>> +
>> +The Software uses certain Linux kernel functionality and may therefore
>> be subject to the GNU Public License which is available at:
>> +http://www.gnu.org/licenses/gpl.html
>
> It sounds like this one is related to the dwmac driver in
> drivers/net/ethernet/stmicro/stmmac/. Please move the code into
> the same directory and reuse as much as you can.
>
> If this is a completely unrelated part, it should probably go
> into drivers/net/ethernet/designware or drivers/net/ethernet/synopsys.
>
>> +#ifdef CONFIG_OF
>> +#include 
>> +#else
>> +#include 
>> +#endif
>
> Drop the non-CONFIG_OF part here and elsewhere, we don't support
> separate platform directories any more, and mach-qcom is already
> DT-only.
>
>> +/**
>> + * GMAC registers Map
>> + * For Pci based system address is BARx + gmac_register_base
>> + * For any other system translation is done accordingly
>> + **/
>> +enum gmac_registers {
>> +gmac_config = 0x,   /* Mac config Register*/
>> +gmac_frame_filter = 0x0004, /* Mac frame filtering controls   */
>> +gmac_hash_high = 0x0008,/* Multi-cast hash table high */
>> +gmac_hash_low = 0x000c, /* Multi-cast hash table low  */
>> +gmac_gmii_addr = 0x0010,/* GMII address Register(ext. Phy)*/
>> +gmac_gmii_data = 0x0014,/* GMII data Register(ext. Phy)   */
>> +gmac_flow_control = 0x0018, /* Flow control Register  */
>> +gmac_vlan = 0x001c, /* VLAN tag Register (IEEE 802.1Q)*/
>> +gmac_version = 0x0020,  /* GMAC Core Version Register */
>> +gmac_wakeup_addr = 0x0028,  /* GMAC wake-up frame filter adrress
>> +   reg*/
>
> This looks a lot like dwmac1000 as well.
>
>> +if (of_property_read_u32(np, "qcom,id", >macid)
>> +|| of_property_read_u32(np, "qcom,emulation", 
>> >emulation)
>> +|| of_property_read_u32(np, "qcom,phy_mii_type",
>> >phy_mii_type)
>> +|| of_property_read_u32(np, "qcom,phy_mdio_addr",
>> >phy_mdio_addr)
>> +|| of_property_read_u32(np, "qcom,rgmii_delay",
>> >rgmii_delay)
>> +|| of_property_read_u32(np, "qcom,poll_required",
>> >poll_required)
>> +|| of_property_read_u32(np, "qcom,forced_speed",
>> >forced_speed)
>> +|| of_property_read_u32(np, "qcom,forced_duplex",
>> >forced_duplex)
>> +|| of_property_read_u32(np, "qcom,irq", >irq)
>> +|| of_property_read_u32(np, "qcom,socver", >socver)) {
>
> This is not an acceptable way to pass data from DT, please use the
> standard properties.
>
>> +if (test_bit(__NSS_GMAC_LINKPOLL, >flags)) {
>> +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 8, 0))
>> +gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
>> +  _gmac_adjust_link, 0, phyif);
>> +#else
>> +gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
>> +  _gmac_adjust_link, phyif);
>> +#endif
>
> Drop all LINUX_VERSION_CODE checks
>
>> +if (IS_ERR_OR_NULL(gmacdev->phydev)) {
>> +netdev_dbg(netdev, "PHY %s attach FAIL", phy_id);
>> +ret = -EIO;
>> +goto 

Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang wstep...@codeaurora.org wrote:

 +static int32_t nss_gmac_setup_tx_desc_queue(struct nss_gmac_dev *gmacdev,
 + struct device *dev,
 + uint32_t no_of_desc,
 + uint32_t desc_mode)
 +{
 + int32_t i;
 + struct dma_desc *first_desc = NULL;
 + dma_addr_t dma_addr;
 +
 + gmacdev-tx_desc_count = 0;
 +
 + BUG_ON(desc_mode != RINGMODE);
 + BUG_ON((no_of_desc  (no_of_desc - 1)) != 0);
 +
 + netdev_dbg(gmacdev-netdev, Total size of memory required for Tx 
 Descriptors in Ring Mode = 0x%08x
 + , (uint32_t) ((sizeof(struct dma_desc) * no_of_desc)));
 +
 + first_desc = dma_alloc_coherent(dev, sizeof(struct dma_desc) * 
 no_of_desc
 + , dma_addr, GFP_KERNEL);
 + if (first_desc == NULL) {

In a lot of places you first initialize a variable then assign it 5 lines
later to it's initial value.  Get rid of the first initialization.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang wstep...@codeaurora.org wrote:

 + struct nss_gmac_data_plane_ops *data_plane_ops;
 + /* ops to send messages to nss-drv*/

This should be a const pointer.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread wstephen
Hi Arnd, Francois

The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
main purpose of these NSS cores is to offload the networking stack from
the ARM cores to achieve high performance at routing/ipsec..etc without
exhausting the ARM core CPU cycles. There is another nss-drv driver for
the NSS cores.
The nss-gmac driver is designed to work standalone or with the nss-drv
driver so the switchable data plane overlay was implemented. When it
worked standalone, the data plane is running on the ARM core as a standard
networking driver. The nss-drv driver can take over the data plane and
offload it to the NSS cores. The STMicro stmmac driver does not have this
kind of overlay design so is not suitable for IPQ806x. This is why we
don't based on the stmmac driver

Thanks,
Stephen

 diff --git a/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
 b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
 new file mode 100644
 index 000..806f2e6
 --- /dev/null
 +++ b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
 @@ -0,0 +1,14 @@
 +Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
 +Linux Driver for 3507 DWC Ether MAC 10/100 Universal
 +
 +IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and
 documentation (hereinafter, Software) are unsupported proprietary
 works of Synopsys, Inc. unless otherwise expressly agreed to in writing
 between Synopsys and you.
 +
 +The Software uses certain Linux kernel functionality and may therefore
 be subject to the GNU Public License which is available at:
 +http://www.gnu.org/licenses/gpl.html

 It sounds like this one is related to the dwmac driver in
 drivers/net/ethernet/stmicro/stmmac/. Please move the code into
 the same directory and reuse as much as you can.

 If this is a completely unrelated part, it should probably go
 into drivers/net/ethernet/designware or drivers/net/ethernet/synopsys.

 +#ifdef CONFIG_OF
 +#include msm_nss_gmac.h
 +#else
 +#include mach/msm_nss_gmac.h
 +#endif

 Drop the non-CONFIG_OF part here and elsewhere, we don't support
 separate platform directories any more, and mach-qcom is already
 DT-only.

 +/**
 + * GMAC registers Map
 + * For Pci based system address is BARx + gmac_register_base
 + * For any other system translation is done accordingly
 + **/
 +enum gmac_registers {
 +gmac_config = 0x,   /* Mac config Register*/
 +gmac_frame_filter = 0x0004, /* Mac frame filtering controls   */
 +gmac_hash_high = 0x0008,/* Multi-cast hash table high */
 +gmac_hash_low = 0x000c, /* Multi-cast hash table low  */
 +gmac_gmii_addr = 0x0010,/* GMII address Register(ext. Phy)*/
 +gmac_gmii_data = 0x0014,/* GMII data Register(ext. Phy)   */
 +gmac_flow_control = 0x0018, /* Flow control Register  */
 +gmac_vlan = 0x001c, /* VLAN tag Register (IEEE 802.1Q)*/
 +gmac_version = 0x0020,  /* GMAC Core Version Register */
 +gmac_wakeup_addr = 0x0028,  /* GMAC wake-up frame filter adrress
 +   reg*/

 This looks a lot like dwmac1000 as well.

 +if (of_property_read_u32(np, qcom,id, gmacdev-macid)
 +|| of_property_read_u32(np, qcom,emulation, 
 gmaccfg-emulation)
 +|| of_property_read_u32(np, qcom,phy_mii_type,
 gmaccfg-phy_mii_type)
 +|| of_property_read_u32(np, qcom,phy_mdio_addr,
 gmaccfg-phy_mdio_addr)
 +|| of_property_read_u32(np, qcom,rgmii_delay,
 gmaccfg-rgmii_delay)
 +|| of_property_read_u32(np, qcom,poll_required,
 gmaccfg-poll_required)
 +|| of_property_read_u32(np, qcom,forced_speed,
 gmaccfg-forced_speed)
 +|| of_property_read_u32(np, qcom,forced_duplex,
 gmaccfg-forced_duplex)
 +|| of_property_read_u32(np, qcom,irq, netdev-irq)
 +|| of_property_read_u32(np, qcom,socver, gmaccfg-socver)) {

 This is not an acceptable way to pass data from DT, please use the
 standard properties.

 +if (test_bit(__NSS_GMAC_LINKPOLL, gmacdev-flags)) {
 +#if (LINUX_VERSION_CODE = KERNEL_VERSION(3, 8, 0))
 +gmacdev-phydev = phy_connect(netdev, (const char *)phy_id,
 +  nss_gmac_adjust_link, 0, phyif);
 +#else
 +gmacdev-phydev = phy_connect(netdev, (const char *)phy_id,
 +  nss_gmac_adjust_link, phyif);
 +#endif

 Drop all LINUX_VERSION_CODE checks

 +if (IS_ERR_OR_NULL(gmacdev-phydev)) {
 +netdev_dbg(netdev, PHY %s attach FAIL, phy_id);
 +ret = -EIO;
 +goto nss_gmac_phy_attach_fail;
 +}

 Also any IS_ERR_OR_NULL 

Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Arnd Bergmann
On Thursday 15 January 2015 08:12:51 wstep...@codeaurora.org wrote:
 
 The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
 SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
 main purpose of these NSS cores is to offload the networking stack from
 the ARM cores to achieve high performance at routing/ipsec..etc without
 exhausting the ARM core CPU cycles. There is another nss-drv driver for
 the NSS cores.

I see.

 The nss-gmac driver is designed to work standalone or with the nss-drv
 driver so the switchable data plane overlay was implemented. When it
 worked standalone, the data plane is running on the ARM core as a standard
 networking driver.

How do you decide which way it gets used on a particular system?

 The nss-drv driver can take over the data plane and
 offload it to the NSS cores. The STMicro stmmac driver does not have this
 kind of overlay design so is not suitable for IPQ806x. This is why we
 don't based on the stmmac driver

Which kind of offload is implemented specifically? 'data plane' sounds
fairly generic and could mean anything, and the code isn't readable enough
in its current form for me to find out.

Arnd
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-15 Thread Stephen Hemminger
On Thu,  8 Jan 2015 14:03:46 -0800
Stephen Wang wstep...@codeaurora.org wrote:

 + uint32_t rx_bytes;  /** Number of RX bytes */
 + uint32_t rx_packets;/** Number of RX packets */

32 bit packet stats are a problem with lots of traffic.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-09 Thread Mark Rutland
On Thu, Jan 08, 2015 at 10:03:46PM +, Stephen Wang wrote:
> This driver adds support for the internal GMACs on IPQ806x SoCs.
> It supports the device-tree and will register up to 4 ethernet
> interfaces.
> 
> Signed-off-by: Stephen Wang 
> ---
>  drivers/net/ethernet/atheros/Kconfig   |   10 +
>  drivers/net/ethernet/atheros/Makefile  |1 +
>  drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt  |   14 +
>  drivers/net/ethernet/atheros/nss-gmac/Makefile |   19 +
>  .../atheros/nss-gmac/exports/nss_gmac_api_if.h |  126 ++
>  .../atheros/nss-gmac/include/msm_nss_gmac.h|  338 
>  .../atheros/nss-gmac/include/msm_nss_macsec.h  |   73 +
>  .../atheros/nss-gmac/include/nss_gmac_clocks.h |  100 +
>  .../atheros/nss-gmac/include/nss_gmac_dev.h| 2136 
> 
>  .../nss-gmac/include/nss_gmac_network_interface.h  |   63 +
>  .../net/ethernet/atheros/nss-gmac/nss_gmac_ctrl.c  | 1210 +++
>  .../net/ethernet/atheros/nss-gmac/nss_gmac_dev.c   | 1963 ++
>  .../ethernet/atheros/nss-gmac/nss_gmac_ethtool.c   |  526 +
>  .../net/ethernet/atheros/nss-gmac/nss_gmac_init.c  | 1131 +++
>  .../ethernet/atheros/nss-gmac/nss_gmac_mdiobus.c   |  187 ++
>  .../atheros/nss-gmac/nss_gmac_tx_rx_offload.c  | 1175 +++

Device tree bindings _must_ be documented, yet this standalone patch
adds nothing to Documentation/devicetree/bindings per the diffstat
above. So trivial NAK until there's a patch documenting that.

See Documentation/devicetree/bindings/submitting-patches.txt 

Thanks,
Mark.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-09 Thread Mark Rutland
On Thu, Jan 08, 2015 at 10:03:46PM +, Stephen Wang wrote:
 This driver adds support for the internal GMACs on IPQ806x SoCs.
 It supports the device-tree and will register up to 4 ethernet
 interfaces.
 
 Signed-off-by: Stephen Wang wstep...@codeaurora.org
 ---
  drivers/net/ethernet/atheros/Kconfig   |   10 +
  drivers/net/ethernet/atheros/Makefile  |1 +
  drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt  |   14 +
  drivers/net/ethernet/atheros/nss-gmac/Makefile |   19 +
  .../atheros/nss-gmac/exports/nss_gmac_api_if.h |  126 ++
  .../atheros/nss-gmac/include/msm_nss_gmac.h|  338 
  .../atheros/nss-gmac/include/msm_nss_macsec.h  |   73 +
  .../atheros/nss-gmac/include/nss_gmac_clocks.h |  100 +
  .../atheros/nss-gmac/include/nss_gmac_dev.h| 2136 
 
  .../nss-gmac/include/nss_gmac_network_interface.h  |   63 +
  .../net/ethernet/atheros/nss-gmac/nss_gmac_ctrl.c  | 1210 +++
  .../net/ethernet/atheros/nss-gmac/nss_gmac_dev.c   | 1963 ++
  .../ethernet/atheros/nss-gmac/nss_gmac_ethtool.c   |  526 +
  .../net/ethernet/atheros/nss-gmac/nss_gmac_init.c  | 1131 +++
  .../ethernet/atheros/nss-gmac/nss_gmac_mdiobus.c   |  187 ++
  .../atheros/nss-gmac/nss_gmac_tx_rx_offload.c  | 1175 +++

Device tree bindings _must_ be documented, yet this standalone patch
adds nothing to Documentation/devicetree/bindings per the diffstat
above. So trivial NAK until there's a patch documenting that.

See Documentation/devicetree/bindings/submitting-patches.txt 

Thanks,
Mark.
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Francois Romieu
Stephen Wang  :
> This driver adds support for the internal GMACs on IPQ806x SoCs.
> It supports the device-tree and will register up to 4 ethernet
> interfaces.
> 
> Signed-off-by: Stephen Wang 
> ---
[...]
> +/*
> + * NSS GMAC data plane ops, default would be slowpath and can be override by
> + * nss-drv
> + */
> +struct nss_gmac_data_plane_ops {
> + int (*open)(void *ctx, uint32_t tx_desc_ring, uint32_t rx_desc_ring,
> + uint32_t mode);
> + int (*close)(void *ctx);
> + int (*link_state)(void *ctx, uint32_t link_state);
> + int (*mac_addr)(void *ctx, uint8_t *addr);
> + int (*change_mtu)(void *ctx, uint32_t mtu);
> + int (*xmit)(void *ctx, struct sk_buff *os_buf);
> +};

Weak types.

[...]
> +/*
> + * nss_gmac_register_offload()
> + *
> + * @param[netdev] netdev instance that is going to register
> + * @param[dp_ops] dataplan ops for chaning mac addr/mtu/link status
> + * @param[ctx] passing the ctx of this nss_phy_if to gmac
> + *
> + * @return Return SUCCESS or FAILURE
> + */
> +int nss_gmac_override_data_plane(struct net_device *netdev,
> + struct nss_gmac_data_plane_ops *dp_ops,
> + void *ctx)
> +{
> + struct nss_gmac_dev *gmacdev = (struct nss_gmac_dev 
> *)netdev_priv(netdev);
> +
> + BUG_ON(!gmacdev);
> +
> + if (!dp_ops->open || !dp_ops->close || !dp_ops->link_state
> + || !dp_ops->mac_addr || !dp_ops->change_mtu || !dp_ops->xmit) {
> + netdev_dbg(netdev, "%s: All the op functions must be present, 
> reject this registeration",
> + __func__);
> + return NSS_GMAC_FAILURE;
> + }
> +
> + /*
> +  * If this gmac is up, close the netdev to force TX/RX stop
> +  */
> + if (test_bit(__NSS_GMAC_UP, >flags))
> + nss_gmac_linux_close(netdev);
> +
> + /* Recored the data_plane_ctx, data_plane_ops */
> + gmacdev->data_plane_ctx = ctx;
> + gmacdev->data_plane_ops = dp_ops;
> + gmacdev->first_linkup_done = 0;
> +
> + return NSS_GMAC_SUCCESS;
> +}
> +EXPORT_SYMBOL(nss_gmac_override_data_plane);

Why is this hook needed ?

-- 
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Arnd Bergmann
On Thursday 08 January 2015 14:03:46 Stephen Wang wrote:
> This driver adds support for the internal GMACs on IPQ806x SoCs.
> It supports the device-tree and will register up to 4 ethernet
> interfaces.
> 
> Signed-off-by: Stephen Wang 

Just a very brief review here. The driver is far too long to be
reviewed in one piece, and hopefully is not needed at all if my
suspicion is correct that we already have a driver for the
hardware.

> diff --git a/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt 
> b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
> new file mode 100644
> index 000..806f2e6
> --- /dev/null
> +++ b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
> @@ -0,0 +1,14 @@
> +Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
> +Linux Driver for 3507 DWC Ether MAC 10/100 Universal
> +
> +IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and documentation 
> (hereinafter, "Software") are unsupported proprietary works of Synopsys, Inc. 
> unless otherwise expressly agreed to in writing between Synopsys and you.
> +
> +The Software uses certain Linux kernel functionality and may therefore be 
> subject to the GNU Public License which is available at:
> +http://www.gnu.org/licenses/gpl.html

It sounds like this one is related to the dwmac driver in
drivers/net/ethernet/stmicro/stmmac/. Please move the code into
the same directory and reuse as much as you can.

If this is a completely unrelated part, it should probably go
into drivers/net/ethernet/designware or drivers/net/ethernet/synopsys.

> +#ifdef CONFIG_OF
> +#include 
> +#else
> +#include 
> +#endif

Drop the non-CONFIG_OF part here and elsewhere, we don't support
separate platform directories any more, and mach-qcom is already
DT-only.

> +/**
> + * GMAC registers Map
> + * For Pci based system address is BARx + gmac_register_base
> + * For any other system translation is done accordingly
> + **/
> +enum gmac_registers {
> + gmac_config = 0x,   /* Mac config Register*/
> + gmac_frame_filter = 0x0004, /* Mac frame filtering controls   */
> + gmac_hash_high = 0x0008,/* Multi-cast hash table high */
> + gmac_hash_low = 0x000c, /* Multi-cast hash table low  */
> + gmac_gmii_addr = 0x0010,/* GMII address Register(ext. Phy)*/
> + gmac_gmii_data = 0x0014,/* GMII data Register(ext. Phy)   */
> + gmac_flow_control = 0x0018, /* Flow control Register  */
> + gmac_vlan = 0x001c, /* VLAN tag Register (IEEE 802.1Q)*/
> + gmac_version = 0x0020,  /* GMAC Core Version Register */
> + gmac_wakeup_addr = 0x0028,  /* GMAC wake-up frame filter adrress
> +reg*/

This looks a lot like dwmac1000 as well.

> + if (of_property_read_u32(np, "qcom,id", >macid)
> + || of_property_read_u32(np, "qcom,emulation", 
> >emulation)
> + || of_property_read_u32(np, "qcom,phy_mii_type", 
> >phy_mii_type)
> + || of_property_read_u32(np, "qcom,phy_mdio_addr", 
> >phy_mdio_addr)
> + || of_property_read_u32(np, "qcom,rgmii_delay", 
> >rgmii_delay)
> + || of_property_read_u32(np, "qcom,poll_required", 
> >poll_required)
> + || of_property_read_u32(np, "qcom,forced_speed", 
> >forced_speed)
> + || of_property_read_u32(np, "qcom,forced_duplex", 
> >forced_duplex)
> + || of_property_read_u32(np, "qcom,irq", >irq)
> + || of_property_read_u32(np, "qcom,socver", >socver)) {

This is not an acceptable way to pass data from DT, please use the standard 
properties.

> + if (test_bit(__NSS_GMAC_LINKPOLL, >flags)) {
> +#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 8, 0))
> + gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
> +   _gmac_adjust_link, 0, phyif);
> +#else
> + gmacdev->phydev = phy_connect(netdev, (const char *)phy_id,
> +   _gmac_adjust_link, phyif);
> +#endif

Drop all LINUX_VERSION_CODE checks

> + if (IS_ERR_OR_NULL(gmacdev->phydev)) {
> + netdev_dbg(netdev, "PHY %s attach FAIL", phy_id);
> + ret = -EIO;
> + goto nss_gmac_phy_attach_fail;
> + }

Also any IS_ERR_OR_NULL checks, you are using the API incorrectly.

> +static struct of_device_id nss_gmac_dt_ids[] = {
> + { .compatible =  "qcom,nss-gmac0" },
> + { .compatible =  "qcom,nss-gmac1" },
> + { .compatible =  "qcom,nss-gmac2" },
> + { .compatible =  "qcom,nss-gmac3" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, nss_gmac_dt_ids);

Are all four versions supported by this driver?

Each one of these needs its own devicetree 

Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Joe Perches
On Thu, 2015-01-08 at 14:03 -0800, Stephen Wang wrote:
> This driver adds support for the internal GMACs on IPQ806x SoCs.
> It supports the device-tree and will register up to 4 ethernet
> interfaces.

Trivial:

You might try running the code through checkpatch.


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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Arnd Bergmann
On Thursday 08 January 2015 14:03:46 Stephen Wang wrote:
 This driver adds support for the internal GMACs on IPQ806x SoCs.
 It supports the device-tree and will register up to 4 ethernet
 interfaces.
 
 Signed-off-by: Stephen Wang wstep...@codeaurora.org

Just a very brief review here. The driver is far too long to be
reviewed in one piece, and hopefully is not needed at all if my
suspicion is correct that we already have a driver for the
hardware.

 diff --git a/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt 
 b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
 new file mode 100644
 index 000..806f2e6
 --- /dev/null
 +++ b/drivers/net/ethernet/atheros/nss-gmac/LICENSE.txt
 @@ -0,0 +1,14 @@
 +Linux Driver for 3504 DWC Ether MAC 10/100/1000 Universal
 +Linux Driver for 3507 DWC Ether MAC 10/100 Universal
 +
 +IMPORTANT: Synopsys Ethernet MAC Linux Software Drivers and documentation 
 (hereinafter, Software) are unsupported proprietary works of Synopsys, Inc. 
 unless otherwise expressly agreed to in writing between Synopsys and you.
 +
 +The Software uses certain Linux kernel functionality and may therefore be 
 subject to the GNU Public License which is available at:
 +http://www.gnu.org/licenses/gpl.html

It sounds like this one is related to the dwmac driver in
drivers/net/ethernet/stmicro/stmmac/. Please move the code into
the same directory and reuse as much as you can.

If this is a completely unrelated part, it should probably go
into drivers/net/ethernet/designware or drivers/net/ethernet/synopsys.

 +#ifdef CONFIG_OF
 +#include msm_nss_gmac.h
 +#else
 +#include mach/msm_nss_gmac.h
 +#endif

Drop the non-CONFIG_OF part here and elsewhere, we don't support
separate platform directories any more, and mach-qcom is already
DT-only.

 +/**
 + * GMAC registers Map
 + * For Pci based system address is BARx + gmac_register_base
 + * For any other system translation is done accordingly
 + **/
 +enum gmac_registers {
 + gmac_config = 0x,   /* Mac config Register*/
 + gmac_frame_filter = 0x0004, /* Mac frame filtering controls   */
 + gmac_hash_high = 0x0008,/* Multi-cast hash table high */
 + gmac_hash_low = 0x000c, /* Multi-cast hash table low  */
 + gmac_gmii_addr = 0x0010,/* GMII address Register(ext. Phy)*/
 + gmac_gmii_data = 0x0014,/* GMII data Register(ext. Phy)   */
 + gmac_flow_control = 0x0018, /* Flow control Register  */
 + gmac_vlan = 0x001c, /* VLAN tag Register (IEEE 802.1Q)*/
 + gmac_version = 0x0020,  /* GMAC Core Version Register */
 + gmac_wakeup_addr = 0x0028,  /* GMAC wake-up frame filter adrress
 +reg*/

This looks a lot like dwmac1000 as well.

 + if (of_property_read_u32(np, qcom,id, gmacdev-macid)
 + || of_property_read_u32(np, qcom,emulation, 
 gmaccfg-emulation)
 + || of_property_read_u32(np, qcom,phy_mii_type, 
 gmaccfg-phy_mii_type)
 + || of_property_read_u32(np, qcom,phy_mdio_addr, 
 gmaccfg-phy_mdio_addr)
 + || of_property_read_u32(np, qcom,rgmii_delay, 
 gmaccfg-rgmii_delay)
 + || of_property_read_u32(np, qcom,poll_required, 
 gmaccfg-poll_required)
 + || of_property_read_u32(np, qcom,forced_speed, 
 gmaccfg-forced_speed)
 + || of_property_read_u32(np, qcom,forced_duplex, 
 gmaccfg-forced_duplex)
 + || of_property_read_u32(np, qcom,irq, netdev-irq)
 + || of_property_read_u32(np, qcom,socver, gmaccfg-socver)) {

This is not an acceptable way to pass data from DT, please use the standard 
properties.

 + if (test_bit(__NSS_GMAC_LINKPOLL, gmacdev-flags)) {
 +#if (LINUX_VERSION_CODE = KERNEL_VERSION(3, 8, 0))
 + gmacdev-phydev = phy_connect(netdev, (const char *)phy_id,
 +   nss_gmac_adjust_link, 0, phyif);
 +#else
 + gmacdev-phydev = phy_connect(netdev, (const char *)phy_id,
 +   nss_gmac_adjust_link, phyif);
 +#endif

Drop all LINUX_VERSION_CODE checks

 + if (IS_ERR_OR_NULL(gmacdev-phydev)) {
 + netdev_dbg(netdev, PHY %s attach FAIL, phy_id);
 + ret = -EIO;
 + goto nss_gmac_phy_attach_fail;
 + }

Also any IS_ERR_OR_NULL checks, you are using the API incorrectly.

 +static struct of_device_id nss_gmac_dt_ids[] = {
 + { .compatible =  qcom,nss-gmac0 },
 + { .compatible =  qcom,nss-gmac1 },
 + { .compatible =  qcom,nss-gmac2 },
 + { .compatible =  qcom,nss-gmac3 },
 + {},
 +};
 +MODULE_DEVICE_TABLE(of, nss_gmac_dt_ids);

Are all four versions supported by this driver?

Each one of these needs 

Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Francois Romieu
Stephen Wang wstep...@codeaurora.org :
 This driver adds support for the internal GMACs on IPQ806x SoCs.
 It supports the device-tree and will register up to 4 ethernet
 interfaces.
 
 Signed-off-by: Stephen Wang wstep...@codeaurora.org
 ---
[...]
 +/*
 + * NSS GMAC data plane ops, default would be slowpath and can be override by
 + * nss-drv
 + */
 +struct nss_gmac_data_plane_ops {
 + int (*open)(void *ctx, uint32_t tx_desc_ring, uint32_t rx_desc_ring,
 + uint32_t mode);
 + int (*close)(void *ctx);
 + int (*link_state)(void *ctx, uint32_t link_state);
 + int (*mac_addr)(void *ctx, uint8_t *addr);
 + int (*change_mtu)(void *ctx, uint32_t mtu);
 + int (*xmit)(void *ctx, struct sk_buff *os_buf);
 +};

Weak types.

[...]
 +/*
 + * nss_gmac_register_offload()
 + *
 + * @param[netdev] netdev instance that is going to register
 + * @param[dp_ops] dataplan ops for chaning mac addr/mtu/link status
 + * @param[ctx] passing the ctx of this nss_phy_if to gmac
 + *
 + * @return Return SUCCESS or FAILURE
 + */
 +int nss_gmac_override_data_plane(struct net_device *netdev,
 + struct nss_gmac_data_plane_ops *dp_ops,
 + void *ctx)
 +{
 + struct nss_gmac_dev *gmacdev = (struct nss_gmac_dev 
 *)netdev_priv(netdev);
 +
 + BUG_ON(!gmacdev);
 +
 + if (!dp_ops-open || !dp_ops-close || !dp_ops-link_state
 + || !dp_ops-mac_addr || !dp_ops-change_mtu || !dp_ops-xmit) {
 + netdev_dbg(netdev, %s: All the op functions must be present, 
 reject this registeration,
 + __func__);
 + return NSS_GMAC_FAILURE;
 + }
 +
 + /*
 +  * If this gmac is up, close the netdev to force TX/RX stop
 +  */
 + if (test_bit(__NSS_GMAC_UP, gmacdev-flags))
 + nss_gmac_linux_close(netdev);
 +
 + /* Recored the data_plane_ctx, data_plane_ops */
 + gmacdev-data_plane_ctx = ctx;
 + gmacdev-data_plane_ops = dp_ops;
 + gmacdev-first_linkup_done = 0;
 +
 + return NSS_GMAC_SUCCESS;
 +}
 +EXPORT_SYMBOL(nss_gmac_override_data_plane);

Why is this hook needed ?

-- 
Ueimor
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Re: [PATCH] ethernet: atheros: Add nss-gmac driver

2015-01-08 Thread Joe Perches
On Thu, 2015-01-08 at 14:03 -0800, Stephen Wang wrote:
 This driver adds support for the internal GMACs on IPQ806x SoCs.
 It supports the device-tree and will register up to 4 ethernet
 interfaces.

Trivial:

You might try running the code through checkpatch.


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