[PATCH] staging: rtl8188eu: remove rtw_mp_phy_regdef.h
The header rtw_mp_phy_regdef.h is not used anywhere. 'git grep rtw_mp_phy_regdef.h' returns nothing, remove the file. Signed-off-by: Michael Straube --- .../rtl8188eu/include/rtw_mp_phy_regdef.h | 1078 - 1 file changed, 1078 deletions(-) delete mode 100644 drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h diff --git a/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h b/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h deleted file mode 100644 index 9276e2321f2a.. --- a/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h +++ /dev/null @@ -1,1078 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - **/ -/* - * - * Module: __RTW_MP_PHY_REGDEF_H_ - * - * - * Note: 1. Define PMAC/BB register map - * 2. Define RF register map - * 3. PMAC/BB register bit mask. - * 4. RF reg bit mask. - * 5. Other BB/RF relative definition. - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * DataWho Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * 09/25/2008 MH 1. Add RL6052 register definition - * - */ -#ifndef __RTW_MP_PHY_REGDEF_H_ -#define __RTW_MP_PHY_REGDEF_H_ - - -/*--Define Parameters---*/ - -/* */ -/* 8192S Regsiter offset definition */ -/* */ - -/* */ -/* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */ -/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */ -/* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */ -/* 3. RF register 0x00-2E */ -/* 4. Bit Mask for BB/RF register */ -/* 5. Other definition for BB/RF R/W */ -/* */ - - -/* */ -/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */ -/* 1. Page1(0x100) */ -/* */ -#definerPMAC_Reset 0x100 -#definerPMAC_TxStart 0x104 -#definerPMAC_TxLegacySIG 0x108 -#definerPMAC_TxHTSIG1 0x10c -#definerPMAC_TxHTSIG2 0x110 -#definerPMAC_PHYDebug 0x114 -#definerPMAC_TxPacketNum 0x118 -#definerPMAC_TxIdle0x11c -#definerPMAC_TxMACHeader0 0x120 -#definerPMAC_TxMACHeader1 0x124 -#definerPMAC_TxMACHeader2 0x128 -#definerPMAC_TxMACHeader3 0x12c -#definerPMAC_TxMACHeader4 0x130 -#definerPMAC_TxMACHeader5 0x134 -#definerPMAC_TxDataType0x138 -#definerPMAC_TxRandomSeed 0x13c -#definerPMAC_CCKPLCPPreamble 0x140 -#definerPMAC_CCKPLCPHeader 0x144 -#definerPMAC_CCKCRC16 0x148 -#definerPMAC_OFDMRxCRC32OK 0x170 -#definerPMAC_OFDMRxCRC32Er 0x174 -#definerPMAC_OFDMRxParityEr0x178 -#definerPMAC_OFDMRxCRC8Er 0x17c -#definerPMAC_CCKCRxRC16Er 0x180 -#definerPMAC_CCKCRxRC32Er 0x184 -#definerPMAC_CCKCRxRC32OK 0x188 -#definerPMAC_TxStatus 0x18c - -/* */ -/* 2. Page2(0x200) */ -/* */ -/* The following two definition are only used for USB interface. */ -/* define RF_BB_CMD_ADDR 0x02c0 RF/BB read/write command address. */ -/* define RF_BB_CMD_DATA 0x02c4 RF/BB read/write command data. */ - -/* */ -/* 3. Page8(0x800) */ -/* */ -#definerFPGA0_RFMOD0x800 /* RF mode & CCK TxSC RF BW Setting?? */ - -#definerFPGA0_TxInfo 0x804 /* Status report?? */ -#definerFPGA0_PSDFunction 0x808 - -#definerFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#definerFPGA0_RFTiming10x810 /* Useless now */ -#definerFPGA0_RFTiming20x814 -/* define rFPGA0_XC_RFTiming 0x818 */ -/* define rFPGA0_XD_RFTiming 0x81c */ - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rFPGA0_XC_HSSIParameter1 0x830 -#define rFPGA0_XC_HSSIParameter2 0x834 -#define rFPGA0_XD_HSSIParameter1 0x838 -#define rFPGA0_XD_HSSIParameter2 0x83c -#definerFPGA0_XA_LSSIParameter 0x840 -#definerFPGA0_XB_LSSIParameter 0x844 -#define
[PATCH] staging: rtl8188eu: remove rtw_mp_phy_regdef.h
The header rtw_mp_phy_regdef.h is not used anywhere. 'git grep rtw_mp_phy_regdef.h' returns nothing, remove the file. Signed-off-by: Michael Straube --- .../rtl8188eu/include/rtw_mp_phy_regdef.h | 1078 - 1 file changed, 1078 deletions(-) delete mode 100644 drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h diff --git a/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h b/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h deleted file mode 100644 index 9276e2321f2a.. --- a/drivers/staging/rtl8188eu/include/rtw_mp_phy_regdef.h +++ /dev/null @@ -1,1078 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - **/ -/* - * - * Module: __RTW_MP_PHY_REGDEF_H_ - * - * - * Note: 1. Define PMAC/BB register map - * 2. Define RF register map - * 3. PMAC/BB register bit mask. - * 4. RF reg bit mask. - * 5. Other BB/RF relative definition. - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * DataWho Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * 09/25/2008 MH 1. Add RL6052 register definition - * - */ -#ifndef __RTW_MP_PHY_REGDEF_H_ -#define __RTW_MP_PHY_REGDEF_H_ - - -/*--Define Parameters---*/ - -/* */ -/* 8192S Regsiter offset definition */ -/* */ - -/* */ -/* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */ -/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */ -/* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */ -/* 3. RF register 0x00-2E */ -/* 4. Bit Mask for BB/RF register */ -/* 5. Other definition for BB/RF R/W */ -/* */ - - -/* */ -/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */ -/* 1. Page1(0x100) */ -/* */ -#definerPMAC_Reset 0x100 -#definerPMAC_TxStart 0x104 -#definerPMAC_TxLegacySIG 0x108 -#definerPMAC_TxHTSIG1 0x10c -#definerPMAC_TxHTSIG2 0x110 -#definerPMAC_PHYDebug 0x114 -#definerPMAC_TxPacketNum 0x118 -#definerPMAC_TxIdle0x11c -#definerPMAC_TxMACHeader0 0x120 -#definerPMAC_TxMACHeader1 0x124 -#definerPMAC_TxMACHeader2 0x128 -#definerPMAC_TxMACHeader3 0x12c -#definerPMAC_TxMACHeader4 0x130 -#definerPMAC_TxMACHeader5 0x134 -#definerPMAC_TxDataType0x138 -#definerPMAC_TxRandomSeed 0x13c -#definerPMAC_CCKPLCPPreamble 0x140 -#definerPMAC_CCKPLCPHeader 0x144 -#definerPMAC_CCKCRC16 0x148 -#definerPMAC_OFDMRxCRC32OK 0x170 -#definerPMAC_OFDMRxCRC32Er 0x174 -#definerPMAC_OFDMRxParityEr0x178 -#definerPMAC_OFDMRxCRC8Er 0x17c -#definerPMAC_CCKCRxRC16Er 0x180 -#definerPMAC_CCKCRxRC32Er 0x184 -#definerPMAC_CCKCRxRC32OK 0x188 -#definerPMAC_TxStatus 0x18c - -/* */ -/* 2. Page2(0x200) */ -/* */ -/* The following two definition are only used for USB interface. */ -/* define RF_BB_CMD_ADDR 0x02c0 RF/BB read/write command address. */ -/* define RF_BB_CMD_DATA 0x02c4 RF/BB read/write command data. */ - -/* */ -/* 3. Page8(0x800) */ -/* */ -#definerFPGA0_RFMOD0x800 /* RF mode & CCK TxSC RF BW Setting?? */ - -#definerFPGA0_TxInfo 0x804 /* Status report?? */ -#definerFPGA0_PSDFunction 0x808 - -#definerFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#definerFPGA0_RFTiming10x810 /* Useless now */ -#definerFPGA0_RFTiming20x814 -/* define rFPGA0_XC_RFTiming 0x818 */ -/* define rFPGA0_XD_RFTiming 0x81c */ - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rFPGA0_XC_HSSIParameter1 0x830 -#define rFPGA0_XC_HSSIParameter2 0x834 -#define rFPGA0_XD_HSSIParameter1 0x838 -#define rFPGA0_XD_HSSIParameter2 0x83c -#definerFPGA0_XA_LSSIParameter 0x840 -#definerFPGA0_XB_LSSIParameter 0x844 -#define
