Below patch series applies to family 15 CPU's of AMD platform, to address a consistent warning of:
"[Firmware Bug]: cpu 0, invalid threshold interrupt offset ..." at every boot and every resume, which is misguiding as the reason is not a Firmware Bug but "MC4_MISC thresholding quirk" not being apporpriately applied. Shirish S (3): x86/mce/amd: apply MC4_MISC thresholding to all models of family 15 x86/mce/amd: carve out MC4_MISC thresholding quirk x86/mce/amd: apply MC4_MISC thresholding quirk in resume path arch/x86/include/asm/mce.h | 1 + arch/x86/kernel/cpu/mce/amd.c | 6 ++++ arch/x86/kernel/cpu/mce/core.c | 65 +++++++++++++++++++++++------------------- 3 files changed, 42 insertions(+), 30 deletions(-) -- 2.7.4