Re: [PATCH 1/2] Add NXP LPC32XX SPI driver
Paul Bolle wrote:
(This hit my box with lkml mesages without lkml in the To: header. What
happened here?)
Ahh, have to check my sending script ..
On zo, 2015-07-12 at 11:20 +0200, Martin Devera wrote:
--- /dev/null
+++ b/drivers/spi/spi-lpc32xx.c
+#define DRIVER_NAME"spi-lpc32xx"
+MODULE_ALIAS("platform:" DRIVER_NAME);
This alias seems only useful if there's a corresponding struct
platform_device. Ie, a struct platform_device with a .name of "spi
-lpc32xx", which will fire off a "MODALIAS=platform:spi-lpc32xx" uevent
when it's created.
My fault, thanks for spotting. It is leftover from driver I used
as template...
In any case, I has other comments from Joachim Eastwood thus I plan
to do more cleanup and resubmit the driver later..
thanks,
Martin
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Re: [PATCH 1/2] Add NXP LPC32XX SPI driver
(This hit my box with lkml mesages without lkml in the To: header. What
happened here?)
On zo, 2015-07-12 at 11:20 +0200, Martin Devera wrote:
> --- /dev/null
> +++ b/drivers/spi/spi-lpc32xx.c
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
(I wonder which of these, indirectly, pulls in .)
> +#define DRIVER_NAME "spi-lpc32xx"
> +MODULE_ALIAS("platform:" DRIVER_NAME);
This alias seems only useful if there's a corresponding struct
platform_device. Ie, a struct platform_device with a .name of "spi
-lpc32xx", which will fire off a "MODALIAS=platform:spi-lpc32xx" uevent
when it's created.
I couldn't find that platform_device. Did I miss something? Or is there
another way this alias is useful?
Thanks,
Paul Bolle
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Re: [PATCH 1/2] Add NXP LPC32XX SPI driver
(This hit my box with lkml mesages without lkml in the To: header. What happened here?) On zo, 2015-07-12 at 11:20 +0200, Martin Devera wrote: --- /dev/null +++ b/drivers/spi/spi-lpc32xx.c +#include linux/io.h +#include linux/clk.h +#include linux/interrupt.h +#include linux/platform_device.h +#include linux/of_gpio.h +#include linux/spi/spi.h (I wonder which of these, indirectly, pulls in linux/module.h.) +#define DRIVER_NAME spi-lpc32xx +MODULE_ALIAS(platform: DRIVER_NAME); This alias seems only useful if there's a corresponding struct platform_device. Ie, a struct platform_device with a .name of spi -lpc32xx, which will fire off a MODALIAS=platform:spi-lpc32xx uevent when it's created. I couldn't find that platform_device. Did I miss something? Or is there another way this alias is useful? Thanks, Paul Bolle -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] Add NXP LPC32XX SPI driver
Paul Bolle wrote: (This hit my box with lkml mesages without lkml in the To: header. What happened here?) Ahh, have to check my sending script .. On zo, 2015-07-12 at 11:20 +0200, Martin Devera wrote: --- /dev/null +++ b/drivers/spi/spi-lpc32xx.c +#define DRIVER_NAMEspi-lpc32xx +MODULE_ALIAS(platform: DRIVER_NAME); This alias seems only useful if there's a corresponding struct platform_device. Ie, a struct platform_device with a .name of spi -lpc32xx, which will fire off a MODALIAS=platform:spi-lpc32xx uevent when it's created. My fault, thanks for spotting. It is leftover from driver I used as template... In any case, I has other comments from Joachim Eastwood thus I plan to do more cleanup and resubmit the driver later.. thanks, Martin -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] Add NXP LPC32XX SPI driver
This SPI device is found at least on NXP LPC32XX ARM
family. It has 64 entry FIFO and is quite fast when
using only IRQ.
The driver uses generic SPI and OF frameworks to
minimize its size.
It is tested in HW (SPI flash with JFFS2).
---
.../devicetree/bindings/spi/spi_lpc32xx.txt| 32 +++
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-lpc32xx.c | 265
4 files changed, 306 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
create mode 100644 drivers/spi/spi-lpc32xx.c
diff --git a/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
b/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
new file mode 100644
index 000..aef86f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
@@ -0,0 +1,32 @@
+NXP LPC32XX SPI controller
+
+Required properties:
+- compatible : "nxp,lpc3220-spi"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain SPI controller interrupt
+- cs-gpios : should specify GPIOs used for chipselects.
+ The gpios will be referred to as reg = in the SPI child nodes.
+
+SPI slave nodes must be children of the SPI master node and can
+contain the following properties.
+
+ spi-max-frequency = ;
+ spi-cpol;
+ spi-cpha;
+
+Example:
+ spi1: spi@20088000 {
+ status="okay";
+ interrupts = <55 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <1>;
+ cs-gpios = < 3 5 1>;
+ m25p80@1 {
+ compatible = "st,m25p80";
+ reg = <0>;
+ spi-max-frequency = <100>;
+ spi-cpol;
+ spi-cpha;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 72b0590..373f013 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -375,6 +375,14 @@ config SPI_ORION
help
This enables using the SPI master controller on the Orion chips.
+config SPI_LPC32XX
+ tristate "NXP LPC32XX SPI controller"
+ depends on ARCH_LPC32XX
+ help
+ This selects SPI controller found on NXP LPC32XX SoC. There
+ are also ARM AMBA PL022 SSP controllers, but NXP's SPI one
+ has 64 entry FIFOs as opossed to 8 entry in SSP.
+
config SPI_PL022
tristate "ARM AMBA PL022 SSP controller"
depends on ARM_AMBA
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d8cbf65..62a09bd 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_SPI_GPIO)+= spi-gpio.o
obj-$(CONFIG_SPI_IMG_SPFI) += spi-img-spfi.o
obj-$(CONFIG_SPI_IMX) += spi-imx.o
obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
+obj-$(CONFIG_SPI_LPC32XX) += spi-lpc32xx.o
obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
diff --git a/drivers/spi/spi-lpc32xx.c b/drivers/spi/spi-lpc32xx.c
new file mode 100644
index 000..5c6b1ca
--- /dev/null
+++ b/drivers/spi/spi-lpc32xx.c
@@ -0,0 +1,265 @@
+/*
+ * LPC32XX SPI bus driver
+ *
+ * Copyright (C) 2015 Martin Devera
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRIVER_NAME"spi-lpc32xx"
+
+#define _BIT(n) (1<<(n))
+#define SPI_GLOB_RST_BIT(1) /* SPI interfase sw reset */
+#define SPI_GLOB_ENABLE _BIT(0) /* SPI interface enable */
+
+#define SPI_CON_UNIDIR _BIT(23)/* DATIO pin dir control */
+#define SPI_CON_BHALT _BIT(22)/* Busy halt control */
+#define SPI_CON_BPOL_BIT(21)/* Busy line polarity */
+#define SPI_CON_MSB _BIT(19)/* MSB/LSB control */
+#define SPI_CON_CPOL_BIT(17)/* CPOL control*/
+#define SPI_CON_CPHA_BIT(16)/* CPHA control*/
+#define SPI_CON_MODE00 0 /* mode = 00 */
+#define SPI_CON_MODE01 _BIT(16)/* mode = 01 */
+#define SPI_CON_MODE10 _BIT(17)/* mode = 10 */
+#define SPI_CON_MODE11 _SBF(16,0x3)/* mode = 11 */
+#define SPI_CON_RXTX_BIT(15)/* Tx/Rx control */
+#define SPI_CON_THR _BIT(14)/* FIFO threshold control */
+#define SPI_CON_SHIFT_OFF _BIT(13)/* SPI clock control */
+#define SPI_CON_BITNUM(n) _SBF(9,((n-1)&0xF)) /*
[PATCH 1/2] Add NXP LPC32XX SPI driver
This SPI device is found at least on NXP LPC32XX ARM
family. It has 64 entry FIFO and is quite fast when
using only IRQ.
The driver uses generic SPI and OF frameworks to
minimize its size.
It is tested in HW (SPI flash with JFFS2).
---
.../devicetree/bindings/spi/spi_lpc32xx.txt| 32 +++
drivers/spi/Kconfig|8 +
drivers/spi/Makefile |1 +
drivers/spi/spi-lpc32xx.c | 265
4 files changed, 306 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
create mode 100644 drivers/spi/spi-lpc32xx.c
diff --git a/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
b/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
new file mode 100644
index 000..aef86f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi_lpc32xx.txt
@@ -0,0 +1,32 @@
+NXP LPC32XX SPI controller
+
+Required properties:
+- compatible : nxp,lpc3220-spi
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain SPI controller interrupt
+- cs-gpios : should specify GPIOs used for chipselects.
+ The gpios will be referred to as reg = index in the SPI child nodes.
+
+SPI slave nodes must be children of the SPI master node and can
+contain the following properties.
+
+ spi-max-frequency = hz;
+ spi-cpol;
+ spi-cpha;
+
+Example:
+ spi1: spi@20088000 {
+ status=okay;
+ interrupts = 55 0;
+ #address-cells = 1;
+ #size-cells = 0;
+ num-cs = 1;
+ cs-gpios = gpio 3 5 1;
+ m25p80@1 {
+ compatible = st,m25p80;
+ reg = 0;
+ spi-max-frequency = 100;
+ spi-cpol;
+ spi-cpha;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 72b0590..373f013 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -375,6 +375,14 @@ config SPI_ORION
help
This enables using the SPI master controller on the Orion chips.
+config SPI_LPC32XX
+ tristate NXP LPC32XX SPI controller
+ depends on ARCH_LPC32XX
+ help
+ This selects SPI controller found on NXP LPC32XX SoC. There
+ are also ARM AMBA PL022 SSP controllers, but NXP's SPI one
+ has 64 entry FIFOs as opossed to 8 entry in SSP.
+
config SPI_PL022
tristate ARM AMBA PL022 SSP controller
depends on ARM_AMBA
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d8cbf65..62a09bd 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_SPI_GPIO)+= spi-gpio.o
obj-$(CONFIG_SPI_IMG_SPFI) += spi-img-spfi.o
obj-$(CONFIG_SPI_IMX) += spi-imx.o
obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
+obj-$(CONFIG_SPI_LPC32XX) += spi-lpc32xx.o
obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
diff --git a/drivers/spi/spi-lpc32xx.c b/drivers/spi/spi-lpc32xx.c
new file mode 100644
index 000..5c6b1ca
--- /dev/null
+++ b/drivers/spi/spi-lpc32xx.c
@@ -0,0 +1,265 @@
+/*
+ * LPC32XX SPI bus driver
+ *
+ * Copyright (C) 2015 Martin Devera de...@cdi.cz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/io.h
+#include linux/clk.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/of_gpio.h
+#include linux/spi/spi.h
+
+#define DRIVER_NAMEspi-lpc32xx
+
+#define _BIT(n) (1(n))
+#define SPI_GLOB_RST_BIT(1) /* SPI interfase sw reset */
+#define SPI_GLOB_ENABLE _BIT(0) /* SPI interface enable */
+
+#define SPI_CON_UNIDIR _BIT(23)/* DATIO pin dir control */
+#define SPI_CON_BHALT _BIT(22)/* Busy halt control */
+#define SPI_CON_BPOL_BIT(21)/* Busy line polarity */
+#define SPI_CON_MSB _BIT(19)/* MSB/LSB control */
+#define SPI_CON_CPOL_BIT(17)/* CPOL control*/
+#define SPI_CON_CPHA_BIT(16)/* CPHA control*/
+#define SPI_CON_MODE00 0 /* mode = 00 */
+#define SPI_CON_MODE01 _BIT(16)/* mode = 01 */
+#define SPI_CON_MODE10 _BIT(17)/* mode = 10 */
+#define SPI_CON_MODE11 _SBF(16,0x3)/* mode = 11 */
+#define SPI_CON_RXTX_BIT(15)/* Tx/Rx control */
+#define SPI_CON_THR _BIT(14)/* FIFO threshold control */
+#define SPI_CON_SHIFT_OFF
