Re: [PATCH 1/2] Staging: rts5208: rtsx_card: Fixed multiple coding style issues

[Dan Carpenter]

On Sat, Sep 29, 2018 at 12:44:31AM -0400, Maxime Desroches wrote:
> Fixed multiple coding style issues
> 

Too vague.  Also inaccurate.

regards,
dan carpenter

[PATCH 1/2] Staging: rts5208: rtsx_card: Fixed multiple coding style issues

[Maxime Desroches]

Fixed multiple coding style issues

Signed-off-by: Maxime Desroches 
---
 drivers/staging/rts5208/rtsx_card.c | 96 +++--
 1 file changed, 37 insertions(+), 59 deletions(-)

diff --git a/drivers/staging/rts5208/rtsx_card.c 
b/drivers/staging/rts5208/rtsx_card.c
index d26a8e372fce..b45abbe29bc2 100644
--- a/drivers/staging/rts5208/rtsx_card.c
+++ b/drivers/staging/rts5208/rtsx_card.c
@@ -647,9 +647,8 @@ int switch_ssc_clock(struct rtsx_chip *chip, int clk)
dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
clk, chip->cur_clk);
 
-   if ((clk <= 2) || (n > max_n)) {
+   if ((clk <= 2) || (n > max_n))
return STATUS_FAIL;
-   }
 
mcu_cnt = (u8)(125 / clk + 3);
if (mcu_cnt > 7)
@@ -688,15 +687,13 @@ int switch_ssc_clock(struct rtsx_chip *chip, int clk)
}
 
retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
-   if (retval < 0) {
+   if (retval < 0)
return STATUS_ERROR;
-   }
 
udelay(10);
retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
chip->cur_clk = clk;
 
@@ -790,49 +787,44 @@ int switch_normal_clock(struct rtsx_chip *chip, int clk)
}
 
retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
-   if (retval) {
+   if (retval)
return retval;
-   }
if (sd_vpclk_phase_reset) {
retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 PHASE_NOT_RESET, 0);
-   if (retval) {
+   if (retval)
return retval;
-   }
+
retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
 PHASE_NOT_RESET, 0);
-   if (retval) {
+   if (retval)
return retval;
-   }
}
retval = rtsx_write_register(chip, CLK_DIV, 0xFF,
 (div << 4) | mcu_cnt);
-   if (retval) {
+   if (retval)
return retval;
-   }
retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
if (sd_vpclk_phase_reset) {
udelay(200);
retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 PHASE_NOT_RESET, PHASE_NOT_RESET);
-   if (retval) {
+   if (retval)
return retval;
-   }
+
retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
 PHASE_NOT_RESET, PHASE_NOT_RESET);
-   if (retval) {
+   if (retval)
return retval;
-   }
+
udelay(200);
}
retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
chip->cur_clk = clk;
 
@@ -878,9 +870,8 @@ int enable_card_clock(struct rtsx_chip *chip, u8 card)
clk_en |= MS_CLK_EN;
 
retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
return STATUS_SUCCESS;
 }
@@ -898,9 +889,8 @@ int disable_card_clock(struct rtsx_chip *chip, u8 card)
clk_en |= MS_CLK_EN;
 
retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
return STATUS_SUCCESS;
 }
@@ -924,9 +914,8 @@ int card_power_on(struct rtsx_chip *chip, u8 card)
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
 
retval = rtsx_send_cmd(chip, 0, 100);
-   if (retval != STATUS_SUCCESS) {
+   if (retval != STATUS_SUCCESS)
return STATUS_FAIL;
-   }
 
udelay(chip->pmos_pwr_on_interval);
 
@@ -934,9 +923,8 @@ int card_power_on(struct rtsx_chip *chip, u8 card)
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
 
retval = rtsx_send_cmd(chip, 0, 100);
-   if (retval != STATUS_SUCCESS) {
+   if (retval != STATUS_SUCCESS)
return STATUS_FAIL;
-   }
 
return STATUS_SUCCESS;
 }
@@ -955,9 +943,8 @@ int card_power_off(struct rtsx_chip *chip, u8 card)
}
 
retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val);
-   if (retval) {
+   if (retval)
return retval;
-   }
 
return STATUS_SUCCESS;
 }
@@ -969,9 +956,8 @@ int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
unsigned int lun = SCSI_LUN(srb);
int i;
 
-   if (!chip->rw_card[lun]) {
+   if (!chip->rw_card[lun])
retur