Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2014-01-16 Thread Wolfram Sang

> >You can also use the gcc-ism, which is a bit more concise:
> >
> > sda_falling_time = dev->sda_falling_time ?: 300;
> 
> +1

ditto



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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2014-01-16 Thread Wolfram Sang

 You can also use the gcc-ism, which is a bit more concise:
 
  sda_falling_time = dev-sda_falling_time ?: 300;
 
 +1

ditto



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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-13 Thread Shinya Kuribayashi

On 10/10/13 9:54 AM, Ryan Mallon wrote:

On 09/10/13 18:55, Mika Westerberg wrote:

On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:

@@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)

/* set standard and fast speed deviders for high/low periods */

+   if (dev->sda_falling_time)
+   sda_falling_time = dev->sda_falling_time;
+   else
+   sda_falling_time = 300; /* ns */


I think this looks better:

sda_falling_time = dev->sda_falling_time ? dev->sda_falling_time : 300;


You can also use the gcc-ism, which is a bit more concise:

sda_falling_time = dev->sda_falling_time ?: 300;


+1

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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-13 Thread Shinya Kuribayashi

On 10/10/13 9:54 AM, Ryan Mallon wrote:

On 09/10/13 18:55, Mika Westerberg wrote:

On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:

@@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)

/* set standard and fast speed deviders for high/low periods */

+   if (dev-sda_falling_time)
+   sda_falling_time = dev-sda_falling_time;
+   else
+   sda_falling_time = 300; /* ns */


I think this looks better:

sda_falling_time = dev-sda_falling_time ? dev-sda_falling_time : 300;


You can also use the gcc-ism, which is a bit more concise:

sda_falling_time = dev-sda_falling_time ?: 300;


+1

--
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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-09 Thread Ryan Mallon
On 09/10/13 18:55, Mika Westerberg wrote:
> On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
>>  static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
>> @@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>>  u32 input_clock_khz;
>>  u32 hcnt, lcnt;
>>  u32 reg;
>> +u32 sda_falling_time, scl_falling_time;
>>  
>>  input_clock_khz = dev->get_clk_rate_khz(dev);
>>  
>> @@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>>  
>>  /* set standard and fast speed deviders for high/low periods */
>>  
>> +if (dev->sda_falling_time)
>> +sda_falling_time = dev->sda_falling_time;
>> +else
>> +sda_falling_time = 300; /* ns */
> 
> I think this looks better:
> 
>   sda_falling_time = dev->sda_falling_time ? dev->sda_falling_time : 300;

You can also use the gcc-ism, which is a bit more concise:

sda_falling_time = dev->sda_falling_time ?: 300;

~Ryan

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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-09 Thread Mika Westerberg
On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
>  static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
> @@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>   u32 input_clock_khz;
>   u32 hcnt, lcnt;
>   u32 reg;
> + u32 sda_falling_time, scl_falling_time;
>  
>   input_clock_khz = dev->get_clk_rate_khz(dev);
>  
> @@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
>  
>   /* set standard and fast speed deviders for high/low periods */
>  
> + if (dev->sda_falling_time)
> + sda_falling_time = dev->sda_falling_time;
> + else
> + sda_falling_time = 300; /* ns */

I think this looks better:

sda_falling_time = dev->sda_falling_time ? dev->sda_falling_time : 300;

> +
> + if (dev->scl_falling_time)
> + scl_falling_time = dev->scl_falling_time;
> + else
> + scl_falling_time = 300; /* ns */

Ditto.

> +
>   /* Standard-mode */
>   hcnt = i2c_dw_scl_hcnt(input_clock_khz,
> - 40, /* tHD;STA = tHIGH = 4.0 us */
> - 3,  /* tf = 0.3 us */
> + 4000,   /* tHD;STA = tHIGH = 4.0 us */
> + sda_falling_time,
>   0,  /* 0: DW default, 1: Ideal */
>   0); /* No offset */
>   lcnt = i2c_dw_scl_lcnt(input_clock_khz,
> - 47, /* tLOW = 4.7 us */
> - 3,  /* tf = 0.3 us */
> + 4700,   /* tLOW = 4.7 us */
> + scl_falling_time,
>   0); /* No offset */
>  
>   /* Allow platforms to specify the ideal HCNT and LCNT values */
--
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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-09 Thread Mika Westerberg
On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
  static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
 @@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
   u32 input_clock_khz;
   u32 hcnt, lcnt;
   u32 reg;
 + u32 sda_falling_time, scl_falling_time;
  
   input_clock_khz = dev-get_clk_rate_khz(dev);
  
 @@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
  
   /* set standard and fast speed deviders for high/low periods */
  
 + if (dev-sda_falling_time)
 + sda_falling_time = dev-sda_falling_time;
 + else
 + sda_falling_time = 300; /* ns */

I think this looks better:

sda_falling_time = dev-sda_falling_time ? dev-sda_falling_time : 300;

 +
 + if (dev-scl_falling_time)
 + scl_falling_time = dev-scl_falling_time;
 + else
 + scl_falling_time = 300; /* ns */

Ditto.

 +
   /* Standard-mode */
   hcnt = i2c_dw_scl_hcnt(input_clock_khz,
 - 40, /* tHD;STA = tHIGH = 4.0 us */
 - 3,  /* tf = 0.3 us */
 + 4000,   /* tHD;STA = tHIGH = 4.0 us */
 + sda_falling_time,
   0,  /* 0: DW default, 1: Ideal */
   0); /* No offset */
   lcnt = i2c_dw_scl_lcnt(input_clock_khz,
 - 47, /* tLOW = 4.7 us */
 - 3,  /* tf = 0.3 us */
 + 4700,   /* tLOW = 4.7 us */
 + scl_falling_time,
   0); /* No offset */
  
   /* Allow platforms to specify the ideal HCNT and LCNT values */
--
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Re: [PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-09 Thread Ryan Mallon
On 09/10/13 18:55, Mika Westerberg wrote:
 On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
  static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
 @@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
  u32 input_clock_khz;
  u32 hcnt, lcnt;
  u32 reg;
 +u32 sda_falling_time, scl_falling_time;
  
  input_clock_khz = dev-get_clk_rate_khz(dev);
  
 @@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
  
  /* set standard and fast speed deviders for high/low periods */
  
 +if (dev-sda_falling_time)
 +sda_falling_time = dev-sda_falling_time;
 +else
 +sda_falling_time = 300; /* ns */
 
 I think this looks better:
 
   sda_falling_time = dev-sda_falling_time ? dev-sda_falling_time : 300;

You can also use the gcc-ism, which is a bit more concise:

sda_falling_time = dev-sda_falling_time ?: 300;

~Ryan

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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at  http://www.tux.org/lkml/


[PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-08 Thread Romain Baeriswyl
This patch allows to set independantly SCL and SDA falling times. 
The tLOW period is computed by taking into account the SCL falling time.
The tHIGH period is computed by taking into account the SDA falling time.

For instance in case the margin on tLOW is considered too small, it can 
be increased by increasing the SCL falling time which is by default set 
at 300ns.

The same applies for tHIGH period with the help of SDA falling time.

Signed-off-by: Romain Baeriswyl 
Reviewed-by: Christian Ruppert 
---
 .../devicetree/bindings/i2c/i2c-designware.txt |8 +
 drivers/i2c/busses/i2c-designware-core.c   |   34 +--
 drivers/i2c/busses/i2c-designware-core.h   |2 +
 drivers/i2c/busses/i2c-designware-platdrv.c|7 
 4 files changed, 40 insertions(+), 11 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt 
b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
index 7fd7fa2..5199b0c 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
@@ -14,6 +14,12 @@ Optional properties :
  - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
This option is only supported in hardware blocks version 1.11a or newer.
 
+ - i2c-scl-falling-time : should contain the SCL falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tLOW period.
+
+ - i2c-sda-falling-time : should contain the SDA falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tHIGH period.
+
 Example :
 
i2c@f {
@@ -34,4 +40,6 @@ Example :
interrupts = <12 1>;
clock-frequency = <40>;
i2c-sda-hold-time-ns = <300>;
+   i2c-sda-falling-time-ns = <300>;
+   i2c-scl-falling-time-ns = <300>;
};
diff --git a/drivers/i2c/busses/i2c-designware-core.c 
b/drivers/i2c/busses/i2c-designware-core.c
index 3525fc7..50c35f9 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -217,7 +217,7 @@ i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, 
int offset)
 *
 * If your hardware is free from tHD;STA issue, try this one.
 */
-   return (ic_clk * tSYMBOL + 5000) / 1 - 8 + offset;
+   return (ic_clk * tSYMBOL + 50) / 100 - 8 + offset;
else
/*
 * Conditional expression:
@@ -233,7 +233,8 @@ i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, 
int offset)
 * The reason why we need to take into account "tf" here,
 * is the same as described in i2c_dw_scl_lcnt().
 */
-   return (ic_clk * (tSYMBOL + tf) + 5000) / 1 - 3 + offset;
+   return (ic_clk * (tSYMBOL + tf) + 50) / 100
+   - 3 + offset;
 }
 
 static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
@@ -249,7 +250,7 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, 
int offset)
 * account the fall time of SCL signal (tf).  Default tf value
 * should be 0.3 us, for safety.
 */
-   return ((ic_clk * (tLOW + tf) + 5000) / 1) - 1 + offset;
+   return ((ic_clk * (tLOW + tf) + 50) / 100) - 1 + offset;
 }
 
 static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
@@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
u32 input_clock_khz;
u32 hcnt, lcnt;
u32 reg;
+   u32 sda_falling_time, scl_falling_time;
 
input_clock_khz = dev->get_clk_rate_khz(dev);
 
@@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
 
/* set standard and fast speed deviders for high/low periods */
 
+   if (dev->sda_falling_time)
+   sda_falling_time = dev->sda_falling_time;
+   else
+   sda_falling_time = 300; /* ns */
+
+   if (dev->scl_falling_time)
+   scl_falling_time = dev->scl_falling_time;
+   else
+   scl_falling_time = 300; /* ns */
+
/* Standard-mode */
hcnt = i2c_dw_scl_hcnt(input_clock_khz,
-   40, /* tHD;STA = tHIGH = 4.0 us */
-   3,  /* tf = 0.3 us */
+   4000,   /* tHD;STA = tHIGH = 4.0 us */
+   sda_falling_time,
0,  /* 0: DW default, 1: Ideal */
0); /* No offset */
lcnt = i2c_dw_scl_lcnt(input_clock_khz,
-   47, /* tLOW = 4.7 us */
-   3,  /* tf = 0.3 us */
+   4700,   /* tLOW = 4.7 us */
+   scl_falling_time,
0); /* No offset */
 
  

[PATCH 1/2] i2c designware make SCL and SDA falling time configurable

2013-10-08 Thread Romain Baeriswyl
This patch allows to set independantly SCL and SDA falling times. 
The tLOW period is computed by taking into account the SCL falling time.
The tHIGH period is computed by taking into account the SDA falling time.

For instance in case the margin on tLOW is considered too small, it can 
be increased by increasing the SCL falling time which is by default set 
at 300ns.

The same applies for tHIGH period with the help of SDA falling time.

Signed-off-by: Romain Baeriswyl romai...@abilis.com
Reviewed-by: Christian Ruppert christian.rupp...@abilis.com
---
 .../devicetree/bindings/i2c/i2c-designware.txt |8 +
 drivers/i2c/busses/i2c-designware-core.c   |   34 +--
 drivers/i2c/busses/i2c-designware-core.h   |2 +
 drivers/i2c/busses/i2c-designware-platdrv.c|7 
 4 files changed, 40 insertions(+), 11 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt 
b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
index 7fd7fa2..5199b0c 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
@@ -14,6 +14,12 @@ Optional properties :
  - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
This option is only supported in hardware blocks version 1.11a or newer.
 
+ - i2c-scl-falling-time : should contain the SCL falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tLOW period.
+
+ - i2c-sda-falling-time : should contain the SDA falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tHIGH period.
+
 Example :
 
i2c@f {
@@ -34,4 +40,6 @@ Example :
interrupts = 12 1;
clock-frequency = 40;
i2c-sda-hold-time-ns = 300;
+   i2c-sda-falling-time-ns = 300;
+   i2c-scl-falling-time-ns = 300;
};
diff --git a/drivers/i2c/busses/i2c-designware-core.c 
b/drivers/i2c/busses/i2c-designware-core.c
index 3525fc7..50c35f9 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -217,7 +217,7 @@ i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, 
int offset)
 *
 * If your hardware is free from tHD;STA issue, try this one.
 */
-   return (ic_clk * tSYMBOL + 5000) / 1 - 8 + offset;
+   return (ic_clk * tSYMBOL + 50) / 100 - 8 + offset;
else
/*
 * Conditional expression:
@@ -233,7 +233,8 @@ i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, 
int offset)
 * The reason why we need to take into account tf here,
 * is the same as described in i2c_dw_scl_lcnt().
 */
-   return (ic_clk * (tSYMBOL + tf) + 5000) / 1 - 3 + offset;
+   return (ic_clk * (tSYMBOL + tf) + 50) / 100
+   - 3 + offset;
 }
 
 static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
@@ -249,7 +250,7 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, 
int offset)
 * account the fall time of SCL signal (tf).  Default tf value
 * should be 0.3 us, for safety.
 */
-   return ((ic_clk * (tLOW + tf) + 5000) / 1) - 1 + offset;
+   return ((ic_clk * (tLOW + tf) + 50) / 100) - 1 + offset;
 }
 
 static void __i2c_dw_enable(struct dw_i2c_dev *dev, bool enable)
@@ -286,6 +287,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
u32 input_clock_khz;
u32 hcnt, lcnt;
u32 reg;
+   u32 sda_falling_time, scl_falling_time;
 
input_clock_khz = dev-get_clk_rate_khz(dev);
 
@@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
 
/* set standard and fast speed deviders for high/low periods */
 
+   if (dev-sda_falling_time)
+   sda_falling_time = dev-sda_falling_time;
+   else
+   sda_falling_time = 300; /* ns */
+
+   if (dev-scl_falling_time)
+   scl_falling_time = dev-scl_falling_time;
+   else
+   scl_falling_time = 300; /* ns */
+
/* Standard-mode */
hcnt = i2c_dw_scl_hcnt(input_clock_khz,
-   40, /* tHD;STA = tHIGH = 4.0 us */
-   3,  /* tf = 0.3 us */
+   4000,   /* tHD;STA = tHIGH = 4.0 us */
+   sda_falling_time,
0,  /* 0: DW default, 1: Ideal */
0); /* No offset */
lcnt = i2c_dw_scl_lcnt(input_clock_khz,
-   47, /* tLOW = 4.7 us */
-   3,  /* tf = 0.3 us */
+   4700,   /* tLOW = 4.7 us */
+   scl_falling_time,