Re: [PATCH 1/2] powerpc: Retire e200 core (mpc555x processor)

2020-12-10 Thread Michael Ellerman
On Tue, 17 Nov 2020 05:07:58 + (UTC), Christophe Leroy wrote:
> There is no defconfig selecting CONFIG_E200, and no platform.
> 
> e200 is an earlier version of booke, a predecessor of e500,
> with some particularities like an unified cache instead of both an
> instruction cache and a data cache.
> 
> Remove it.

Applied to powerpc/next.

[1/2] powerpc: Retire e200 core (mpc555x processor)
  https://git.kernel.org/powerpc/c/39c8bf2b3cc166a2a75111e4941cc5f7efbddc35
[2/2] powerpc: Remove ucache_bsize
  https://git.kernel.org/powerpc/c/8817aabb1bdd5811130f94ff6442bb19c9158a3a

cheers


Re: [PATCH 1/2] powerpc: Retire e200 core (mpc555x processor)

2020-12-04 Thread Scott Wood
On Tue, 2020-11-17 at 05:07 +, Christophe Leroy wrote:
> There is no defconfig selecting CONFIG_E200, and no platform.
> 
> e200 is an earlier version of booke, a predecessor of e500,
> with some particularities like an unified cache instead of both an
> instruction cache and a data cache.
> 
> Remove it.
> 
> Signed-off-by: Christophe Leroy 
> ---
>  arch/powerpc/Makefile |  1 -
>  arch/powerpc/include/asm/cputable.h   | 11 -
>  arch/powerpc/include/asm/mmu.h|  2 +-
>  arch/powerpc/include/asm/reg.h|  5 --
>  arch/powerpc/include/asm/reg_booke.h  | 12 -
>  arch/powerpc/kernel/cpu_setup_fsl_booke.S |  9 
>  arch/powerpc/kernel/cputable.c| 46 --
>  arch/powerpc/kernel/head_booke.h  |  3 +-
>  arch/powerpc/kernel/head_fsl_booke.S  | 57 +--
>  arch/powerpc/kernel/setup_32.c|  2 -
>  arch/powerpc/kernel/traps.c   | 25 --
>  arch/powerpc/mm/nohash/fsl_booke.c| 12 ++---
>  arch/powerpc/platforms/Kconfig.cputype| 13 ++
>  13 files changed, 11 insertions(+), 187 deletions(-)

Acked-by: Scott Wood 

-Scott




[PATCH 1/2] powerpc: Retire e200 core (mpc555x processor)

2020-11-16 Thread Christophe Leroy
There is no defconfig selecting CONFIG_E200, and no platform.

e200 is an earlier version of booke, a predecessor of e500,
with some particularities like an unified cache instead of both an
instruction cache and a data cache.

Remove it.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/Makefile |  1 -
 arch/powerpc/include/asm/cputable.h   | 11 -
 arch/powerpc/include/asm/mmu.h|  2 +-
 arch/powerpc/include/asm/reg.h|  5 --
 arch/powerpc/include/asm/reg_booke.h  | 12 -
 arch/powerpc/kernel/cpu_setup_fsl_booke.S |  9 
 arch/powerpc/kernel/cputable.c| 46 --
 arch/powerpc/kernel/head_booke.h  |  3 +-
 arch/powerpc/kernel/head_fsl_booke.S  | 57 +--
 arch/powerpc/kernel/setup_32.c|  2 -
 arch/powerpc/kernel/traps.c   | 25 --
 arch/powerpc/mm/nohash/fsl_booke.c| 12 ++---
 arch/powerpc/platforms/Kconfig.cputype| 13 ++
 13 files changed, 11 insertions(+), 187 deletions(-)

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index a4d56f0a41d9..16b8336f91dd 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -248,7 +248,6 @@ KBUILD_CFLAGS   += $(call cc-option,-mno-string)
 cpu-as-$(CONFIG_40x)   += -Wa,-m405
 cpu-as-$(CONFIG_44x)   += -Wa,-m440
 cpu-as-$(CONFIG_ALTIVEC)   += $(call as-option,-Wa$(comma)-maltivec)
-cpu-as-$(CONFIG_E200)  += -Wa,-me200
 cpu-as-$(CONFIG_E500)  += -Wa,-me500
 
 # When using '-many -mpower4' gas will first try and find a matching power4
diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index 3d2f94afc13a..7d815a3e7206 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -41,7 +41,6 @@ extern int machine_check_4xx(struct pt_regs *regs);
 extern int machine_check_440A(struct pt_regs *regs);
 extern int machine_check_e500mc(struct pt_regs *regs);
 extern int machine_check_e500(struct pt_regs *regs);
-extern int machine_check_e200(struct pt_regs *regs);
 extern int machine_check_47x(struct pt_regs *regs);
 int machine_check_8xx(struct pt_regs *regs);
 int machine_check_83xx(struct pt_regs *regs);
@@ -383,10 +382,6 @@ static inline void cpu_feature_keys_init(void) { }
 #define CPU_FTRS_440x6 (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \
CPU_FTR_INDEXED_DCR)
 #define CPU_FTRS_47X   (CPU_FTRS_440x6)
-#define CPU_FTRS_E200  (CPU_FTR_SPE_COMP | \
-   CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
-   CPU_FTR_NOEXECUTE | \
-   CPU_FTR_DEBUG_LVL_EXC)
 #define CPU_FTRS_E500  (CPU_FTR_MAYBE_CAN_DOZE | \
CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
CPU_FTR_NOEXECUTE)
@@ -535,9 +530,6 @@ enum {
 #ifdef CONFIG_PPC_47x
CPU_FTRS_47X | CPU_FTR_476_DD2 |
 #endif
-#ifdef CONFIG_E200
-   CPU_FTRS_E200 |
-#endif
 #ifdef CONFIG_E500
CPU_FTRS_E500 | CPU_FTRS_E500_2 |
 #endif
@@ -608,9 +600,6 @@ enum {
 #ifdef CONFIG_44x
CPU_FTRS_44X & CPU_FTRS_440x6 &
 #endif
-#ifdef CONFIG_E200
-   CPU_FTRS_E200 &
-#endif
 #ifdef CONFIG_E500
CPU_FTRS_E500 & CPU_FTRS_E500_2 &
 #endif
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 255a1837e9f7..b724c38589a1 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -166,7 +166,7 @@ enum {
 #ifdef CONFIG_44x
MMU_FTR_TYPE_44x |
 #endif
-#if defined(CONFIG_E200) || defined(CONFIG_E500)
+#ifdef CONFIG_E500
MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
 #endif
 #ifdef CONFIG_PPC_47x
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f877a576b338..3c81a6efaf23 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1232,14 +1232,9 @@
 #define SPRN_SPRG_WSCRATCH_MC  SPRN_SPRG1
 #define SPRN_SPRG_RSCRATCH4SPRN_SPRG7R
 #define SPRN_SPRG_WSCRATCH4SPRN_SPRG7W
-#ifdef CONFIG_E200
-#define SPRN_SPRG_RSCRATCH_DBG SPRN_SPRG6R
-#define SPRN_SPRG_WSCRATCH_DBG SPRN_SPRG6W
-#else
 #define SPRN_SPRG_RSCRATCH_DBG SPRN_SPRG9
 #define SPRN_SPRG_WSCRATCH_DBG SPRN_SPRG9
 #endif
-#endif
 
 #ifdef CONFIG_PPC_8xx
 #define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index 29a948e0c0f2..262782f08fd4 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -281,18 +281,6 @@
 #define MSRP_PMMP  0x0004 /* Protect MSR[PMM] */
 #endif
 
-#ifdef CONFIG_E200
-#define MCSR_MCP   0x8000UL /* Machine Check Input Pin */
-#define MCSR_CP_PERR   0x2000UL /* Cache Push Parity Error */
-#define MCSR_CPERR 0x1000UL /* Cache Parity Error */
-#define MCSR_EXCP_ERR  0x0800UL /* ISI, ITLB, or Bus Error on 1st insn
-