Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-24 Thread Heiko Stuebner 
Am Dienstag, 23. Februar 2016, 15:01:01 schrieb jianqun.xu:
> From: Jianqun Xu 
> 
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
> 
> Signed-off-by: Jianqun Xu 

applied to my dts32 branch for 4.6 with Rob's Ack.


Thanks
Heiko

Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-24 Thread Heiko Stuebner 
Am Dienstag, 23. Februar 2016, 15:01:01 schrieb jianqun.xu:
> From: Jianqun Xu 
> 
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
> 
> Signed-off-by: Jianqun Xu 

applied to my dts32 branch for 4.6 with Rob's Ack.


Thanks
Heiko

Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-23 Thread Jianqun Xu 

Hi Rob

在 24/02/2016 06:15, Rob Herring 写道:

On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:

From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

  .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
  1 file changed, 35 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem


s/sysyem/system/

Otherwise:

Acked-by: Rob Herring 


ok, thanks

+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
--
1.9.1

Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-23 Thread Jianqun Xu 

Hi Rob

在 24/02/2016 06:15, Rob Herring 写道:

On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:

From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

  .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
  1 file changed, 35 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem


s/sysyem/system/

Otherwise:

Acked-by: Rob Herring 


ok, thanks

+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
--
1.9.1

Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-23 Thread Rob Herring 
On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
> From: Jianqun Xu 
> 
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
> 
> Signed-off-by: Jianqun Xu 
> ---
> changes in v2:
> - add grf.txt (Heiko)
> 
>  .../devicetree/bindings/soc/rockchip/grf.txt   | 35 
> ++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
> 
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
> b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> new file mode 100644
> index 000..7fb0410
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -0,0 +1,35 @@
> +* Rockchip General Register Files (GRF)
> +
> +The general register file will be used to do static set by software, which
> +is composed of many registers for system control.
> +
> +From RK3368 SoCs, the GRF is divided into two sections,
> +- GRF, used for general non-secure system,
> +- PMUGRF, used for always on sysyem

s/sysyem/system/

Otherwise:

Acked-by: Rob Herring 

> +
> +Required Properties:
> +
> +- compatible: GRF should be one of the followings
> +   - "rockchip,rk3066-grf", "syscon": for rk3066
> +   - "rockchip,rk3188-grf", "syscon": for rk3188
> +   - "rockchip,rk3228-grf", "syscon": for rk3228
> +   - "rockchip,rk3288-grf", "syscon": for rk3288
> +   - "rockchip,rk3368-grf", "syscon": for rk3368
> +   - "rockchip,rk3399-grf", "syscon": for rk3399
> +- compatible: PMUGRF should be one of the followings
> +   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
> +   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +
> +Example: GRF and PMUGRF of RK3399 SoCs
> +
> + pmugrf: syscon@ff32 {
> + compatible = "rockchip,rk3399-pmugrf", "syscon";
> + reg = <0x0 0xff32 0x0 0x1000>;
> + };
> +
> + grf: syscon@ff77 {
> + compatible = "rockchip,rk3399-grf", "syscon";
> + reg = <0x0 0xff77 0x0 0x1>;
> + };
> -- 
> 1.9.1
> 
>

Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-23 Thread Rob Herring 
On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
> From: Jianqun Xu 
> 
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
> 
> Signed-off-by: Jianqun Xu 
> ---
> changes in v2:
> - add grf.txt (Heiko)
> 
>  .../devicetree/bindings/soc/rockchip/grf.txt   | 35 
> ++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
> 
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
> b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> new file mode 100644
> index 000..7fb0410
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -0,0 +1,35 @@
> +* Rockchip General Register Files (GRF)
> +
> +The general register file will be used to do static set by software, which
> +is composed of many registers for system control.
> +
> +From RK3368 SoCs, the GRF is divided into two sections,
> +- GRF, used for general non-secure system,
> +- PMUGRF, used for always on sysyem

s/sysyem/system/

Otherwise:

Acked-by: Rob Herring 

> +
> +Required Properties:
> +
> +- compatible: GRF should be one of the followings
> +   - "rockchip,rk3066-grf", "syscon": for rk3066
> +   - "rockchip,rk3188-grf", "syscon": for rk3188
> +   - "rockchip,rk3228-grf", "syscon": for rk3228
> +   - "rockchip,rk3288-grf", "syscon": for rk3288
> +   - "rockchip,rk3368-grf", "syscon": for rk3368
> +   - "rockchip,rk3399-grf", "syscon": for rk3399
> +- compatible: PMUGRF should be one of the followings
> +   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
> +   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +
> +Example: GRF and PMUGRF of RK3399 SoCs
> +
> + pmugrf: syscon@ff32 {
> + compatible = "rockchip,rk3399-pmugrf", "syscon";
> + reg = <0x0 0xff32 0x0 0x1000>;
> + };
> +
> + grf: syscon@ff77 {
> + compatible = "rockchip,rk3399-grf", "syscon";
> + reg = <0x0 0xff77 0x0 0x1>;
> + };
> -- 
> 1.9.1
> 
>

[PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-22 Thread jianqun.xu 
From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

 .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
-- 
1.9.1

[PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

2016-02-22 Thread jianqun.xu 
From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

 .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
-- 
1.9.1