Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

John Youn  writes:
> On 11/30/2016 4:47 AM, Felipe Balbi wrote:
>> 
>> Hi,
>> 
>> Raviteja Garimella  writes:
>>> Hi Balbi,
>>>
>>> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:

 Hi,

 Raviteja Garimella  writes:
> This is driver for Synopsys Designware Cores USB Device
> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
> Bus (AHB). This driver works with Synopsys UDC20 products.
>
> Signed-off-by: Raviteja Garimella 

 use drivers/usb/dwc2 instead of duplicating it.
>>>
>>> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
>>> controller IP. The one that I submitted for review is for USB Device
>>> controller IP (UDC). The IPs are different.
>> 
>> I'll wait for John's confirmation that this really isn't compatible with
>> dwc2. John?
>> 
>
> Hi Felipe,
>
> This is our older UDC IP, not compatible with HSOTG.
>
> It is also no longer supported by Synopsys and considered EOL.

Is it the same one used by amd5536udc.c? If it is, then it's much better
to refactor that driver so it can be used as a library of sorts by PCI
and non-PCI systems. We really don't want duplicated drivers upstream.

-- 
balbi


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Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

John Youn  writes:
> On 11/30/2016 4:47 AM, Felipe Balbi wrote:
>> 
>> Hi,
>> 
>> Raviteja Garimella  writes:
>>> Hi Balbi,
>>>
>>> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:

 Hi,

 Raviteja Garimella  writes:
> This is driver for Synopsys Designware Cores USB Device
> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
> Bus (AHB). This driver works with Synopsys UDC20 products.
>
> Signed-off-by: Raviteja Garimella 

 use drivers/usb/dwc2 instead of duplicating it.
>>>
>>> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
>>> controller IP. The one that I submitted for review is for USB Device
>>> controller IP (UDC). The IPs are different.
>> 
>> I'll wait for John's confirmation that this really isn't compatible with
>> dwc2. John?
>> 
>
> Hi Felipe,
>
> This is our older UDC IP, not compatible with HSOTG.
>
> It is also no longer supported by Synopsys and considered EOL.

Is it the same one used by amd5536udc.c? If it is, then it's much better
to refactor that driver so it can be used as a library of sorts by PCI
and non-PCI systems. We really don't want duplicated drivers upstream.

-- 
balbi


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Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[John Youn]

On 11/30/2016 4:47 AM, Felipe Balbi wrote:
> 
> Hi,
> 
> Raviteja Garimella  writes:
>> Hi Balbi,
>>
>> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>>>
>>> Hi,
>>>
>>> Raviteja Garimella  writes:
 This is driver for Synopsys Designware Cores USB Device
 Controller (UDC) Subsystem with the AMBA Advanced High-Performance
 Bus (AHB). This driver works with Synopsys UDC20 products.

 Signed-off-by: Raviteja Garimella 
>>>
>>> use drivers/usb/dwc2 instead of duplicating it.
>>
>> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
>> controller IP. The one that I submitted for review is for USB Device
>> controller IP (UDC). The IPs are different.
> 
> I'll wait for John's confirmation that this really isn't compatible with
> dwc2. John?
> 

Hi Felipe,

This is our older UDC IP, not compatible with HSOTG.

It is also no longer supported by Synopsys and considered EOL.

Regards,
John

Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[John Youn]

On 11/30/2016 4:47 AM, Felipe Balbi wrote:
> 
> Hi,
> 
> Raviteja Garimella  writes:
>> Hi Balbi,
>>
>> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>>>
>>> Hi,
>>>
>>> Raviteja Garimella  writes:
 This is driver for Synopsys Designware Cores USB Device
 Controller (UDC) Subsystem with the AMBA Advanced High-Performance
 Bus (AHB). This driver works with Synopsys UDC20 products.

 Signed-off-by: Raviteja Garimella 
>>>
>>> use drivers/usb/dwc2 instead of duplicating it.
>>
>> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
>> controller IP. The one that I submitted for review is for USB Device
>> controller IP (UDC). The IPs are different.
> 
> I'll wait for John's confirmation that this really isn't compatible with
> dwc2. John?
> 

Hi Felipe,

This is our older UDC IP, not compatible with HSOTG.

It is also no longer supported by Synopsys and considered EOL.

Regards,
John

Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

Raviteja Garimella  writes:
> Hi Balbi,
>
> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>>
>> Hi,
>>
>> Raviteja Garimella  writes:
>>> This is driver for Synopsys Designware Cores USB Device
>>> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
>>> Bus (AHB). This driver works with Synopsys UDC20 products.
>>>
>>> Signed-off-by: Raviteja Garimella 
>>
>> use drivers/usb/dwc2 instead of duplicating it.
>
> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
> controller IP. The one that I submitted for review is for USB Device
> controller IP (UDC). The IPs are different.

I'll wait for John's confirmation that this really isn't compatible with
dwc2. John?

-- 
balbi


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Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

Raviteja Garimella  writes:
> Hi Balbi,
>
> On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>>
>> Hi,
>>
>> Raviteja Garimella  writes:
>>> This is driver for Synopsys Designware Cores USB Device
>>> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
>>> Bus (AHB). This driver works with Synopsys UDC20 products.
>>>
>>> Signed-off-by: Raviteja Garimella 
>>
>> use drivers/usb/dwc2 instead of duplicating it.
>
> The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
> controller IP. The one that I submitted for review is for USB Device
> controller IP (UDC). The IPs are different.

I'll wait for John's confirmation that this really isn't compatible with
dwc2. John?

-- 
balbi


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Description: PGP signature

Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Raviteja Garimella]

Hi Balbi,

On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>
> Hi,
>
> Raviteja Garimella  writes:
>> This is driver for Synopsys Designware Cores USB Device
>> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
>> Bus (AHB). This driver works with Synopsys UDC20 products.
>>
>> Signed-off-by: Raviteja Garimella 
>
> use drivers/usb/dwc2 instead of duplicating it.

The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
controller IP. The one that I submitted for review is for USB Device
controller IP (UDC). The IPs are different.

Thanks,
Ravi
>
> --
> balbi

Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Raviteja Garimella]

Hi Balbi,

On Wed, Nov 30, 2016 at 4:10 PM, Felipe Balbi  wrote:
>
> Hi,
>
> Raviteja Garimella  writes:
>> This is driver for Synopsys Designware Cores USB Device
>> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
>> Bus (AHB). This driver works with Synopsys UDC20 products.
>>
>> Signed-off-by: Raviteja Garimella 
>
> use drivers/usb/dwc2 instead of duplicating it.

The ones we have in drivers/usb/dwc2 is for Designware high speed OTG
controller IP. The one that I submitted for review is for USB Device
controller IP (UDC). The IPs are different.

Thanks,
Ravi
>
> --
> balbi

Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

Raviteja Garimella  writes:
> This is driver for Synopsys Designware Cores USB Device
> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
> Bus (AHB). This driver works with Synopsys UDC20 products.
>
> Signed-off-by: Raviteja Garimella 

use drivers/usb/dwc2 instead of duplicating it.

-- 
balbi


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Re: [PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Felipe Balbi]

Hi,

Raviteja Garimella  writes:
> This is driver for Synopsys Designware Cores USB Device
> Controller (UDC) Subsystem with the AMBA Advanced High-Performance
> Bus (AHB). This driver works with Synopsys UDC20 products.
>
> Signed-off-by: Raviteja Garimella 

use drivers/usb/dwc2 instead of duplicating it.

-- 
balbi


signature.asc
Description: PGP signature

[PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Raviteja Garimella]

This is driver for Synopsys Designware Cores USB Device
Controller (UDC) Subsystem with the AMBA Advanced High-Performance
Bus (AHB). This driver works with Synopsys UDC20 products.

Signed-off-by: Raviteja Garimella 
---
 drivers/usb/gadget/udc/Kconfig|   12 +
 drivers/usb/gadget/udc/Makefile   |1 +
 drivers/usb/gadget/udc/snps_udc.c | 1751 +
 drivers/usb/gadget/udc/snps_udc.h | 1071 +++
 4 files changed, 2835 insertions(+)
 create mode 100644 drivers/usb/gadget/udc/snps_udc.c
 create mode 100644 drivers/usb/gadget/udc/snps_udc.h

diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 658b8da..28cd679 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -239,6 +239,18 @@ config USB_MV_U3D
  MARVELL PXA2128 Processor series include a super speed USB3.0 device
  controller, which support super speed USB peripheral.
 
+config USB_SNP_UDC
+   tristate "Synopsys USB 2.0 Device controller"
+   select USB_GADGET_DUALSPEED
+   depends on (ARM || ARM64) && USB_GADGET
+   default ARCH_BCM_IPROC
+   help
+ This adds Device support for Synopsys Designware core
+ AHB subsystem USB2.0 Device Controller(UDC) .
+
+ This driver works with Synopsys UDC20 products.
+ If unsure, say N.
+
 #
 # Controllers available in both integrated and discrete versions
 #
diff --git a/drivers/usb/gadget/udc/Makefile b/drivers/usb/gadget/udc/Makefile
index 98e74ed..2b63a2b 100644
--- a/drivers/usb/gadget/udc/Makefile
+++ b/drivers/usb/gadget/udc/Makefile
@@ -36,4 +36,5 @@ obj-$(CONFIG_USB_FOTG210_UDC) += fotg210-udc.o
 obj-$(CONFIG_USB_MV_U3D)   += mv_u3d_core.o
 obj-$(CONFIG_USB_GR_UDC)   += gr_udc.o
 obj-$(CONFIG_USB_GADGET_XILINX)+= udc-xilinx.o
+obj-$(CONFIG_USB_SNP_UDC)  += snps_udc.o
 obj-$(CONFIG_USB_BDC_UDC)  += bdc/
diff --git a/drivers/usb/gadget/udc/snps_udc.c 
b/drivers/usb/gadget/udc/snps_udc.c
new file mode 100644
index 000..d8c46ce
--- /dev/null
+++ b/drivers/usb/gadget/udc/snps_udc.c
@@ -0,0 +1,1751 @@
+/*
+ * snps_udc.c - Synopsys USB 2.0 Device Controller driver
+ *
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "snps_udc.h"
+
+#define DRIVER_DESC "Driver for Synopsys Designware core UDC"
+
+static void ep0_setup_init(struct snps_udc_ep *ep, int status)
+{
+   struct snps_udc *udc = ep->udc;
+
+   ep->dma.virt->setup.status = DMA_STS_BUF_HOST_READY;
+   ep->dirn = USB_DIR_OUT;
+   ep->stopped = 0;
+
+   if (!status) {
+   clear_ep_nak(udc->regs, ep->num, USB_DIR_OUT);
+   clear_ep_nak(udc->regs, ep->num, USB_DIR_IN);
+   } else {
+   enable_ep_stall(udc->regs, ep->num, USB_DIR_IN);
+   enable_ep_stall(udc->regs, ep->num, USB_DIR_OUT);
+   }
+
+   enable_udc_ep_irq(udc->regs, ep->num, USB_DIR_OUT);
+   enable_ep_dma(udc->regs, ep->num, USB_DIR_OUT);
+
+   dev_dbg(udc->dev, "%s setup buffer initialized\n", ep->name);
+}
+
+static void ep_dma_init(struct snps_udc_ep *ep)
+{
+   struct snps_udc *udc = ep->udc;
+   u32 desc_cnt = (DESC_CNT - 1);
+   u32 i;
+
+   ep->dma.virt = >udc->dma.virt->ep[ep->num];
+   ep->dma.phys = >udc->dma.phys->ep[ep->num];
+
+   ep->dma.virt->setup.status = DMA_STS_BUF_HOST_BUSY;
+   set_setup_buf_ptr(udc->regs, ep->num, USB_DIR_OUT,
+ >dma.phys->setup);
+
+   for (i = 0; i < DESC_CNT; i++) {
+   ep->dma.virt->desc[i].status = DMA_STS_BUF_HOST_BUSY;
+   ep->dma.virt->desc[i].next_desc_addr =
+   (dma_addr_t)>dma.phys->desc[i + 1];
+   }
+   ep->dma.virt->desc[desc_cnt].next_desc_addr =
+   (dma_addr_t)>dma.phys->desc[0];
+
+   set_data_desc_ptr(udc->regs, ep->num, USB_DIR_OUT,
+ >dma.phys->desc[0]);
+   set_data_desc_ptr(udc->regs, ep->num, USB_DIR_IN,
+ >dma.phys->desc[0]);
+
+   dev_dbg(udc->dev, " %s dma initialized\n", ep->name);
+}
+
+static void ep_data_dma_init(struct snps_udc_ep *ep)
+{
+   struct ep_xfer_req *ep_req;
+
+   dev_dbg(ep->udc->dev, "enter: %s\n", __func__);
+
+   ep_req = 

[PATCH 2/2] Synopsys USB 2.0 Device Controller (UDC) Driver

[Raviteja Garimella]

This is driver for Synopsys Designware Cores USB Device
Controller (UDC) Subsystem with the AMBA Advanced High-Performance
Bus (AHB). This driver works with Synopsys UDC20 products.

Signed-off-by: Raviteja Garimella 
---
 drivers/usb/gadget/udc/Kconfig|   12 +
 drivers/usb/gadget/udc/Makefile   |1 +
 drivers/usb/gadget/udc/snps_udc.c | 1751 +
 drivers/usb/gadget/udc/snps_udc.h | 1071 +++
 4 files changed, 2835 insertions(+)
 create mode 100644 drivers/usb/gadget/udc/snps_udc.c
 create mode 100644 drivers/usb/gadget/udc/snps_udc.h

diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 658b8da..28cd679 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -239,6 +239,18 @@ config USB_MV_U3D
  MARVELL PXA2128 Processor series include a super speed USB3.0 device
  controller, which support super speed USB peripheral.
 
+config USB_SNP_UDC
+   tristate "Synopsys USB 2.0 Device controller"
+   select USB_GADGET_DUALSPEED
+   depends on (ARM || ARM64) && USB_GADGET
+   default ARCH_BCM_IPROC
+   help
+ This adds Device support for Synopsys Designware core
+ AHB subsystem USB2.0 Device Controller(UDC) .
+
+ This driver works with Synopsys UDC20 products.
+ If unsure, say N.
+
 #
 # Controllers available in both integrated and discrete versions
 #
diff --git a/drivers/usb/gadget/udc/Makefile b/drivers/usb/gadget/udc/Makefile
index 98e74ed..2b63a2b 100644
--- a/drivers/usb/gadget/udc/Makefile
+++ b/drivers/usb/gadget/udc/Makefile
@@ -36,4 +36,5 @@ obj-$(CONFIG_USB_FOTG210_UDC) += fotg210-udc.o
 obj-$(CONFIG_USB_MV_U3D)   += mv_u3d_core.o
 obj-$(CONFIG_USB_GR_UDC)   += gr_udc.o
 obj-$(CONFIG_USB_GADGET_XILINX)+= udc-xilinx.o
+obj-$(CONFIG_USB_SNP_UDC)  += snps_udc.o
 obj-$(CONFIG_USB_BDC_UDC)  += bdc/
diff --git a/drivers/usb/gadget/udc/snps_udc.c 
b/drivers/usb/gadget/udc/snps_udc.c
new file mode 100644
index 000..d8c46ce
--- /dev/null
+++ b/drivers/usb/gadget/udc/snps_udc.c
@@ -0,0 +1,1751 @@
+/*
+ * snps_udc.c - Synopsys USB 2.0 Device Controller driver
+ *
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "snps_udc.h"
+
+#define DRIVER_DESC "Driver for Synopsys Designware core UDC"
+
+static void ep0_setup_init(struct snps_udc_ep *ep, int status)
+{
+   struct snps_udc *udc = ep->udc;
+
+   ep->dma.virt->setup.status = DMA_STS_BUF_HOST_READY;
+   ep->dirn = USB_DIR_OUT;
+   ep->stopped = 0;
+
+   if (!status) {
+   clear_ep_nak(udc->regs, ep->num, USB_DIR_OUT);
+   clear_ep_nak(udc->regs, ep->num, USB_DIR_IN);
+   } else {
+   enable_ep_stall(udc->regs, ep->num, USB_DIR_IN);
+   enable_ep_stall(udc->regs, ep->num, USB_DIR_OUT);
+   }
+
+   enable_udc_ep_irq(udc->regs, ep->num, USB_DIR_OUT);
+   enable_ep_dma(udc->regs, ep->num, USB_DIR_OUT);
+
+   dev_dbg(udc->dev, "%s setup buffer initialized\n", ep->name);
+}
+
+static void ep_dma_init(struct snps_udc_ep *ep)
+{
+   struct snps_udc *udc = ep->udc;
+   u32 desc_cnt = (DESC_CNT - 1);
+   u32 i;
+
+   ep->dma.virt = >udc->dma.virt->ep[ep->num];
+   ep->dma.phys = >udc->dma.phys->ep[ep->num];
+
+   ep->dma.virt->setup.status = DMA_STS_BUF_HOST_BUSY;
+   set_setup_buf_ptr(udc->regs, ep->num, USB_DIR_OUT,
+ >dma.phys->setup);
+
+   for (i = 0; i < DESC_CNT; i++) {
+   ep->dma.virt->desc[i].status = DMA_STS_BUF_HOST_BUSY;
+   ep->dma.virt->desc[i].next_desc_addr =
+   (dma_addr_t)>dma.phys->desc[i + 1];
+   }
+   ep->dma.virt->desc[desc_cnt].next_desc_addr =
+   (dma_addr_t)>dma.phys->desc[0];
+
+   set_data_desc_ptr(udc->regs, ep->num, USB_DIR_OUT,
+ >dma.phys->desc[0]);
+   set_data_desc_ptr(udc->regs, ep->num, USB_DIR_IN,
+ >dma.phys->desc[0]);
+
+   dev_dbg(udc->dev, " %s dma initialized\n", ep->name);
+}
+
+static void ep_data_dma_init(struct snps_udc_ep *ep)
+{
+   struct ep_xfer_req *ep_req;
+
+   dev_dbg(ep->udc->dev, "enter: %s\n", __func__);
+
+   ep_req = list_first_entry(>queue, struct