RE: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
Hi Thierry, > Subject: Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610. > > On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote: > > Signed-off-by: Xiubo Li > > --- > > arch/arm/boot/dts/vf610.dtsi | 83 > > +++- > > 1 file changed, 82 insertions(+), 1 deletion(-) > > Please also pay attention to the correct capitalization in the subject > here. "FTM" and "PWM". Furthermore this could probably use more than a > single line as patch description. > Yes, I will revise it in v2. Thanks very much. -- Best Regards. Xiubo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
Hi Thierry, Subject: Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610. On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote: Signed-off-by: Xiubo Li li.xi...@freescale.com --- arch/arm/boot/dts/vf610.dtsi | 83 +++- 1 file changed, 82 insertions(+), 1 deletion(-) Please also pay attention to the correct capitalization in the subject here. FTM and PWM. Furthermore this could probably use more than a single line as patch description. Yes, I will revise it in v2. Thanks very much. -- Best Regards. Xiubo -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote: > Signed-off-by: Xiubo Li > --- > arch/arm/boot/dts/vf610.dtsi | 83 > +++- > 1 file changed, 82 insertions(+), 1 deletion(-) Please also pay attention to the correct capitalization in the subject here. "FTM" and "PWM". Furthermore this could probably use more than a single line as patch description. Thierry pgp47BC9Wi562.pgp Description: PGP signature
Re: [PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
On Wed, Aug 21, 2013 at 11:07:40AM +0800, Xiubo Li wrote: Signed-off-by: Xiubo Li li.xi...@freescale.com --- arch/arm/boot/dts/vf610.dtsi | 83 +++- 1 file changed, 82 insertions(+), 1 deletion(-) Please also pay attention to the correct capitalization in the subject here. FTM and PWM. Furthermore this could probably use more than a single line as patch description. Thierry pgp47BC9Wi562.pgp Description: PGP signature
[PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
Signed-off-by: Xiubo Li
---
arch/arm/boot/dts/vf610.dtsi | 83 +++-
1 file changed, 82 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 67d929c..b3a0b6e 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -140,6 +140,17 @@
clock-names = "pit";
};
+ pwm0: pwm@40038000 {
+ compatible = "fsl,vf610-ftm-pwm";
+ #pwm-cells = <3>;
+ reg = <0x40038000 0x1000>;
+ clocks = < VF610_CLK_FTM0_EXT_FIX_EN>,
+ < VF610_CLK_FTM0_EXT_SEL>,
+ < VF610_CLK_FTM0>;
+ clock-names = "ftm0_ext_fix_en",
"ftm0_ext_sel", "ftm0";
+ status = "disabled";
+ };
+
wdog@4003e000 {
compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
reg = <0x4003e000 0x1000>;
@@ -270,16 +281,86 @@
};
pwm0 {
- pinctrl_pwm0_1: pwm0grp_1 {
+ pinctrl_pwm0_ch0_en: pwm0grp_ch0_en {
fsl,pins = <
VF610_PAD_PTB0__FTM0_CH0
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch0_ds: pwm0grp_ch0_ds {
+ fsl,pins = <
+ VF610_PAD_PTB0__FTM0_CH0
0x
+ >;
+ };
+ pinctrl_pwm0_ch1_en: pwm0grp_ch1_en {
+ fsl,pins = <
VF610_PAD_PTB1__FTM0_CH1
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch1_ds: pwm0grp_ch1_ds {
+ fsl,pins = <
+ VF610_PAD_PTB1__FTM0_CH1
0x
+ >;
+ };
+ pinctrl_pwm0_ch2_en: pwm0grp_ch2_en {
+ fsl,pins = <
VF610_PAD_PTB2__FTM0_CH2
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch2_ds: pwm0grp_ch2_ds {
+ fsl,pins = <
+ VF610_PAD_PTB2__FTM0_CH2
0x
+ >;
+ };
+ pinctrl_pwm0_ch3_en: pwm0grp_ch3_en {
+ fsl,pins = <
VF610_PAD_PTB3__FTM0_CH3
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch3_ds: pwm0grp_ch3_ds {
+ fsl,pins = <
+ VF610_PAD_PTB3__FTM0_CH3
0x
+ >;
+ };
+ pinctrl_pwm0_ch4_en: pwm0grp_ch4_en {
+ fsl,pins = <
+ VF610_PAD_PTB4__FTM0_CH4
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch4_ds: pwm0grp_ch4_ds {
+ fsl,pins = <
+ VF610_PAD_PTB4__FTM0_CH4
0x
+ >;
+ };
+ pinctrl_pwm0_ch5_en: pwm0grp_ch5_en {
+ fsl,pins = <
+ VF610_PAD_PTB5__FTM0_CH5
0x1582
+ >;
+ };
+ pinctrl_pwm0_ch5_ds: pwm0grp_ch5_ds {
+
[PATCH 2/4] ARM: dts: Add Freescale ftm pwm node for VF610.
Signed-off-by: Xiubo Li li.xi...@freescale.com
---
arch/arm/boot/dts/vf610.dtsi | 83 +++-
1 file changed, 82 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 67d929c..b3a0b6e 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -140,6 +140,17 @@
clock-names = pit;
};
+ pwm0: pwm@40038000 {
+ compatible = fsl,vf610-ftm-pwm;
+ #pwm-cells = 3;
+ reg = 0x40038000 0x1000;
+ clocks = clks VF610_CLK_FTM0_EXT_FIX_EN,
+ clks VF610_CLK_FTM0_EXT_SEL,
+ clks VF610_CLK_FTM0;
+ clock-names = ftm0_ext_fix_en,
ftm0_ext_sel, ftm0;
+ status = disabled;
+ };
+
wdog@4003e000 {
compatible = fsl,vf610-wdt, fsl,imx21-wdt;
reg = 0x4003e000 0x1000;
@@ -270,16 +281,86 @@
};
pwm0 {
- pinctrl_pwm0_1: pwm0grp_1 {
+ pinctrl_pwm0_ch0_en: pwm0grp_ch0_en {
fsl,pins =
VF610_PAD_PTB0__FTM0_CH0
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch0_ds: pwm0grp_ch0_ds {
+ fsl,pins =
+ VF610_PAD_PTB0__FTM0_CH0
0x
+ ;
+ };
+ pinctrl_pwm0_ch1_en: pwm0grp_ch1_en {
+ fsl,pins =
VF610_PAD_PTB1__FTM0_CH1
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch1_ds: pwm0grp_ch1_ds {
+ fsl,pins =
+ VF610_PAD_PTB1__FTM0_CH1
0x
+ ;
+ };
+ pinctrl_pwm0_ch2_en: pwm0grp_ch2_en {
+ fsl,pins =
VF610_PAD_PTB2__FTM0_CH2
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch2_ds: pwm0grp_ch2_ds {
+ fsl,pins =
+ VF610_PAD_PTB2__FTM0_CH2
0x
+ ;
+ };
+ pinctrl_pwm0_ch3_en: pwm0grp_ch3_en {
+ fsl,pins =
VF610_PAD_PTB3__FTM0_CH3
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch3_ds: pwm0grp_ch3_ds {
+ fsl,pins =
+ VF610_PAD_PTB3__FTM0_CH3
0x
+ ;
+ };
+ pinctrl_pwm0_ch4_en: pwm0grp_ch4_en {
+ fsl,pins =
+ VF610_PAD_PTB4__FTM0_CH4
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch4_ds: pwm0grp_ch4_ds {
+ fsl,pins =
+ VF610_PAD_PTB4__FTM0_CH4
0x
+ ;
+ };
+ pinctrl_pwm0_ch5_en: pwm0grp_ch5_en {
+ fsl,pins =
+ VF610_PAD_PTB5__FTM0_CH5
0x1582
+ ;
+ };
+ pinctrl_pwm0_ch5_ds: pwm0grp_ch5_ds {
+
