Re: [PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[kbuild test robot]

Hi Wang,

[auto build test WARNING on linus/master]
[also build test WARNING on v4.11-rc7 next-20170421]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/ying-zhang22455-nxp-com/soc-fsl-add-support-for-arm64-Layerscape-SOC-specific-drivers/20170421-174921
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

All warnings (new ones prefixed by >>):

   drivers/soc/fsl/layerscape/ftm_alarm.c: In function 'ftm_clean_alarm':
>> drivers/soc/fsl/layerscape/ftm_alarm.c:139:13: warning: large integer 
>> implicitly truncated to unsigned type [-Woverflow]
 ftm_writel(~0UL, ftm1_base + FTM_MOD);
^

vim +139 drivers/soc/fsl/layerscape/ftm_alarm.c

   123  cycle = 0;
   124  }
   125  
   126  return cycle;
   127  }
   128  
   129  static u32 cycle_to_time(u32 cycle)
   130  {
   131  return cycle / alarm_freq + 1;
   132  }
   133  
   134  static void ftm_clean_alarm(void)
   135  {
   136  ftm_counter_disable(ftm1_base);
   137  
   138  ftm_writel(0x00, ftm1_base + FTM_CNTIN);
 > 139  ftm_writel(~0UL, ftm1_base + FTM_MOD);
   140  
   141  ftm_reset_counter(ftm1_base);
   142  }
   143  
   144  static int ftm_set_alarm(u64 cycle)
   145  {
   146  ftm_irq_disable(ftm1_base);
   147  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[kbuild test robot]

Hi Wang,

[auto build test WARNING on linus/master]
[also build test WARNING on v4.11-rc7 next-20170421]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/ying-zhang22455-nxp-com/soc-fsl-add-support-for-arm64-Layerscape-SOC-specific-drivers/20170421-174921
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

All warnings (new ones prefixed by >>):

   drivers/soc/fsl/layerscape/ftm_alarm.c: In function 'ftm_clean_alarm':
>> drivers/soc/fsl/layerscape/ftm_alarm.c:139:13: warning: large integer 
>> implicitly truncated to unsigned type [-Woverflow]
 ftm_writel(~0UL, ftm1_base + FTM_MOD);
^

vim +139 drivers/soc/fsl/layerscape/ftm_alarm.c

   123  cycle = 0;
   124  }
   125  
   126  return cycle;
   127  }
   128  
   129  static u32 cycle_to_time(u32 cycle)
   130  {
   131  return cycle / alarm_freq + 1;
   132  }
   133  
   134  static void ftm_clean_alarm(void)
   135  {
   136  ftm_counter_disable(ftm1_base);
   137  
   138  ftm_writel(0x00, ftm1_base + FTM_CNTIN);
 > 139  ftm_writel(~0UL, ftm1_base + FTM_MOD);
   140  
   141  ftm_reset_counter(ftm1_base);
   142  }
   143  
   144  static int ftm_set_alarm(u64 cycle)
   145  {
   146  ftm_irq_disable(ftm1_base);
   147  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[kbuild test robot]

Hi Wang,

[auto build test WARNING on linus/master]
[also build test WARNING on v4.11-rc7 next-20170421]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/ying-zhang22455-nxp-com/soc-fsl-add-support-for-arm64-Layerscape-SOC-specific-drivers/20170421-174921
config: powerpc-allmodconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc 

All warnings (new ones prefixed by >>):

warning: (MMC_SDHCI_OF_ESDHC) selects FSL_GUTS which has unmet direct 
dependencies (FSL_SOC_DRIVERS)

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[kbuild test robot]

Hi Wang,

[auto build test WARNING on linus/master]
[also build test WARNING on v4.11-rc7 next-20170421]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/ying-zhang22455-nxp-com/soc-fsl-add-support-for-arm64-Layerscape-SOC-specific-drivers/20170421-174921
config: powerpc-allmodconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc 

All warnings (new ones prefixed by >>):

warning: (MMC_SDHCI_OF_ESDHC) selects FSL_GUTS which has unmet direct 
dependencies (FSL_SOC_DRIVERS)

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

[PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[ying.zhang22455]

From: Wang Dongsheng 

Signed-off-by: Zhang Ying-22455 
---
 drivers/soc/fsl/layerscape/Kconfig |  10 ++
 drivers/soc/fsl/layerscape/Makefile|   1 +
 drivers/soc/fsl/layerscape/ftm_alarm.c | 274 +
 3 files changed, 285 insertions(+)
 create mode 100644 drivers/soc/fsl/layerscape/Kconfig
 create mode 100644 drivers/soc/fsl/layerscape/Makefile
 create mode 100644 drivers/soc/fsl/layerscape/ftm_alarm.c

diff --git a/drivers/soc/fsl/layerscape/Kconfig 
b/drivers/soc/fsl/layerscape/Kconfig
new file mode 100644
index 000..e1373aa
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/Kconfig
@@ -0,0 +1,10 @@
+#
+# Layerscape Soc drivers
+#
+config  FTM_ALARM
+   bool "FTM alarm driver"
+   default n
+   help
+   Say y here to enable FTM alarm support.  The FTM alarm provides
+   alarm functions for wakeup system from deep sleep.  There is only
+   one FTM can be used in ALARM(FTM 0).
diff --git a/drivers/soc/fsl/layerscape/Makefile 
b/drivers/soc/fsl/layerscape/Makefile
new file mode 100644
index 000..6299aa1
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o
diff --git a/drivers/soc/fsl/layerscape/ftm_alarm.c 
b/drivers/soc/fsl/layerscape/ftm_alarm.c
new file mode 100644
index 000..c42b26b
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/ftm_alarm.c
@@ -0,0 +1,274 @@
+/*
+ * Freescale FlexTimer Module (FTM) Alarm driver.
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define FTM_SC 0x00
+#define FTM_SC_CLK_SHIFT   3
+#define FTM_SC_CLK_MASK(0x3 << FTM_SC_CLK_SHIFT)
+#define FTM_SC_CLK(c)  ((c) << FTM_SC_CLK_SHIFT)
+#define FTM_SC_PS_MASK 0x7
+#define FTM_SC_TOIEBIT(6)
+#define FTM_SC_TOF BIT(7)
+
+#define FTM_SC_CLKS_FIXED_FREQ 0x02
+
+#define FTM_CNT0x04
+#define FTM_MOD0x08
+#define FTM_CNTIN  0x4C
+
+#define FIXED_FREQ_CLK 32000
+#define MAX_FREQ_DIV   (1 << FTM_SC_PS_MASK)
+#define MAX_COUNT_VAL  0x
+
+static void __iomem *ftm1_base;
+static u32 alarm_freq;
+static bool big_endian;
+
+static inline u32 ftm_readl(void __iomem *addr)
+{
+   if (big_endian)
+   return ioread32be(addr);
+
+   return ioread32(addr);
+}
+
+static inline void ftm_writel(u32 val, void __iomem *addr)
+{
+   if (big_endian)
+   iowrite32be(val, addr);
+   else
+   iowrite32(val, addr);
+}
+
+static inline void ftm_counter_enable(void __iomem *base)
+{
+   u32 val;
+
+   /* select and enable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_counter_disable(void __iomem *base)
+{
+   u32 val;
+
+   /* disable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_acknowledge(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOF;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_enable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val |= FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_disable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_reset_counter(void __iomem *base)
+{
+   /*
+* The CNT register contains the FTM counter value.
+* Reset clears the CNT register. Writing any value to COUNT
+* updates the counter with its initial value, CNTIN.
+*/
+   ftm_writel(0x00, base + FTM_CNT);
+}
+
+static u32 time_to_cycle(unsigned long time)
+{
+   u32 cycle;
+
+   cycle = time * alarm_freq;
+   if (cycle > MAX_COUNT_VAL) {
+   pr_err("Out of alarm range.\n");
+   cycle = 0;
+   }
+
+   return cycle;
+}
+
+static u32 cycle_to_time(u32 cycle)
+{
+   return cycle / alarm_freq + 1;
+}
+
+static void ftm_clean_alarm(void)
+{
+   ftm_counter_disable(ftm1_base);
+
+   ftm_writel(0x00, ftm1_base + FTM_CNTIN);
+   ftm_writel(~0UL, ftm1_base + FTM_MOD);
+
+   

[PATCH 2/5] soc: fsl: add flextimer module alarm driver for Layerscape

[ying.zhang22455]

From: Wang Dongsheng 

Signed-off-by: Zhang Ying-22455 
---
 drivers/soc/fsl/layerscape/Kconfig |  10 ++
 drivers/soc/fsl/layerscape/Makefile|   1 +
 drivers/soc/fsl/layerscape/ftm_alarm.c | 274 +
 3 files changed, 285 insertions(+)
 create mode 100644 drivers/soc/fsl/layerscape/Kconfig
 create mode 100644 drivers/soc/fsl/layerscape/Makefile
 create mode 100644 drivers/soc/fsl/layerscape/ftm_alarm.c

diff --git a/drivers/soc/fsl/layerscape/Kconfig 
b/drivers/soc/fsl/layerscape/Kconfig
new file mode 100644
index 000..e1373aa
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/Kconfig
@@ -0,0 +1,10 @@
+#
+# Layerscape Soc drivers
+#
+config  FTM_ALARM
+   bool "FTM alarm driver"
+   default n
+   help
+   Say y here to enable FTM alarm support.  The FTM alarm provides
+   alarm functions for wakeup system from deep sleep.  There is only
+   one FTM can be used in ALARM(FTM 0).
diff --git a/drivers/soc/fsl/layerscape/Makefile 
b/drivers/soc/fsl/layerscape/Makefile
new file mode 100644
index 000..6299aa1
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o
diff --git a/drivers/soc/fsl/layerscape/ftm_alarm.c 
b/drivers/soc/fsl/layerscape/ftm_alarm.c
new file mode 100644
index 000..c42b26b
--- /dev/null
+++ b/drivers/soc/fsl/layerscape/ftm_alarm.c
@@ -0,0 +1,274 @@
+/*
+ * Freescale FlexTimer Module (FTM) Alarm driver.
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define FTM_SC 0x00
+#define FTM_SC_CLK_SHIFT   3
+#define FTM_SC_CLK_MASK(0x3 << FTM_SC_CLK_SHIFT)
+#define FTM_SC_CLK(c)  ((c) << FTM_SC_CLK_SHIFT)
+#define FTM_SC_PS_MASK 0x7
+#define FTM_SC_TOIEBIT(6)
+#define FTM_SC_TOF BIT(7)
+
+#define FTM_SC_CLKS_FIXED_FREQ 0x02
+
+#define FTM_CNT0x04
+#define FTM_MOD0x08
+#define FTM_CNTIN  0x4C
+
+#define FIXED_FREQ_CLK 32000
+#define MAX_FREQ_DIV   (1 << FTM_SC_PS_MASK)
+#define MAX_COUNT_VAL  0x
+
+static void __iomem *ftm1_base;
+static u32 alarm_freq;
+static bool big_endian;
+
+static inline u32 ftm_readl(void __iomem *addr)
+{
+   if (big_endian)
+   return ioread32be(addr);
+
+   return ioread32(addr);
+}
+
+static inline void ftm_writel(u32 val, void __iomem *addr)
+{
+   if (big_endian)
+   iowrite32be(val, addr);
+   else
+   iowrite32(val, addr);
+}
+
+static inline void ftm_counter_enable(void __iomem *base)
+{
+   u32 val;
+
+   /* select and enable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_counter_disable(void __iomem *base)
+{
+   u32 val;
+
+   /* disable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_acknowledge(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOF;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_enable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val |= FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_disable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_reset_counter(void __iomem *base)
+{
+   /*
+* The CNT register contains the FTM counter value.
+* Reset clears the CNT register. Writing any value to COUNT
+* updates the counter with its initial value, CNTIN.
+*/
+   ftm_writel(0x00, base + FTM_CNT);
+}
+
+static u32 time_to_cycle(unsigned long time)
+{
+   u32 cycle;
+
+   cycle = time * alarm_freq;
+   if (cycle > MAX_COUNT_VAL) {
+   pr_err("Out of alarm range.\n");
+   cycle = 0;
+   }
+
+   return cycle;
+}
+
+static u32 cycle_to_time(u32 cycle)
+{
+   return cycle / alarm_freq + 1;
+}
+
+static void ftm_clean_alarm(void)
+{
+   ftm_counter_disable(ftm1_base);
+
+   ftm_writel(0x00, ftm1_base + FTM_CNTIN);
+   ftm_writel(~0UL, ftm1_base + FTM_MOD);
+
+   ftm_reset_counter(ftm1_base);
+}
+
+static int ftm_set_alarm(u64 cycle)