[PATCH 21/25] ARM: shmobile: r8a7791 dtsi: Add BRG support for (H)SCIF

2015-11-19 Thread Geert Uytterhoeven 
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7791.dtsi | 54 --
 1 file changed, 36 insertions(+), 18 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 684120a0a479a8d0..20f0cacd3a79095b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -670,8 +670,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e6 0 64>;
interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF0>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF0>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x29>, < 0x2a>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -682,8 +683,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF1>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF1>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2d>, < 0x2e>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -694,8 +696,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e58000 0 64>;
interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF2>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF2>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2b>, < 0x2c>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -706,8 +709,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ea8000 0 64>;
interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF3>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF3>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2f>, < 0x30>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -718,8 +722,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ee 0 64>;
interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF4>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF4>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0xfb>, < 0xfc>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -730,8 +735,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ee8000 0 64>;
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF5>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF5>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0xfd>, < 0xfe>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -742,8 +748,9 @@
compatible = "renesas,hscif-r8a7791", "renesas,hscif";
reg = <0 0xe62c 0 96>;
interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_HSCIF0>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_HSCIF0>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x39>, < 0x3a>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -754,8 +761,9 @@
compatible = "renesas,hscif-r8a7791", "renesas,hscif";
reg = <0 0xe62c8000 0 96>;
interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_HSCIF1>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_HSCIF1>,

[PATCH 21/25] ARM: shmobile: r8a7791 dtsi: Add BRG support for (H)SCIF

2015-11-19 Thread Geert Uytterhoeven 
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven 
---
 arch/arm/boot/dts/r8a7791.dtsi | 54 --
 1 file changed, 36 insertions(+), 18 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 684120a0a479a8d0..20f0cacd3a79095b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -670,8 +670,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e6 0 64>;
interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF0>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF0>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x29>, < 0x2a>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -682,8 +683,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF1>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF1>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2d>, < 0x2e>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -694,8 +696,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6e58000 0 64>;
interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF2>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF2>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2b>, < 0x2c>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -706,8 +709,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ea8000 0 64>;
interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF3>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF3>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x2f>, < 0x30>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -718,8 +722,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ee 0 64>;
interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF4>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF4>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0xfb>, < 0xfc>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -730,8 +735,9 @@
compatible = "renesas,scif-r8a7791", "renesas,scif";
reg = <0 0xe6ee8000 0 64>;
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_SCIF5>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_SCIF5>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0xfd>, < 0xfe>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -742,8 +748,9 @@
compatible = "renesas,hscif-r8a7791", "renesas,hscif";
reg = <0 0xe62c 0 96>;
interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_HSCIF0>;
-   clock-names = "fck";
+   clocks = <_clks R8A7791_CLK_HSCIF0>, <_clk>,
+<_clk>;
+   clock-names = "fck", "int_clk", "scif_clk";
dmas = < 0x39>, < 0x3a>;
dma-names = "tx", "rx";
power-domains = <_clocks>;
@@ -754,8 +761,9 @@
compatible = "renesas,hscif-r8a7791", "renesas,hscif";
reg = <0 0xe62c8000 0 96>;
interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
-   clocks = <_clks R8A7791_CLK_HSCIF1>;
-   clock-names = "fck";
+   clocks = <_clks