Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Sep 12, 2013 at 4:56 PM, Lee Jones wrote: > On Thu, 12 Sep 2013, Linus Walleij wrote: >> But if you still don't like this, let me cook a counter-patch so >> I can realized on my own how terribly wrong I am... > > I'm going to yank all of the clk_register_clkdev() calls out > imminently anyway, so all those these hiding bugs will soon become > apparent in any case. Why don't I place my 'remove ATAGs' patch-set > on top of this one and then finally remove the clk_register_clkdev()s > and watch the carnage ensue? So that creates problem for me as maintainer if I need to pull or revert some of the patches on top of the stack, all of a sudden the file looks horrible. That is why I want every step to be as clean a cut as possible. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Sep 12, 2013 at 4:56 PM, Lee Jones lee.jo...@linaro.org wrote: On Thu, 12 Sep 2013, Linus Walleij wrote: But if you still don't like this, let me cook a counter-patch so I can realized on my own how terribly wrong I am... I'm going to yank all of the clk_register_clkdev() calls out imminently anyway, so all those these hiding bugs will soon become apparent in any case. Why don't I place my 'remove ATAGs' patch-set on top of this one and then finally remove the clk_register_clkdev()s and watch the carnage ensue? So that creates problem for me as maintainer if I need to pull or revert some of the patches on top of the stack, all of a sudden the file looks horrible. That is why I want every step to be as clean a cut as possible. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, 12 Sep 2013, Linus Walleij wrote: > On Tue, Aug 27, 2013 at 10:23 AM, Lee Jones wrote: > > On Fri, 23 Aug 2013, Linus Walleij wrote: > >> On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones wrote: > > >> > 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), > >> > clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), > >> > which, while keeping everything separate would be unrealistic. > >> > >> I think this is perfectly realistic. > >> > >> You're not going to duplicate each clk_register_clkdev(), > >> which makes it way smaller than the original function, > >> and since one of the function will be inside a > >> > >> #ifdef CONFIG_OF > >> #endif > >> > >> After we switch the entire platform to DT-only it will be pretty > >> obvious which big chunk of code that needs to go away, it's > >> a clean cut. > >> > >> (Note: I know the #ifdef CONFIG_OF is not necessary anymore > >> since we switched to multiplatform, but I intend that marker for > >> humans, not machines.) > > > > This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() > > and u9540_clk_init() just for the sake of loading a few pointers into > > an array for a small part of the development cycle sounds obscene. > > > > I genuinely think keeping the current patch in this series and then > > removing the clk_register_clkdev() in the remove ATAG support series > > is the best way to go. > > So what I am worrying about is not only the looks of the code > and what is beautiful or not may be something of an opinion > anway. > > What I worry about is leaving all the calls to clk_register_clkdev() > in the DT boot path. Because that has the potential to hide a lot > of bugs, as clk_get() from drivers that should've got named and > probed randomly now will still find their clocks from their old > device names, instead of using the <> clocks from > the device tree. > > But if you still don't like this, let me cook a counter-patch so > I can realized on my own how terribly wrong I am... I'm going to yank all of the clk_register_clkdev() calls out imminently anyway, so all those these hiding bugs will soon become apparent in any case. Why don't I place my 'remove ATAGs' patch-set on top of this one and then finally remove the clk_register_clkdev()s and watch the carnage ensue? -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Tue, Aug 27, 2013 at 10:23 AM, Lee Jones wrote: > On Fri, 23 Aug 2013, Linus Walleij wrote: >> On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones wrote: >> > 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), >> > clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), >> > which, while keeping everything separate would be unrealistic. >> >> I think this is perfectly realistic. >> >> You're not going to duplicate each clk_register_clkdev(), >> which makes it way smaller than the original function, >> and since one of the function will be inside a >> >> #ifdef CONFIG_OF >> #endif >> >> After we switch the entire platform to DT-only it will be pretty >> obvious which big chunk of code that needs to go away, it's >> a clean cut. >> >> (Note: I know the #ifdef CONFIG_OF is not necessary anymore >> since we switched to multiplatform, but I intend that marker for >> humans, not machines.) > > This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() > and u9540_clk_init() just for the sake of loading a few pointers into > an array for a small part of the development cycle sounds obscene. > > I genuinely think keeping the current patch in this series and then > removing the clk_register_clkdev() in the remove ATAG support series > is the best way to go. So what I am worrying about is not only the looks of the code and what is beautiful or not may be something of an opinion anway. What I worry about is leaving all the calls to clk_register_clkdev() in the DT boot path. Because that has the potential to hide a lot of bugs, as clk_get() from drivers that should've got named and probed randomly now will still find their clocks from their old device names, instead of using the <> clocks from the device tree. But if you still don't like this, let me cook a counter-patch so I can realized on my own how terribly wrong I am... Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Tue, Aug 27, 2013 at 10:23 AM, Lee Jones lee.jo...@linaro.org wrote: On Fri, 23 Aug 2013, Linus Walleij wrote: On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones lee.jo...@linaro.org wrote: 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() and u9540_clk_init() just for the sake of loading a few pointers into an array for a small part of the development cycle sounds obscene. I genuinely think keeping the current patch in this series and then removing the clk_register_clkdev() in the remove ATAG support series is the best way to go. So what I am worrying about is not only the looks of the code and what is beautiful or not may be something of an opinion anway. What I worry about is leaving all the calls to clk_register_clkdev() in the DT boot path. Because that has the potential to hide a lot of bugs, as clk_get() from drivers that should've got named and probed randomly now will still find their clocks from their old device names, instead of using the ampersand clocks from the device tree. But if you still don't like this, let me cook a counter-patch so I can realized on my own how terribly wrong I am... Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, 12 Sep 2013, Linus Walleij wrote: On Tue, Aug 27, 2013 at 10:23 AM, Lee Jones lee.jo...@linaro.org wrote: On Fri, 23 Aug 2013, Linus Walleij wrote: On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones lee.jo...@linaro.org wrote: 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() and u9540_clk_init() just for the sake of loading a few pointers into an array for a small part of the development cycle sounds obscene. I genuinely think keeping the current patch in this series and then removing the clk_register_clkdev() in the remove ATAG support series is the best way to go. So what I am worrying about is not only the looks of the code and what is beautiful or not may be something of an opinion anway. What I worry about is leaving all the calls to clk_register_clkdev() in the DT boot path. Because that has the potential to hide a lot of bugs, as clk_get() from drivers that should've got named and probed randomly now will still find their clocks from their old device names, instead of using the ampersand clocks from the device tree. But if you still don't like this, let me cook a counter-patch so I can realized on my own how terribly wrong I am... I'm going to yank all of the clk_register_clkdev() calls out imminently anyway, so all those these hiding bugs will soon become apparent in any case. Why don't I place my 'remove ATAGs' patch-set on top of this one and then finally remove the clk_register_clkdev()s and watch the carnage ensue? -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Fri, 23 Aug 2013, Linus Walleij wrote: > On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones wrote: > > >> I really do not like the approach of uglifying something and then > >> beautifying it later... I prefer each step in isolation to be good > >> looking, or you will be confused when traversing the history. > > > > So then we have a few options, some more realistic than others. > > > > 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), > > clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), > > which, while keeping everything separate would be unrealistic. > > I think this is perfectly realistic. > > You're not going to duplicate each clk_register_clkdev(), > which makes it way smaller than the original function, > and since one of the function will be inside a > > #ifdef CONFIG_OF > #endif > > After we switch the entire platform to DT-only it will be pretty > obvious which big chunk of code that needs to go away, it's > a clean cut. > > (Note: I know the #ifdef CONFIG_OF is not necessary anymore > since we switched to multiplatform, but I intend that marker for > humans, not machines.) This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() and u9540_clk_init() just for the sake of loading a few pointers into an array for a small part of the development cycle sounds obscene. I genuinely think keeping the current patch in this series and then removing the clk_register_clkdev() in the remove ATAG support series is the best way to go. If you think I'm wrong then I'll so as you ask however. Just pass me the sick bucket. -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Fri, 23 Aug 2013, Linus Walleij wrote: On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones lee.jo...@linaro.org wrote: I really do not like the approach of uglifying something and then beautifying it later... I prefer each step in isolation to be good looking, or you will be confused when traversing the history. So then we have a few options, some more realistic than others. 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) This sounds gross. To duplicate; u8500_clk_init(), u8540_clk_init() and u9540_clk_init() just for the sake of loading a few pointers into an array for a small part of the development cycle sounds obscene. I genuinely think keeping the current patch in this series and then removing the clk_register_clkdev() in the remove ATAG support series is the best way to go. If you think I'm wrong then I'll so as you ask however. Just pass me the sick bucket. -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Sat, Aug 24, 2013 at 10:00 AM, Arnd Bergmann wrote: > You just reminded me that I'm still sitting on this old patch > to add lots of #ifdef CONFIG_ATAGS to ux500 in the places that need > to get cut out. I don't think I'm able to update that patch at > the moment, but I can send you the old version I have if you > are interested. Well, right now we are getting to the point where DT is fully functional and Lee has just sent a first round of patches to switch clk to DT and then delete all the ATAG code in one swift stroke. (With patches to also clean out platform-data related cruft in the drivers to follow in the next merge window.) After that it will actually start to look small and nice, so I think we'll take that path for v3.13. (Famous last words.) Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Friday 23 August 2013, Linus Walleij wrote: > I think this is perfectly realistic. > > You're not going to duplicate each clk_register_clkdev(), > which makes it way smaller than the original function, > and since one of the function will be inside a > > #ifdef CONFIG_OF > #endif > > After we switch the entire platform to DT-only it will be pretty > obvious which big chunk of code that needs to go away, it's > a clean cut. > > (Note: I know the #ifdef CONFIG_OF is not necessary anymore > since we switched to multiplatform, but I intend that marker for > humans, not machines.) > You just reminded me that I'm still sitting on this old patch to add lots of #ifdef CONFIG_ATAGS to ux500 in the places that need to get cut out. I don't think I'm able to update that patch at the moment, but I can send you the old version I have if you are interested. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Friday 23 August 2013, Linus Walleij wrote: I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) You just reminded me that I'm still sitting on this old patch to add lots of #ifdef CONFIG_ATAGS to ux500 in the places that need to get cut out. I don't think I'm able to update that patch at the moment, but I can send you the old version I have if you are interested. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Sat, Aug 24, 2013 at 10:00 AM, Arnd Bergmann a...@arndb.de wrote: You just reminded me that I'm still sitting on this old patch to add lots of #ifdef CONFIG_ATAGS to ux500 in the places that need to get cut out. I don't think I'm able to update that patch at the moment, but I can send you the old version I have if you are interested. Well, right now we are getting to the point where DT is fully functional and Lee has just sent a first round of patches to switch clk to DT and then delete all the ATAG code in one swift stroke. (With patches to also clean out platform-data related cruft in the drivers to follow in the next merge window.) After that it will actually start to look small and nice, so I think we'll take that path for v3.13. (Famous last words.) Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones wrote: >> I really do not like the approach of uglifying something and then >> beautifying it later... I prefer each step in isolation to be good >> looking, or you will be confused when traversing the history. > > So then we have a few options, some more realistic than others. > > 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), > clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), > which, while keeping everything separate would be unrealistic. I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Aug 22, 2013 at 11:21 AM, Lee Jones lee.jo...@linaro.org wrote: I really do not like the approach of uglifying something and then beautifying it later... I prefer each step in isolation to be good looking, or you will be confused when traversing the history. So then we have a few options, some more realistic than others. 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. I think this is perfectly realistic. You're not going to duplicate each clk_register_clkdev(), which makes it way smaller than the original function, and since one of the function will be inside a #ifdef CONFIG_OF #endif After we switch the entire platform to DT-only it will be pretty obvious which big chunk of code that needs to go away, it's a clean cut. (Note: I know the #ifdef CONFIG_OF is not necessary anymore since we switched to multiplatform, but I intend that marker for humans, not machines.) Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, 22 Aug 2013, Linus Walleij wrote: > On Wed, Aug 21, 2013 at 12:14 PM, Lee Jones wrote: > > On Wed, 21 Aug 2013, Linus Walleij wrote: > > >> Isn't it possible to fork a function u8500_clk_init_dt() to add all the > >> clocks in the DT probe path and keep this function > >> u8500_clk_init() as it is? > > > > Yes, we probably could do that, but as we're ripping out ATAG booting > > support from the ux500 platform, I'll just remove the > > clk_register_clkdev()s during the process. > > I really do not like the approach of uglifying something and then > beautifying it later... I prefer each step in isolation to be good > looking, or you will be confused when traversing the history. So then we have a few options, some more realistic than others. 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. 2. Move both clk_register_clkdev() and the struct clock arrays into 'drivers/clk/ux500/clk-prcmu.c' and 'drivers/clk/ux500/clk-prcc.c' and make the correct decisions in clk_reg_prcmu() and clk_reg_prcc(). This would be more viable, but would entail splitting the defines and the struct clock arrays (stores), probably creating a little more disparity. It would also mean adding 3 parameters (con_id, dev_fmt and array_index) to each of; clk_reg_prcmu_gate(), clk_reg_prcmu_scalable(), clk_reg_prcmu_opp_gate(), clk_reg_prcmu_scalable_rate(), clk_reg_prcmu_rate(), clk_reg_prcmu_opp_volt_scalable, clk_reg_prcmu() and 4 parameters (con_id, dev_fmt, array_index_x, array_index_y) to each of clk_reg_prcc_pclk(), clk_reg_prcc_kclk() and clk_reg_prcc(). Or, the most viable option: 3. Leave it as it is. All we're doing here is populating an array of pointers. It costs practically nothing, continues legacy ATAG support as well as adding Device Tree support. It's far neater than the other two options, by a long shot. And then, when we're ready to take out ATAG booting support (which I'm working on right now), we just remove the clk_register_clkdev() calls and we're left with the nice and neat macros. Unless there's a viable 4th option which hasn't popped into my head just yet. I'm all hears. :) -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, 22 Aug 2013, Linus Walleij wrote: On Wed, Aug 21, 2013 at 12:14 PM, Lee Jones lee.jo...@linaro.org wrote: On Wed, 21 Aug 2013, Linus Walleij wrote: Isn't it possible to fork a function u8500_clk_init_dt() to add all the clocks in the DT probe path and keep this function u8500_clk_init() as it is? Yes, we probably could do that, but as we're ripping out ATAG booting support from the ux500 platform, I'll just remove the clk_register_clkdev()s during the process. I really do not like the approach of uglifying something and then beautifying it later... I prefer each step in isolation to be good looking, or you will be confused when traversing the history. So then we have a few options, some more realistic than others. 1. Duplicate each of the; clk_reg_prcmu_*(), clk_reg_prcc_pclk(), clk_reg_prcc_kclk() calls into your proposed u8500_clk_init_dt(), which, while keeping everything separate would be unrealistic. 2. Move both clk_register_clkdev() and the struct clock arrays into 'drivers/clk/ux500/clk-prcmu.c' and 'drivers/clk/ux500/clk-prcc.c' and make the correct decisions in clk_reg_prcmu() and clk_reg_prcc(). This would be more viable, but would entail splitting the defines and the struct clock arrays (stores), probably creating a little more disparity. It would also mean adding 3 parameters (con_id, dev_fmt and array_index) to each of; clk_reg_prcmu_gate(), clk_reg_prcmu_scalable(), clk_reg_prcmu_opp_gate(), clk_reg_prcmu_scalable_rate(), clk_reg_prcmu_rate(), clk_reg_prcmu_opp_volt_scalable, clk_reg_prcmu() and 4 parameters (con_id, dev_fmt, array_index_x, array_index_y) to each of clk_reg_prcc_pclk(), clk_reg_prcc_kclk() and clk_reg_prcc(). Or, the most viable option: 3. Leave it as it is. All we're doing here is populating an array of pointers. It costs practically nothing, continues legacy ATAG support as well as adding Device Tree support. It's far neater than the other two options, by a long shot. And then, when we're ready to take out ATAG booting support (which I'm working on right now), we just remove the clk_register_clkdev() calls and we're left with the nice and neat macros. Unless there's a viable 4th option which hasn't popped into my head just yet. I'm all hears. :) -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Wed, Aug 21, 2013 at 12:14 PM, Lee Jones wrote: > On Wed, 21 Aug 2013, Linus Walleij wrote: >> Isn't it possible to fork a function u8500_clk_init_dt() to add all the >> clocks in the DT probe path and keep this function >> u8500_clk_init() as it is? > > Yes, we probably could do that, but as we're ripping out ATAG booting > support from the ux500 platform, I'll just remove the > clk_register_clkdev()s during the process. I really do not like the approach of uglifying something and then beautifying it later... I prefer each step in isolation to be good looking, or you will be confused when traversing the history. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Wed, 21 Aug 2013, Linus Walleij wrote:
> On Thu, Jun 6, 2013 at 2:17 PM, Lee Jones wrote:
>
> > This patch enables clocks to be specified from Device Tree via phandles
> > to the "prcc-kernel-clock" node.
> >
> > Cc: Mike Turquette
> > Cc: Ulf Hansson
> > Signed-off-by: Lee Jones
> (...)
> > static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
> > static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> > PRCC_PERIPHS_PER_CLUSTER];
> > +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> > PRCC_PERIPHS_PER_CLUSTER];
> >
> > #define PRCC_SHOW(clk, base, bit) \
> > clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
> > @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32
> > clkrst2_base, u32 clkrst3_base,
> > clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
> > clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "uart0");
> > + PRCC_KCLK_STORE(clk, 1, 0);
> >
> > clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
> > clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "uart1");
> > + PRCC_KCLK_STORE(clk, 1, 1);
>
> (etc)
>
> On device tree boots, clk_register_clkdev() is obviously pointless,
> as you're later deleting the AUXDATA connecting that device name
> to the clock.
>
> This should not be called at all on the DT boot path.
>
> However this looks cluttered as well:
>
> if (dt_probe)
> clk_register_clkdev(clk, NULL, "uart0");
> else
> PRCC_KCLK_STORE(clk, 1, 0);
>
> Isn't it possible to fork a function u8500_clk_init_dt() to add all the
> clocks in the DT probe path and keep this function
> u8500_clk_init() as it is?
Yes, we probably could do that, but as we're ripping out ATAG booting
support from the ux500 platform, I'll just remove the
clk_register_clkdev()s during the process.
--
Lee Jones
Linaro ST-Ericsson Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Jun 6, 2013 at 2:17 PM, Lee Jones wrote:
> This patch enables clocks to be specified from Device Tree via phandles
> to the "prcc-kernel-clock" node.
>
> Cc: Mike Turquette
> Cc: Ulf Hansson
> Signed-off-by: Lee Jones
(...)
> static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
> static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> PRCC_PERIPHS_PER_CLUSTER];
> +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> PRCC_PERIPHS_PER_CLUSTER];
>
> #define PRCC_SHOW(clk, base, bit) \
> clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
> @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32
> clkrst2_base, u32 clkrst3_base,
> clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
> clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "uart0");
> + PRCC_KCLK_STORE(clk, 1, 0);
>
> clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
> clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "uart1");
> + PRCC_KCLK_STORE(clk, 1, 1);
(etc)
On device tree boots, clk_register_clkdev() is obviously pointless,
as you're later deleting the AUXDATA connecting that device name
to the clock.
This should not be called at all on the DT boot path.
However this looks cluttered as well:
if (dt_probe)
clk_register_clkdev(clk, NULL, "uart0");
else
PRCC_KCLK_STORE(clk, 1, 0);
Isn't it possible to fork a function u8500_clk_init_dt() to add all the
clocks in the DT probe path and keep this function
u8500_clk_init() as it is?
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Thu, Jun 6, 2013 at 2:17 PM, Lee Jones lee.jo...@linaro.org wrote: This patch enables clocks to be specified from Device Tree via phandles to the prcc-kernel-clock node. Cc: Mike Turquette mturque...@linaro.org Cc: Ulf Hansson ulf.hans...@linaro.org Signed-off-by: Lee Jones lee.jo...@linaro.org (...) static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk(p1_uart0_kclk, uartclk, clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart0); + PRCC_KCLK_STORE(clk, 1, 0); clk = clk_reg_prcc_kclk(p1_uart1_kclk, uartclk, clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart1); + PRCC_KCLK_STORE(clk, 1, 1); (etc) On device tree boots, clk_register_clkdev() is obviously pointless, as you're later deleting the AUXDATA connecting that device name to the clock. This should not be called at all on the DT boot path. However this looks cluttered as well: if (dt_probe) clk_register_clkdev(clk, NULL, uart0); else PRCC_KCLK_STORE(clk, 1, 0); Isn't it possible to fork a function u8500_clk_init_dt() to add all the clocks in the DT probe path and keep this function u8500_clk_init() as it is? Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Wed, 21 Aug 2013, Linus Walleij wrote: On Thu, Jun 6, 2013 at 2:17 PM, Lee Jones lee.jo...@linaro.org wrote: This patch enables clocks to be specified from Device Tree via phandles to the prcc-kernel-clock node. Cc: Mike Turquette mturque...@linaro.org Cc: Ulf Hansson ulf.hans...@linaro.org Signed-off-by: Lee Jones lee.jo...@linaro.org (...) static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk(p1_uart0_kclk, uartclk, clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart0); + PRCC_KCLK_STORE(clk, 1, 0); clk = clk_reg_prcc_kclk(p1_uart1_kclk, uartclk, clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart1); + PRCC_KCLK_STORE(clk, 1, 1); (etc) On device tree boots, clk_register_clkdev() is obviously pointless, as you're later deleting the AUXDATA connecting that device name to the clock. This should not be called at all on the DT boot path. However this looks cluttered as well: if (dt_probe) clk_register_clkdev(clk, NULL, uart0); else PRCC_KCLK_STORE(clk, 1, 0); Isn't it possible to fork a function u8500_clk_init_dt() to add all the clocks in the DT probe path and keep this function u8500_clk_init() as it is? Yes, we probably could do that, but as we're ripping out ATAG booting support from the ux500 platform, I'll just remove the clk_register_clkdev()s during the process. -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On Wed, Aug 21, 2013 at 12:14 PM, Lee Jones lee.jo...@linaro.org wrote: On Wed, 21 Aug 2013, Linus Walleij wrote: Isn't it possible to fork a function u8500_clk_init_dt() to add all the clocks in the DT probe path and keep this function u8500_clk_init() as it is? Yes, we probably could do that, but as we're ripping out ATAG booting support from the ux500 platform, I'll just remove the clk_register_clkdev()s during the process. I really do not like the approach of uglifying something and then beautifying it later... I prefer each step in isolation to be good looking, or you will be confused when traversing the history. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
> > This patch enables clocks to be specified from Device Tree via phandles
> > to the "prcc-kernel-clock" node.
> >
> > Cc: Mike Turquette
> > Cc: Ulf Hansson
> > Signed-off-by: Lee Jones
>
> Could you please fold this patch into a "common PRCC device tree
> support" patch instead. Thus handling both P and K clocks in the same
> patch.
I'm really not a fan of creating massive patches, so I'd really rather
not.
> That would probaby solve the missmatch of the macro definitions as
> well. Like were did the PRCC_KCLK_STORE come from?
I do see your point though, I will move PRCC_KCLK_STORE() into this
patch.
> > ---
> > drivers/clk/ux500/u8500_clk.c | 30 ++
> > 1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
> > index 86de1a7..c3ed09c 100644
> > --- a/drivers/clk/ux500/u8500_clk.c
> > +++ b/drivers/clk/ux500/u8500_clk.c
> > @@ -20,6 +20,7 @@
> >
> > static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
> > static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> > PRCC_PERIPHS_PER_CLUSTER];
> > +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> > PRCC_PERIPHS_PER_CLUSTER];
> >
> > #define PRCC_SHOW(clk, base, bit) \
> > clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
> > @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32
> > clkrst2_base, u32 clkrst3_base,
> > clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
> > clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "uart0");
> > + PRCC_KCLK_STORE(clk, 1, 0);
> >
> > clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
> > clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "uart1");
> > + PRCC_KCLK_STORE(clk, 1, 1);
> >
> > clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
> > clkrst1_base, BIT(2), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "nmk-i2c.1");
> > + PRCC_KCLK_STORE(clk, 1, 2);
> >
> > clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
> > clkrst1_base, BIT(3), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "msp0");
> > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0");
> > + PRCC_KCLK_STORE(clk, 1, 3);
> >
> > clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
> > clkrst1_base, BIT(4), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "msp1");
> > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1");
> > + PRCC_KCLK_STORE(clk, 1, 4);
> >
> > clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
> > clkrst1_base, BIT(5), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "sdi0");
> > + PRCC_KCLK_STORE(clk, 1, 5);
> >
> > clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
> > clkrst1_base, BIT(6), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "nmk-i2c.2");
> > + PRCC_KCLK_STORE(clk, 1, 6);
> >
> > clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
> > clkrst1_base, BIT(8), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "slimbus0");
> > + PRCC_KCLK_STORE(clk, 1, 8);
> >
> > clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
> > clkrst1_base, BIT(9), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "nmk-i2c.4");
> > + PRCC_KCLK_STORE(clk, 1, 9);
> >
> > clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
> > clkrst1_base, BIT(10), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "msp3");
> > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3");
> > + PRCC_KCLK_STORE(clk, 1, 10);
> >
> > /* Periph2 */
> > clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
> > clkrst2_base, BIT(0), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "nmk-i2c.3");
> > + PRCC_KCLK_STORE(clk, 2, 0);
> >
> > clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
> > clkrst2_base, BIT(2), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "sdi4");
> > + PRCC_KCLK_STORE(clk, 2, 2);
> >
> > clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
> > clkrst2_base, BIT(3), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "msp2");
> > clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2");
> > + PRCC_KCLK_STORE(clk, 2, 3);
> >
> > clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
> > clkrst2_base, BIT(4), CLK_SET_RATE_GATE);
> > clk_register_clkdev(clk, NULL, "sdi1");
> > + PRCC_KCLK_STORE(clk, 2, 4);
> >
> > clk = clk_reg_prcc_kclk("p2_sdi3_kclk",
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
This patch enables clocks to be specified from Device Tree via phandles to the prcc-kernel-clock node. Cc: Mike Turquette mturque...@linaro.org Cc: Ulf Hansson ulf.hans...@linaro.org Signed-off-by: Lee Jones lee.jo...@linaro.org Could you please fold this patch into a common PRCC device tree support patch instead. Thus handling both P and K clocks in the same patch. I'm really not a fan of creating massive patches, so I'd really rather not. That would probaby solve the missmatch of the macro definitions as well. Like were did the PRCC_KCLK_STORE come from? I do see your point though, I will move PRCC_KCLK_STORE() into this patch. --- drivers/clk/ux500/u8500_clk.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 86de1a7..c3ed09c 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -20,6 +20,7 @@ static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk(p1_uart0_kclk, uartclk, clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart0); + PRCC_KCLK_STORE(clk, 1, 0); clk = clk_reg_prcc_kclk(p1_uart1_kclk, uartclk, clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart1); + PRCC_KCLK_STORE(clk, 1, 1); clk = clk_reg_prcc_kclk(p1_i2c1_kclk, i2cclk, clkrst1_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.1); + PRCC_KCLK_STORE(clk, 1, 2); clk = clk_reg_prcc_kclk(p1_msp0_kclk, msp02clk, clkrst1_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp0); clk_register_clkdev(clk, NULL, ux500-msp-i2s.0); + PRCC_KCLK_STORE(clk, 1, 3); clk = clk_reg_prcc_kclk(p1_msp1_kclk, msp1clk, clkrst1_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp1); clk_register_clkdev(clk, NULL, ux500-msp-i2s.1); + PRCC_KCLK_STORE(clk, 1, 4); clk = clk_reg_prcc_kclk(p1_sdi0_kclk, sdmmcclk, clkrst1_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi0); + PRCC_KCLK_STORE(clk, 1, 5); clk = clk_reg_prcc_kclk(p1_i2c2_kclk, i2cclk, clkrst1_base, BIT(6), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.2); + PRCC_KCLK_STORE(clk, 1, 6); clk = clk_reg_prcc_kclk(p1_slimbus0_kclk, slimclk, clkrst1_base, BIT(8), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, slimbus0); + PRCC_KCLK_STORE(clk, 1, 8); clk = clk_reg_prcc_kclk(p1_i2c4_kclk, i2cclk, clkrst1_base, BIT(9), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.4); + PRCC_KCLK_STORE(clk, 1, 9); clk = clk_reg_prcc_kclk(p1_msp3_kclk, msp1clk, clkrst1_base, BIT(10), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp3); clk_register_clkdev(clk, NULL, ux500-msp-i2s.3); + PRCC_KCLK_STORE(clk, 1, 10); /* Periph2 */ clk = clk_reg_prcc_kclk(p2_i2c3_kclk, i2cclk, clkrst2_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.3); + PRCC_KCLK_STORE(clk, 2, 0); clk = clk_reg_prcc_kclk(p2_sdi4_kclk, sdmmcclk, clkrst2_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi4); + PRCC_KCLK_STORE(clk, 2, 2); clk = clk_reg_prcc_kclk(p2_msp2_kclk, msp02clk, clkrst2_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp2); clk_register_clkdev(clk, NULL, ux500-msp-i2s.2); + PRCC_KCLK_STORE(clk, 2, 3); clk = clk_reg_prcc_kclk(p2_sdi1_kclk, sdmmcclk, clkrst2_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi1); + PRCC_KCLK_STORE(clk, 2, 4); clk = clk_reg_prcc_kclk(p2_sdi3_kclk, sdmmcclk, clkrst2_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi3); + PRCC_KCLK_STORE(clk, 2, 5); /* Note that rate is received from parent. */ clk =
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On 6 June 2013 14:17, Lee Jones wrote:
> This patch enables clocks to be specified from Device Tree via phandles
> to the "prcc-kernel-clock" node.
>
> Cc: Mike Turquette
> Cc: Ulf Hansson
> Signed-off-by: Lee Jones
Could you please fold this patch into a "common PRCC device tree
support" patch instead. Thus handling both P and K clocks in the same
patch.
That would probaby solve the missmatch of the macro definitions as
well. Like were did the PRCC_KCLK_STORE come from?
Kind regards
Ulf Hansson
> ---
> drivers/clk/ux500/u8500_clk.c | 30 ++
> 1 file changed, 30 insertions(+)
>
> diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
> index 86de1a7..c3ed09c 100644
> --- a/drivers/clk/ux500/u8500_clk.c
> +++ b/drivers/clk/ux500/u8500_clk.c
> @@ -20,6 +20,7 @@
>
> static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
> static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> PRCC_PERIPHS_PER_CLUSTER];
> +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
> PRCC_PERIPHS_PER_CLUSTER];
>
> #define PRCC_SHOW(clk, base, bit) \
> clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
> @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32
> clkrst2_base, u32 clkrst3_base,
> clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
> clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "uart0");
> + PRCC_KCLK_STORE(clk, 1, 0);
>
> clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
> clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "uart1");
> + PRCC_KCLK_STORE(clk, 1, 1);
>
> clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
> clkrst1_base, BIT(2), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "nmk-i2c.1");
> + PRCC_KCLK_STORE(clk, 1, 2);
>
> clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
> clkrst1_base, BIT(3), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "msp0");
> clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0");
> + PRCC_KCLK_STORE(clk, 1, 3);
>
> clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
> clkrst1_base, BIT(4), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "msp1");
> clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1");
> + PRCC_KCLK_STORE(clk, 1, 4);
>
> clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
> clkrst1_base, BIT(5), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "sdi0");
> + PRCC_KCLK_STORE(clk, 1, 5);
>
> clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
> clkrst1_base, BIT(6), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "nmk-i2c.2");
> + PRCC_KCLK_STORE(clk, 1, 6);
>
> clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
> clkrst1_base, BIT(8), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "slimbus0");
> + PRCC_KCLK_STORE(clk, 1, 8);
>
> clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
> clkrst1_base, BIT(9), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "nmk-i2c.4");
> + PRCC_KCLK_STORE(clk, 1, 9);
>
> clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
> clkrst1_base, BIT(10), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "msp3");
> clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3");
> + PRCC_KCLK_STORE(clk, 1, 10);
>
> /* Periph2 */
> clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
> clkrst2_base, BIT(0), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "nmk-i2c.3");
> + PRCC_KCLK_STORE(clk, 2, 0);
>
> clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
> clkrst2_base, BIT(2), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "sdi4");
> + PRCC_KCLK_STORE(clk, 2, 2);
>
> clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
> clkrst2_base, BIT(3), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "msp2");
> clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2");
> + PRCC_KCLK_STORE(clk, 2, 3);
>
> clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
> clkrst2_base, BIT(4), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "sdi1");
> + PRCC_KCLK_STORE(clk, 2, 4);
>
> clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk",
> clkrst2_base, BIT(5), CLK_SET_RATE_GATE);
> clk_register_clkdev(clk, NULL, "sdi3");
> + PRCC_KCLK_STORE(clk, 2, 5);
>
> /* Note that rate is received from parent. */
> clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk",
>
Re: [PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
On 6 June 2013 14:17, Lee Jones lee.jo...@linaro.org wrote: This patch enables clocks to be specified from Device Tree via phandles to the prcc-kernel-clock node. Cc: Mike Turquette mturque...@linaro.org Cc: Ulf Hansson ulf.hans...@linaro.org Signed-off-by: Lee Jones lee.jo...@linaro.org Could you please fold this patch into a common PRCC device tree support patch instead. Thus handling both P and K clocks in the same patch. That would probaby solve the missmatch of the macro definitions as well. Like were did the PRCC_KCLK_STORE come from? Kind regards Ulf Hansson --- drivers/clk/ux500/u8500_clk.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 86de1a7..c3ed09c 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -20,6 +20,7 @@ static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk(p1_uart0_kclk, uartclk, clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart0); + PRCC_KCLK_STORE(clk, 1, 0); clk = clk_reg_prcc_kclk(p1_uart1_kclk, uartclk, clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart1); + PRCC_KCLK_STORE(clk, 1, 1); clk = clk_reg_prcc_kclk(p1_i2c1_kclk, i2cclk, clkrst1_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.1); + PRCC_KCLK_STORE(clk, 1, 2); clk = clk_reg_prcc_kclk(p1_msp0_kclk, msp02clk, clkrst1_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp0); clk_register_clkdev(clk, NULL, ux500-msp-i2s.0); + PRCC_KCLK_STORE(clk, 1, 3); clk = clk_reg_prcc_kclk(p1_msp1_kclk, msp1clk, clkrst1_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp1); clk_register_clkdev(clk, NULL, ux500-msp-i2s.1); + PRCC_KCLK_STORE(clk, 1, 4); clk = clk_reg_prcc_kclk(p1_sdi0_kclk, sdmmcclk, clkrst1_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi0); + PRCC_KCLK_STORE(clk, 1, 5); clk = clk_reg_prcc_kclk(p1_i2c2_kclk, i2cclk, clkrst1_base, BIT(6), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.2); + PRCC_KCLK_STORE(clk, 1, 6); clk = clk_reg_prcc_kclk(p1_slimbus0_kclk, slimclk, clkrst1_base, BIT(8), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, slimbus0); + PRCC_KCLK_STORE(clk, 1, 8); clk = clk_reg_prcc_kclk(p1_i2c4_kclk, i2cclk, clkrst1_base, BIT(9), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.4); + PRCC_KCLK_STORE(clk, 1, 9); clk = clk_reg_prcc_kclk(p1_msp3_kclk, msp1clk, clkrst1_base, BIT(10), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp3); clk_register_clkdev(clk, NULL, ux500-msp-i2s.3); + PRCC_KCLK_STORE(clk, 1, 10); /* Periph2 */ clk = clk_reg_prcc_kclk(p2_i2c3_kclk, i2cclk, clkrst2_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.3); + PRCC_KCLK_STORE(clk, 2, 0); clk = clk_reg_prcc_kclk(p2_sdi4_kclk, sdmmcclk, clkrst2_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi4); + PRCC_KCLK_STORE(clk, 2, 2); clk = clk_reg_prcc_kclk(p2_msp2_kclk, msp02clk, clkrst2_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp2); clk_register_clkdev(clk, NULL, ux500-msp-i2s.2); + PRCC_KCLK_STORE(clk, 2, 3); clk = clk_reg_prcc_kclk(p2_sdi1_kclk, sdmmcclk, clkrst2_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi1); + PRCC_KCLK_STORE(clk, 2, 4); clk = clk_reg_prcc_kclk(p2_sdi3_kclk, sdmmcclk, clkrst2_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi3); + PRCC_KCLK_STORE(clk, 2, 5); /* Note that rate is received from parent. */ clk = clk_reg_prcc_kclk(p2_ssirx_kclk, hsirxclk, clkrst2_base, BIT(6), CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); + PRCC_KCLK_STORE(clk, 2, 6); +
[PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
This patch enables clocks to be specified from Device Tree via phandles
to the "prcc-kernel-clock" node.
Cc: Mike Turquette
Cc: Ulf Hansson
Signed-off-by: Lee Jones
---
drivers/clk/ux500/u8500_clk.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 86de1a7..c3ed09c 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -20,6 +20,7 @@
static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
PRCC_PERIPHS_PER_CLUSTER];
+static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) *
PRCC_PERIPHS_PER_CLUSTER];
#define PRCC_SHOW(clk, base, bit) \
clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
@@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base,
u32 clkrst3_base,
clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "uart0");
+ PRCC_KCLK_STORE(clk, 1, 0);
clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "uart1");
+ PRCC_KCLK_STORE(clk, 1, 1);
clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
clkrst1_base, BIT(2), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "nmk-i2c.1");
+ PRCC_KCLK_STORE(clk, 1, 2);
clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
clkrst1_base, BIT(3), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "msp0");
clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0");
+ PRCC_KCLK_STORE(clk, 1, 3);
clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
clkrst1_base, BIT(4), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "msp1");
clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1");
+ PRCC_KCLK_STORE(clk, 1, 4);
clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
clkrst1_base, BIT(5), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "sdi0");
+ PRCC_KCLK_STORE(clk, 1, 5);
clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
clkrst1_base, BIT(6), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "nmk-i2c.2");
+ PRCC_KCLK_STORE(clk, 1, 6);
clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
clkrst1_base, BIT(8), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "slimbus0");
+ PRCC_KCLK_STORE(clk, 1, 8);
clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
clkrst1_base, BIT(9), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "nmk-i2c.4");
+ PRCC_KCLK_STORE(clk, 1, 9);
clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
clkrst1_base, BIT(10), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "msp3");
clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3");
+ PRCC_KCLK_STORE(clk, 1, 10);
/* Periph2 */
clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
clkrst2_base, BIT(0), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "nmk-i2c.3");
+ PRCC_KCLK_STORE(clk, 2, 0);
clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
clkrst2_base, BIT(2), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "sdi4");
+ PRCC_KCLK_STORE(clk, 2, 2);
clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
clkrst2_base, BIT(3), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "msp2");
clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2");
+ PRCC_KCLK_STORE(clk, 2, 3);
clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
clkrst2_base, BIT(4), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "sdi1");
+ PRCC_KCLK_STORE(clk, 2, 4);
clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk",
clkrst2_base, BIT(5), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "sdi3");
+ PRCC_KCLK_STORE(clk, 2, 5);
/* Note that rate is received from parent. */
clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk",
clkrst2_base, BIT(6),
CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
+ PRCC_KCLK_STORE(clk, 2, 6);
+
clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk",
clkrst2_base, BIT(7),
CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
+ PRCC_KCLK_STORE(clk, 2, 7);
/* Periph3 */
clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
clkrst3_base, BIT(1), CLK_SET_RATE_GATE);
[PATCH 21/33] clk: ux500: Add Device Tree support for the PRCC Kernel clock
This patch enables clocks to be specified from Device Tree via phandles to the prcc-kernel-clock node. Cc: Mike Turquette mturque...@linaro.org Cc: Ulf Hansson ulf.hans...@linaro.org Signed-off-by: Lee Jones lee.jo...@linaro.org --- drivers/clk/ux500/u8500_clk.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 86de1a7..c3ed09c 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -20,6 +20,7 @@ static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -540,110 +541,136 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_kclk(p1_uart0_kclk, uartclk, clkrst1_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart0); + PRCC_KCLK_STORE(clk, 1, 0); clk = clk_reg_prcc_kclk(p1_uart1_kclk, uartclk, clkrst1_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, uart1); + PRCC_KCLK_STORE(clk, 1, 1); clk = clk_reg_prcc_kclk(p1_i2c1_kclk, i2cclk, clkrst1_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.1); + PRCC_KCLK_STORE(clk, 1, 2); clk = clk_reg_prcc_kclk(p1_msp0_kclk, msp02clk, clkrst1_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp0); clk_register_clkdev(clk, NULL, ux500-msp-i2s.0); + PRCC_KCLK_STORE(clk, 1, 3); clk = clk_reg_prcc_kclk(p1_msp1_kclk, msp1clk, clkrst1_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp1); clk_register_clkdev(clk, NULL, ux500-msp-i2s.1); + PRCC_KCLK_STORE(clk, 1, 4); clk = clk_reg_prcc_kclk(p1_sdi0_kclk, sdmmcclk, clkrst1_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi0); + PRCC_KCLK_STORE(clk, 1, 5); clk = clk_reg_prcc_kclk(p1_i2c2_kclk, i2cclk, clkrst1_base, BIT(6), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.2); + PRCC_KCLK_STORE(clk, 1, 6); clk = clk_reg_prcc_kclk(p1_slimbus0_kclk, slimclk, clkrst1_base, BIT(8), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, slimbus0); + PRCC_KCLK_STORE(clk, 1, 8); clk = clk_reg_prcc_kclk(p1_i2c4_kclk, i2cclk, clkrst1_base, BIT(9), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.4); + PRCC_KCLK_STORE(clk, 1, 9); clk = clk_reg_prcc_kclk(p1_msp3_kclk, msp1clk, clkrst1_base, BIT(10), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp3); clk_register_clkdev(clk, NULL, ux500-msp-i2s.3); + PRCC_KCLK_STORE(clk, 1, 10); /* Periph2 */ clk = clk_reg_prcc_kclk(p2_i2c3_kclk, i2cclk, clkrst2_base, BIT(0), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, nmk-i2c.3); + PRCC_KCLK_STORE(clk, 2, 0); clk = clk_reg_prcc_kclk(p2_sdi4_kclk, sdmmcclk, clkrst2_base, BIT(2), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi4); + PRCC_KCLK_STORE(clk, 2, 2); clk = clk_reg_prcc_kclk(p2_msp2_kclk, msp02clk, clkrst2_base, BIT(3), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, msp2); clk_register_clkdev(clk, NULL, ux500-msp-i2s.2); + PRCC_KCLK_STORE(clk, 2, 3); clk = clk_reg_prcc_kclk(p2_sdi1_kclk, sdmmcclk, clkrst2_base, BIT(4), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi1); + PRCC_KCLK_STORE(clk, 2, 4); clk = clk_reg_prcc_kclk(p2_sdi3_kclk, sdmmcclk, clkrst2_base, BIT(5), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, sdi3); + PRCC_KCLK_STORE(clk, 2, 5); /* Note that rate is received from parent. */ clk = clk_reg_prcc_kclk(p2_ssirx_kclk, hsirxclk, clkrst2_base, BIT(6), CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); + PRCC_KCLK_STORE(clk, 2, 6); + clk = clk_reg_prcc_kclk(p2_ssitx_kclk, hsitxclk, clkrst2_base, BIT(7), CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT); + PRCC_KCLK_STORE(clk, 2, 7); /* Periph3 */ clk = clk_reg_prcc_kclk(p3_ssp0_kclk, sspclk, clkrst3_base, BIT(1), CLK_SET_RATE_GATE); clk_register_clkdev(clk, NULL, ssp0); + PRCC_KCLK_STORE(clk,
