Re: [PATCH 3.4 30/99] PCI: Enable INTx if BIOS left them disabled
On Sat, Mar 08, 2014 at 06:50:30AM -0700, Bjorn Helgaas wrote: > [+cc Andreas] > > On Fri, Mar 7, 2014 at 6:07 PM, Greg Kroah-Hartman > wrote: > > 3.4-stable review patch. If anyone has any objections, please let me know. > > Let's hold off on this for a bit. Andreas found that this patch > breaks pciehp, and we haven't figured out the best fix yet. > > http://lkml.kernel.org/r/camxnaaxd9-vbxsya9q1yvt+fwfdfykgg2hq-1jkc-awlx-h...@mail.gmail.com > https://bugzilla.kernel.org/show_bug.cgi?id=71691 Thanks for letting me know, now dropped. greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 3.4 30/99] PCI: Enable INTx if BIOS left them disabled
[+cc Andreas]
On Fri, Mar 7, 2014 at 6:07 PM, Greg Kroah-Hartman
wrote:
> 3.4-stable review patch. If anyone has any objections, please let me know.
Let's hold off on this for a bit. Andreas found that this patch
breaks pciehp, and we haven't figured out the best fix yet.
http://lkml.kernel.org/r/camxnaaxd9-vbxsya9q1yvt+fwfdfykgg2hq-1jkc-awlx-h...@mail.gmail.com
https://bugzilla.kernel.org/show_bug.cgi?id=71691
> --
>
> From: Bjorn Helgaas
>
> commit 1f42db786b14a31bf807fc41ee5583a00c08fcb1 upstream.
>
> Some firmware leaves the Interrupt Disable bit set even if the device uses
> INTx interrupts. Clear Interrupt Disable so we get those interrupts.
>
> Based on the report mentioned below, if the user selects the "EHCI only"
> option in the Intel Baytrail BIOS, the EHCI device is handed off to the OS
> with the PCI_COMMAND_INTX_DISABLE bit set.
>
> Link: http://lkml.kernel.org/r/20140114181721.GC12126@xanatos
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=70601
> Reported-by: Chris Cheng
> Reported-and-tested-by: Jamie Chen
> Signed-off-by: Bjorn Helgaas
> CC: Sarah Sharp
> Signed-off-by: Greg Kroah-Hartman
>
> ---
> drivers/pci/pci.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1133,6 +1133,8 @@ EXPORT_SYMBOL_GPL(pci_load_and_free_save
> static int do_pci_enable_device(struct pci_dev *dev, int bars)
> {
> int err;
> + u16 cmd;
> + u8 pin;
>
> err = pci_set_power_state(dev, PCI_D0);
> if (err < 0 && err != -EIO)
> @@ -1142,6 +1144,14 @@ static int do_pci_enable_device(struct p
> return err;
> pci_fixup_device(pci_fixup_enable, dev);
>
> + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
> + if (pin) {
> + pci_read_config_word(dev, PCI_COMMAND, &cmd);
> + if (cmd & PCI_COMMAND_INTX_DISABLE)
> + pci_write_config_word(dev, PCI_COMMAND,
> + cmd &
> ~PCI_COMMAND_INTX_DISABLE);
> + }
> +
> return 0;
> }
>
>
>
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[PATCH 3.4 30/99] PCI: Enable INTx if BIOS left them disabled
3.4-stable review patch. If anyone has any objections, please let me know.
--
From: Bjorn Helgaas
commit 1f42db786b14a31bf807fc41ee5583a00c08fcb1 upstream.
Some firmware leaves the Interrupt Disable bit set even if the device uses
INTx interrupts. Clear Interrupt Disable so we get those interrupts.
Based on the report mentioned below, if the user selects the "EHCI only"
option in the Intel Baytrail BIOS, the EHCI device is handed off to the OS
with the PCI_COMMAND_INTX_DISABLE bit set.
Link: http://lkml.kernel.org/r/20140114181721.GC12126@xanatos
Link: https://bugzilla.kernel.org/show_bug.cgi?id=70601
Reported-by: Chris Cheng
Reported-and-tested-by: Jamie Chen
Signed-off-by: Bjorn Helgaas
CC: Sarah Sharp
Signed-off-by: Greg Kroah-Hartman
---
drivers/pci/pci.c | 10 ++
1 file changed, 10 insertions(+)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1133,6 +1133,8 @@ EXPORT_SYMBOL_GPL(pci_load_and_free_save
static int do_pci_enable_device(struct pci_dev *dev, int bars)
{
int err;
+ u16 cmd;
+ u8 pin;
err = pci_set_power_state(dev, PCI_D0);
if (err < 0 && err != -EIO)
@@ -1142,6 +1144,14 @@ static int do_pci_enable_device(struct p
return err;
pci_fixup_device(pci_fixup_enable, dev);
+ pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+ if (pin) {
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ if (cmd & PCI_COMMAND_INTX_DISABLE)
+ pci_write_config_word(dev, PCI_COMMAND,
+ cmd & ~PCI_COMMAND_INTX_DISABLE);
+ }
+
return 0;
}
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