[PATCH 4/5] arm: dts: omap5: add SPI devices to OMAP5 DeviceTree file
From: Felipe Balbi
Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: Felipe Balbi
Signed-off-by: Sourav Poddar
---
arch/arm/boot/dts/omap5.dtsi | 40
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 790bb2a..9e182a9 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -241,6 +241,46 @@
ti,hwmods = "i2c5";
};
+ mcspi1: spi@48098000 {
+ compatible = "ti,omap4-mcspi";
+ reg = <0x48098000 0x200>;
+ interrupts = <0 65 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <4>;
+ };
+
+ mcspi2: spi@4809a000 {
+ compatible = "ti,omap4-mcspi";
+ reg = <0x4809a000 0x200>;
+ interrupts = <0 66 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "mcspi2";
+ ti,spi-num-cs = <2>;
+ };
+
+ mcspi3: spi@480b8000 {
+ compatible = "ti,omap4-mcspi";
+ reg = <0x480b8000 0x200>;
+ interrupts = <0 91 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "mcspi3";
+ ti,spi-num-cs = <2>;
+ };
+
+ mcspi4: spi@480ba000 {
+ compatible = "ti,omap4-mcspi";
+ reg = <0x480ba000 0x200>;
+ interrupts = <0 48 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "mcspi4";
+ ti,spi-num-cs = <1>;
+ };
+
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
--
1.7.1
--
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[PATCH 4/5] arm: dts: omap5: add SPI devices to OMAP5 DeviceTree file
From: Felipe Balbi ba...@ti.com
Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 40
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 790bb2a..9e182a9 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -241,6 +241,46 @@
ti,hwmods = i2c5;
};
+ mcspi1: spi@48098000 {
+ compatible = ti,omap4-mcspi;
+ reg = 0x48098000 0x200;
+ interrupts = 0 65 0x4;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = mcspi1;
+ ti,spi-num-cs = 4;
+ };
+
+ mcspi2: spi@4809a000 {
+ compatible = ti,omap4-mcspi;
+ reg = 0x4809a000 0x200;
+ interrupts = 0 66 0x4;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = mcspi2;
+ ti,spi-num-cs = 2;
+ };
+
+ mcspi3: spi@480b8000 {
+ compatible = ti,omap4-mcspi;
+ reg = 0x480b8000 0x200;
+ interrupts = 0 91 0x4;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = mcspi3;
+ ti,spi-num-cs = 2;
+ };
+
+ mcspi4: spi@480ba000 {
+ compatible = ti,omap4-mcspi;
+ reg = 0x480ba000 0x200;
+ interrupts = 0 48 0x4;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = mcspi4;
+ ti,spi-num-cs = 1;
+ };
+
uart1: serial@4806a000 {
compatible = ti,omap4-uart;
reg = 0x4806a000 0x100;
--
1.7.1
--
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