[PATCH 4.14 036/109] drm/amdgpu: fix get_max_engine_clock_in_mhz

2018-03-16 Thread Greg Kroah-Hartman
4.14-stable review patch.  If anyone has any objections, please let me know.

--

From: Felix Kuehling 


[ Upstream commit a9efcc19161e20623c285fac967a32842972cebe ]

Use proper powerplay function. This fixes OpenCL initialization
problems.

Signed-off-by: Felix Kuehling 
Acked-by: Oded Gabbay 
Signed-off-by: Oded Gabbay 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c |7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -265,6 +265,9 @@ uint32_t get_max_engine_clock_in_mhz(str
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 
-   /* The sclk is in quantas of 10kHz */
-   return adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
+   /* the sclk is in quantas of 10kHz */
+   if (amdgpu_sriov_vf(adev))
+   return adev->clock.default_sclk / 100;
+
+   return amdgpu_dpm_get_sclk(adev, false) / 100;
 }




[PATCH 4.14 036/109] drm/amdgpu: fix get_max_engine_clock_in_mhz

2018-03-16 Thread Greg Kroah-Hartman
4.14-stable review patch.  If anyone has any objections, please let me know.

--

From: Felix Kuehling 


[ Upstream commit a9efcc19161e20623c285fac967a32842972cebe ]

Use proper powerplay function. This fixes OpenCL initialization
problems.

Signed-off-by: Felix Kuehling 
Acked-by: Oded Gabbay 
Signed-off-by: Oded Gabbay 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c |7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -265,6 +265,9 @@ uint32_t get_max_engine_clock_in_mhz(str
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 
-   /* The sclk is in quantas of 10kHz */
-   return adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
+   /* the sclk is in quantas of 10kHz */
+   if (amdgpu_sriov_vf(adev))
+   return adev->clock.default_sclk / 100;
+
+   return amdgpu_dpm_get_sclk(adev, false) / 100;
 }