Re: Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-24 Thread Laurentiu Palcu
Hi Fabio,

On Mon, Sep 23, 2019 at 01:12:42PM -0300, Fabio Estevam wrote:
> Hi Laurentiu,
> 
> On Mon, Sep 23, 2019 at 11:14 AM Laurentiu Palcu
>  wrote:
> 
> > +
> > +   dcss: dcss@0x32e0 {
> 
> Node names should be generic, so:
> 
> dcss: display-controller@32e0

fair enough, done.

> 
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "nxp,imx8mq-dcss";
> > +   reg = <0x32e0 0x2D000>, <0x32e2f000 
> > 0x1000>;
> 
> 0x2d000 for consistency.

will change this as well.

Thanks,
laurentiu


> 
> > +   interrupts = <6>, <8>, <9>;
> 
> The interrupts are passed in the  format.

Re: Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-24 Thread Laurentiu Palcu
On Mon, Sep 23, 2019 at 09:54:42AM -0700, Stephen Boyd wrote:
> Quoting Laurentiu Palcu (2019-09-23 07:13:19)
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi 
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 52aae34..d4aa778 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -871,6 +871,31 @@
> > interrupt-controller;
> > #interrupt-cells = <1>;
> > };
> > +
> > +   dcss: dcss@0x32e0 {
> 
> Drop the 0x prefix on node names.

Thanks, will do.
laurentiu

> 
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "nxp,imx8mq-dcss";
> > +   reg = <0x32e0 0x2D000>, <0x32e2f000 
> > 0x1000>;
> > +   interrupts = <6>, <8>, <9>;
> > +   interrupt-names = "ctx_ld", "ctxld_kick", 
> > "vblank";
> > +   interrupt-parent = <>;
> > +   clocks = < IMX8MQ_CLK_DISP_APB_ROOT>,
> > +< IMX8MQ_CLK_DISP_AXI_ROOT>,
> > +< IMX8MQ_CLK_DISP_RTRM_ROOT>,
> > +< IMX8MQ_VIDEO2_PLL_OUT>,
> > +< IMX8MQ_CLK_DISP_DTRC>;
> > +   clock-names = "apb", "axi", "rtrm", "pix", 
> > "dtrc";
> > +   assigned-clocks = < 
> > IMX8MQ_CLK_DISP_AXI>,
> > + < 
> > IMX8MQ_CLK_DISP_RTRM>,
> > + < 
> > IMX8MQ_VIDEO2_PLL1_REF_SEL>;
> > +   assigned-clock-parents = < 
> > IMX8MQ_SYS1_PLL_800M>,
> > +< 
> > IMX8MQ_SYS1_PLL_800M>,
> > +< 
> > IMX8MQ_CLK_27M>;
> > +   assigned-clock-rates = <8>,
> > +  <4>;
> > +   status = "disabled";
> > +   };
> 

Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-23 Thread Fabio Estevam
On Mon, Sep 23, 2019 at 2:01 PM Lucas Stach  wrote:

> No, they are not. Those are imx-irqsteer IRQs, this controller has 0
> irq cells, so the description in this patch is correct.

Good point, thanks!


Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-23 Thread Lucas Stach
Am Montag, den 23.09.2019, 13:12 -0300 schrieb Fabio Estevam:
> Hi Laurentiu,
> 
> On Mon, Sep 23, 2019 at 11:14 AM Laurentiu Palcu
>  wrote:
> 
> > +
> > +   dcss: dcss@0x32e0 {
> 
> Node names should be generic, so:
> 
> dcss: display-controller@32e0
> 
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "nxp,imx8mq-dcss";
> > +   reg = <0x32e0 0x2D000>,
> > <0x32e2f000 0x1000>;
> 
> 0x2d000 for consistency.
> 
> > +   interrupts = <6>, <8>, <9>;
> 
> The interrupts are passed in the 
> format.

No, they are not. Those are imx-irqsteer IRQs, this controller has 0
irq cells, so the description in this patch is correct.

Regards,
Lucas



Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-23 Thread Stephen Boyd
Quoting Laurentiu Palcu (2019-09-23 07:13:19)
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi 
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 52aae34..d4aa778 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -871,6 +871,31 @@
> interrupt-controller;
> #interrupt-cells = <1>;
> };
> +
> +   dcss: dcss@0x32e0 {

Drop the 0x prefix on node names.

> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   compatible = "nxp,imx8mq-dcss";
> +   reg = <0x32e0 0x2D000>, <0x32e2f000 
> 0x1000>;
> +   interrupts = <6>, <8>, <9>;
> +   interrupt-names = "ctx_ld", "ctxld_kick", 
> "vblank";
> +   interrupt-parent = <>;
> +   clocks = < IMX8MQ_CLK_DISP_APB_ROOT>,
> +< IMX8MQ_CLK_DISP_AXI_ROOT>,
> +< IMX8MQ_CLK_DISP_RTRM_ROOT>,
> +< IMX8MQ_VIDEO2_PLL_OUT>,
> +< IMX8MQ_CLK_DISP_DTRC>;
> +   clock-names = "apb", "axi", "rtrm", "pix", 
> "dtrc";
> +   assigned-clocks = < IMX8MQ_CLK_DISP_AXI>,
> + < IMX8MQ_CLK_DISP_RTRM>,
> + < 
> IMX8MQ_VIDEO2_PLL1_REF_SEL>;
> +   assigned-clock-parents = < 
> IMX8MQ_SYS1_PLL_800M>,
> +< 
> IMX8MQ_SYS1_PLL_800M>,
> +< 
> IMX8MQ_CLK_27M>;
> +   assigned-clock-rates = <8>,
> +  <4>;
> +   status = "disabled";
> +   };



Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-23 Thread Fabio Estevam
Hi Laurentiu,

On Mon, Sep 23, 2019 at 11:14 AM Laurentiu Palcu
 wrote:

> +
> +   dcss: dcss@0x32e0 {

Node names should be generic, so:

dcss: display-controller@32e0

> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   compatible = "nxp,imx8mq-dcss";
> +   reg = <0x32e0 0x2D000>, <0x32e2f000 
> 0x1000>;

0x2d000 for consistency.

> +   interrupts = <6>, <8>, <9>;

The interrupts are passed in the  format.


[PATCH 5/5] arm64: dts: imx8mq: add DCSS node

2019-09-23 Thread Laurentiu Palcu
This patch adds the node for iMX8MQ Display Controller Subsystem.

Signed-off-by: Laurentiu Palcu 
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 52aae34..d4aa778 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -871,6 +871,31 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+   dcss: dcss@0x32e0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "nxp,imx8mq-dcss";
+   reg = <0x32e0 0x2D000>, <0x32e2f000 0x1000>;
+   interrupts = <6>, <8>, <9>;
+   interrupt-names = "ctx_ld", "ctxld_kick", 
"vblank";
+   interrupt-parent = <>;
+   clocks = < IMX8MQ_CLK_DISP_APB_ROOT>,
+< IMX8MQ_CLK_DISP_AXI_ROOT>,
+< IMX8MQ_CLK_DISP_RTRM_ROOT>,
+< IMX8MQ_VIDEO2_PLL_OUT>,
+< IMX8MQ_CLK_DISP_DTRC>;
+   clock-names = "apb", "axi", "rtrm", "pix", 
"dtrc";
+   assigned-clocks = < IMX8MQ_CLK_DISP_AXI>,
+ < IMX8MQ_CLK_DISP_RTRM>,
+ < 
IMX8MQ_VIDEO2_PLL1_REF_SEL>;
+   assigned-clock-parents = < 
IMX8MQ_SYS1_PLL_800M>,
+< 
IMX8MQ_SYS1_PLL_800M>,
+< IMX8MQ_CLK_27M>;
+   assigned-clock-rates = <8>,
+  <4>;
+   status = "disabled";
+   };
};
 
gpu: gpu@3800 {
-- 
2.7.4