On Fri 09 Apr 06:30 CDT 2021, Serge Semin wrote:
> In accordance with the DWC USB3 bindings the corresponding node
> name is suppose to comply with the Generic USB HCD DT schema, which
> requires the USB nodes to have the name acceptable by the regexp:
> "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
> named.
>
> Signed-off-by: Serge Semin
> Acked-by: Krzysztof Kozlowski
> Reviewed-by: Bjorn Andersson
As mentioned previously, I would like to merge this through the qcom soc
tree to avoid conflicts with other activities, but need the driver code
(patch 6) to land first.
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++--
> arch/arm64/boot/dts/qcom/ipq8074.dtsi| 4 ++--
> arch/arm64/boot/dts/qcom/msm8996.dtsi| 4 ++--
> arch/arm64/boot/dts/qcom/msm8998.dtsi| 2 +-
> arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
> 9 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> index defcbd15edf9..34e97da98270 100644
> --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
> @@ -1064,7 +1064,7 @@ {
> status = "okay";
> extcon = <_id>;
>
> - dwc3@760 {
> + usb@760 {
> extcon = <_id>;
> dr_mode = "otg";
> maximum-speed = "high-speed";
> @@ -1075,7 +1075,7 @@ {
> status = "okay";
> extcon = <_id>;
>
> - dwc3@6a0 {
> + usb@6a0 {
> extcon = <_id>;
> dr_mode = "otg";
> };
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index a32e5e79ab0b..7df4eb710aae 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -427,7 +427,7 @@ usb_0: usb@8af8800 {
> resets = < GCC_USB0_BCR>;
> status = "disabled";
>
> - dwc_0: dwc3@8a0 {
> + dwc_0: usb@8a0 {
> compatible = "snps,dwc3";
> reg = <0x8a0 0xcd00>;
> interrupts = ;
> @@ -468,7 +468,7 @@ usb_1: usb@8cf8800 {
> resets = < GCC_USB1_BCR>;
> status = "disabled";
>
> - dwc_1: dwc3@8c0 {
> + dwc_1: usb@8c0 {
> compatible = "snps,dwc3";
> reg = <0x8c0 0xcd00>;
> interrupts = ;
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index ce430ba9c118..9eb31b3e6ee7 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -1772,7 +1772,7 @@ usb3: usb@6af8800 {
> power-domains = < USB30_GDSC>;
> status = "disabled";
>
> - dwc3@6a0 {
> + usb@6a0 {
> compatible = "snps,dwc3";
> reg = <0x06a0 0xcc00>;
> interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1983,7 +1983,7 @@ usb2: usb@76f8800 {
> power-domains = < USB30_GDSC>;
> status = "disabled";
>
> - dwc3@760 {
> + usb@760 {
> compatible = "snps,dwc3";
> reg = <0x0760 0xcc00>;
> interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index 1f2e93aa6553..9141c5d09b59 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -1962,7 +1962,7 @@ usb3: usb@a8f8800 {
>
> resets = < GCC_USB_30_BCR>;
>
> - usb3_dwc3: dwc3@a80 {
> + usb3_dwc3: usb@a80 {
> compatible = "snps,dwc3";
> reg = <0x0a80 0xcd00>;
> interrupts = ;
> diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> index a80c578484ba..f8a55307b855 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> @@ -337,7 +337,7 @@ _phy_sec {
> {
> status = "okay";
>
> - dwc3@758 {
> + usb@758 {
> dr_mode = "host";
> };
> };
> diff --git