Re: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
Hi Rob, On 7/28/2020 9:24 PM, Rob Herring wrote: On Tue, Jul 28, 2020 at 9:27 AM Rob Herring wrote: On Sun, Jul 26, 2020 at 9:07 AM Sivaprakash Murugesan wrote: From: Sivaprakash Murugesan Convert QCOM pci bindings to YAML schema Signed-off-by: Sivaprakash Murugesan --- [v2] - Referenced pci-bus.yaml - removed duplicate properties already referenced by pci-bus.yaml - Addressed comments from Rob .../devicetree/bindings/pci/qcom,pcie.txt | 330 --- .../devicetree/bindings/pci/qcom,pcie.yaml | 447 + 2 files changed, 447 insertions(+), 330 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml new file mode 100644 index ..ddb84f49ac1c --- /dev/null +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -0,0 +1,447 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/pci/qcom,pcie.yaml#; +$schema: "http://devicetree.org/meta-schemas/core.yaml#; + +title: Qualcomm PCI express root complex + +maintainers: + - Sivaprakash Murugesan + +description: + QCOM PCIe controller uses Designware IP with Qualcomm specific hardware + wrappers. + +properties: + compatible: +enum: + - qcom,pcie-apq8064 + - qcom,pcie-apq8084 + - qcom,pcie-ipq4019 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8074 + - qcom,pcie-msm8996 + - qcom,pcie-qcs404 + - qcom,pcie-sdm845 + + reg: +description: Register ranges as listed in the reg-names property Can drop this. +maxItems: 4 + + reg-names: +items: + - const: dbi + - const: elbi + - const: parf + - const: config + + ranges: +maxItems: 2 + + interrupts: +items: + - description: MSI interrupts + + interrupt-names: +const: msi + + "#interrupt-cells": In pci-bus.yaml, so you can drop. I am getting the below error if I remove #interrupt-cells alone. properties: '#interrupt-cells' is a dependency of 'interrupt-map' interrupt-map is also documented in pci-bus.yaml hence dropping that as well.
Re: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
On Tue, Jul 28, 2020 at 9:27 AM Rob Herring wrote: > > On Sun, Jul 26, 2020 at 9:07 AM Sivaprakash Murugesan > wrote: > > > > From: Sivaprakash Murugesan > > > > Convert QCOM pci bindings to YAML schema > > > > Signed-off-by: Sivaprakash Murugesan > > --- > > [v2] > > - Referenced pci-bus.yaml > > - removed duplicate properties already referenced by pci-bus.yaml > > - Addressed comments from Rob > > .../devicetree/bindings/pci/qcom,pcie.txt | 330 --- > > .../devicetree/bindings/pci/qcom,pcie.yaml | 447 > > + > > 2 files changed, 447 insertions(+), 330 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt > > create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > new file mode 100644 > > index ..ddb84f49ac1c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > > @@ -0,0 +1,447 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > + > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/pci/qcom,pcie.yaml#; > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#; > > + > > +title: Qualcomm PCI express root complex > > + > > +maintainers: > > + - Sivaprakash Murugesan > > + > > +description: > > + QCOM PCIe controller uses Designware IP with Qualcomm specific hardware > > + wrappers. > > + > > +properties: > > + compatible: > > +enum: > > + - qcom,pcie-apq8064 > > + - qcom,pcie-apq8084 > > + - qcom,pcie-ipq4019 > > + - qcom,pcie-ipq8064 > > + - qcom,pcie-ipq8074 > > + - qcom,pcie-msm8996 > > + - qcom,pcie-qcs404 > > + - qcom,pcie-sdm845 > > + > > + reg: > > +description: Register ranges as listed in the reg-names property > > Can drop this. > > > +maxItems: 4 > > + > > + reg-names: > > +items: > > + - const: dbi > > + - const: elbi > > + - const: parf > > + - const: config > > + > > + ranges: > > +maxItems: 2 > > + > > + interrupts: > > +items: > > + - description: MSI interrupts > > + > > + interrupt-names: > > +const: msi > > + > > + "#interrupt-cells": > > In pci-bus.yaml, so you can drop. > > > +const: 1 > > + > > + interrupt-map-mask: > > In pci-bus.yaml, so you can drop. Actually, you'll need to do 'interrupt-map-mask: true' on these. > > > +items: > > + - description: standard PCI properties to define mapping of PCIe > > + interface to interrupt numbers. > > + > > + interrupt-map: > > +maxItems: 4 > > + > > + clocks: > > +minItems: 1 > > +maxItems: 7 > > + > > + clock-names: > > +minItems: 1 > > +maxItems: 7 > > + > > + resets: > > +minItems: 1 > > +maxItems: 12 > > + > > + reset-names: > > +minItems: 1 > > +maxItems: 12 > > + > > + power-domains: > > +maxItems: 1 > > + > > + vdda-supply: > > +description: phandle to power supply > > + > > + vdda_phy-supply: > > +description: phandle to the power supply to PHY > > + > > + vdda_refclk-supply: > > +description: phandle to power supply for ref clock generator > > + > > + vddpe-3v3-supply: > > +description: PCIe endpoint power supply > > + > > + phys: > > +maxItems: 1 > > +items: > > + - description: phandle to the PHY block > > Can drop 'items'. > > With those fixed, > > Reviewed-by: Rob Herring
Re: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
On Sun, Jul 26, 2020 at 9:07 AM Sivaprakash Murugesan wrote: > > From: Sivaprakash Murugesan > > Convert QCOM pci bindings to YAML schema > > Signed-off-by: Sivaprakash Murugesan > --- > [v2] > - Referenced pci-bus.yaml > - removed duplicate properties already referenced by pci-bus.yaml > - Addressed comments from Rob > .../devicetree/bindings/pci/qcom,pcie.txt | 330 --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 447 > + > 2 files changed, 447 insertions(+), 330 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt > create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > new file mode 100644 > index ..ddb84f49ac1c > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -0,0 +1,447 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/pci/qcom,pcie.yaml#; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#; > + > +title: Qualcomm PCI express root complex > + > +maintainers: > + - Sivaprakash Murugesan > + > +description: > + QCOM PCIe controller uses Designware IP with Qualcomm specific hardware > + wrappers. > + > +properties: > + compatible: > +enum: > + - qcom,pcie-apq8064 > + - qcom,pcie-apq8084 > + - qcom,pcie-ipq4019 > + - qcom,pcie-ipq8064 > + - qcom,pcie-ipq8074 > + - qcom,pcie-msm8996 > + - qcom,pcie-qcs404 > + - qcom,pcie-sdm845 > + > + reg: > +description: Register ranges as listed in the reg-names property Can drop this. > +maxItems: 4 > + > + reg-names: > +items: > + - const: dbi > + - const: elbi > + - const: parf > + - const: config > + > + ranges: > +maxItems: 2 > + > + interrupts: > +items: > + - description: MSI interrupts > + > + interrupt-names: > +const: msi > + > + "#interrupt-cells": In pci-bus.yaml, so you can drop. > +const: 1 > + > + interrupt-map-mask: In pci-bus.yaml, so you can drop. > +items: > + - description: standard PCI properties to define mapping of PCIe > + interface to interrupt numbers. > + > + interrupt-map: > +maxItems: 4 > + > + clocks: > +minItems: 1 > +maxItems: 7 > + > + clock-names: > +minItems: 1 > +maxItems: 7 > + > + resets: > +minItems: 1 > +maxItems: 12 > + > + reset-names: > +minItems: 1 > +maxItems: 12 > + > + power-domains: > +maxItems: 1 > + > + vdda-supply: > +description: phandle to power supply > + > + vdda_phy-supply: > +description: phandle to the power supply to PHY > + > + vdda_refclk-supply: > +description: phandle to power supply for ref clock generator > + > + vddpe-3v3-supply: > +description: PCIe endpoint power supply > + > + phys: > +maxItems: 1 > +items: > + - description: phandle to the PHY block Can drop 'items'. With those fixed, Reviewed-by: Rob Herring
Re: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
On Sun, 26 Jul 2020 20:36:53 +0530, Sivaprakash Murugesan wrote: > From: Sivaprakash Murugesan > > Convert QCOM pci bindings to YAML schema > > Signed-off-by: Sivaprakash Murugesan > --- > [v2] > - Referenced pci-bus.yaml > - removed duplicate properties already referenced by pci-bus.yaml > - Addressed comments from Rob > .../devicetree/bindings/pci/qcom,pcie.txt | 330 --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 447 > + > 2 files changed, 447 insertions(+), 330 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt > create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml > Applied, thanks!
[PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
From: Sivaprakash Murugesan Convert QCOM pci bindings to YAML schema Signed-off-by: Sivaprakash Murugesan --- [v2] - Referenced pci-bus.yaml - removed duplicate properties already referenced by pci-bus.yaml - Addressed comments from Rob .../devicetree/bindings/pci/qcom,pcie.txt | 330 --- .../devicetree/bindings/pci/qcom,pcie.yaml | 447 + 2 files changed, 447 insertions(+), 330 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt deleted file mode 100644 index 981b4de12807.. --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ /dev/null @@ -1,330 +0,0 @@ -* Qualcomm PCI express root complex - -- compatible: - Usage: required - Value type: - Definition: Value should contain - - "qcom,pcie-ipq8064" for ipq8064 - - "qcom,pcie-apq8064" for apq8064 - - "qcom,pcie-apq8084" for apq8084 - - "qcom,pcie-msm8996" for msm8996 or apq8096 - - "qcom,pcie-ipq4019" for ipq4019 - - "qcom,pcie-ipq8074" for ipq8074 - - "qcom,pcie-qcs404" for qcs404 - - "qcom,pcie-sdm845" for sdm845 - -- reg: - Usage: required - Value type: - Definition: Register ranges as listed in the reg-names property - -- reg-names: - Usage: required - Value type: - Definition: Must include the following entries - - "parf" Qualcomm specific registers - - "dbi"DesignWare PCIe registers - - "elbi" External local bus interface registers - - "config" PCIe configuration space - -- device_type: - Usage: required - Value type: - Definition: Should be "pci". As specified in designware-pcie.txt - -- #address-cells: - Usage: required - Value type: - Definition: Should be 3. As specified in designware-pcie.txt - -- #size-cells: - Usage: required - Value type: - Definition: Should be 2. As specified in designware-pcie.txt - -- ranges: - Usage: required - Value type: - Definition: As specified in designware-pcie.txt - -- interrupts: - Usage: required - Value type: - Definition: MSI interrupt - -- interrupt-names: - Usage: required - Value type: - Definition: Should contain "msi" - -- #interrupt-cells: - Usage: required - Value type: - Definition: Should be 1. As specified in designware-pcie.txt - -- interrupt-map-mask: - Usage: required - Value type: - Definition: As specified in designware-pcie.txt - -- interrupt-map: - Usage: required - Value type: - Definition: As specified in designware-pcie.txt - -- clocks: - Usage: required - Value type: - Definition: List of phandle and clock specifier pairs as listed - in clock-names property - -- clock-names: - Usage: required - Value type: - Definition: Should contain the following entries - - "iface" Configuration AHB clock - -- clock-names: - Usage: required for ipq/apq8064 - Value type: - Definition: Should contain the following entries - - "core"Clocks the pcie hw block - - "phy" Clocks the pcie PHY block -- clock-names: - Usage: required for apq8084/ipq4019 - Value type: - Definition: Should contain the following entries - - "aux" Auxiliary (AUX) clock - - "bus_master" Master AXI clock - - "bus_slave" Slave AXI clock - -- clock-names: - Usage: required for msm8996/apq8096 - Value type: - Definition: Should contain the following entries - - "pipe"Pipe Clock driving internal logic - - "aux" Auxiliary (AUX) clock - - "cfg" Configuration clock - - "bus_master" Master AXI clock - - "bus_slave" Slave AXI clock - -- clock-names: - Usage: required for ipq8074 - Value type: - Definition: Should contain the following entries - - "iface" PCIe to SysNOC BIU clock - - "axi_m" AXI Master clock - - "axi_s" AXI Slave clock - - "ahb" AHB clock - - "aux" Auxiliary clock - -- clock-names: - Usage: required for qcs404 - Value type: - Definition: Should contain
