Re: [PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
On 2021-04-03 00:15, Matthias Kaehlcke wrote:
On Thu, Apr 01, 2021 at 02:43:14PM +0530, satya priya wrote:
subject: arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
same nit as for 1/5: maybe just 'arm64: dts: qcom: Add pml7350
support/.dtsi'
or similar since this adds the initial .dtsi for the pmk8350?
Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
I see that pmk8350 DT file is already added in linux-next.
Only GPIO node has been added, will add remaining nodes and change
commit text accordingly.
nit: also mention that it adds the pmk8350 .dtsi in the first place.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100
++
1 file changed, 100 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi
diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi
b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
new file mode 100644
index 000..13631f2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+&spmi_bus {
+ pmk8350: pmic@0 {
+ compatible = "qcom,pmk8350", "qcom,spmi-pmic";
Please provide a link to the binding if it has been sent.
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmk8350_pon: pon@1300 {
+ compatible = "qcom,pm8998-pon";
+ reg = <0x1300>;
+
+ pwrkey {
+ compatible = "qcom,pmk8350-pwrkey";
+ interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = ;
+ };
+
+ resin {
+ compatible = "qcom,pmk8350-resin";
+ interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = ;
+ };
Is the usage of this keys really universal across different boards?
Yes, It is universal across different boards.
At least for the volume down key for most PMICs the config is in the
board file, which seems to make more sense.
+ };
+
+ pmk8350_vadc: adc@3100 {
+ compatible = "qcom,spmi-adc7";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eoc-int-en-set";
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ pmk8350_die_temp {
+ reg = ;
+ label = "pmk8350_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pm8350_die_temp {
+ reg = ;
+ label = "pm8350_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
nit: I think this should be 'alphabetical' order, so 'pm8350_die_temp'
should
be before 'pmk8350_die_temp'.
Ok.
+
+ pmr735a_die_temp {
+ reg = ;
+ label = "pmr735a_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmr735b_die_temp {
+ reg = ;
+ label = "pmr735b_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
Is it guaranteed that a board with the pmk8350 will always have the
other 3 PMICs?
No.
Ok, will move this to idp board dts file.
+ };
+
+ pmk8350_adc_tm: adc-tm@3400 {
+ compatible = "qcom,adc-tm7";
+ reg = <0x3400>;
+ interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "threshold";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #thermal-sensor-cells = <1>;
+ status = "disabled";
+ };
+
+ pmk8350_gpios: gpios@b000 {
+ compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
+ reg = <0xb000>;
+ gpio-controller;
+ gpio-ranges = <&pmk8350_gpios 0 0 4>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pmk8350_rt
Re: [PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
On Thu, Apr 01, 2021 at 02:43:14PM +0530, satya priya wrote:
> subject: arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
same nit as for 1/5: maybe just 'arm64: dts: qcom: Add pml7350 support/.dtsi'
or similar since this adds the initial .dtsi for the pmk8350?
> Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
nit: also mention that it adds the pmk8350 .dtsi in the first place.
> Signed-off-by: satya priya
> ---
> arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100
> ++
> 1 file changed, 100 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi
> b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
> new file mode 100644
> index 000..13631f2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +// Copyright (c) 2021, The Linux Foundation. All rights reserved.
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +&spmi_bus {
> + pmk8350: pmic@0 {
> + compatible = "qcom,pmk8350", "qcom,spmi-pmic";
Please provide a link to the binding if it has been sent.
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pmk8350_pon: pon@1300 {
> + compatible = "qcom,pm8998-pon";
> + reg = <0x1300>;
> +
> + pwrkey {
> + compatible = "qcom,pmk8350-pwrkey";
> + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
> + linux,code = ;
> + };
> +
> + resin {
> + compatible = "qcom,pmk8350-resin";
> + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
> + linux,code = ;
> + };
Is the usage of this keys really universal across different boards?
At least for the volume down key for most PMICs the config is in the
board file, which seems to make more sense.
> + };
> +
> + pmk8350_vadc: adc@3100 {
> + compatible = "qcom,spmi-adc7";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "eoc-int-en-set";
> + #io-channel-cells = <1>;
> + io-channel-ranges;
> +
> + pmk8350_die_temp {
> + reg = ;
> + label = "pmk8350_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
> +
> + pm8350_die_temp {
> + reg = ;
> + label = "pm8350_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
nit: I think this should be 'alphabetical' order, so 'pm8350_die_temp' should
be before 'pmk8350_die_temp'.
> +
> + pmr735a_die_temp {
> + reg = ;
> + label = "pmr735a_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
> +
> + pmr735b_die_temp {
> + reg = ;
> + label = "pmr735b_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
Is it guaranteed that a board with the pmk8350 will always have the
other 3 PMICs?
> + };
> +
> + pmk8350_adc_tm: adc-tm@3400 {
> + compatible = "qcom,adc-tm7";
> + reg = <0x3400>;
> + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "threshold";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #thermal-sensor-cells = <1>;
> + status = "disabled";
> + };
> +
> + pmk8350_gpios: gpios@b000 {
> + compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
> + reg = <0xb000>;
> + gpio-controller;
> + gpio-ranges = <&pmk8350_gpios 0 0 4>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pmk8350_rtc: rtc@6100 {
nit: nodes should be ordered by address, hence 'rtc@6100' should be before
'gpios@b000'.
> + compatible = "qcom,pmk8350-rtc";
> + reg = <0x6100>, <0x6200>;
> + reg-names = "r
[PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++
1 file changed, 100 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi
diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi
b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
new file mode 100644
index 000..13631f2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2021, The Linux Foundation. All rights reserved.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+&spmi_bus {
+ pmk8350: pmic@0 {
+ compatible = "qcom,pmk8350", "qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmk8350_pon: pon@1300 {
+ compatible = "qcom,pm8998-pon";
+ reg = <0x1300>;
+
+ pwrkey {
+ compatible = "qcom,pmk8350-pwrkey";
+ interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = ;
+ };
+
+ resin {
+ compatible = "qcom,pmk8350-resin";
+ interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = ;
+ };
+ };
+
+ pmk8350_vadc: adc@3100 {
+ compatible = "qcom,spmi-adc7";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eoc-int-en-set";
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ pmk8350_die_temp {
+ reg = ;
+ label = "pmk8350_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pm8350_die_temp {
+ reg = ;
+ label = "pm8350_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmr735a_die_temp {
+ reg = ;
+ label = "pmr735a_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmr735b_die_temp {
+ reg = ;
+ label = "pmr735b_die_temp";
+ qcom,pre-scaling = <1 1>;
+ };
+ };
+
+ pmk8350_adc_tm: adc-tm@3400 {
+ compatible = "qcom,adc-tm7";
+ reg = <0x3400>;
+ interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "threshold";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #thermal-sensor-cells = <1>;
+ status = "disabled";
+ };
+
+ pmk8350_gpios: gpios@b000 {
+ compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
+ reg = <0xb000>;
+ gpio-controller;
+ gpio-ranges = <&pmk8350_gpios 0 0 4>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pmk8350_rtc: rtc@6100 {
+ compatible = "qcom,pmk8350-rtc";
+ reg = <0x6100>, <0x6200>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+};
--
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