Re: [PATCH V2 6/9] pinctrl: stm32: Add STM32MP157 MPU support

[Linus Walleij]

On Mon, Dec 18, 2017 at 4:17 PM, Ludovic Barre  wrote:

> From: Ludovic Barre 
>
> This driver consists of 2 controllers due to a hole in mapping:
> -1 controller for GPIO bankA to K.
> -1 controller for GPIO bankZ.
>
> Signed-off-by: Alexandre Torgue 
> Signed-off-by: Ludovic Barre 
> Reviewed-by: Rob Herring 

Patch applied.

Yours,
Linus Walleij

Re: [PATCH V2 6/9] pinctrl: stm32: Add STM32MP157 MPU support

[Linus Walleij]

On Mon, Dec 18, 2017 at 4:17 PM, Ludovic Barre  wrote:

> From: Ludovic Barre 
>
> This driver consists of 2 controllers due to a hole in mapping:
> -1 controller for GPIO bankA to K.
> -1 controller for GPIO bankZ.
>
> Signed-off-by: Alexandre Torgue 
> Signed-off-by: Ludovic Barre 
> Reviewed-by: Rob Herring 

Patch applied.

Yours,
Linus Walleij

[PATCH V2 6/9] pinctrl: stm32: Add STM32MP157 MPU support

[Ludovic Barre]

From: Ludovic Barre 

This driver consists of 2 controllers due to a hole in mapping:
-1 controller for GPIO bankA to K.
-1 controller for GPIO bankZ.

Signed-off-by: Alexandre Torgue 
Signed-off-by: Ludovic Barre 
Reviewed-by: Rob Herring 
---
 .../bindings/pinctrl/st,stm32-pinctrl.txt  |2 +
 drivers/pinctrl/stm32/Kconfig  |6 +
 drivers/pinctrl/stm32/Makefile |1 +
 drivers/pinctrl/stm32/pinctrl-stm32mp157.c | 2188 
 4 files changed, 2197 insertions(+)
 create mode 100644 drivers/pinctrl/stm32/pinctrl-stm32mp157.c

diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index 58c2a4c..2c46f30 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -12,6 +12,8 @@ Required properies:
"st,stm32f469-pinctrl"
"st,stm32f746-pinctrl"
"st,stm32h743-pinctrl"
+   "st,stm32mp157-pinctrl"
+   "st,stm32mp157-z-pinctrl"
  - #address-cells: The value of this property must be 1
  - #size-cells : The value of this property must be 1
  - ranges  : defines mapping between pin controller node (parent) to
diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
index 7e1fe39..a6d045d 100644
--- a/drivers/pinctrl/stm32/Kconfig
+++ b/drivers/pinctrl/stm32/Kconfig
@@ -32,4 +32,10 @@ config PINCTRL_STM32H743
depends on OF
default MACH_STM32H743
select PINCTRL_STM32
+
+config PINCTRL_STM32MP157
+   bool "STMicroelectronics STM32MP157 pin control" if COMPILE_TEST && 
!MACH_STM32MP157
+   depends on OF
+   default MACH_STM32MP157
+   select PINCTRL_STM32
 endif
diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile
index d13ca35..b52223d 100644
--- a/drivers/pinctrl/stm32/Makefile
+++ b/drivers/pinctrl/stm32/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_PINCTRL_STM32F429) += pinctrl-stm32f429.o
 obj-$(CONFIG_PINCTRL_STM32F469)+= pinctrl-stm32f469.o
 obj-$(CONFIG_PINCTRL_STM32F746)+= pinctrl-stm32f746.o
 obj-$(CONFIG_PINCTRL_STM32H743)+= pinctrl-stm32h743.o
+obj-$(CONFIG_PINCTRL_STM32MP157) += pinctrl-stm32mp157.o
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c 
b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
new file mode 100644
index 000..7c7d628
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
@@ -0,0 +1,2188 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Alexandre Torgue  for STMicroelectronics.
+ */
+#include 
+#include 
+#include 
+
+#include "pinctrl-stm32.h"
+
+static const struct stm32_desc_pin stm32mp157_pins[] = {
+   STM32_PIN(
+   PINCTRL_PIN(0, "PA0"),
+   STM32_FUNCTION(0, "GPIOA0"),
+   STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
+   STM32_FUNCTION(3, "TIM5_CH1"),
+   STM32_FUNCTION(4, "TIM8_ETR"),
+   STM32_FUNCTION(5, "TIM15_BKIN"),
+   STM32_FUNCTION(8, "USART2_CTS_NSS USART_BOOT2_CTS_NSS"),
+   STM32_FUNCTION(9, "UART4_TX"),
+   STM32_FUNCTION(10, "SDMMC2_CMD"),
+   STM32_FUNCTION(11, "SAI2_SD_B"),
+   STM32_FUNCTION(12, "ETH_GMII_CRS ETH_MII_CRS"),
+   STM32_FUNCTION(16, "EVENTOUT"),
+   STM32_FUNCTION(17, "ANALOG")
+   ),
+   STM32_PIN(
+   PINCTRL_PIN(1, "PA1"),
+   STM32_FUNCTION(0, "GPIOA1"),
+   STM32_FUNCTION(1, "ETH_CLK"),
+   STM32_FUNCTION(2, "TIM2_CH2"),
+   STM32_FUNCTION(3, "TIM5_CH2"),
+   STM32_FUNCTION(4, "LPTIM3_OUT"),
+   STM32_FUNCTION(5, "TIM15_CH1N"),
+   STM32_FUNCTION(8, "USART2_RTS USART_BOOT2_RTS"),
+   STM32_FUNCTION(9, "UART4_RX"),
+   STM32_FUNCTION(10, "QUADSPI_BK1_IO3 QUADSPI_BOOTBK1_IO3"),
+   STM32_FUNCTION(11, "SAI2_MCLK_B"),
+   STM32_FUNCTION(12, "ETH_GMII_RX_CLK ETH_MII_RX_CLK 
ETH_RGMII_RX_CLK ETH_RMII_REF_CLK"),
+   STM32_FUNCTION(15, "LCD_R2"),
+   STM32_FUNCTION(16, "EVENTOUT"),
+   STM32_FUNCTION(17, "ANALOG")
+   ),
+   STM32_PIN(
+   PINCTRL_PIN(2, "PA2"),
+   STM32_FUNCTION(0, "GPIOA2"),
+   STM32_FUNCTION(2, "TIM2_CH3"),
+   STM32_FUNCTION(3, "TIM5_CH3"),
+   STM32_FUNCTION(4, "LPTIM4_OUT"),
+   STM32_FUNCTION(5, "TIM15_CH1"),
+   STM32_FUNCTION(8, "USART2_TX USART_BOOT2_TX"),
+   STM32_FUNCTION(9, "SAI2_SCK_B"),
+   STM32_FUNCTION(11, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
+   STM32_FUNCTION(12, "ETH_MDIO"),
+   

[PATCH V2 6/9] pinctrl: stm32: Add STM32MP157 MPU support

[Ludovic Barre]

From: Ludovic Barre 

This driver consists of 2 controllers due to a hole in mapping:
-1 controller for GPIO bankA to K.
-1 controller for GPIO bankZ.

Signed-off-by: Alexandre Torgue 
Signed-off-by: Ludovic Barre 
Reviewed-by: Rob Herring 
---
 .../bindings/pinctrl/st,stm32-pinctrl.txt  |2 +
 drivers/pinctrl/stm32/Kconfig  |6 +
 drivers/pinctrl/stm32/Makefile |1 +
 drivers/pinctrl/stm32/pinctrl-stm32mp157.c | 2188 
 4 files changed, 2197 insertions(+)
 create mode 100644 drivers/pinctrl/stm32/pinctrl-stm32mp157.c

diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index 58c2a4c..2c46f30 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -12,6 +12,8 @@ Required properies:
"st,stm32f469-pinctrl"
"st,stm32f746-pinctrl"
"st,stm32h743-pinctrl"
+   "st,stm32mp157-pinctrl"
+   "st,stm32mp157-z-pinctrl"
  - #address-cells: The value of this property must be 1
  - #size-cells : The value of this property must be 1
  - ranges  : defines mapping between pin controller node (parent) to
diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
index 7e1fe39..a6d045d 100644
--- a/drivers/pinctrl/stm32/Kconfig
+++ b/drivers/pinctrl/stm32/Kconfig
@@ -32,4 +32,10 @@ config PINCTRL_STM32H743
depends on OF
default MACH_STM32H743
select PINCTRL_STM32
+
+config PINCTRL_STM32MP157
+   bool "STMicroelectronics STM32MP157 pin control" if COMPILE_TEST && 
!MACH_STM32MP157
+   depends on OF
+   default MACH_STM32MP157
+   select PINCTRL_STM32
 endif
diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile
index d13ca35..b52223d 100644
--- a/drivers/pinctrl/stm32/Makefile
+++ b/drivers/pinctrl/stm32/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_PINCTRL_STM32F429) += pinctrl-stm32f429.o
 obj-$(CONFIG_PINCTRL_STM32F469)+= pinctrl-stm32f469.o
 obj-$(CONFIG_PINCTRL_STM32F746)+= pinctrl-stm32f746.o
 obj-$(CONFIG_PINCTRL_STM32H743)+= pinctrl-stm32h743.o
+obj-$(CONFIG_PINCTRL_STM32MP157) += pinctrl-stm32mp157.o
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c 
b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
new file mode 100644
index 000..7c7d628
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
@@ -0,0 +1,2188 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Alexandre Torgue  for STMicroelectronics.
+ */
+#include 
+#include 
+#include 
+
+#include "pinctrl-stm32.h"
+
+static const struct stm32_desc_pin stm32mp157_pins[] = {
+   STM32_PIN(
+   PINCTRL_PIN(0, "PA0"),
+   STM32_FUNCTION(0, "GPIOA0"),
+   STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
+   STM32_FUNCTION(3, "TIM5_CH1"),
+   STM32_FUNCTION(4, "TIM8_ETR"),
+   STM32_FUNCTION(5, "TIM15_BKIN"),
+   STM32_FUNCTION(8, "USART2_CTS_NSS USART_BOOT2_CTS_NSS"),
+   STM32_FUNCTION(9, "UART4_TX"),
+   STM32_FUNCTION(10, "SDMMC2_CMD"),
+   STM32_FUNCTION(11, "SAI2_SD_B"),
+   STM32_FUNCTION(12, "ETH_GMII_CRS ETH_MII_CRS"),
+   STM32_FUNCTION(16, "EVENTOUT"),
+   STM32_FUNCTION(17, "ANALOG")
+   ),
+   STM32_PIN(
+   PINCTRL_PIN(1, "PA1"),
+   STM32_FUNCTION(0, "GPIOA1"),
+   STM32_FUNCTION(1, "ETH_CLK"),
+   STM32_FUNCTION(2, "TIM2_CH2"),
+   STM32_FUNCTION(3, "TIM5_CH2"),
+   STM32_FUNCTION(4, "LPTIM3_OUT"),
+   STM32_FUNCTION(5, "TIM15_CH1N"),
+   STM32_FUNCTION(8, "USART2_RTS USART_BOOT2_RTS"),
+   STM32_FUNCTION(9, "UART4_RX"),
+   STM32_FUNCTION(10, "QUADSPI_BK1_IO3 QUADSPI_BOOTBK1_IO3"),
+   STM32_FUNCTION(11, "SAI2_MCLK_B"),
+   STM32_FUNCTION(12, "ETH_GMII_RX_CLK ETH_MII_RX_CLK 
ETH_RGMII_RX_CLK ETH_RMII_REF_CLK"),
+   STM32_FUNCTION(15, "LCD_R2"),
+   STM32_FUNCTION(16, "EVENTOUT"),
+   STM32_FUNCTION(17, "ANALOG")
+   ),
+   STM32_PIN(
+   PINCTRL_PIN(2, "PA2"),
+   STM32_FUNCTION(0, "GPIOA2"),
+   STM32_FUNCTION(2, "TIM2_CH3"),
+   STM32_FUNCTION(3, "TIM5_CH3"),
+   STM32_FUNCTION(4, "LPTIM4_OUT"),
+   STM32_FUNCTION(5, "TIM15_CH1"),
+   STM32_FUNCTION(8, "USART2_TX USART_BOOT2_TX"),
+   STM32_FUNCTION(9, "SAI2_SCK_B"),
+   STM32_FUNCTION(11, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
+   STM32_FUNCTION(12, "ETH_MDIO"),
+   STM32_FUNCTION(13, "MDIOS_MDIO"),
+   STM32_FUNCTION(15, "LCD_R1"),
+   STM32_FUNCTION(16,