Re: [PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-17 Thread Peter Hung 

Hi Linus,

Linus Walleij 於 2016/2/16 下午 11:22 寫道:

On Tue, Feb 16, 2016 at 7:55 AM, Peter Hung  wrote:


Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 


Acked-by: Linus Walleij 

It's fine with me if this is queued in MFD, serial or whatever tree, or
we can wait until the MFD parts are in and take it for the next merge
window.



Thanks for your review, but Andy give me some advice for 8250_f81504.c.
So I'll send V4 when I rewrite it.

--
With Best Regards,
Peter Hung

Re: [PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-17 Thread Peter Hung 

Hi Linus,

Linus Walleij 於 2016/2/16 下午 11:22 寫道:

On Tue, Feb 16, 2016 at 7:55 AM, Peter Hung  wrote:


Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 


Acked-by: Linus Walleij 

It's fine with me if this is queued in MFD, serial or whatever tree, or
we can wait until the MFD parts are in and take it for the next merge
window.



Thanks for your review, but Andy give me some advice for 8250_f81504.c.
So I'll send V4 when I rewrite it.

--
With Best Regards,
Peter Hung

Re: [PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-16 Thread Linus Walleij 
On Tue, Feb 16, 2016 at 7:55 AM, Peter Hung  wrote:

> This driver is GPIOLIB driver for F81504/508/512, it'll handle the
> GPIOLIB operation of this device. This module will depend on
> MFD_FINTEK_F81504_CORE.
>
> IC function list:
> F81504: Max 2x8 GPIOs and max 4 serial ports
> port2/3 are multi-function
> F81508: Max 6x8 GPIOs and max 8 serial ports
> port2/3 are multi-function, port8/9/10/11 are gpio only
> F81512: Max 6x8 GPIOs and max 12 serial ports
> port2/3/8/9/10/11 are multi-function
>
> GPIO register:
> PCI Configuration space:
> F0h: bit0~5: Enable GPIO0~5
>  bit6~7: Reserve
> F3h: bit0~5: Multi-Functional Flag (0:GPIO/1:UART)
>  bit0: UART2 pin out for UART2 / GPIO0
>  bit1: UART3 pin out for UART3 / GPIO1
>  bit2: UART8 pin out for UART8 / GPIO2
>  bit3: UART9 pin out for UART9 / GPIO3
>  bit4: UART10 pin out for UART10 / GPIO4
>  bit5: UART11 pin out for UART11 / GPIO5
>  bit6~7: Reserve
> F1h: IO address (LSB)
> F2h: IO address (MSB)
> F8h + 8 * set: Direction control (bitwise)
>  bitx: 0 - Input mode
>  bitx: 1 - Output mode
> F9h + 8 * set: Drive ability control (bitwise)
>  bitx: 0 - Open drain (default)
>  bitx: 1 - Push Pull
>  In this driver, we only implements open drain mode.
>
> IO space:
> (IO base + 0~5): GPIO-0x~5x in/out value (bitwise)
>
> Suggested-by: One Thousand Gnomes 
> Suggested-by: Andy Shevchenko 
> Signed-off-by: Peter Hung 

Acked-by: Linus Walleij 

It's fine with me if this is queued in MFD, serial or whatever tree, or
we can wait until the MFD parts are in and take it for the next merge
window.

Yours,
Linus Walleij

Re: [PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-16 Thread Linus Walleij 
On Tue, Feb 16, 2016 at 7:55 AM, Peter Hung  wrote:

> This driver is GPIOLIB driver for F81504/508/512, it'll handle the
> GPIOLIB operation of this device. This module will depend on
> MFD_FINTEK_F81504_CORE.
>
> IC function list:
> F81504: Max 2x8 GPIOs and max 4 serial ports
> port2/3 are multi-function
> F81508: Max 6x8 GPIOs and max 8 serial ports
> port2/3 are multi-function, port8/9/10/11 are gpio only
> F81512: Max 6x8 GPIOs and max 12 serial ports
> port2/3/8/9/10/11 are multi-function
>
> GPIO register:
> PCI Configuration space:
> F0h: bit0~5: Enable GPIO0~5
>  bit6~7: Reserve
> F3h: bit0~5: Multi-Functional Flag (0:GPIO/1:UART)
>  bit0: UART2 pin out for UART2 / GPIO0
>  bit1: UART3 pin out for UART3 / GPIO1
>  bit2: UART8 pin out for UART8 / GPIO2
>  bit3: UART9 pin out for UART9 / GPIO3
>  bit4: UART10 pin out for UART10 / GPIO4
>  bit5: UART11 pin out for UART11 / GPIO5
>  bit6~7: Reserve
> F1h: IO address (LSB)
> F2h: IO address (MSB)
> F8h + 8 * set: Direction control (bitwise)
>  bitx: 0 - Input mode
>  bitx: 1 - Output mode
> F9h + 8 * set: Drive ability control (bitwise)
>  bitx: 0 - Open drain (default)
>  bitx: 1 - Push Pull
>  In this driver, we only implements open drain mode.
>
> IO space:
> (IO base + 0~5): GPIO-0x~5x in/out value (bitwise)
>
> Suggested-by: One Thousand Gnomes 
> Suggested-by: Andy Shevchenko 
> Signed-off-by: Peter Hung 

Acked-by: Linus Walleij 

It's fine with me if this is queued in MFD, serial or whatever tree, or
we can wait until the MFD parts are in and take it for the next merge
window.

Yours,
Linus Walleij

[PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-15 Thread Peter Hung 
This driver is GPIOLIB driver for F81504/508/512, it'll handle the
GPIOLIB operation of this device. This module will depend on
MFD_FINTEK_F81504_CORE.

IC function list:
F81504: Max 2x8 GPIOs and max 4 serial ports
port2/3 are multi-function
F81508: Max 6x8 GPIOs and max 8 serial ports
port2/3 are multi-function, port8/9/10/11 are gpio only
F81512: Max 6x8 GPIOs and max 12 serial ports
port2/3/8/9/10/11 are multi-function

GPIO register:
PCI Configuration space:
F0h: bit0~5: Enable GPIO0~5
 bit6~7: Reserve
F3h: bit0~5: Multi-Functional Flag (0:GPIO/1:UART)
 bit0: UART2 pin out for UART2 / GPIO0
 bit1: UART3 pin out for UART3 / GPIO1
 bit2: UART8 pin out for UART8 / GPIO2
 bit3: UART9 pin out for UART9 / GPIO3
 bit4: UART10 pin out for UART10 / GPIO4
 bit5: UART11 pin out for UART11 / GPIO5
 bit6~7: Reserve
F1h: IO address (LSB)
F2h: IO address (MSB)
F8h + 8 * set: Direction control (bitwise)
 bitx: 0 - Input mode
 bitx: 1 - Output mode
F9h + 8 * set: Drive ability control (bitwise)
 bitx: 0 - Open drain (default)
 bitx: 1 - Push Pull
 In this driver, we only implements open drain mode.

IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)

Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 
---
 drivers/gpio/Kconfig   |  10 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/gpio-f81504.c | 241 +
 3 files changed, 252 insertions(+)
 create mode 100644 drivers/gpio/gpio-f81504.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2b80903..c9e1cf8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -912,6 +912,16 @@ config GPIO_WM8994
  Say yes here to access the GPIO signals of WM8994 audio hub
  CODECs from Wolfson Microelectronics.
 
+config GPIO_F81504
+tristate "Fintek F81504/508/512 PCIE-to-UART/GPIO support"
+depends on MFD_FINTEK_F81504_CORE
+select MFD_CORE
+help
+  Say yes here to support the GPIO functionality of Fintek
+  F81504/508/512 PCIE-to-UART/GPIO.
+
+  If unsure, say N.
+
 endmenu
 
 menu "PCI GPIO expanders"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index c759190..f277089 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -112,6 +112,7 @@ obj-$(CONFIG_GPIO_VX855)+= gpio-vx855.o
 obj-$(CONFIG_GPIO_WM831X)  += gpio-wm831x.o
 obj-$(CONFIG_GPIO_WM8350)  += gpio-wm8350.o
 obj-$(CONFIG_GPIO_WM8994)  += gpio-wm8994.o
+obj-$(CONFIG_GPIO_F81504)   += gpio-f81504.o
 obj-$(CONFIG_GPIO_XGENE)   += gpio-xgene.o
 obj-$(CONFIG_GPIO_XGENE_SB)+= gpio-xgene-sb.o
 obj-$(CONFIG_GPIO_XILINX)  += gpio-xilinx.o
diff --git a/drivers/gpio/gpio-f81504.c b/drivers/gpio/gpio-f81504.c
new file mode 100644
index 000..ef42e4f
--- /dev/null
+++ b/drivers/gpio/gpio-f81504.c
@@ -0,0 +1,241 @@
+/*
+ * Copyright (C) 2016 Fintek Corporation
+ * Based on gpio-mpc8xxx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+#include 
+#include 
+#include 
+#include 
+
+struct f81504_gpio_chip {
+   struct gpio_chip chip;
+   struct mutex locker;
+   u8 idx;
+   u8 save_out_en;
+   u8 save_drive_en;
+   u8 save_value;
+};
+
+static int f81504_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+   struct f81504_gpio_chip *gc = gpiochip_get_data(chip);
+   struct platform_device *pdev = to_platform_device(chip->parent);
+   struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent);
+   u8 tmp;
+
+   mutex_lock(>locker);
+
+   /* set input mode */
+   pci_read_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+F81504_GPIO_SET_OFFSET +
+F81504_GPIO_OUT_EN_OFFSET, );
+   pci_write_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+ F81504_GPIO_SET_OFFSET +
+ F81504_GPIO_OUT_EN_OFFSET, tmp & ~BIT(offset));
+
+   mutex_unlock(>locker);
+   return 0;
+}
+
+static int f81504_gpio_direction_out(struct gpio_chip *chip, unsigned

[PATCH V3 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

2016-02-15 Thread Peter Hung 
This driver is GPIOLIB driver for F81504/508/512, it'll handle the
GPIOLIB operation of this device. This module will depend on
MFD_FINTEK_F81504_CORE.

IC function list:
F81504: Max 2x8 GPIOs and max 4 serial ports
port2/3 are multi-function
F81508: Max 6x8 GPIOs and max 8 serial ports
port2/3 are multi-function, port8/9/10/11 are gpio only
F81512: Max 6x8 GPIOs and max 12 serial ports
port2/3/8/9/10/11 are multi-function

GPIO register:
PCI Configuration space:
F0h: bit0~5: Enable GPIO0~5
 bit6~7: Reserve
F3h: bit0~5: Multi-Functional Flag (0:GPIO/1:UART)
 bit0: UART2 pin out for UART2 / GPIO0
 bit1: UART3 pin out for UART3 / GPIO1
 bit2: UART8 pin out for UART8 / GPIO2
 bit3: UART9 pin out for UART9 / GPIO3
 bit4: UART10 pin out for UART10 / GPIO4
 bit5: UART11 pin out for UART11 / GPIO5
 bit6~7: Reserve
F1h: IO address (LSB)
F2h: IO address (MSB)
F8h + 8 * set: Direction control (bitwise)
 bitx: 0 - Input mode
 bitx: 1 - Output mode
F9h + 8 * set: Drive ability control (bitwise)
 bitx: 0 - Open drain (default)
 bitx: 1 - Push Pull
 In this driver, we only implements open drain mode.

IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)

Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 
---
 drivers/gpio/Kconfig   |  10 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/gpio-f81504.c | 241 +
 3 files changed, 252 insertions(+)
 create mode 100644 drivers/gpio/gpio-f81504.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2b80903..c9e1cf8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -912,6 +912,16 @@ config GPIO_WM8994
  Say yes here to access the GPIO signals of WM8994 audio hub
  CODECs from Wolfson Microelectronics.
 
+config GPIO_F81504
+tristate "Fintek F81504/508/512 PCIE-to-UART/GPIO support"
+depends on MFD_FINTEK_F81504_CORE
+select MFD_CORE
+help
+  Say yes here to support the GPIO functionality of Fintek
+  F81504/508/512 PCIE-to-UART/GPIO.
+
+  If unsure, say N.
+
 endmenu
 
 menu "PCI GPIO expanders"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index c759190..f277089 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -112,6 +112,7 @@ obj-$(CONFIG_GPIO_VX855)+= gpio-vx855.o
 obj-$(CONFIG_GPIO_WM831X)  += gpio-wm831x.o
 obj-$(CONFIG_GPIO_WM8350)  += gpio-wm8350.o
 obj-$(CONFIG_GPIO_WM8994)  += gpio-wm8994.o
+obj-$(CONFIG_GPIO_F81504)   += gpio-f81504.o
 obj-$(CONFIG_GPIO_XGENE)   += gpio-xgene.o
 obj-$(CONFIG_GPIO_XGENE_SB)+= gpio-xgene-sb.o
 obj-$(CONFIG_GPIO_XILINX)  += gpio-xilinx.o
diff --git a/drivers/gpio/gpio-f81504.c b/drivers/gpio/gpio-f81504.c
new file mode 100644
index 000..ef42e4f
--- /dev/null
+++ b/drivers/gpio/gpio-f81504.c
@@ -0,0 +1,241 @@
+/*
+ * Copyright (C) 2016 Fintek Corporation
+ * Based on gpio-mpc8xxx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+#include 
+#include 
+#include 
+#include 
+
+struct f81504_gpio_chip {
+   struct gpio_chip chip;
+   struct mutex locker;
+   u8 idx;
+   u8 save_out_en;
+   u8 save_drive_en;
+   u8 save_value;
+};
+
+static int f81504_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+   struct f81504_gpio_chip *gc = gpiochip_get_data(chip);
+   struct platform_device *pdev = to_platform_device(chip->parent);
+   struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent);
+   u8 tmp;
+
+   mutex_lock(>locker);
+
+   /* set input mode */
+   pci_read_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+F81504_GPIO_SET_OFFSET +
+F81504_GPIO_OUT_EN_OFFSET, );
+   pci_write_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+ F81504_GPIO_SET_OFFSET +
+ F81504_GPIO_OUT_EN_OFFSET, tmp & ~BIT(offset));
+
+   mutex_unlock(>locker);
+   return 0;
+}
+
+static int f81504_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
+   int value)
+{
+   struct f81504_gpio_chip *gc =