Re: [PATCH V4 02/12] dt-bindings: Add Spreadtrum clock binding documentation
On Fri, Nov 10, 2017 at 02:35:57PM +0800, Chunyan Zhang wrote: > Introduce a new binding with its documentation for Spreadtrum clock > sub-framework. > > Signed-off-by: Chunyan Zhang> --- > Documentation/devicetree/bindings/clock/sprd.txt | 63 > > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt Acked-by: Rob Herring
Re: [PATCH V4 02/12] dt-bindings: Add Spreadtrum clock binding documentation
On Fri, Nov 10, 2017 at 02:35:57PM +0800, Chunyan Zhang wrote: > Introduce a new binding with its documentation for Spreadtrum clock > sub-framework. > > Signed-off-by: Chunyan Zhang > --- > Documentation/devicetree/bindings/clock/sprd.txt | 63 > > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt Acked-by: Rob Herring
[PATCH V4 02/12] dt-bindings: Add Spreadtrum clock binding documentation
Introduce a new binding with its documentation for Spreadtrum clock sub-framework. Signed-off-by: Chunyan Zhang--- Documentation/devicetree/bindings/clock/sprd.txt | 63 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt diff --git a/Documentation/devicetree/bindings/clock/sprd.txt b/Documentation/devicetree/bindings/clock/sprd.txt new file mode 100644 index 000..e9d179e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sprd.txt @@ -0,0 +1,63 @@ +Spreadtrum Clock Binding + + +Required properties: +- compatible: should contain the following compatible strings: + - "sprd,sc9860-pmu-gate" + - "sprd,sc9860-pll" + - "sprd,sc9860-ap-clk" + - "sprd,sc9860-aon-prediv" + - "sprd,sc9860-apahb-gate" + - "sprd,sc9860-aon-gate" + - "sprd,sc9860-aonsecure-clk" + - "sprd,sc9860-agcp-gate" + - "sprd,sc9860-gpu-clk" + - "sprd,sc9860-vsp-clk" + - "sprd,sc9860-vsp-gate" + - "sprd,sc9860-cam-clk" + - "sprd,sc9860-cam-gate" + - "sprd,sc9860-disp-clk" + - "sprd,sc9860-disp-gate" + - "sprd,sc9860-apapb-gate" + +- #clock-cells: must be 1 + +- clocks : Should be the input parent clock(s) phandle for the clock, this + property here just simply shows which clock group the clocks' + parents are in, since each clk node would represent many clocks + which are defined in the driver. The detailed dependency + relationship (i.e. how many parents and which are the parents) + are implemented in driver code. + +Optional properties: + +- reg: Contain the registers base address and length. It must be configured + only if no 'sprd,syscon' under the node. + +- sprd,syscon: phandle to the syscon which is in the same address area with + the clock, and so we can get regmap for the clocks from the + syscon device. + +Example: + + pmu_gate: pmu-gate { + compatible = "sprd,sc9860-pmu-gate"; + sprd,syscon = <_regs>; + clocks = <_26m>; + #clock-cells = <1>; + }; + + pll: pll { + compatible = "sprd,sc9860-pll"; + sprd,syscon = <_regs>; + clocks = <_gate 0>; + #clock-cells = <1>; + }; + + ap_clk: clock-controller@2000 { + compatible = "sprd,sc9860-ap-clk"; + reg = <0 0x2000 0 0x400>; + clocks = <_26m>, < 0>, +<_gate 0>; + #clock-cells = <1>; + }; -- 2.7.4
[PATCH V4 02/12] dt-bindings: Add Spreadtrum clock binding documentation
Introduce a new binding with its documentation for Spreadtrum clock sub-framework. Signed-off-by: Chunyan Zhang --- Documentation/devicetree/bindings/clock/sprd.txt | 63 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt diff --git a/Documentation/devicetree/bindings/clock/sprd.txt b/Documentation/devicetree/bindings/clock/sprd.txt new file mode 100644 index 000..e9d179e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sprd.txt @@ -0,0 +1,63 @@ +Spreadtrum Clock Binding + + +Required properties: +- compatible: should contain the following compatible strings: + - "sprd,sc9860-pmu-gate" + - "sprd,sc9860-pll" + - "sprd,sc9860-ap-clk" + - "sprd,sc9860-aon-prediv" + - "sprd,sc9860-apahb-gate" + - "sprd,sc9860-aon-gate" + - "sprd,sc9860-aonsecure-clk" + - "sprd,sc9860-agcp-gate" + - "sprd,sc9860-gpu-clk" + - "sprd,sc9860-vsp-clk" + - "sprd,sc9860-vsp-gate" + - "sprd,sc9860-cam-clk" + - "sprd,sc9860-cam-gate" + - "sprd,sc9860-disp-clk" + - "sprd,sc9860-disp-gate" + - "sprd,sc9860-apapb-gate" + +- #clock-cells: must be 1 + +- clocks : Should be the input parent clock(s) phandle for the clock, this + property here just simply shows which clock group the clocks' + parents are in, since each clk node would represent many clocks + which are defined in the driver. The detailed dependency + relationship (i.e. how many parents and which are the parents) + are implemented in driver code. + +Optional properties: + +- reg: Contain the registers base address and length. It must be configured + only if no 'sprd,syscon' under the node. + +- sprd,syscon: phandle to the syscon which is in the same address area with + the clock, and so we can get regmap for the clocks from the + syscon device. + +Example: + + pmu_gate: pmu-gate { + compatible = "sprd,sc9860-pmu-gate"; + sprd,syscon = <_regs>; + clocks = <_26m>; + #clock-cells = <1>; + }; + + pll: pll { + compatible = "sprd,sc9860-pll"; + sprd,syscon = <_regs>; + clocks = <_gate 0>; + #clock-cells = <1>; + }; + + ap_clk: clock-controller@2000 { + compatible = "sprd,sc9860-ap-clk"; + reg = <0 0x2000 0 0x400>; + clocks = <_26m>, < 0>, +<_gate 0>; + #clock-cells = <1>; + }; -- 2.7.4