Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
On 8/14/07, Alan Cox <[EMAIL PROTECTED]> wrote:
> > +/**
> > + * Register transfer timing table
> > + */
>
> Libata has a complete set of transfer mode tables and timing functions -
> any reason for not using them ?
>
After a bit investigation, I find the timing paramters difined in
struct ata_timing are different from that in hardware manual of BF548.
struct ata_timing {
unsigned short mode;/* ATA mode */
unsigned short setup; /* t1 */
unsigned short act8b; /* t2 for 8-bit I/O */
unsigned short rec8b; /* t2i for 8-bit I/O */
unsigned short cyc8b; /* t0 for 8-bit I/O */
unsigned short active; /* t2 or tD */
unsigned short recover; /* t2i or tK */
unsigned short cycle; /* t0 */
unsigned short udma;/* t2CYCTYP/2 */
};
BF548 PIO timing registers:
u8 teoc_reg;
u8 t2_reg;
u4 t4_reg;
u8 t2_pio;
u4 t1_reg;
u8 teoc_pio;
BF548 UDMA timing registers:
u8 tenv;
u8 tack;
u8 tcyc_tdvs;
u8 tdvs;
u8 tmli;
u8 tss;
u8 trp;
u8 tzah;
I can't find a simple way to configure bf548 registers with the ata_timing data.
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Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
forgot to reply to all.
On 8/15/07, Sonic Zhang <[EMAIL PROTECTED]> wrote:
> On 8/14/07, Alan Cox <[EMAIL PROTECTED]> wrote:
> > > +/**
> > > + * Register transfer timing table
> > > + */
> >
> > Libata has a complete set of transfer mode tables and timing functions -
> > any reason for not using them ?
>
> These code are from the sample code in hardware manual. I will check
> the libata source to see if I can rewrite them in libata functions.
>
> >
> >
> > > + /* increase tcyc - tdvs (tcyc_tdvs) until we
> > > meed
> > > +* the minimum cycle length
> > > +*/
> > > + while ( (tdvs + tcyc_tdvs) < tcyc ) {
> > > + tcyc_tdvs++;
> > > + }
> >
> > Why not
> >
> > if ((tdvs + tcyc_tvds) < tcyc)
> > tcyc_tdvs = tcyc - tdvs;
> >
> > > + /* increase tk until we meed the minimum cycle
> > > length */
> > > + while ( (tkw+td) < n0 ) {
> > > + tkw++;
> > > + }
> >
> >
> > if (tkw + td < n0)
> > tkw = n0 - td;
> >
> > (and fix up brackets)
>
> Yes, your suggestion is better.
>
> > >
> > > +static void inline wait_complete(unsigned long base, unsigned short
> > > mask)
> > > +{
> > > + unsigned short status;
> > > +
> > > + do {
> > > + status = ATAPI_GET_INT_STATUS(base) & mask;
> > > + } while (!status);
> >
> > Does this need a timeout or can a device write never get stuck ?
>
> The hardware manual says whenever an ATAPI operation is done or
> terminated in error by the devices, a bit in the status register is
> set. Is a timeout still necessary?
>
>
> >
> > > +static int bfin_port_start(struct ata_port *ap)
> > > +{
> > > + pr_debug("in atapi port start\n");
> > > + if (ap->udma_mask != 0 || ap->mwdma_mask != 0) {
> > > + if (request_dma(CH_ATAPI_RX, "BFIN ATAPI RX DMA") >= 0)
> > > {
> > > + if (request_dma(CH_ATAPI_TX,
> > > + "BFIN ATAPI TX DMA") >= 0) {
> > > + return 0;
> > > + }
> > > + free_dma(CH_ATAPI_RX);
> > > + }
> > > + ap->udma_mask = 0;
> > > + ap->mwdma_mask = 0;
> > > + dev_err(ap->dev, "Unable to request ATAPI DMA!\n");
> > > + return -EBUSY;
> >
> > Is this an error case - if you clear the UDMA/MWDMA mask then DMA won't
> > be needed will it so you can continue after the problem but slowly ?
>
> UDMA/MWDMA masks are set in ata_host_alloc_pinfo(), where it is
> cleared? If these masks are cleared before port starts, this driver
> falls back to PIO mode. Why this is an error case?
>
>
> >
> > Otherwise looks sound. A lot of reset method duplication but that isn't
> > your fault and something that wants more work in libata to avoid
> >
> >
>
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Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
forgot to reply to all.
On 8/15/07, Sonic Zhang [EMAIL PROTECTED] wrote:
On 8/14/07, Alan Cox [EMAIL PROTECTED] wrote:
+/**
+ * Register transfer timing table
+ */
Libata has a complete set of transfer mode tables and timing functions -
any reason for not using them ?
These code are from the sample code in hardware manual. I will check
the libata source to see if I can rewrite them in libata functions.
+ /* increase tcyc - tdvs (tcyc_tdvs) until we
meed
+* the minimum cycle length
+*/
+ while ( (tdvs + tcyc_tdvs) tcyc ) {
+ tcyc_tdvs++;
+ }
Why not
if ((tdvs + tcyc_tvds) tcyc)
tcyc_tdvs = tcyc - tdvs;
+ /* increase tk until we meed the minimum cycle
length */
+ while ( (tkw+td) n0 ) {
+ tkw++;
+ }
if (tkw + td n0)
tkw = n0 - td;
(and fix up brackets)
Yes, your suggestion is better.
+static void inline wait_complete(unsigned long base, unsigned short
mask)
+{
+ unsigned short status;
+
+ do {
+ status = ATAPI_GET_INT_STATUS(base) mask;
+ } while (!status);
Does this need a timeout or can a device write never get stuck ?
The hardware manual says whenever an ATAPI operation is done or
terminated in error by the devices, a bit in the status register is
set. Is a timeout still necessary?
+static int bfin_port_start(struct ata_port *ap)
+{
+ pr_debug(in atapi port start\n);
+ if (ap-udma_mask != 0 || ap-mwdma_mask != 0) {
+ if (request_dma(CH_ATAPI_RX, BFIN ATAPI RX DMA) = 0)
{
+ if (request_dma(CH_ATAPI_TX,
+ BFIN ATAPI TX DMA) = 0) {
+ return 0;
+ }
+ free_dma(CH_ATAPI_RX);
+ }
+ ap-udma_mask = 0;
+ ap-mwdma_mask = 0;
+ dev_err(ap-dev, Unable to request ATAPI DMA!\n);
+ return -EBUSY;
Is this an error case - if you clear the UDMA/MWDMA mask then DMA won't
be needed will it so you can continue after the problem but slowly ?
UDMA/MWDMA masks are set in ata_host_alloc_pinfo(), where it is
cleared? If these masks are cleared before port starts, this driver
falls back to PIO mode. Why this is an error case?
Otherwise looks sound. A lot of reset method duplication but that isn't
your fault and something that wants more work in libata to avoid
-
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the body of a message to [EMAIL PROTECTED]
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
On 8/14/07, Alan Cox [EMAIL PROTECTED] wrote:
+/**
+ * Register transfer timing table
+ */
Libata has a complete set of transfer mode tables and timing functions -
any reason for not using them ?
After a bit investigation, I find the timing paramters difined in
struct ata_timing are different from that in hardware manual of BF548.
struct ata_timing {
unsigned short mode;/* ATA mode */
unsigned short setup; /* t1 */
unsigned short act8b; /* t2 for 8-bit I/O */
unsigned short rec8b; /* t2i for 8-bit I/O */
unsigned short cyc8b; /* t0 for 8-bit I/O */
unsigned short active; /* t2 or tD */
unsigned short recover; /* t2i or tK */
unsigned short cycle; /* t0 */
unsigned short udma;/* t2CYCTYP/2 */
};
BF548 PIO timing registers:
u8 teoc_reg;
u8 t2_reg;
u4 t4_reg;
u8 t2_pio;
u4 t1_reg;
u8 teoc_pio;
BF548 UDMA timing registers:
u8 tenv;
u8 tack;
u8 tcyc_tdvs;
u8 tdvs;
u8 tmli;
u8 tss;
u8 trp;
u8 tzah;
I can't find a simple way to configure bf548 registers with the ata_timing data.
-
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
> +/**
> + * Register transfer timing table
> + */
Libata has a complete set of transfer mode tables and timing functions -
any reason for not using them ?
> + /* increase tcyc - tdvs (tcyc_tdvs) until we
> meed
> +* the minimum cycle length
> +*/
> + while ( (tdvs + tcyc_tdvs) < tcyc ) {
> + tcyc_tdvs++;
> + }
Why not
if ((tdvs + tcyc_tvds) < tcyc)
tcyc_tdvs = tcyc - tdvs;
> + /* increase tk until we meed the minimum cycle
> length */
> + while ( (tkw+td) < n0 ) {
> + tkw++;
> + }
if (tkw + td < n0)
tkw = n0 - td;
(and fix up brackets)
>
> +static void inline wait_complete(unsigned long base, unsigned short
> mask)
> +{
> + unsigned short status;
> +
> + do {
> + status = ATAPI_GET_INT_STATUS(base) & mask;
> + } while (!status);
Does this need a timeout or can a device write never get stuck ?
> +static int bfin_port_start(struct ata_port *ap)
> +{
> + pr_debug("in atapi port start\n");
> + if (ap->udma_mask != 0 || ap->mwdma_mask != 0) {
> + if (request_dma(CH_ATAPI_RX, "BFIN ATAPI RX DMA") >= 0)
> {
> + if (request_dma(CH_ATAPI_TX,
> + "BFIN ATAPI TX DMA") >= 0) {
> + return 0;
> + }
> + free_dma(CH_ATAPI_RX);
> + }
> + ap->udma_mask = 0;
> + ap->mwdma_mask = 0;
> + dev_err(ap->dev, "Unable to request ATAPI DMA!\n");
> + return -EBUSY;
Is this an error case - if you clear the UDMA/MWDMA mask then DMA won't
be needed will it so you can continue after the problem but slowly ?
Otherwise looks sound. A lot of reset method duplication but that isn't
your fault and something that wants more work in libata to avoid
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
+/**
+ * Register transfer timing table
+ */
Libata has a complete set of transfer mode tables and timing functions -
any reason for not using them ?
+ /* increase tcyc - tdvs (tcyc_tdvs) until we
meed
+* the minimum cycle length
+*/
+ while ( (tdvs + tcyc_tdvs) tcyc ) {
+ tcyc_tdvs++;
+ }
Why not
if ((tdvs + tcyc_tvds) tcyc)
tcyc_tdvs = tcyc - tdvs;
+ /* increase tk until we meed the minimum cycle
length */
+ while ( (tkw+td) n0 ) {
+ tkw++;
+ }
if (tkw + td n0)
tkw = n0 - td;
(and fix up brackets)
+static void inline wait_complete(unsigned long base, unsigned short
mask)
+{
+ unsigned short status;
+
+ do {
+ status = ATAPI_GET_INT_STATUS(base) mask;
+ } while (!status);
Does this need a timeout or can a device write never get stuck ?
+static int bfin_port_start(struct ata_port *ap)
+{
+ pr_debug(in atapi port start\n);
+ if (ap-udma_mask != 0 || ap-mwdma_mask != 0) {
+ if (request_dma(CH_ATAPI_RX, BFIN ATAPI RX DMA) = 0)
{
+ if (request_dma(CH_ATAPI_TX,
+ BFIN ATAPI TX DMA) = 0) {
+ return 0;
+ }
+ free_dma(CH_ATAPI_RX);
+ }
+ ap-udma_mask = 0;
+ ap-mwdma_mask = 0;
+ dev_err(ap-dev, Unable to request ATAPI DMA!\n);
+ return -EBUSY;
Is this an error case - if you clear the UDMA/MWDMA mask then DMA won't
be needed will it so you can continue after the problem but slowly ?
Otherwise looks sound. A lot of reset method duplication but that isn't
your fault and something that wants more work in libata to avoid
-
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
This driver is for bf548 on chip ATAPI controller. Both PIO 4 and UDMA5 mode are enabled. Signed-off-by: Sonic Zhang <[EMAIL PROTECTED]> --- drivers/ata/Kconfig | 28 + drivers/ata/Makefile |1 + drivers/ata/pata_bf54x.c | 1585 ++ 3 files changed, 1614 insertions(+), 0 deletions(-) create mode 100644 drivers/ata/pata_bf54x.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index b4a8d60..e679f04 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -583,4 +583,32 @@ config PATA_SCC If unsure, say N. +config PATA_BF54X + tristate "Blackfin 54x ATAPI support" + depends on BF542 || BF548 || BF549 + help + This option enables support for the built-in ATAPI controller on + Blackfin 54x family chips. + + If unsure, say N. + +choice + prompt "Blackfin 54x ATAPI mode" + depends on PATA_BF54X + default PATA_BF54X_DMA + help + This option selects bf54x ATAPI controller working mode. + +config PATA_BF54X_PIO + bool "PIO mode" + help + Blackfin ATAPI controller works under PIO mode. + +config PATA_BF54X_DMA + bool "DMA mode" + help + Blackfin ATAPI controller works under DMA mode. + +endchoice + endif # ATA diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 8149c68..c2ecba5 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_PATA_SIS)+= pata_sis.o obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o obj-$(CONFIG_PATA_SCC) += pata_scc.o +obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o obj-$(CONFIG_PATA_PLATFORM)+= pata_platform.o obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o # Should be last but one libata driver diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c new file mode 100644 index 000..e1236ea --- /dev/null +++ b/drivers/ata/pata_bf54x.c @@ -0,0 +1,1585 @@ +/* + * File: drivers/ata/pata_bf54x.c + * Author: Sonic Zhang <[EMAIL PROTECTED]> + * + * Created: + * Description: ATAPI Driver for blackfin 54x + * + * Modified: + * Copyright 2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "bf54x-atapi" +#define DRV_VERSION"0.6" + +#define ATA_REG_CTRL 0x0E +#define ATA_REG_ALTSTATUS ATA_REG_CTRL + +#define ATAPI_OFFSET_CONTROL 0x00 +#define ATAPI_OFFSET_STATUS0x04 +#define ATAPI_OFFSET_DEV_ADDR 0x08 +#define ATAPI_OFFSET_DEV_TXBUF 0x0c +#define ATAPI_OFFSET_DEV_RXBUF 0x10 +#define ATAPI_OFFSET_INT_MASK 0x14 +#define ATAPI_OFFSET_INT_STATUS0x18 +#define ATAPI_OFFSET_XFER_LEN 0x1c +#define ATAPI_OFFSET_LINE_STATUS 0x20 +#define ATAPI_OFFSET_SM_STATE 0x24 +#define ATAPI_OFFSET_TERMINATE 0x28 +#define ATAPI_OFFSET_PIO_TFRCNT0x2c +#define ATAPI_OFFSET_DMA_TFRCNT0x30 +#define ATAPI_OFFSET_UMAIN_TFRCNT 0x34 +#define ATAPI_OFFSET_UDMAOUT_TFRCNT0x38 +#define ATAPI_OFFSET_REG_TIM_0 0x40 +#define ATAPI_OFFSET_PIO_TIM_0 0x44 +#define ATAPI_OFFSET_PIO_TIM_1 0x48 +#define ATAPI_OFFSET_MULTI_TIM_0 0x50 +#define ATAPI_OFFSET_MULTI_TIM_1 0x54 +#define ATAPI_OFFSET_MULTI_TIM_2 0x58 +#define ATAPI_OFFSET_ULTRA_TIM_0 0x60 +#define ATAPI_OFFSET_ULTRA_TIM_1 0x64 +#define ATAPI_OFFSET_ULTRA_TIM_2 0x68 +#define ATAPI_OFFSET_ULTRA_TIM_3 0x6c + + +#define ATAPI_GET_CONTROL(base)\ + bfin_read16(base + ATAPI_OFFSET_CONTROL) +#define ATAPI_SET_CONTROL(base, val)\ + bfin_write16(base + ATAPI_OFFSET_CONTROL, val) +#define ATAPI_GET_STATUS(base)\ + bfin_read16(base + ATAPI_OFFSET_STATUS) +#define ATAPI_GET_DEV_ADDR(base)\ + bfin_read16(base + ATAPI_OFFSET_DEV_ADDR) +#define ATAPI_SET_DEV_ADDR(base, val)\ + bfin_write16(base +
[PATCH again] [libata] libata driver for bf548 on chip ATAPI controller.
This driver is for bf548 on chip ATAPI controller. Both PIO 4 and UDMA5 mode are enabled. Signed-off-by: Sonic Zhang [EMAIL PROTECTED] --- drivers/ata/Kconfig | 28 + drivers/ata/Makefile |1 + drivers/ata/pata_bf54x.c | 1585 ++ 3 files changed, 1614 insertions(+), 0 deletions(-) create mode 100644 drivers/ata/pata_bf54x.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index b4a8d60..e679f04 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -583,4 +583,32 @@ config PATA_SCC If unsure, say N. +config PATA_BF54X + tristate Blackfin 54x ATAPI support + depends on BF542 || BF548 || BF549 + help + This option enables support for the built-in ATAPI controller on + Blackfin 54x family chips. + + If unsure, say N. + +choice + prompt Blackfin 54x ATAPI mode + depends on PATA_BF54X + default PATA_BF54X_DMA + help + This option selects bf54x ATAPI controller working mode. + +config PATA_BF54X_PIO + bool PIO mode + help + Blackfin ATAPI controller works under PIO mode. + +config PATA_BF54X_DMA + bool DMA mode + help + Blackfin ATAPI controller works under DMA mode. + +endchoice + endif # ATA diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 8149c68..c2ecba5 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_PATA_SIS)+= pata_sis.o obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o obj-$(CONFIG_PATA_SCC) += pata_scc.o +obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o obj-$(CONFIG_PATA_PLATFORM)+= pata_platform.o obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o # Should be last but one libata driver diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c new file mode 100644 index 000..e1236ea --- /dev/null +++ b/drivers/ata/pata_bf54x.c @@ -0,0 +1,1585 @@ +/* + * File: drivers/ata/pata_bf54x.c + * Author: Sonic Zhang [EMAIL PROTECTED] + * + * Created: + * Description: ATAPI Driver for blackfin 54x + * + * Modified: + * Copyright 2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include linux/kernel.h +#include linux/module.h +#include linux/pci.h +#include linux/init.h +#include linux/blkdev.h +#include linux/delay.h +#include linux/device.h +#include scsi/scsi_host.h +#include linux/libata.h +#include linux/platform_device.h +#include asm/dma.h +#include asm/gpio.h +#include asm/portmux.h + +#define DRV_NAME bf54x-atapi +#define DRV_VERSION0.6 + +#define ATA_REG_CTRL 0x0E +#define ATA_REG_ALTSTATUS ATA_REG_CTRL + +#define ATAPI_OFFSET_CONTROL 0x00 +#define ATAPI_OFFSET_STATUS0x04 +#define ATAPI_OFFSET_DEV_ADDR 0x08 +#define ATAPI_OFFSET_DEV_TXBUF 0x0c +#define ATAPI_OFFSET_DEV_RXBUF 0x10 +#define ATAPI_OFFSET_INT_MASK 0x14 +#define ATAPI_OFFSET_INT_STATUS0x18 +#define ATAPI_OFFSET_XFER_LEN 0x1c +#define ATAPI_OFFSET_LINE_STATUS 0x20 +#define ATAPI_OFFSET_SM_STATE 0x24 +#define ATAPI_OFFSET_TERMINATE 0x28 +#define ATAPI_OFFSET_PIO_TFRCNT0x2c +#define ATAPI_OFFSET_DMA_TFRCNT0x30 +#define ATAPI_OFFSET_UMAIN_TFRCNT 0x34 +#define ATAPI_OFFSET_UDMAOUT_TFRCNT0x38 +#define ATAPI_OFFSET_REG_TIM_0 0x40 +#define ATAPI_OFFSET_PIO_TIM_0 0x44 +#define ATAPI_OFFSET_PIO_TIM_1 0x48 +#define ATAPI_OFFSET_MULTI_TIM_0 0x50 +#define ATAPI_OFFSET_MULTI_TIM_1 0x54 +#define ATAPI_OFFSET_MULTI_TIM_2 0x58 +#define ATAPI_OFFSET_ULTRA_TIM_0 0x60 +#define ATAPI_OFFSET_ULTRA_TIM_1 0x64 +#define ATAPI_OFFSET_ULTRA_TIM_2 0x68 +#define ATAPI_OFFSET_ULTRA_TIM_3 0x6c + + +#define ATAPI_GET_CONTROL(base)\ + bfin_read16(base + ATAPI_OFFSET_CONTROL) +#define ATAPI_SET_CONTROL(base, val)\ + bfin_write16(base + ATAPI_OFFSET_CONTROL, val) +#define ATAPI_GET_STATUS(base)\ + bfin_read16(base + ATAPI_OFFSET_STATUS)
