Re: [PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-04 Thread Jiada Wang

Hi Vladimir

Thanks for your comments

On 2018/12/03 21:11, Vladimir Zapolskiy wrote:

Hi Jiada,

On 12/03/2018 01:21 PM, jiada_w...@mentor.com wrote:

From: Jiada Wang 

on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.

This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
register avb clocks when clock-cells of rcar_sound node is 2.

---
v2:
- expends adg register size and register avb clocks instead of
   add new clk-avb driver
- Add adg clock

v1: initial version

Jiada Wang (2):
   dt-bindings: clock: add clock id for renesas adg clocks
   ASoC: rsnd: add avb clocks

Takeshi Kihara (4):
   clk: renesas: r8a7795: Add ADG clock
   clk: renesas: r8a7796: Add ADG clock
   clk: renesas: r8a77990: Add ADG clocks
   clk: renesas: r8a77995: Add ADG clock


plural 'clocks' for r8a77990 vs. 'clock' in other cases, please unify subjects.

You can consider to add the ADG clock description for r8a77965 / M3-N as well.

will unify the subjects and add ADG clock to r8a77965 in next version

  drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
  drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
  drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
  drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
  include/dt-bindings/clock/renesas-adg.h |  11 +

The new header file added above is not needed in my opinion.


  sound/soc/sh/rcar/adg.c | 306 +++-
  sound/soc/sh/rcar/gen.c |   9 +
  sound/soc/sh/rcar/rsnd.h|   9 +
  8 files changed, 330 insertions(+), 9 deletions(-)
  create mode 100644 include/dt-bindings/clock/renesas-adg.h


--
Best wishes,
Vladimir




Re: [PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-04 Thread Jiada Wang

Hi Vladimir

Thanks for your comments

On 2018/12/03 21:11, Vladimir Zapolskiy wrote:

Hi Jiada,

On 12/03/2018 01:21 PM, jiada_w...@mentor.com wrote:

From: Jiada Wang 

on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.

This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
register avb clocks when clock-cells of rcar_sound node is 2.

---
v2:
- expends adg register size and register avb clocks instead of
   add new clk-avb driver
- Add adg clock

v1: initial version

Jiada Wang (2):
   dt-bindings: clock: add clock id for renesas adg clocks
   ASoC: rsnd: add avb clocks

Takeshi Kihara (4):
   clk: renesas: r8a7795: Add ADG clock
   clk: renesas: r8a7796: Add ADG clock
   clk: renesas: r8a77990: Add ADG clocks
   clk: renesas: r8a77995: Add ADG clock


plural 'clocks' for r8a77990 vs. 'clock' in other cases, please unify subjects.

You can consider to add the ADG clock description for r8a77965 / M3-N as well.

will unify the subjects and add ADG clock to r8a77965 in next version

  drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
  drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
  drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
  drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
  include/dt-bindings/clock/renesas-adg.h |  11 +

The new header file added above is not needed in my opinion.


  sound/soc/sh/rcar/adg.c | 306 +++-
  sound/soc/sh/rcar/gen.c |   9 +
  sound/soc/sh/rcar/rsnd.h|   9 +
  8 files changed, 330 insertions(+), 9 deletions(-)
  create mode 100644 include/dt-bindings/clock/renesas-adg.h


--
Best wishes,
Vladimir




Re: [PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-03 Thread Vladimir Zapolskiy
Hi Jiada,

On 12/03/2018 01:21 PM, jiada_w...@mentor.com wrote:
> From: Jiada Wang 
> 
> on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
> and 8 bits fractional dividers which operates with S0D1ϕ clock.
> 
> This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
> register avb clocks when clock-cells of rcar_sound node is 2.
> 
> ---
> v2:
> - expends adg register size and register avb clocks instead of
>   add new clk-avb driver
> - Add adg clock 
> 
> v1: initial version
> 
> Jiada Wang (2):
>   dt-bindings: clock: add clock id for renesas adg clocks
>   ASoC: rsnd: add avb clocks
> 
> Takeshi Kihara (4):
>   clk: renesas: r8a7795: Add ADG clock
>   clk: renesas: r8a7796: Add ADG clock
>   clk: renesas: r8a77990: Add ADG clocks
>   clk: renesas: r8a77995: Add ADG clock
> 

plural 'clocks' for r8a77990 vs. 'clock' in other cases, please unify subjects.

You can consider to add the ADG clock description for r8a77965 / M3-N as well.

>  drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
>  drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
>  drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
>  drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
>  include/dt-bindings/clock/renesas-adg.h |  11 +

The new header file added above is not needed in my opinion.

>  sound/soc/sh/rcar/adg.c | 306 +++-
>  sound/soc/sh/rcar/gen.c |   9 +
>  sound/soc/sh/rcar/rsnd.h|   9 +
>  8 files changed, 330 insertions(+), 9 deletions(-)
>  create mode 100644 include/dt-bindings/clock/renesas-adg.h
> 

--
Best wishes,
Vladimir


Re: [PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-03 Thread Vladimir Zapolskiy
Hi Jiada,

On 12/03/2018 01:21 PM, jiada_w...@mentor.com wrote:
> From: Jiada Wang 
> 
> on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
> and 8 bits fractional dividers which operates with S0D1ϕ clock.
> 
> This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
> register avb clocks when clock-cells of rcar_sound node is 2.
> 
> ---
> v2:
> - expends adg register size and register avb clocks instead of
>   add new clk-avb driver
> - Add adg clock 
> 
> v1: initial version
> 
> Jiada Wang (2):
>   dt-bindings: clock: add clock id for renesas adg clocks
>   ASoC: rsnd: add avb clocks
> 
> Takeshi Kihara (4):
>   clk: renesas: r8a7795: Add ADG clock
>   clk: renesas: r8a7796: Add ADG clock
>   clk: renesas: r8a77990: Add ADG clocks
>   clk: renesas: r8a77995: Add ADG clock
> 

plural 'clocks' for r8a77990 vs. 'clock' in other cases, please unify subjects.

You can consider to add the ADG clock description for r8a77965 / M3-N as well.

>  drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
>  drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
>  drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
>  drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
>  include/dt-bindings/clock/renesas-adg.h |  11 +

The new header file added above is not needed in my opinion.

>  sound/soc/sh/rcar/adg.c | 306 +++-
>  sound/soc/sh/rcar/gen.c |   9 +
>  sound/soc/sh/rcar/rsnd.h|   9 +
>  8 files changed, 330 insertions(+), 9 deletions(-)
>  create mode 100644 include/dt-bindings/clock/renesas-adg.h
> 

--
Best wishes,
Vladimir


[PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-03 Thread jiada_wang
From: Jiada Wang 

on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.

This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
register avb clocks when clock-cells of rcar_sound node is 2.

---
v2:
- expends adg register size and register avb clocks instead of
  add new clk-avb driver
- Add adg clock 

v1: initial version

Jiada Wang (2):
  dt-bindings: clock: add clock id for renesas adg clocks
  ASoC: rsnd: add avb clocks

Takeshi Kihara (4):
  clk: renesas: r8a7795: Add ADG clock
  clk: renesas: r8a7796: Add ADG clock
  clk: renesas: r8a77990: Add ADG clocks
  clk: renesas: r8a77995: Add ADG clock

 drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
 drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
 drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
 include/dt-bindings/clock/renesas-adg.h |  11 +
 sound/soc/sh/rcar/adg.c | 306 +++-
 sound/soc/sh/rcar/gen.c |   9 +
 sound/soc/sh/rcar/rsnd.h|   9 +
 8 files changed, 330 insertions(+), 9 deletions(-)
 create mode 100644 include/dt-bindings/clock/renesas-adg.h

-- 
2.17.0



[PATCH linux-next v2 0/6] clk: renesas: adg: add AVB Clock

2018-12-03 Thread jiada_wang
From: Jiada Wang 

on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral
and 8 bits fractional dividers which operates with S0D1ϕ clock.

This patch-set adds 'adg' clock to R-Car Soc, and changes adg driver to
register avb clocks when clock-cells of rcar_sound node is 2.

---
v2:
- expends adg register size and register avb clocks instead of
  add new clk-avb driver
- Add adg clock 

v1: initial version

Jiada Wang (2):
  dt-bindings: clock: add clock id for renesas adg clocks
  ASoC: rsnd: add avb clocks

Takeshi Kihara (4):
  clk: renesas: r8a7795: Add ADG clock
  clk: renesas: r8a7796: Add ADG clock
  clk: renesas: r8a77990: Add ADG clocks
  clk: renesas: r8a77995: Add ADG clock

 drivers/clk/renesas/r8a7795-cpg-mssr.c  |   1 +
 drivers/clk/renesas/r8a7796-cpg-mssr.c  |   1 +
 drivers/clk/renesas/r8a77990-cpg-mssr.c |   1 +
 drivers/clk/renesas/r8a77995-cpg-mssr.c |   1 +
 include/dt-bindings/clock/renesas-adg.h |  11 +
 sound/soc/sh/rcar/adg.c | 306 +++-
 sound/soc/sh/rcar/gen.c |   9 +
 sound/soc/sh/rcar/rsnd.h|   9 +
 8 files changed, 330 insertions(+), 9 deletions(-)
 create mode 100644 include/dt-bindings/clock/renesas-adg.h

-- 
2.17.0