Re: [PATCH v1 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

2016-04-07 Thread kbuild test robot
Hi Cristian,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.6-rc2 next-20160407]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Purna-Chandra-Mandal/dt-bindings-usb-Add-bindings-for-PIC32-MUSB-driver/20160407-192020
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: i386-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/usb/musb/pic32.c: In function 'pic32_read_fifo':
>> drivers/usb/musb/pic32.c:339:2: error: implicit declaration of function 
>> 'readsl' [-Werror=implicit-function-declaration]
 readsl(fifo, dst, len / 4);
 ^
   cc1: some warnings being treated as errors

vim +/readsl +339 drivers/usb/musb/pic32.c

   333  static void pic32_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
   334  {
   335  void __iomem *fifo = hw_ep->fifo;
   336  u32 val, rem = len % 4;
   337  
   338  /* USB stack ensures dst is always 32bit aligned. */
 > 339  readsl(fifo, dst, len / 4);
   340  
   341  if (rem) {
   342  dst += len & ~0x03;

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


Re: [PATCH v1 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

2016-04-07 Thread kbuild test robot
Hi Cristian,

[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.6-rc2 next-20160407]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Purna-Chandra-Mandal/dt-bindings-usb-Add-bindings-for-PIC32-MUSB-driver/20160407-192020
base:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: i386-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/usb/musb/pic32.c: In function 'pic32_read_fifo':
>> drivers/usb/musb/pic32.c:339:2: error: implicit declaration of function 
>> 'readsl' [-Werror=implicit-function-declaration]
 readsl(fifo, dst, len / 4);
 ^
   cc1: some warnings being treated as errors

vim +/readsl +339 drivers/usb/musb/pic32.c

   333  static void pic32_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
   334  {
   335  void __iomem *fifo = hw_ep->fifo;
   336  u32 val, rem = len % 4;
   337  
   338  /* USB stack ensures dst is always 32bit aligned. */
 > 339  readsl(fifo, dst, len / 4);
   340  
   341  if (rem) {
   342  dst += len & ~0x03;

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


[PATCH v1 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

2016-04-07 Thread Purna Chandra Mandal
From: Cristian Birsan 

This driver adds support of PIC32 MUSB OTG controller as
dual role device. It implements platform specific glue to
reuse musb core.

Signed-off-by: Cristian Birsan 
Signed-off-by: Purna Chandra Mandal 

---

 drivers/usb/musb/Kconfig  |   9 +-
 drivers/usb/musb/Makefile |   3 +-
 drivers/usb/musb/pic32.c  | 608 ++
 3 files changed, 617 insertions(+), 3 deletions(-)
 create mode 100644 drivers/usb/musb/pic32.c

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 886526b..705f8b8 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -112,6 +112,13 @@ config USB_MUSB_BLACKFIN
depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
depends on NOP_USB_XCEIV
 
+config USB_MUSB_PIC32
+   tristate "Microchip PIC32 USB platforms"
+   depends on MACH_PIC32 || COMPILE_TEST
+   depends on NOP_USB_XCEIV
+   help
+ Say y to enable PIC32 USB DRC controller support
+
 config USB_MUSB_UX500
tristate "Ux500 platforms"
depends on ARCH_U8500 || COMPILE_TEST
@@ -149,7 +156,7 @@ config USB_UX500_DMA
 
 config USB_INVENTRA_DMA
bool 'Inventra'
-   depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN
+   depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN || USB_MUSB_PIC32
help
  Enable DMA transfers using Mentor's engine.
 
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index f95befe..b9275cd 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -1,7 +1,6 @@
 #
 # for USB OTG silicon based on Mentor Graphics INVENTRA designs
 #
-
 obj-$(CONFIG_USB_MUSB_HDRC) += musb_hdrc.o
 
 musb_hdrc-y := musb_core.o
@@ -20,9 +19,9 @@ obj-$(CONFIG_USB_MUSB_DA8XX)  += da8xx.o
 obj-$(CONFIG_USB_MUSB_BLACKFIN)+= blackfin.o
 obj-$(CONFIG_USB_MUSB_UX500)   += ux500.o
 obj-$(CONFIG_USB_MUSB_JZ4740)  += jz4740.o
+obj-$(CONFIG_USB_MUSB_PIC32)   += pic32.o
 obj-$(CONFIG_USB_MUSB_SUNXI)   += sunxi.o
 
-
 obj-$(CONFIG_USB_MUSB_AM335X_CHILD)+= musb_am335x.o
 
 # the kconfig must guarantee that only one of the
diff --git a/drivers/usb/musb/pic32.c b/drivers/usb/musb/pic32.c
new file mode 100644
index 000..3921088
--- /dev/null
+++ b/drivers/usb/musb/pic32.c
@@ -0,0 +1,608 @@
+/*
+ * Microchip PIC32 MUSB Dual-Role Controller "glue layer".
+ *
+ * Cristian Birsan 
+ * Purna Chandra Mandal 
+ * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
+ *
+ * Based on the am35x and dsps "glue layer" code.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "musb_core.h"
+
+#define MUSB_SOFTRST   0x7f
+#define  MUSB_SOFTRST_NRST  BIT(0)
+#define  MUSB_SOFTRST_NRSTX BIT(1)
+
+/* USB Clock & Reset Control */
+#define USBCRCON   0x0
+#define  USBCRCON_USBWKUPENBIT(0)  /* Enable remote wakeup interrupt */
+#define  USBCRCON_USBRIE   BIT(1)  /* Enable Remote resume interrupt */
+#define  USBCRCON_USBIEBIT(2)  /* Enable USB General interrupt 
*/
+#define  USBCRCON_SENDMONEN BIT(3)  /* Enable Session End VBUS monitoring 
*/
+#define  USBCRCON_BSVALMONENBIT(4)  /* Enable B-Device VBUS monitoring */
+#define  USBCRCON_ASVALMONENBIT(5)  /* Enable A-Device VBUS monitoring */
+#define  USBCRCON_VBUSMONEN BIT(6)  /* Enable VBUS monitoring */
+#define  USBCRCON_PHYIDEN  BIT(7)  /* Enabale USBPhy USBID monitoring */
+#define  USBCRCON_USBIDVAL BIT(8)  /* USBID override value */
+#define  USBCRCON_USBIDOVENBIT(9)  /* Enable USBID override */
+#define  USBCRCON_USBWKUP  BIT(24) /* Remote wakeup status */
+#define  USBCRCON_USBRFBIT(25) /* USB Remote resume status */
+#define  USBCRCON_USBIFBIT(26) /* USB General interrupt status 
*/
+
+#define PIC32_TX_EP_MASK   0x  /* EP0 + 15 Tx EPs */
+#define PIC32_RX_EP_MASK   0xfffe  /* 15 Rx EPs */
+
+#definePOLL_SECONDS2
+
+struct pic32_musb {
+   void __iomem*cru;
+   struct clk  *clk;
+   int oc_irq;
+   struct platform_device  *platdev;
+   struct timer_list   timer;  /* otg_workaround timer */
+   unsigned long   

[PATCH v1 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

2016-04-07 Thread Purna Chandra Mandal
From: Cristian Birsan 

This driver adds support of PIC32 MUSB OTG controller as
dual role device. It implements platform specific glue to
reuse musb core.

Signed-off-by: Cristian Birsan 
Signed-off-by: Purna Chandra Mandal 

---

 drivers/usb/musb/Kconfig  |   9 +-
 drivers/usb/musb/Makefile |   3 +-
 drivers/usb/musb/pic32.c  | 608 ++
 3 files changed, 617 insertions(+), 3 deletions(-)
 create mode 100644 drivers/usb/musb/pic32.c

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 886526b..705f8b8 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -112,6 +112,13 @@ config USB_MUSB_BLACKFIN
depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
depends on NOP_USB_XCEIV
 
+config USB_MUSB_PIC32
+   tristate "Microchip PIC32 USB platforms"
+   depends on MACH_PIC32 || COMPILE_TEST
+   depends on NOP_USB_XCEIV
+   help
+ Say y to enable PIC32 USB DRC controller support
+
 config USB_MUSB_UX500
tristate "Ux500 platforms"
depends on ARCH_U8500 || COMPILE_TEST
@@ -149,7 +156,7 @@ config USB_UX500_DMA
 
 config USB_INVENTRA_DMA
bool 'Inventra'
-   depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN
+   depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN || USB_MUSB_PIC32
help
  Enable DMA transfers using Mentor's engine.
 
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index f95befe..b9275cd 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -1,7 +1,6 @@
 #
 # for USB OTG silicon based on Mentor Graphics INVENTRA designs
 #
-
 obj-$(CONFIG_USB_MUSB_HDRC) += musb_hdrc.o
 
 musb_hdrc-y := musb_core.o
@@ -20,9 +19,9 @@ obj-$(CONFIG_USB_MUSB_DA8XX)  += da8xx.o
 obj-$(CONFIG_USB_MUSB_BLACKFIN)+= blackfin.o
 obj-$(CONFIG_USB_MUSB_UX500)   += ux500.o
 obj-$(CONFIG_USB_MUSB_JZ4740)  += jz4740.o
+obj-$(CONFIG_USB_MUSB_PIC32)   += pic32.o
 obj-$(CONFIG_USB_MUSB_SUNXI)   += sunxi.o
 
-
 obj-$(CONFIG_USB_MUSB_AM335X_CHILD)+= musb_am335x.o
 
 # the kconfig must guarantee that only one of the
diff --git a/drivers/usb/musb/pic32.c b/drivers/usb/musb/pic32.c
new file mode 100644
index 000..3921088
--- /dev/null
+++ b/drivers/usb/musb/pic32.c
@@ -0,0 +1,608 @@
+/*
+ * Microchip PIC32 MUSB Dual-Role Controller "glue layer".
+ *
+ * Cristian Birsan 
+ * Purna Chandra Mandal 
+ * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
+ *
+ * Based on the am35x and dsps "glue layer" code.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "musb_core.h"
+
+#define MUSB_SOFTRST   0x7f
+#define  MUSB_SOFTRST_NRST  BIT(0)
+#define  MUSB_SOFTRST_NRSTX BIT(1)
+
+/* USB Clock & Reset Control */
+#define USBCRCON   0x0
+#define  USBCRCON_USBWKUPENBIT(0)  /* Enable remote wakeup interrupt */
+#define  USBCRCON_USBRIE   BIT(1)  /* Enable Remote resume interrupt */
+#define  USBCRCON_USBIEBIT(2)  /* Enable USB General interrupt 
*/
+#define  USBCRCON_SENDMONEN BIT(3)  /* Enable Session End VBUS monitoring 
*/
+#define  USBCRCON_BSVALMONENBIT(4)  /* Enable B-Device VBUS monitoring */
+#define  USBCRCON_ASVALMONENBIT(5)  /* Enable A-Device VBUS monitoring */
+#define  USBCRCON_VBUSMONEN BIT(6)  /* Enable VBUS monitoring */
+#define  USBCRCON_PHYIDEN  BIT(7)  /* Enabale USBPhy USBID monitoring */
+#define  USBCRCON_USBIDVAL BIT(8)  /* USBID override value */
+#define  USBCRCON_USBIDOVENBIT(9)  /* Enable USBID override */
+#define  USBCRCON_USBWKUP  BIT(24) /* Remote wakeup status */
+#define  USBCRCON_USBRFBIT(25) /* USB Remote resume status */
+#define  USBCRCON_USBIFBIT(26) /* USB General interrupt status 
*/
+
+#define PIC32_TX_EP_MASK   0x  /* EP0 + 15 Tx EPs */
+#define PIC32_RX_EP_MASK   0xfffe  /* 15 Rx EPs */
+
+#definePOLL_SECONDS2
+
+struct pic32_musb {
+   void __iomem*cru;
+   struct clk  *clk;
+   int oc_irq;
+   struct platform_device  *platdev;
+   struct timer_list   timer;  /* otg_workaround timer */
+   unsigned long   last_timer; /* last timer data for */
+};
+
+static irqreturn_t pic32_over_current(int irq, void *d)
+{
+   struct device *dev = d;
+
+