Re: [PATCH v11 0/19] Add Analogix Core Display Port Driver
Hi Heiko, On 12/18/2015 07:51 AM, Heiko Stübner wrote: Hi Yakir, Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang: The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller share the same IP, so a lot of parts can be re-used. I split the common code into bridge directory, then rk3288 and exynos only need to keep some platform code. Cause I can't find the exact IP name of exynos dp controller, so I decide to name dp core driver with "analogix" which I find in rk3288 eDP TRM I'm really sorry for not thinking of this earlier, but I think we'll be doing the atomic modesetting conversion of the drm/kms driver first - see v3 series from Mark Yao. Could you handle necessary changes to make it apply and work _after_ the atomic modesetting conversion please? Sure, I also want to rebase on Mark's atomic series. Would send the new [PATCH v11.1 01/19] out today :) - Yakir Thanks Heiko But there are still three light registers setting differents bewteen exynos and rk3288. 1. RK3288 have five special pll resigters which not indicata in exynos dp controller. 2. The address of DP_PHY_PD(dp phy power manager register) are different between rk3288 and exynos. 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug register). This series have been well tested on Rockchip platform with eDP panel on Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have tested on Samsung Snow and Peach Pit Chromebooks, and thanks to Javier@Samsung help to retest the whole series on Samsung Exynos5800 Peach Pi Chromebook, glad to say that things works rightlly. Thanks, - Yakir Changes in v11: - Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko) - Correct the title of this rockchip dp phy document(Rob) - Add the ack from Rob Herring - Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob) - Add the ack from Rob Herring - Revert parts of Gustavo Padovan's changes in commit: drm/exynos: do not start enabling DP at bind() phase Add dp phy poweron function in bind time. - Move the panel prepare from get_modes time to bind time, and move the panel unprepare from bridge->disable to unbind time. (Heiko) Changes in v10: - Add the ack from Rob Herring - Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here (Heiko) - Add the ack from Rob Herring - Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(4) -> BIT(20) - Remove the surplus "plat_data" check. (Heiko) - switch (dp->plat_data && dp->plat_data->dev_type) { + switch (dp->plat_data->dev_type) { Changes in v9: - Document more details for 'ports' property. - Removed the unused the variable "res" in probe function. (Heiko) - Removed the unused head file. Changes in v8: - Correct the right document path of display-timing.txt (Heiko) - Correct the misspell of 'from' to 'frm'. (Heiko) - Modify the commit subject name. (Heiko) - Fix the mixed spacers on macro definitions. (Heiko) - Remove the unnecessary empty line after clk_prepare_enable. (Heiko) - Remove the specific address in the example node name. (Heiko) Changes in v7: - Back to use the of_property_read_bool() interfacs to provoid backward compatibility of "hsync-active-high" "vsync-active-high" "interlaced" to avoid -EOVERFLOW error (Krzysztof) - Simply the commit message. (Kishon) - Symmetrical enable/disbale the phy clock and power. (Kishon) - Simplify the commit message. (Kishon) Changes in v6: - Fix the Kconfig recursive dependency (Javier) - Fix Peach Pit hpd property name error: - hpd-gpio = <&gpx2 6 0>; + hpd-gpios = <&gpx2 6 0>; Changes in v5: - Correct the check condition of gpio_is_valid when driver try to get the "hpd-gpios" DT propery. (Heiko) - Move the platform attach callback in the front of core driver bridge attch function. Cause once platform failed at attach, core driver should still failed, so no need to init connector before platform attached (Krzysztof) - Keep code style no changes with the previous exynos_dp_code.c in this patch, and update commit message about the new export symbol (Krzysztof) - Gather the device type patch (v4 11/16) into this one. (Krzysztof) - leave out the connector registration to analogix platform driver. (Thierry) - Resequence this patch after analogix_dp driver have been split from exynos_dp code, and rephrase reasonable commit message, and remove some controversial style (Krzysztof) - analogix_dp_write_byte_to_dpcd( - dp, DP_TEST_RESPONSE, + analogix_dp_write_byte_to_dpcd(dp, + DP_TEST_RESPONSE, DP_TEST_EDID_CHECKSUM_WRITE); - Switch video timing type to "u32", so driver could use "of_property_read_u32" to get the backword timing values. Krzysztof suggest me that driver could use the "of_property_read_bool" to get backword timing values, but that interfacs wo
Re: [PATCH v11 0/19] Add Analogix Core Display Port Driver
Hi Yakir, Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang: >The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller > share the same IP, so a lot of parts can be re-used. I split the common > code into bridge directory, then rk3288 and exynos only need to keep > some platform code. Cause I can't find the exact IP name of exynos dp > controller, so I decide to name dp core driver with "analogix" which I > find in rk3288 eDP TRM I'm really sorry for not thinking of this earlier, but I think we'll be doing the atomic modesetting conversion of the drm/kms driver first - see v3 series from Mark Yao. Could you handle necessary changes to make it apply and work _after_ the atomic modesetting conversion please? Thanks Heiko > But there are still three light registers setting differents bewteen > exynos and rk3288. > 1. RK3288 have five special pll resigters which not indicata in exynos >dp controller. > 2. The address of DP_PHY_PD(dp phy power manager register) are different >between rk3288 and exynos. > 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug >register). > > This series have been well tested on Rockchip platform with eDP panel on > Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have > tested on Samsung Snow and Peach Pit Chromebooks, and thanks to > Javier@Samsung help to retest the whole series on Samsung Exynos5800 Peach > Pi Chromebook, glad to say that things works rightlly. > > Thanks, > - Yakir > > > Changes in v11: > - Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko) > - Correct the title of this rockchip dp phy document(Rob) > - Add the ack from Rob Herring > - Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob) > - Add the ack from Rob Herring > - Revert parts of Gustavo Padovan's changes in commit: > drm/exynos: do not start enabling DP at bind() phase > Add dp phy poweron function in bind time. > - Move the panel prepare from get_modes time to bind time, and move > the panel unprepare from bridge->disable to unbind time. (Heiko) > > Changes in v10: > - Add the ack from Rob Herring > - Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here > (Heiko) - Add the ack from Rob Herring > - Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK > BIT(4) -> BIT(20) > - Remove the surplus "plat_data" check. (Heiko) > - switch (dp->plat_data && dp->plat_data->dev_type) { > + switch (dp->plat_data->dev_type) { > > Changes in v9: > - Document more details for 'ports' property. > - Removed the unused the variable "res" in probe function. (Heiko) > - Removed the unused head file. > > Changes in v8: > - Correct the right document path of display-timing.txt (Heiko) > - Correct the misspell of 'from' to 'frm'. (Heiko) > - Modify the commit subject name. (Heiko) > - Fix the mixed spacers on macro definitions. (Heiko) > - Remove the unnecessary empty line after clk_prepare_enable. (Heiko) > - Remove the specific address in the example node name. (Heiko) > > Changes in v7: > - Back to use the of_property_read_bool() interfacs to provoid backward > compatibility of "hsync-active-high" "vsync-active-high" "interlaced" > to avoid -EOVERFLOW error (Krzysztof) > - Simply the commit message. (Kishon) > - Symmetrical enable/disbale the phy clock and power. (Kishon) > - Simplify the commit message. (Kishon) > > Changes in v6: > - Fix the Kconfig recursive dependency (Javier) > - Fix Peach Pit hpd property name error: > - hpd-gpio = <&gpx2 6 0>; > + hpd-gpios = <&gpx2 6 0>; > > Changes in v5: > - Correct the check condition of gpio_is_valid when driver try to get > the "hpd-gpios" DT propery. (Heiko) > - Move the platform attach callback in the front of core driver bridge > attch function. Cause once platform failed at attach, core driver should > still failed, so no need to init connector before platform attached > (Krzysztof) - Keep code style no changes with the previous exynos_dp_code.c > in this patch, and update commit message about the new export symbol > (Krzysztof) - Gather the device type patch (v4 11/16) into this one. > (Krzysztof) - leave out the connector registration to analogix platform > driver. (Thierry) - Resequence this patch after analogix_dp driver have > been split > from exynos_dp code, and rephrase reasonable commit message, and > remove some controversial style (Krzysztof) > - analogix_dp_write_byte_to_dpcd( > - dp, DP_TEST_RESPONSE, > + analogix_dp_write_byte_to_dpcd(dp, > + DP_TEST_RESPONSE, > DP_TEST_EDID_CHECKSUM_WRITE); > - Switch video timing type to "u32", so driver could use > "of_property_read_u32" to get the backword timing values. Krzysztof suggest > me that driver could use the "of_property_read_bool" to get backword timing > values, but that interfacs wo
[PATCH v11 0/19] Add Analogix Core Display Port Driver
Hi all, The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller share the same IP, so a lot of parts can be re-used. I split the common code into bridge directory, then rk3288 and exynos only need to keep some platform code. Cause I can't find the exact IP name of exynos dp controller, so I decide to name dp core driver with "analogix" which I find in rk3288 eDP TRM But there are still three light registers setting differents bewteen exynos and rk3288. 1. RK3288 have five special pll resigters which not indicata in exynos dp controller. 2. The address of DP_PHY_PD(dp phy power manager register) are different between rk3288 and exynos. 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug register). This series have been well tested on Rockchip platform with eDP panel on Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have tested on Samsung Snow and Peach Pit Chromebooks, and thanks to Javier@Samsung help to retest the whole series on Samsung Exynos5800 Peach Pi Chromebook, glad to say that things works rightlly. Thanks, - Yakir Changes in v11: - Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko) - Correct the title of this rockchip dp phy document(Rob) - Add the ack from Rob Herring - Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob) - Add the ack from Rob Herring - Revert parts of Gustavo Padovan's changes in commit: drm/exynos: do not start enabling DP at bind() phase Add dp phy poweron function in bind time. - Move the panel prepare from get_modes time to bind time, and move the panel unprepare from bridge->disable to unbind time. (Heiko) Changes in v10: - Add the ack from Rob Herring - Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here (Heiko) - Add the ack from Rob Herring - Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(4) -> BIT(20) - Remove the surplus "plat_data" check. (Heiko) - switch (dp->plat_data && dp->plat_data->dev_type) { + switch (dp->plat_data->dev_type) { Changes in v9: - Document more details for 'ports' property. - Removed the unused the variable "res" in probe function. (Heiko) - Removed the unused head file. Changes in v8: - Correct the right document path of display-timing.txt (Heiko) - Correct the misspell of 'from' to 'frm'. (Heiko) - Modify the commit subject name. (Heiko) - Fix the mixed spacers on macro definitions. (Heiko) - Remove the unnecessary empty line after clk_prepare_enable. (Heiko) - Remove the specific address in the example node name. (Heiko) Changes in v7: - Back to use the of_property_read_bool() interfacs to provoid backward compatibility of "hsync-active-high" "vsync-active-high" "interlaced" to avoid -EOVERFLOW error (Krzysztof) - Simply the commit message. (Kishon) - Symmetrical enable/disbale the phy clock and power. (Kishon) - Simplify the commit message. (Kishon) Changes in v6: - Fix the Kconfig recursive dependency (Javier) - Fix Peach Pit hpd property name error: - hpd-gpio = <&gpx2 6 0>; + hpd-gpios = <&gpx2 6 0>; Changes in v5: - Correct the check condition of gpio_is_valid when driver try to get the "hpd-gpios" DT propery. (Heiko) - Move the platform attach callback in the front of core driver bridge attch function. Cause once platform failed at attach, core driver should still failed, so no need to init connector before platform attached (Krzysztof) - Keep code style no changes with the previous exynos_dp_code.c in this patch, and update commit message about the new export symbol (Krzysztof) - Gather the device type patch (v4 11/16) into this one. (Krzysztof) - leave out the connector registration to analogix platform driver. (Thierry) - Resequence this patch after analogix_dp driver have been split from exynos_dp code, and rephrase reasonable commit message, and remove some controversial style (Krzysztof) - analogix_dp_write_byte_to_dpcd( - dp, DP_TEST_RESPONSE, + analogix_dp_write_byte_to_dpcd(dp, + DP_TEST_RESPONSE, DP_TEST_EDID_CHECKSUM_WRITE); - Switch video timing type to "u32", so driver could use "of_property_read_u32" to get the backword timing values. Krzysztof suggest me that driver could use the "of_property_read_bool" to get backword timing values, but that interfacs would modify the original drm_display_mode timing directly (whether those properties exists or not). - Correct the misspell in commit message. (Krzysztof) - Remove the empty line at the end of document, and correct the endpoint numbers in the example DT node, and remove the regulator iomux setting in driver code while using the pinctl in devicetree instead. (Heiko) - Add device type declared, cause the previous "platform device type support (v4 11/16)" already merge into (v5 02/14). - Implement connector registration code. (Thierry) -