[PATCH v2 05/10] intel_mid: Renamed *mrst* to *intel_mid*
From: Kuppuswamy Sathyanarayanan
mrst is used as common name to represent all intel_mid type
soc's. But moorsetwon is just one of the intel_mid soc. So
renamed them to use intel_mid.
This patch mainly renames the variables and related
functions that uses *mrst* prefix with *intel_mid*.
To ensure that there are no functional changes, I have compared
the objdump of related files before and after rename and found
the only difference is symbol and name changes.
Signed-off-by: Kuppuswamy Sathyanarayanan
Signed-off-by: David Cohen
---
Documentation/kernel-parameters.txt|6 +-
arch/x86/include/asm/intel-mid.h | 26 ++---
arch/x86/include/asm/setup.h |4 +-
arch/x86/include/uapi/asm/bootparam.h |2 +-
arch/x86/kernel/apb_timer.c|8 +-
arch/x86/kernel/head32.c |4 +-
arch/x86/kernel/rtc.c |2 +-
arch/x86/pci/intel_mid_pci.c | 12 +--
.../platform/intel-mid/early_printk_intel_mid.c|2 +-
arch/x86/platform/intel-mid/intel-mid.c| 109 ++--
arch/x86/platform/intel-mid/intel_mid_vrtc.c |8 +-
drivers/platform/x86/intel_scu_ipc.c |2 +-
drivers/watchdog/intel_scu_watchdog.c |2 +-
13 files changed, 93 insertions(+), 94 deletions(-)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index fcbb736..dfaeb0c 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3471,11 +3471,11 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
default x2apic cluster mode on platforms
supporting x2apic.
- x86_mrst_timer= [X86-32,APBT]
- Choose timer option for x86 Moorestown MID platform.
+ x86_intel_mid_timer= [X86-32,APBT]
+ Choose timer option for x86 Intel MID platform.
Two valid options are apbt timer only and lapic timer
plus one apbt timer for broadcast timer.
- x86_mrst_timer=apbt_only | lapic_and_apbt
+ x86_intel_mid_timer=apbt_only | lapic_and_apbt
xen_emul_unplug=[HW,X86,XEN]
Unplug Xen emulated devices
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h
index cc79a4f..beb7a5f 100644
--- a/arch/x86/include/asm/intel-mid.h
+++ b/arch/x86/include/asm/intel-mid.h
@@ -13,7 +13,7 @@
#include
-extern int pci_mrst_init(void);
+extern int intel_mid_pci_init(void);
extern int __init sfi_parse_mrtc(struct sfi_table_header *table);
extern int sfi_mrtc_num;
extern struct sfi_rtc_table_entry sfi_mrtc_array[];
@@ -25,33 +25,33 @@ extern struct sfi_rtc_table_entry sfi_mrtc_array[];
* we treat Medfield/Penwell as a variant of Moorestown. Penwell can be
* identified via MSRs.
*/
-enum mrst_cpu_type {
+enum intel_mid_cpu_type {
/* 1 was Moorestown */
- MRST_CPU_CHIP_PENWELL = 2,
+ INTEL_MID_CPU_CHIP_PENWELL = 2,
};
-extern enum mrst_cpu_type __mrst_cpu_chip;
+extern enum intel_mid_cpu_type __intel_mid_cpu_chip;
#ifdef CONFIG_X86_INTEL_MID
-static inline enum mrst_cpu_type mrst_identify_cpu(void)
+static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void)
{
- return __mrst_cpu_chip;
+ return __intel_mid_cpu_chip;
}
#else /* !CONFIG_X86_INTEL_MID */
-#define mrst_identify_cpu()(0)
+#define intel_mid_identify_cpu()(0)
#endif /* !CONFIG_X86_INTEL_MID */
-enum mrst_timer_options {
- MRST_TIMER_DEFAULT,
- MRST_TIMER_APBT_ONLY,
- MRST_TIMER_LAPIC_APBT,
+enum intel_mid_timer_options {
+ INTEL_MID_TIMER_DEFAULT,
+ INTEL_MID_TIMER_APBT_ONLY,
+ INTEL_MID_TIMER_LAPIC_APBT,
};
-extern enum mrst_timer_options mrst_timer_options;
+extern enum intel_mid_timer_options intel_mid_timer_options;
/*
* Penwell uses spread spectrum clock, so the freq number is not exactly
@@ -76,6 +76,6 @@ extern void intel_scu_devices_destroy(void);
#define MRST_VRTC_MAP_SZ (1024)
/*#define MRST_VRTC_PGOFFSET (0xc00) */
-extern void mrst_rtc_init(void);
+extern void intel_mid_rtc_init(void);
#endif /* _ASM_X86_INTEL_MID_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 3475554..59bcf4e 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -51,9 +51,9 @@ extern void i386_reserve_resources(void);
extern void setup_default_timer_irq(void);
#ifdef CONFIG_X86_INTEL_MID
-extern void x86_mrst_early_setup(void);
+extern void x86_intel_mid_early_setup(void);
#else
-static inline void x86_mrst_early_setup(void) { }
+static inline void x86_intel_mid_early_setup(void) { }
#endif
#ifdef CONFIG_X86_INTEL_CE
diff --git
[PATCH v2 05/10] intel_mid: Renamed *mrst* to *intel_mid*
From: Kuppuswamy Sathyanarayanan sathyanarayanan.kuppusw...@linux.intel.com
mrst is used as common name to represent all intel_mid type
soc's. But moorsetwon is just one of the intel_mid soc. So
renamed them to use intel_mid.
This patch mainly renames the variables and related
functions that uses *mrst* prefix with *intel_mid*.
To ensure that there are no functional changes, I have compared
the objdump of related files before and after rename and found
the only difference is symbol and name changes.
Signed-off-by: Kuppuswamy Sathyanarayanan
sathyanarayanan.kuppusw...@linux.intel.com
Signed-off-by: David Cohen david.a.co...@linux.intel.com
---
Documentation/kernel-parameters.txt|6 +-
arch/x86/include/asm/intel-mid.h | 26 ++---
arch/x86/include/asm/setup.h |4 +-
arch/x86/include/uapi/asm/bootparam.h |2 +-
arch/x86/kernel/apb_timer.c|8 +-
arch/x86/kernel/head32.c |4 +-
arch/x86/kernel/rtc.c |2 +-
arch/x86/pci/intel_mid_pci.c | 12 +--
.../platform/intel-mid/early_printk_intel_mid.c|2 +-
arch/x86/platform/intel-mid/intel-mid.c| 109 ++--
arch/x86/platform/intel-mid/intel_mid_vrtc.c |8 +-
drivers/platform/x86/intel_scu_ipc.c |2 +-
drivers/watchdog/intel_scu_watchdog.c |2 +-
13 files changed, 93 insertions(+), 94 deletions(-)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index fcbb736..dfaeb0c 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3471,11 +3471,11 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
default x2apic cluster mode on platforms
supporting x2apic.
- x86_mrst_timer= [X86-32,APBT]
- Choose timer option for x86 Moorestown MID platform.
+ x86_intel_mid_timer= [X86-32,APBT]
+ Choose timer option for x86 Intel MID platform.
Two valid options are apbt timer only and lapic timer
plus one apbt timer for broadcast timer.
- x86_mrst_timer=apbt_only | lapic_and_apbt
+ x86_intel_mid_timer=apbt_only | lapic_and_apbt
xen_emul_unplug=[HW,X86,XEN]
Unplug Xen emulated devices
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h
index cc79a4f..beb7a5f 100644
--- a/arch/x86/include/asm/intel-mid.h
+++ b/arch/x86/include/asm/intel-mid.h
@@ -13,7 +13,7 @@
#include linux/sfi.h
-extern int pci_mrst_init(void);
+extern int intel_mid_pci_init(void);
extern int __init sfi_parse_mrtc(struct sfi_table_header *table);
extern int sfi_mrtc_num;
extern struct sfi_rtc_table_entry sfi_mrtc_array[];
@@ -25,33 +25,33 @@ extern struct sfi_rtc_table_entry sfi_mrtc_array[];
* we treat Medfield/Penwell as a variant of Moorestown. Penwell can be
* identified via MSRs.
*/
-enum mrst_cpu_type {
+enum intel_mid_cpu_type {
/* 1 was Moorestown */
- MRST_CPU_CHIP_PENWELL = 2,
+ INTEL_MID_CPU_CHIP_PENWELL = 2,
};
-extern enum mrst_cpu_type __mrst_cpu_chip;
+extern enum intel_mid_cpu_type __intel_mid_cpu_chip;
#ifdef CONFIG_X86_INTEL_MID
-static inline enum mrst_cpu_type mrst_identify_cpu(void)
+static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void)
{
- return __mrst_cpu_chip;
+ return __intel_mid_cpu_chip;
}
#else /* !CONFIG_X86_INTEL_MID */
-#define mrst_identify_cpu()(0)
+#define intel_mid_identify_cpu()(0)
#endif /* !CONFIG_X86_INTEL_MID */
-enum mrst_timer_options {
- MRST_TIMER_DEFAULT,
- MRST_TIMER_APBT_ONLY,
- MRST_TIMER_LAPIC_APBT,
+enum intel_mid_timer_options {
+ INTEL_MID_TIMER_DEFAULT,
+ INTEL_MID_TIMER_APBT_ONLY,
+ INTEL_MID_TIMER_LAPIC_APBT,
};
-extern enum mrst_timer_options mrst_timer_options;
+extern enum intel_mid_timer_options intel_mid_timer_options;
/*
* Penwell uses spread spectrum clock, so the freq number is not exactly
@@ -76,6 +76,6 @@ extern void intel_scu_devices_destroy(void);
#define MRST_VRTC_MAP_SZ (1024)
/*#define MRST_VRTC_PGOFFSET (0xc00) */
-extern void mrst_rtc_init(void);
+extern void intel_mid_rtc_init(void);
#endif /* _ASM_X86_INTEL_MID_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 3475554..59bcf4e 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -51,9 +51,9 @@ extern void i386_reserve_resources(void);
extern void setup_default_timer_irq(void);
#ifdef CONFIG_X86_INTEL_MID
-extern void x86_mrst_early_setup(void);
+extern void x86_intel_mid_early_setup(void);
#else
-static inline void x86_mrst_early_setup(void) { }
