[PATCH v2 1/3] nvmem: add snvs_lpgpr driver

2017-04-10 Thread Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Cc: Srinivas Kandagatla 
Cc: Maxime Ripard 
Cc: linux-kernel@vger.kernel.org
---
 drivers/nvmem/Kconfig  |  13 +
 drivers/nvmem/Makefile |   2 +
 drivers/nvmem/snvs_lpgpr.c | 132 +
 3 files changed, 147 insertions(+)
 create mode 100644 drivers/nvmem/snvs_lpgpr.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 650f1b1797ad..52cdfd4275d7 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -133,4 +133,17 @@ config MESON_EFUSE
  This driver can also be built as a module. If so, the module
  will be called nvmem_meson_efuse.
 
+config NVMEM_SNVS_LPGPR
+   tristate "Support for Low Power General Purpose Register"
+   depends on HAS_IOMEM
+   depends on OF
+   select REGMAP_MMIO
+   select MFD_SYSCON
+   help
+ This is a driver for Low Power General Purpose Register (LPGPR) 
available on
+ i.MX6 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.
+
+ This driver can also be built as a module. If so, the module
+ will be called nvmem-snvs-lpgpr.
+
 endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 86e45995fdad..4ba7685e36ff 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -28,3 +28,5 @@ obj-$(CONFIG_NVMEM_VF610_OCOTP)   += nvmem-vf610-ocotp.o
 nvmem-vf610-ocotp-y:= vf610-ocotp.o
 obj-$(CONFIG_MESON_EFUSE)  += nvmem_meson_efuse.o
 nvmem_meson_efuse-y:= meson-efuse.o
+obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o
+nvmem_snvs_lpgpr-y := snvs_lpgpr.o
diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c
new file mode 100644
index ..fea72b424426
--- /dev/null
+++ b/drivers/nvmem/snvs_lpgpr.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2015 Pengutronix, Steffen Trumtrar 
+ * Copyright (c) 2017 Pengutronix, Oleksij Rempel 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct snvs_lpgpr_priv {
+   struct device_d *dev;
+   struct regmap   *regmap;
+   int offset;
+   struct nvmem_config cfg;
+};
+
+static int snvs_lpgpr_write(void *context, unsigned int offset, void *_val,
+   size_t bytes)
+{
+   struct snvs_lpgpr_priv *priv = context;
+   const u32 *val = _val;
+   int i = 0, words = bytes / 4;
+
+   while (words--)
+   regmap_write(priv->regmap, priv->offset + offset + (i++ * 4),
+*val++);
+
+   return 0;
+}
+
+static int snvs_lpgpr_read(void *context, unsigned int offset, void *_val,
+  size_t bytes)
+{
+   struct snvs_lpgpr_priv *priv = context;
+   u32 *val = _val;
+   int i = 0, words = bytes / 4;
+
+   while (words--)
+   regmap_read(priv->regmap, priv->offset + offset + (i++ * 4),
+   val++);
+
+   return 0;
+}
+
+static int snvs_lpgpr_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct device_node *node = dev->of_node;
+   struct device_node *syscon_node;
+   struct snvs_lpgpr_priv *priv;
+   struct nvmem_config *cfg;
+   struct nvmem_device *nvmem;
+   int err;
+
+   if (!node)
+   return -ENOENT;
+
+   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+
+syscon_node = of_get_parent(node);
+   if (!syscon_node)
+   return -ENODEV;
+
+   priv->regmap = syscon_node_to_regmap(syscon_node);
+   of_node_put(syscon_node);
+   if (IS_ERR(priv->regmap))
+   return PTR_ERR(priv->regmap);
+
+   err = of_property_read_u32(node, "offset", >offset);
+   if (err)
+   return err;
+
+   cfg = >cfg;
+   cfg->priv = priv;
+   cfg->name = dev_name(dev);
+   cfg->dev = dev;
+   cfg->stride = 4,
+   cfg->word_size = 4,
+   cfg->size = 4,
+   cfg->owner = THIS_MODULE,
+   cfg->reg_read  = snvs_lpgpr_read,
+   cfg->reg_write = snvs_lpgpr_write,
+
+   nvmem = nvmem_register(cfg);
+   if (IS_ERR(nvmem))
+ 

[PATCH v2 1/3] nvmem: add snvs_lpgpr driver

2017-04-10 Thread Oleksij Rempel
This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Cc: Srinivas Kandagatla 
Cc: Maxime Ripard 
Cc: linux-kernel@vger.kernel.org
---
 drivers/nvmem/Kconfig  |  13 +
 drivers/nvmem/Makefile |   2 +
 drivers/nvmem/snvs_lpgpr.c | 132 +
 3 files changed, 147 insertions(+)
 create mode 100644 drivers/nvmem/snvs_lpgpr.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 650f1b1797ad..52cdfd4275d7 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -133,4 +133,17 @@ config MESON_EFUSE
  This driver can also be built as a module. If so, the module
  will be called nvmem_meson_efuse.
 
+config NVMEM_SNVS_LPGPR
+   tristate "Support for Low Power General Purpose Register"
+   depends on HAS_IOMEM
+   depends on OF
+   select REGMAP_MMIO
+   select MFD_SYSCON
+   help
+ This is a driver for Low Power General Purpose Register (LPGPR) 
available on
+ i.MX6 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.
+
+ This driver can also be built as a module. If so, the module
+ will be called nvmem-snvs-lpgpr.
+
 endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 86e45995fdad..4ba7685e36ff 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -28,3 +28,5 @@ obj-$(CONFIG_NVMEM_VF610_OCOTP)   += nvmem-vf610-ocotp.o
 nvmem-vf610-ocotp-y:= vf610-ocotp.o
 obj-$(CONFIG_MESON_EFUSE)  += nvmem_meson_efuse.o
 nvmem_meson_efuse-y:= meson-efuse.o
+obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o
+nvmem_snvs_lpgpr-y := snvs_lpgpr.o
diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c
new file mode 100644
index ..fea72b424426
--- /dev/null
+++ b/drivers/nvmem/snvs_lpgpr.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2015 Pengutronix, Steffen Trumtrar 
+ * Copyright (c) 2017 Pengutronix, Oleksij Rempel 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct snvs_lpgpr_priv {
+   struct device_d *dev;
+   struct regmap   *regmap;
+   int offset;
+   struct nvmem_config cfg;
+};
+
+static int snvs_lpgpr_write(void *context, unsigned int offset, void *_val,
+   size_t bytes)
+{
+   struct snvs_lpgpr_priv *priv = context;
+   const u32 *val = _val;
+   int i = 0, words = bytes / 4;
+
+   while (words--)
+   regmap_write(priv->regmap, priv->offset + offset + (i++ * 4),
+*val++);
+
+   return 0;
+}
+
+static int snvs_lpgpr_read(void *context, unsigned int offset, void *_val,
+  size_t bytes)
+{
+   struct snvs_lpgpr_priv *priv = context;
+   u32 *val = _val;
+   int i = 0, words = bytes / 4;
+
+   while (words--)
+   regmap_read(priv->regmap, priv->offset + offset + (i++ * 4),
+   val++);
+
+   return 0;
+}
+
+static int snvs_lpgpr_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct device_node *node = dev->of_node;
+   struct device_node *syscon_node;
+   struct snvs_lpgpr_priv *priv;
+   struct nvmem_config *cfg;
+   struct nvmem_device *nvmem;
+   int err;
+
+   if (!node)
+   return -ENOENT;
+
+   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+
+syscon_node = of_get_parent(node);
+   if (!syscon_node)
+   return -ENODEV;
+
+   priv->regmap = syscon_node_to_regmap(syscon_node);
+   of_node_put(syscon_node);
+   if (IS_ERR(priv->regmap))
+   return PTR_ERR(priv->regmap);
+
+   err = of_property_read_u32(node, "offset", >offset);
+   if (err)
+   return err;
+
+   cfg = >cfg;
+   cfg->priv = priv;
+   cfg->name = dev_name(dev);
+   cfg->dev = dev;
+   cfg->stride = 4,
+   cfg->word_size = 4,
+   cfg->size = 4,
+   cfg->owner = THIS_MODULE,
+   cfg->reg_read  = snvs_lpgpr_read,
+   cfg->reg_write = snvs_lpgpr_write,
+
+   nvmem = nvmem_register(cfg);
+   if (IS_ERR(nvmem))
+   return PTR_ERR(nvmem);
+
+   platform_set_drvdata(pdev, nvmem);
+
+   return 0;
+}
+
+static int snvs_lpgpr_remove(struct