Re: [PATCH v2 2/2] ARM: dts: am335x: add am335x-sancloud-bbe board support

2018-07-12 Thread Koen Kooi 



> Op 12 jul. 2018, om 05:08 heeft Robert Nelson  het 
> volgende geschreven:
> 
> On Wed, Jul 11, 2018 at 8:31 AM, Tony Lindgren  wrote:
>> * Koen Kooi  [180711 07:36]:
>>> +&cpu0_opp_table {
>>> + /*
>>> +  * All PG 2.0 silicon may not support 1GHz but some of the early
>>> +  * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
>>> +  * to support 1GHz OPP so enable it for PG 2.0 on this board.
>>> +  */
>>> + oppnitro-10 {
>>> + opp-supported-hw = <0x06 0x0100>;
>>> + };
>>> +};
>> 
>> Is the above valid for new boards or should it be just
>> dropped? Or is the comment just out of date?
> 
> For SanCloud, this can be dropped, they got normal 1Ghz parts from TI.
> 
> and they aren't using the Octavo SIP which didn't have the 1Ghz efuse set..
> 
> So just the normal am335x errata, nothing special required in it’s dts...

Thanks for the info! I’ll send a v3 with that bit removed shortly after I 
figure out what trips up kbuild.

regards,

Koen

Re: [PATCH v2 2/2] ARM: dts: am335x: add am335x-sancloud-bbe board support

2018-07-11 Thread Robert Nelson 
On Wed, Jul 11, 2018 at 8:31 AM, Tony Lindgren  wrote:
> * Koen Kooi  [180711 07:36]:
>> +&cpu0_opp_table {
>> + /*
>> +  * All PG 2.0 silicon may not support 1GHz but some of the early
>> +  * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
>> +  * to support 1GHz OPP so enable it for PG 2.0 on this board.
>> +  */
>> + oppnitro-10 {
>> + opp-supported-hw = <0x06 0x0100>;
>> + };
>> +};
>
> Is the above valid for new boards or should it be just
> dropped? Or is the comment just out of date?

For SanCloud, this can be dropped, they got normal 1Ghz parts from TI.

and they aren't using the Octavo SIP which didn't have the 1Ghz efuse set..

So just the normal am335x errata, nothing special required in it's dts...

Regards,

-- 
Robert Nelson
https://rcn-ee.com/

Re: [PATCH v2 2/2] ARM: dts: am335x: add am335x-sancloud-bbe board support

2018-07-11 Thread Tony Lindgren 
* Koen Kooi  [180711 07:36]:
> +&cpu0_opp_table {
> + /*
> +  * All PG 2.0 silicon may not support 1GHz but some of the early
> +  * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
> +  * to support 1GHz OPP so enable it for PG 2.0 on this board.
> +  */
> + oppnitro-10 {
> + opp-supported-hw = <0x06 0x0100>;
> + };
> +};

Is the above valid for new boards or should it be just
dropped? Or is the comment just out of date?

Regards,

Tony

[PATCH v2 2/2] ARM: dts: am335x: add am335x-sancloud-bbe board support

2018-07-11 Thread Koen Kooi 
The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:

 * Gigabit capable PHY
 * Extra USB hub, optional i2c control
 * lps3331ap barometer connected over i2c
 * MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
 * 1GiB DDR3 RAM
 * RTL8723 Wifi/Bluetooth connected over USB

Tested on a revision G board.

Signed-off-by: Koen Kooi 
---

v2: * Add missing #include 
* Fix Barometer compatible string
v1: Initial submission


 arch/arm/boot/dts/Makefile|   1 +
 arch/arm/boot/dts/am335x-sancloud-bbe.dts | 147 ++
 2 files changed, 148 insertions(+)
 create mode 100644 arch/arm/boot/dts/am335x-sancloud-bbe.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de7..83a4d61 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -695,6 +695,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \
am335x-pocketbeagle.dtb \
+   am335x-sancloud-bbe.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
am335x-sl50.dtb \
diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe.dts 
b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
new file mode 100644
index 000..6c0a145
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
@@ -0,0 +1,147 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
+#include 
+
+/ {
+   model = "SanCloud BeagleBone Enhanced";
+   compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", 
"ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+   /*
+* All PG 2.0 silicon may not support 1GHz but some of the early
+* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+* to support 1GHz OPP so enable it for PG 2.0 on this board.
+*/
+   oppnitro-10 {
+   opp-supported-hw = <0x06 0x0100>;
+   };
+};
+
+&am33xx_pinmux {
+   pinctrl-names = "default";
+
+   cpsw_default: cpsw_default {
+   pinctrl-single,pins = <
+   /* Slave 1 */
+   AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txen.rgmii1_tctl */
+   AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxdv.rgmii1_rctl */
+   AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txd3.rgmii1_td3 */
+   AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txd2.rgmii1_td2 */
+   AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txd1.rgmii1_td1 */
+   AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txd0.rgmii1_td0 */
+   AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
/* mii1_txclk.rgmii1_tclk */
+   AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxclk.rgmii1_rclk */
+   AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxd3.rgmii1_rd3 */
+   AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxd2.rgmii1_rd2 */
+   AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxd1.rgmii1_rd1 */
+   AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) 
/* mii1_rxd0.rgmii1_rd0 */
+   >;
+   };
+
+   cpsw_sleep: cpsw_sleep {
+   pinctrl-single,pins = <
+   /* Slave 1 reset value */
+   AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
+   >;
+   };
+
+   davinci_mdio_default: davinci_mdio_default {
+   pinctrl-single,pins = <
+   /* MDIO */
+